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22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/pnp.h>
26#include <linux/slab.h>
27#include <linux/interrupt.h>
28#include <linux/wait.h>
29#include <linux/acpi.h>
30#include <linux/freezer.h>
31#include "tpm.h"
32#include "tpm_tis_core.h"
33
34static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
35
36static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
37 bool check_cancel, bool *canceled)
38{
39 u8 status = chip->ops->status(chip);
40
41 *canceled = false;
42 if ((status & mask) == mask)
43 return true;
44 if (check_cancel && chip->ops->req_canceled(chip, status)) {
45 *canceled = true;
46 return true;
47 }
48 return false;
49}
50
51static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
52 unsigned long timeout, wait_queue_head_t *queue,
53 bool check_cancel)
54{
55 unsigned long stop;
56 long rc;
57 u8 status;
58 bool canceled = false;
59
60
61 status = chip->ops->status(chip);
62 if ((status & mask) == mask)
63 return 0;
64
65 stop = jiffies + timeout;
66
67 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
68again:
69 timeout = stop - jiffies;
70 if ((long)timeout <= 0)
71 return -ETIME;
72 rc = wait_event_interruptible_timeout(*queue,
73 wait_for_tpm_stat_cond(chip, mask, check_cancel,
74 &canceled),
75 timeout);
76 if (rc > 0) {
77 if (canceled)
78 return -ECANCELED;
79 return 0;
80 }
81 if (rc == -ERESTARTSYS && freezing(current)) {
82 clear_thread_flag(TIF_SIGPENDING);
83 goto again;
84 }
85 } else {
86 do {
87 usleep_range(TPM_TIMEOUT_USECS_MIN,
88 TPM_TIMEOUT_USECS_MAX);
89 status = chip->ops->status(chip);
90 if ((status & mask) == mask)
91 return 0;
92 } while (time_before(jiffies, stop));
93 }
94 return -ETIME;
95}
96
97
98
99
100
101
102static int wait_startup(struct tpm_chip *chip, int l)
103{
104 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
105 unsigned long stop = jiffies + chip->timeout_a;
106
107 do {
108 int rc;
109 u8 access;
110
111 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
112 if (rc < 0)
113 return rc;
114
115 if (access & TPM_ACCESS_VALID)
116 return 0;
117 tpm_msleep(TPM_TIMEOUT);
118 } while (time_before(jiffies, stop));
119 return -1;
120}
121
122static bool check_locality(struct tpm_chip *chip, int l)
123{
124 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
125 int rc;
126 u8 access;
127
128 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
129 if (rc < 0)
130 return false;
131
132 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
133 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
134 priv->locality = l;
135 return true;
136 }
137
138 return false;
139}
140
141static bool locality_inactive(struct tpm_chip *chip, int l)
142{
143 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
144 int rc;
145 u8 access;
146
147 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
148 if (rc < 0)
149 return false;
150
151 if ((access & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY))
152 == TPM_ACCESS_VALID)
153 return true;
154
155 return false;
156}
157
158static int release_locality(struct tpm_chip *chip, int l)
159{
160 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
161 unsigned long stop, timeout;
162 long rc;
163
164 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
165
166 stop = jiffies + chip->timeout_a;
167
168 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
169again:
170 timeout = stop - jiffies;
171 if ((long)timeout <= 0)
172 return -1;
173
174 rc = wait_event_interruptible_timeout(priv->int_queue,
175 (locality_inactive(chip, l)),
176 timeout);
177
178 if (rc > 0)
179 return 0;
180
181 if (rc == -ERESTARTSYS && freezing(current)) {
182 clear_thread_flag(TIF_SIGPENDING);
183 goto again;
184 }
185 } else {
186 do {
187 if (locality_inactive(chip, l))
188 return 0;
189 tpm_msleep(TPM_TIMEOUT);
190 } while (time_before(jiffies, stop));
191 }
192 return -1;
193}
194
195static int request_locality(struct tpm_chip *chip, int l)
196{
197 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
198 unsigned long stop, timeout;
199 long rc;
200
201 if (check_locality(chip, l))
202 return l;
203
204 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
205 if (rc < 0)
206 return rc;
207
208 stop = jiffies + chip->timeout_a;
209
210 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
211again:
212 timeout = stop - jiffies;
213 if ((long)timeout <= 0)
214 return -1;
215 rc = wait_event_interruptible_timeout(priv->int_queue,
216 (check_locality
217 (chip, l)),
218 timeout);
219 if (rc > 0)
220 return l;
221 if (rc == -ERESTARTSYS && freezing(current)) {
222 clear_thread_flag(TIF_SIGPENDING);
223 goto again;
224 }
225 } else {
226
227 do {
228 if (check_locality(chip, l))
229 return l;
230 tpm_msleep(TPM_TIMEOUT);
231 } while (time_before(jiffies, stop));
232 }
233 return -1;
234}
235
236static u8 tpm_tis_status(struct tpm_chip *chip)
237{
238 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
239 int rc;
240 u8 status;
241
242 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
243 if (rc < 0)
244 return 0;
245
246 return status;
247}
248
249static void tpm_tis_ready(struct tpm_chip *chip)
250{
251 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
252
253
254 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
255}
256
257static int get_burstcount(struct tpm_chip *chip)
258{
259 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
260 unsigned long stop;
261 int burstcnt, rc;
262 u32 value;
263
264
265 if (chip->flags & TPM_CHIP_FLAG_TPM2)
266 stop = jiffies + chip->timeout_a;
267 else
268 stop = jiffies + chip->timeout_d;
269 do {
270 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
271 if (rc < 0)
272 return rc;
273
274 burstcnt = (value >> 8) & 0xFFFF;
275 if (burstcnt)
276 return burstcnt;
277 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
278 } while (time_before(jiffies, stop));
279 return -EBUSY;
280}
281
282static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
283{
284 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
285 int size = 0, burstcnt, rc;
286
287 while (size < count) {
288 rc = wait_for_tpm_stat(chip,
289 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
290 chip->timeout_c,
291 &priv->read_queue, true);
292 if (rc < 0)
293 return rc;
294 burstcnt = get_burstcount(chip);
295 if (burstcnt < 0) {
296 dev_err(&chip->dev, "Unable to read burstcount\n");
297 return burstcnt;
298 }
299 burstcnt = min_t(int, burstcnt, count - size);
300
301 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
302 burstcnt, buf + size);
303 if (rc < 0)
304 return rc;
305
306 size += burstcnt;
307 }
308 return size;
309}
310
311static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
312{
313 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
314 int size = 0;
315 int status;
316 u32 expected;
317
318 if (count < TPM_HEADER_SIZE) {
319 size = -EIO;
320 goto out;
321 }
322
323 size = recv_data(chip, buf, TPM_HEADER_SIZE);
324
325 if (size < TPM_HEADER_SIZE) {
326 dev_err(&chip->dev, "Unable to read header\n");
327 goto out;
328 }
329
330 expected = be32_to_cpu(*(__be32 *) (buf + 2));
331 if (expected > count || expected < TPM_HEADER_SIZE) {
332 size = -EIO;
333 goto out;
334 }
335
336 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
337 expected - TPM_HEADER_SIZE);
338 if (size < expected) {
339 dev_err(&chip->dev, "Unable to read remainder of result\n");
340 size = -ETIME;
341 goto out;
342 }
343
344 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
345 &priv->int_queue, false) < 0) {
346 size = -ETIME;
347 goto out;
348 }
349 status = tpm_tis_status(chip);
350 if (status & TPM_STS_DATA_AVAIL) {
351 dev_err(&chip->dev, "Error left over data\n");
352 size = -EIO;
353 goto out;
354 }
355
356out:
357 tpm_tis_ready(chip);
358 return size;
359}
360
361
362
363
364
365
366static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
367{
368 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
369 int rc, status, burstcnt;
370 size_t count = 0;
371 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
372
373 status = tpm_tis_status(chip);
374 if ((status & TPM_STS_COMMAND_READY) == 0) {
375 tpm_tis_ready(chip);
376 if (wait_for_tpm_stat
377 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
378 &priv->int_queue, false) < 0) {
379 rc = -ETIME;
380 goto out_err;
381 }
382 }
383
384 while (count < len - 1) {
385 burstcnt = get_burstcount(chip);
386 if (burstcnt < 0) {
387 dev_err(&chip->dev, "Unable to read burstcount\n");
388 rc = burstcnt;
389 goto out_err;
390 }
391 burstcnt = min_t(int, burstcnt, len - count - 1);
392 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
393 burstcnt, buf + count);
394 if (rc < 0)
395 goto out_err;
396
397 count += burstcnt;
398
399 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
400 &priv->int_queue, false) < 0) {
401 rc = -ETIME;
402 goto out_err;
403 }
404 status = tpm_tis_status(chip);
405 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
406 rc = -EIO;
407 goto out_err;
408 }
409 }
410
411
412 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
413 if (rc < 0)
414 goto out_err;
415
416 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
417 &priv->int_queue, false) < 0) {
418 rc = -ETIME;
419 goto out_err;
420 }
421 status = tpm_tis_status(chip);
422 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
423 rc = -EIO;
424 goto out_err;
425 }
426
427 return 0;
428
429out_err:
430 tpm_tis_ready(chip);
431 return rc;
432}
433
434static void disable_interrupts(struct tpm_chip *chip)
435{
436 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
437 u32 intmask;
438 int rc;
439
440 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
441 if (rc < 0)
442 intmask = 0;
443
444 intmask &= ~TPM_GLOBAL_INT_ENABLE;
445 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
446
447 devm_free_irq(chip->dev.parent, priv->irq, chip);
448 priv->irq = 0;
449 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
450}
451
452
453
454
455
456
457static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
458{
459 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
460 int rc;
461 u32 ordinal;
462 unsigned long dur;
463
464 rc = tpm_tis_send_data(chip, buf, len);
465 if (rc < 0)
466 return rc;
467
468
469 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
470 if (rc < 0)
471 goto out_err;
472
473 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
474 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
475
476 if (chip->flags & TPM_CHIP_FLAG_TPM2)
477 dur = tpm2_calc_ordinal_duration(chip, ordinal);
478 else
479 dur = tpm_calc_ordinal_duration(chip, ordinal);
480
481 if (wait_for_tpm_stat
482 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
483 &priv->read_queue, false) < 0) {
484 rc = -ETIME;
485 goto out_err;
486 }
487 }
488 return len;
489out_err:
490 tpm_tis_ready(chip);
491 return rc;
492}
493
494static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
495{
496 int rc, irq;
497 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
498
499 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
500 return tpm_tis_send_main(chip, buf, len);
501
502
503 irq = priv->irq;
504 priv->irq = 0;
505 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
506 rc = tpm_tis_send_main(chip, buf, len);
507 priv->irq = irq;
508 chip->flags |= TPM_CHIP_FLAG_IRQ;
509 if (!priv->irq_tested)
510 tpm_msleep(1);
511 if (!priv->irq_tested)
512 disable_interrupts(chip);
513 priv->irq_tested = true;
514 return rc;
515}
516
517struct tis_vendor_timeout_override {
518 u32 did_vid;
519 unsigned long timeout_us[4];
520};
521
522static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
523
524 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
525 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
526};
527
528static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
529 unsigned long *timeout_cap)
530{
531 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
532 int i, rc;
533 u32 did_vid;
534
535 if (chip->ops->clk_enable != NULL)
536 chip->ops->clk_enable(chip, true);
537
538 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
539 if (rc < 0)
540 goto out;
541
542 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
543 if (vendor_timeout_overrides[i].did_vid != did_vid)
544 continue;
545 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
546 sizeof(vendor_timeout_overrides[i].timeout_us));
547 rc = true;
548 }
549
550 rc = false;
551
552out:
553 if (chip->ops->clk_enable != NULL)
554 chip->ops->clk_enable(chip, false);
555
556 return rc;
557}
558
559
560
561
562
563
564static int probe_itpm(struct tpm_chip *chip)
565{
566 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
567 int rc = 0;
568 static const u8 cmd_getticks[] = {
569 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
570 0x00, 0x00, 0x00, 0xf1
571 };
572 size_t len = sizeof(cmd_getticks);
573 u16 vendor;
574
575 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
576 return 0;
577
578 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
579 if (rc < 0)
580 return rc;
581
582
583 if (vendor != TPM_VID_INTEL)
584 return 0;
585
586 if (request_locality(chip, 0) != 0)
587 return -EBUSY;
588
589 rc = tpm_tis_send_data(chip, cmd_getticks, len);
590 if (rc == 0)
591 goto out;
592
593 tpm_tis_ready(chip);
594
595 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
596
597 rc = tpm_tis_send_data(chip, cmd_getticks, len);
598 if (rc == 0)
599 dev_info(&chip->dev, "Detected an iTPM.\n");
600 else {
601 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
602 rc = -EFAULT;
603 }
604
605out:
606 tpm_tis_ready(chip);
607 release_locality(chip, priv->locality);
608
609 return rc;
610}
611
612static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
613{
614 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
615
616 switch (priv->manufacturer_id) {
617 case TPM_VID_WINBOND:
618 return ((status == TPM_STS_VALID) ||
619 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
620 case TPM_VID_STM:
621 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
622 default:
623 return (status == TPM_STS_COMMAND_READY);
624 }
625}
626
627static irqreturn_t tis_int_handler(int dummy, void *dev_id)
628{
629 struct tpm_chip *chip = dev_id;
630 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
631 u32 interrupt;
632 int i, rc;
633
634 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
635 if (rc < 0)
636 return IRQ_NONE;
637
638 if (interrupt == 0)
639 return IRQ_NONE;
640
641 priv->irq_tested = true;
642 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
643 wake_up_interruptible(&priv->read_queue);
644 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
645 for (i = 0; i < 5; i++)
646 if (check_locality(chip, i))
647 break;
648 if (interrupt &
649 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
650 TPM_INTF_CMD_READY_INT))
651 wake_up_interruptible(&priv->int_queue);
652
653
654 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
655 if (rc < 0)
656 return IRQ_NONE;
657
658 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
659 return IRQ_HANDLED;
660}
661
662static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
663{
664 const char *desc = "attempting to generate an interrupt";
665 u32 cap2;
666 cap_t cap;
667
668 if (chip->flags & TPM_CHIP_FLAG_TPM2)
669 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
670 else
671 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
672 0);
673}
674
675
676
677
678
679static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
680 int flags, int irq)
681{
682 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
683 u8 original_int_vec;
684 int rc;
685 u32 int_status;
686
687 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
688 dev_name(&chip->dev), chip) != 0) {
689 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
690 irq);
691 return -1;
692 }
693 priv->irq = irq;
694
695 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
696 &original_int_vec);
697 if (rc < 0)
698 return rc;
699
700 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
701 if (rc < 0)
702 return rc;
703
704 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
705 if (rc < 0)
706 return rc;
707
708
709 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
710 if (rc < 0)
711 return rc;
712
713
714 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
715 intmask | TPM_GLOBAL_INT_ENABLE);
716 if (rc < 0)
717 return rc;
718
719 priv->irq_tested = false;
720
721
722
723
724 rc = tpm_tis_gen_interrupt(chip);
725 if (rc < 0)
726 return rc;
727
728
729
730
731 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
732 rc = tpm_tis_write8(priv, original_int_vec,
733 TPM_INT_VECTOR(priv->locality));
734 if (rc < 0)
735 return rc;
736
737 return 1;
738 }
739
740 return 0;
741}
742
743
744
745
746
747static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
748{
749 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
750 u8 original_int_vec;
751 int i, rc;
752
753 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
754 &original_int_vec);
755 if (rc < 0)
756 return;
757
758 if (!original_int_vec) {
759 if (IS_ENABLED(CONFIG_X86))
760 for (i = 3; i <= 15; i++)
761 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
762 i))
763 return;
764 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
765 original_int_vec))
766 return;
767}
768
769void tpm_tis_remove(struct tpm_chip *chip)
770{
771 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
772 u32 reg = TPM_INT_ENABLE(priv->locality);
773 u32 interrupt;
774 int rc;
775
776 tpm_tis_clkrun_enable(chip, true);
777
778 rc = tpm_tis_read32(priv, reg, &interrupt);
779 if (rc < 0)
780 interrupt = 0;
781
782 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
783
784 tpm_tis_clkrun_enable(chip, false);
785
786 if (priv->ilb_base_addr)
787 iounmap(priv->ilb_base_addr);
788}
789EXPORT_SYMBOL_GPL(tpm_tis_remove);
790
791
792
793
794
795
796
797
798
799
800static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
801{
802 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
803 u32 clkrun_val;
804
805 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
806 !data->ilb_base_addr)
807 return;
808
809 if (value) {
810 data->clkrun_enabled++;
811 if (data->clkrun_enabled > 1)
812 return;
813 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
814
815
816 clkrun_val &= ~LPC_CLKRUN_EN;
817 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
818
819
820
821
822
823 outb(0xCC, 0x80);
824 } else {
825 data->clkrun_enabled--;
826 if (data->clkrun_enabled)
827 return;
828
829 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
830
831
832 clkrun_val |= LPC_CLKRUN_EN;
833 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
834
835
836
837
838
839 outb(0xCC, 0x80);
840 }
841}
842
843static const struct tpm_class_ops tpm_tis = {
844 .flags = TPM_OPS_AUTO_STARTUP,
845 .status = tpm_tis_status,
846 .recv = tpm_tis_recv,
847 .send = tpm_tis_send,
848 .cancel = tpm_tis_ready,
849 .update_timeouts = tpm_tis_update_timeouts,
850 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
851 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
852 .req_canceled = tpm_tis_req_canceled,
853 .request_locality = request_locality,
854 .relinquish_locality = release_locality,
855 .clk_enable = tpm_tis_clkrun_enable,
856};
857
858int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
859 const struct tpm_tis_phy_ops *phy_ops,
860 acpi_handle acpi_dev_handle)
861{
862 u32 vendor;
863 u32 intfcaps;
864 u32 intmask;
865 u32 clkrun_val;
866 u8 rid;
867 int rc, probe;
868 struct tpm_chip *chip;
869
870 chip = tpmm_chip_alloc(dev, &tpm_tis);
871 if (IS_ERR(chip))
872 return PTR_ERR(chip);
873
874#ifdef CONFIG_ACPI
875 chip->acpi_dev_handle = acpi_dev_handle;
876#endif
877
878 chip->hwrng.quality = priv->rng_quality;
879
880
881 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
882 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
883 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
884 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
885 priv->phy_ops = phy_ops;
886 dev_set_drvdata(&chip->dev, priv);
887
888 if (is_bsw()) {
889 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
890 ILB_REMAP_SIZE);
891 if (!priv->ilb_base_addr)
892 return -ENOMEM;
893
894 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
895
896 if (!(clkrun_val & LPC_CLKRUN_EN)) {
897 iounmap(priv->ilb_base_addr);
898 priv->ilb_base_addr = NULL;
899 }
900 }
901
902 if (chip->ops->clk_enable != NULL)
903 chip->ops->clk_enable(chip, true);
904
905 if (wait_startup(chip, 0) != 0) {
906 rc = -ENODEV;
907 goto out_err;
908 }
909
910
911 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
912 if (rc < 0)
913 goto out_err;
914
915 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
916 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
917 intmask &= ~TPM_GLOBAL_INT_ENABLE;
918 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
919
920 rc = tpm2_probe(chip);
921 if (rc)
922 goto out_err;
923
924 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
925 if (rc < 0)
926 goto out_err;
927
928 priv->manufacturer_id = vendor;
929
930 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
931 if (rc < 0)
932 goto out_err;
933
934 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
935 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
936 vendor >> 16, rid);
937
938 probe = probe_itpm(chip);
939 if (probe < 0) {
940 rc = -ENODEV;
941 goto out_err;
942 }
943
944
945 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
946 if (rc < 0)
947 goto out_err;
948
949 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
950 intfcaps);
951 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
952 dev_dbg(dev, "\tBurst Count Static\n");
953 if (intfcaps & TPM_INTF_CMD_READY_INT)
954 dev_dbg(dev, "\tCommand Ready Int Support\n");
955 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
956 dev_dbg(dev, "\tInterrupt Edge Falling\n");
957 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
958 dev_dbg(dev, "\tInterrupt Edge Rising\n");
959 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
960 dev_dbg(dev, "\tInterrupt Level Low\n");
961 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
962 dev_dbg(dev, "\tInterrupt Level High\n");
963 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
964 dev_dbg(dev, "\tLocality Change Int Support\n");
965 if (intfcaps & TPM_INTF_STS_VALID_INT)
966 dev_dbg(dev, "\tSts Valid Int Support\n");
967 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
968 dev_dbg(dev, "\tData Avail Int Support\n");
969
970
971 init_waitqueue_head(&priv->read_queue);
972 init_waitqueue_head(&priv->int_queue);
973 if (irq != -1) {
974
975
976
977
978 if (tpm_get_timeouts(chip)) {
979 dev_err(dev, "Could not get TPM timeouts and durations\n");
980 rc = -ENODEV;
981 goto out_err;
982 }
983
984 if (irq) {
985 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
986 irq);
987 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
988 dev_err(&chip->dev, FW_BUG
989 "TPM interrupt not working, polling instead\n");
990 } else {
991 tpm_tis_probe_irq(chip, intmask);
992 }
993 }
994
995 rc = tpm_chip_register(chip);
996 if (rc)
997 goto out_err;
998
999 if (chip->ops->clk_enable != NULL)
1000 chip->ops->clk_enable(chip, false);
1001
1002 return 0;
1003out_err:
1004 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL))
1005 chip->ops->clk_enable(chip, false);
1006
1007 tpm_tis_remove(chip);
1008
1009 return rc;
1010}
1011EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1012
1013#ifdef CONFIG_PM_SLEEP
1014static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1015{
1016 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1017 u32 intmask;
1018 int rc;
1019
1020 if (chip->ops->clk_enable != NULL)
1021 chip->ops->clk_enable(chip, true);
1022
1023
1024
1025
1026 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1027 if (rc < 0)
1028 goto out;
1029
1030 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1031 if (rc < 0)
1032 goto out;
1033
1034 intmask |= TPM_INTF_CMD_READY_INT
1035 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1036 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1037
1038 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1039
1040out:
1041 if (chip->ops->clk_enable != NULL)
1042 chip->ops->clk_enable(chip, false);
1043
1044 return;
1045}
1046
1047int tpm_tis_resume(struct device *dev)
1048{
1049 struct tpm_chip *chip = dev_get_drvdata(dev);
1050 int ret;
1051
1052 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1053 tpm_tis_reenable_interrupts(chip);
1054
1055 ret = tpm_pm_resume(dev);
1056 if (ret)
1057 return ret;
1058
1059
1060
1061
1062 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1063 tpm_do_selftest(chip);
1064
1065 return 0;
1066}
1067EXPORT_SYMBOL_GPL(tpm_tis_resume);
1068#endif
1069
1070MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1071MODULE_DESCRIPTION("TPM Driver");
1072MODULE_VERSION("2.0");
1073MODULE_LICENSE("GPL");
1074