LXR linux/drivers/gpu/drm/amd/display/dc/i2caux/dce120/i2caux

   1/*
   2 * Copyright 2012-16 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#include "dm_services.h"
  27
  28#include "include/i2caux_interface.h"
  29#include "../i2caux.h"
  30#include "../engine.h"
  31#include "../i2c_engine.h"
  32#include "../i2c_sw_engine.h"
  33#include "../i2c_hw_engine.h"
  34
  35#include "../dce110/i2c_hw_engine_dce110.h"
  36#include "../dce110/aux_engine_dce110.h"
  37#include "../dce110/i2caux_dce110.h"
  38
  39#include "dce/dce_12_0_offset.h"
  40#include "dce/dce_12_0_sh_mask.h"
  41#include "soc15_hw_ip.h"
  42#include "vega10_ip_offset.h"
  43
  44/* begin *********************
  45 * macros to expend register list macro defined in HW object header file */
  46
  47#define BASE_INNER(seg) \
  48        DCE_BASE__INST0_SEG ## seg
  49
  50/* compile time expand base address. */
  51#define BASE(seg) \
  52        BASE_INNER(seg)
  53
  54#define SR(reg_name)\
  55                .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
  56                                        mm ## reg_name
  57
  58#define SRI(reg_name, block, id)\
  59        .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
  60                                        mm ## block ## id ## _ ## reg_name
  61/* macros to expend register list macro defined in HW object header file
  62 * end *********************/
  63
  64#define aux_regs(id)\
  65[id] = {\
  66        AUX_COMMON_REG_LIST(id), \
  67        .AUX_RESET_MASK = DP_AUX0_AUX_CONTROL__AUX_RESET_MASK \
  68}
  69
  70static const struct dce110_aux_registers dce120_aux_regs[] = {
  71                aux_regs(0),
  72                aux_regs(1),
  73                aux_regs(2),
  74                aux_regs(3),
  75                aux_regs(4),
  76                aux_regs(5),
  77};
  78
  79#define hw_engine_regs(id)\
  80{\
  81                I2C_HW_ENGINE_COMMON_REG_LIST(id) \
  82}
  83
  84static const struct dce110_i2c_hw_engine_registers dce120_hw_engine_regs[] = {
  85                hw_engine_regs(1),
  86                hw_engine_regs(2),
  87                hw_engine_regs(3),
  88                hw_engine_regs(4),
  89                hw_engine_regs(5),
  90                hw_engine_regs(6)
  91};
  92
  93static const struct dce110_i2c_hw_engine_shift i2c_shift = {
  94                I2C_COMMON_MASK_SH_LIST_DCE110(__SHIFT)
  95};
  96
  97static const struct dce110_i2c_hw_engine_mask i2c_mask = {
  98                I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
  99};
 100
 101struct i2caux *dal_i2caux_dce120_create(
 102        struct dc_context *ctx)
 103{
 104        struct i2caux_dce110 *i2caux_dce110 =
 105                kzalloc(sizeof(struct i2caux_dce110), GFP_KERNEL);
 106
 107        if (!i2caux_dce110) {
 108                ASSERT_CRITICAL(false);
 109                return NULL;
 110        }
 111
 112        dal_i2caux_dce110_construct(i2caux_dce110,
 113                                    ctx,
 114                                    ARRAY_SIZE(dce120_aux_regs),
 115                                    dce120_aux_regs,
 116                                    dce120_hw_engine_regs,
 117                                    &i2c_shift,
 118                                    &i2c_mask);
 119        return &i2caux_dce110->base;
 120}
 121