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22#include "core.h"
23
24#include <nvif/class.h>
25
26void
27nv50_core_del(struct nv50_core **pcore)
28{
29 struct nv50_core *core = *pcore;
30 if (core) {
31 nv50_dmac_destroy(&core->chan);
32 kfree(*pcore);
33 *pcore = NULL;
34 }
35}
36
37int
38nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore)
39{
40 struct {
41 s32 oclass;
42 int version;
43 int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
44 } cores[] = {
45 { GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
46 { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
47 { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
48 { GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
49 { GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
50 { GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
51 { GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
52 { GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new },
53 { GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
54 { GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
55 { GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
56 { G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
57 { NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
58 {}
59 };
60 struct nv50_disp *disp = nv50_disp(drm->dev);
61 int cid;
62
63 cid = nvif_mclass(&disp->disp->object, cores);
64 if (cid < 0) {
65 NV_ERROR(drm, "No supported core channel class\n");
66 return cid;
67 }
68
69 return cores[cid].new(drm, cores[cid].oclass, pcore);
70}
71