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6#include <linux/delay.h>
7#include <linux/slab.h>
8#include <linux/sched/types.h>
9
10#include <media/cec-pin.h>
11#include "cec-pin-priv.h"
12
13
14
15
16#define CEC_TIM_START_BIT_LOW 3700
17#define CEC_TIM_START_BIT_LOW_MIN 3500
18#define CEC_TIM_START_BIT_LOW_MAX 3900
19#define CEC_TIM_START_BIT_TOTAL 4500
20#define CEC_TIM_START_BIT_TOTAL_MIN 4300
21#define CEC_TIM_START_BIT_TOTAL_MAX 4700
22
23
24#define CEC_TIM_DATA_BIT_0_LOW 1500
25#define CEC_TIM_DATA_BIT_0_LOW_MIN 1300
26#define CEC_TIM_DATA_BIT_0_LOW_MAX 1700
27#define CEC_TIM_DATA_BIT_1_LOW 600
28#define CEC_TIM_DATA_BIT_1_LOW_MIN 400
29#define CEC_TIM_DATA_BIT_1_LOW_MAX 800
30#define CEC_TIM_DATA_BIT_TOTAL 2400
31#define CEC_TIM_DATA_BIT_TOTAL_MIN 2050
32#define CEC_TIM_DATA_BIT_TOTAL_MAX 2750
33
34#define CEC_TIM_DATA_BIT_SAMPLE 850
35
36#define CEC_TIM_DATA_BIT_HIGH 1750
37
38
39#define CEC_TIM_IDLE_SAMPLE 1000
40
41#define CEC_TIM_START_BIT_SAMPLE 500
42
43#define CEC_TIM_SAMPLE 50
44
45#define CEC_TIM_LOW_DRIVE_ERROR (1.5 * CEC_TIM_DATA_BIT_TOTAL)
46
47
48
49
50
51#define CEC_TIM_DATA_BIT_TOTAL_SHORT 1800
52#define CEC_TIM_DATA_BIT_TOTAL_LONG 2900
53
54
55
56
57
58#define CEC_TIM_START_BIT_TOTAL_SHORT 4100
59#define CEC_TIM_START_BIT_TOTAL_LONG 5000
60
61
62#define EOM_BIT 8
63#define ACK_BIT 9
64
65struct cec_state {
66 const char * const name;
67 unsigned int usecs;
68};
69
70static const struct cec_state states[CEC_PIN_STATES] = {
71 { "Off", 0 },
72 { "Idle", CEC_TIM_IDLE_SAMPLE },
73 { "Tx Wait", CEC_TIM_SAMPLE },
74 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
75 { "Tx Start Bit Low", CEC_TIM_START_BIT_LOW },
76 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
77 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
78 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
79 { "Tx Start Bit Low Custom", 0 },
80 { "Tx Start Bit High Custom", 0 },
81 { "Tx Data 0 Low", CEC_TIM_DATA_BIT_0_LOW },
82 { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
83 { "Tx Data 0 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_0_LOW },
84 { "Tx Data 0 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_0_LOW },
85 { "Tx Data 1 Low", CEC_TIM_DATA_BIT_1_LOW },
86 { "Tx Data 1 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
87 { "Tx Data 1 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_1_LOW },
88 { "Tx Data 1 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_1_LOW },
89 { "Tx Data 1 High Pre Sample", CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
90 { "Tx Data 1 High Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
91 { "Tx Data 1 High Post Sample Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_SAMPLE },
92 { "Tx Data 1 High Post Sample Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_SAMPLE },
93 { "Tx Data Bit Low Custom", 0 },
94 { "Tx Data Bit High Custom", 0 },
95 { "Tx Pulse Low Custom", 0 },
96 { "Tx Pulse High Custom", 0 },
97 { "Tx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
98 { "Rx Start Bit Low", CEC_TIM_SAMPLE },
99 { "Rx Start Bit High", CEC_TIM_SAMPLE },
100 { "Rx Data Sample", CEC_TIM_DATA_BIT_SAMPLE },
101 { "Rx Data Post Sample", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
102 { "Rx Data Wait for Low", CEC_TIM_SAMPLE },
103 { "Rx Ack Low", CEC_TIM_DATA_BIT_0_LOW },
104 { "Rx Ack Low Post", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
105 { "Rx Ack High Post", CEC_TIM_DATA_BIT_HIGH },
106 { "Rx Ack Finish", CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
107 { "Rx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
108 { "Rx Irq", 0 },
109};
110
111static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
112{
113 if (!force && v == pin->adap->cec_pin_is_high)
114 return;
115
116 pin->adap->cec_pin_is_high = v;
117 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) {
118 u8 ev = v;
119
120 if (pin->work_pin_events_dropped) {
121 pin->work_pin_events_dropped = false;
122 ev |= CEC_PIN_EVENT_FL_DROPPED;
123 }
124 pin->work_pin_events[pin->work_pin_events_wr] = ev;
125 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
126 pin->work_pin_events_wr =
127 (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
128 atomic_inc(&pin->work_pin_num_events);
129 } else {
130 pin->work_pin_events_dropped = true;
131 pin->work_pin_events_dropped_cnt++;
132 }
133 wake_up_interruptible(&pin->kthread_waitq);
134}
135
136static bool cec_pin_read(struct cec_pin *pin)
137{
138 bool v = pin->ops->read(pin->adap);
139
140 cec_pin_update(pin, v, false);
141 return v;
142}
143
144static void cec_pin_low(struct cec_pin *pin)
145{
146 pin->ops->low(pin->adap);
147 cec_pin_update(pin, false, false);
148}
149
150static bool cec_pin_high(struct cec_pin *pin)
151{
152 pin->ops->high(pin->adap);
153 return cec_pin_read(pin);
154}
155
156static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
157 int arg_idx, u8 *arg)
158{
159#ifdef CONFIG_CEC_PIN_ERROR_INJ
160 u16 cmd = cec_pin_rx_error_inj(pin);
161 u64 e = pin->error_inj[cmd];
162 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
163
164 if (arg_idx >= 0) {
165 u8 pos = pin->error_inj_args[cmd][arg_idx];
166
167 if (arg)
168 *arg = pos;
169 else if (pos != pin->rx_bit)
170 return false;
171 }
172
173 switch (mode) {
174 case CEC_ERROR_INJ_MODE_ONCE:
175 pin->error_inj[cmd] &=
176 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
177 return true;
178 case CEC_ERROR_INJ_MODE_ALWAYS:
179 return true;
180 case CEC_ERROR_INJ_MODE_TOGGLE:
181 return pin->rx_toggle;
182 default:
183 return false;
184 }
185#else
186 return false;
187#endif
188}
189
190static bool rx_nack(struct cec_pin *pin)
191{
192 return rx_error_inj(pin, CEC_ERROR_INJ_RX_NACK_OFFSET, -1, NULL);
193}
194
195static bool rx_low_drive(struct cec_pin *pin)
196{
197 return rx_error_inj(pin, CEC_ERROR_INJ_RX_LOW_DRIVE_OFFSET,
198 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, NULL);
199}
200
201static bool rx_add_byte(struct cec_pin *pin)
202{
203 return rx_error_inj(pin, CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, NULL);
204}
205
206static bool rx_remove_byte(struct cec_pin *pin)
207{
208 return rx_error_inj(pin, CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, NULL);
209}
210
211static bool rx_arb_lost(struct cec_pin *pin, u8 *poll)
212{
213 return pin->tx_msg.len == 0 &&
214 rx_error_inj(pin, CEC_ERROR_INJ_RX_ARB_LOST_OFFSET,
215 CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, poll);
216}
217
218static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
219 int arg_idx, u8 *arg)
220{
221#ifdef CONFIG_CEC_PIN_ERROR_INJ
222 u16 cmd = cec_pin_tx_error_inj(pin);
223 u64 e = pin->error_inj[cmd];
224 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
225
226 if (arg_idx >= 0) {
227 u8 pos = pin->error_inj_args[cmd][arg_idx];
228
229 if (arg)
230 *arg = pos;
231 else if (pos != pin->tx_bit)
232 return false;
233 }
234
235 switch (mode) {
236 case CEC_ERROR_INJ_MODE_ONCE:
237 pin->error_inj[cmd] &=
238 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
239 return true;
240 case CEC_ERROR_INJ_MODE_ALWAYS:
241 return true;
242 case CEC_ERROR_INJ_MODE_TOGGLE:
243 return pin->tx_toggle;
244 default:
245 return false;
246 }
247#else
248 return false;
249#endif
250}
251
252static bool tx_no_eom(struct cec_pin *pin)
253{
254 return tx_error_inj(pin, CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, NULL);
255}
256
257static bool tx_early_eom(struct cec_pin *pin)
258{
259 return tx_error_inj(pin, CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, NULL);
260}
261
262static bool tx_short_bit(struct cec_pin *pin)
263{
264 return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET,
265 CEC_ERROR_INJ_TX_SHORT_BIT_ARG_IDX, NULL);
266}
267
268static bool tx_long_bit(struct cec_pin *pin)
269{
270 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_BIT_OFFSET,
271 CEC_ERROR_INJ_TX_LONG_BIT_ARG_IDX, NULL);
272}
273
274static bool tx_custom_bit(struct cec_pin *pin)
275{
276 return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET,
277 CEC_ERROR_INJ_TX_CUSTOM_BIT_ARG_IDX, NULL);
278}
279
280static bool tx_short_start(struct cec_pin *pin)
281{
282 return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_START_OFFSET, -1, NULL);
283}
284
285static bool tx_long_start(struct cec_pin *pin)
286{
287 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_START_OFFSET, -1, NULL);
288}
289
290static bool tx_custom_start(struct cec_pin *pin)
291{
292 return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_START_OFFSET,
293 -1, NULL);
294}
295
296static bool tx_last_bit(struct cec_pin *pin)
297{
298 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LAST_BIT_OFFSET,
299 CEC_ERROR_INJ_TX_LAST_BIT_ARG_IDX, NULL);
300}
301
302static u8 tx_add_bytes(struct cec_pin *pin)
303{
304 u8 bytes;
305
306 if (tx_error_inj(pin, CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET,
307 CEC_ERROR_INJ_TX_ADD_BYTES_ARG_IDX, &bytes))
308 return bytes;
309 return 0;
310}
311
312static bool tx_remove_byte(struct cec_pin *pin)
313{
314 return tx_error_inj(pin, CEC_ERROR_INJ_TX_REMOVE_BYTE_OFFSET, -1, NULL);
315}
316
317static bool tx_low_drive(struct cec_pin *pin)
318{
319 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LOW_DRIVE_OFFSET,
320 CEC_ERROR_INJ_TX_LOW_DRIVE_ARG_IDX, NULL);
321}
322
323static void cec_pin_to_idle(struct cec_pin *pin)
324{
325
326
327
328
329 pin->rx_bit = pin->tx_bit = 0;
330 pin->rx_msg.len = 0;
331 memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
332 pin->ts = ns_to_ktime(0);
333 pin->tx_generated_poll = false;
334 pin->tx_post_eom = false;
335 if (pin->state >= CEC_ST_TX_WAIT &&
336 pin->state <= CEC_ST_TX_LOW_DRIVE)
337 pin->tx_toggle ^= 1;
338 if (pin->state >= CEC_ST_RX_START_BIT_LOW &&
339 pin->state <= CEC_ST_RX_LOW_DRIVE)
340 pin->rx_toggle ^= 1;
341 pin->state = CEC_ST_IDLE;
342}
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369
370static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
371{
372 bool v;
373 bool is_ack_bit, ack;
374
375 switch (pin->state) {
376 case CEC_ST_TX_WAIT_FOR_HIGH:
377 if (cec_pin_read(pin))
378 cec_pin_to_idle(pin);
379 break;
380
381 case CEC_ST_TX_START_BIT_LOW:
382 if (tx_short_start(pin)) {
383
384
385
386
387 pin->state = CEC_ST_TX_START_BIT_HIGH_SHORT;
388 } else if (tx_long_start(pin)) {
389
390
391
392
393 pin->state = CEC_ST_TX_START_BIT_HIGH_LONG;
394 } else {
395 pin->state = CEC_ST_TX_START_BIT_HIGH;
396 }
397
398 cec_pin_high(pin);
399 break;
400
401 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
402 pin->state = CEC_ST_TX_START_BIT_HIGH_CUSTOM;
403
404 cec_pin_high(pin);
405 break;
406
407 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
408 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
409 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
410 if (pin->tx_nacked) {
411 cec_pin_to_idle(pin);
412 pin->tx_msg.len = 0;
413 if (pin->tx_generated_poll)
414 break;
415 pin->work_tx_ts = ts;
416 pin->work_tx_status = CEC_TX_STATUS_NACK;
417 wake_up_interruptible(&pin->kthread_waitq);
418 break;
419 }
420
421 case CEC_ST_TX_DATA_BIT_0_HIGH:
422 case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
423 case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
424 case CEC_ST_TX_DATA_BIT_1_HIGH:
425 case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
426 case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
427
428
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431
432
433
434
435 if (!cec_pin_read(pin) && !pin->tx_generated_poll) {
436
437
438
439
440 pin->tx_msg.len = 0;
441 pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
442 pin->work_tx_ts = ts;
443 pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
444 pin->tx_low_drive_cnt++;
445 wake_up_interruptible(&pin->kthread_waitq);
446 break;
447 }
448
449 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
450 if (tx_last_bit(pin)) {
451
452 cec_pin_to_idle(pin);
453 pin->tx_msg.len = 0;
454 if (pin->tx_generated_poll)
455 break;
456 pin->work_tx_ts = ts;
457 pin->work_tx_status = CEC_TX_STATUS_OK;
458 wake_up_interruptible(&pin->kthread_waitq);
459 break;
460 }
461 pin->tx_bit++;
462
463 case CEC_ST_TX_START_BIT_HIGH:
464 case CEC_ST_TX_START_BIT_HIGH_SHORT:
465 case CEC_ST_TX_START_BIT_HIGH_LONG:
466 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
467 if (tx_low_drive(pin)) {
468
469 cec_pin_low(pin);
470 pin->state = CEC_ST_TX_LOW_DRIVE;
471 pin->tx_msg.len = 0;
472 if (pin->tx_generated_poll)
473 break;
474 pin->work_tx_ts = ts;
475 pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
476 pin->tx_low_drive_cnt++;
477 wake_up_interruptible(&pin->kthread_waitq);
478 break;
479 }
480 if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) {
481 cec_pin_to_idle(pin);
482 pin->tx_msg.len = 0;
483 if (pin->tx_generated_poll)
484 break;
485 pin->work_tx_ts = ts;
486 pin->work_tx_status = CEC_TX_STATUS_OK;
487 wake_up_interruptible(&pin->kthread_waitq);
488 break;
489 }
490
491 switch (pin->tx_bit % 10) {
492 default: {
493
494
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496
497
498
499 unsigned int idx = (pin->tx_bit / 10);
500 u8 val = idx;
501
502 if (idx < pin->tx_msg.len)
503 val = pin->tx_msg.msg[idx];
504 v = val & (1 << (7 - (pin->tx_bit % 10)));
505
506 pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
507 CEC_ST_TX_DATA_BIT_0_LOW;
508 break;
509 }
510 case EOM_BIT: {
511 unsigned int tot_len = pin->tx_msg.len +
512 pin->tx_extra_bytes;
513 unsigned int tx_byte_idx = pin->tx_bit / 10;
514
515 v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1;
516 if (tot_len > 1 && tx_byte_idx == tot_len - 2 &&
517 tx_early_eom(pin)) {
518
519 v = true;
520 pin->tx_post_eom = true;
521 } else if (v && tx_no_eom(pin)) {
522
523 v = false;
524 }
525 pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
526 CEC_ST_TX_DATA_BIT_0_LOW;
527 break;
528 }
529 case ACK_BIT:
530 pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
531 break;
532 }
533 if (tx_custom_bit(pin))
534 pin->state = CEC_ST_TX_DATA_BIT_LOW_CUSTOM;
535 cec_pin_low(pin);
536 break;
537
538 case CEC_ST_TX_DATA_BIT_0_LOW:
539 case CEC_ST_TX_DATA_BIT_1_LOW:
540 v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
541 is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
542 if (v && (pin->tx_bit < 4 || is_ack_bit)) {
543 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
544 } else if (!is_ack_bit && tx_short_bit(pin)) {
545
546 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT :
547 CEC_ST_TX_DATA_BIT_0_HIGH_SHORT;
548 } else if (!is_ack_bit && tx_long_bit(pin)) {
549
550 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG :
551 CEC_ST_TX_DATA_BIT_0_HIGH_LONG;
552 } else {
553 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
554 CEC_ST_TX_DATA_BIT_0_HIGH;
555 }
556 cec_pin_high(pin);
557 break;
558
559 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
560 pin->state = CEC_ST_TX_DATA_BIT_HIGH_CUSTOM;
561 cec_pin_high(pin);
562 break;
563
564 case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
565
566 v = cec_pin_read(pin);
567 is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
568
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575
576 if (!v && !is_ack_bit && !pin->tx_generated_poll) {
577 pin->tx_msg.len = 0;
578 pin->work_tx_ts = ts;
579 pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
580 wake_up_interruptible(&pin->kthread_waitq);
581 pin->rx_bit = pin->tx_bit;
582 pin->tx_bit = 0;
583 memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
584 pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
585 pin->rx_msg.msg[0] &= (0xff << (8 - pin->rx_bit));
586 pin->rx_msg.len = 0;
587 pin->ts = ktime_sub_us(ts, CEC_TIM_DATA_BIT_SAMPLE);
588 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
589 pin->rx_bit++;
590 break;
591 }
592 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
593 if (!is_ack_bit && tx_short_bit(pin)) {
594
595 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT;
596 } else if (!is_ack_bit && tx_long_bit(pin)) {
597
598 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG;
599 }
600 if (!is_ack_bit)
601 break;
602
603 ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
604 if (!ack && !pin->tx_ignore_nack_until_eom &&
605 pin->tx_bit / 10 < pin->tx_msg.len && !pin->tx_post_eom) {
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618 pin->tx_nacked = true;
619 }
620 break;
621
622 case CEC_ST_TX_PULSE_LOW_CUSTOM:
623 cec_pin_high(pin);
624 pin->state = CEC_ST_TX_PULSE_HIGH_CUSTOM;
625 break;
626
627 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
628 cec_pin_to_idle(pin);
629 break;
630
631 default:
632 break;
633 }
634}
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651static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
652{
653 s32 delta;
654 bool v;
655 bool ack;
656 bool bcast, for_us;
657 u8 dest;
658 u8 poll;
659
660 switch (pin->state) {
661
662 case CEC_ST_RX_START_BIT_LOW:
663 v = cec_pin_read(pin);
664 if (!v)
665 break;
666 pin->state = CEC_ST_RX_START_BIT_HIGH;
667 delta = ktime_us_delta(ts, pin->ts);
668
669 if (delta < CEC_TIM_START_BIT_LOW_MIN - CEC_TIM_IDLE_SAMPLE) {
670 if (!pin->rx_start_bit_low_too_short_cnt++) {
671 pin->rx_start_bit_low_too_short_ts = ktime_to_ns(pin->ts);
672 pin->rx_start_bit_low_too_short_delta = delta;
673 }
674 cec_pin_to_idle(pin);
675 break;
676 }
677 if (rx_arb_lost(pin, &poll)) {
678 cec_msg_init(&pin->tx_msg, poll >> 4, poll & 0xf);
679 pin->tx_generated_poll = true;
680 pin->tx_extra_bytes = 0;
681 pin->state = CEC_ST_TX_START_BIT_HIGH;
682 pin->ts = ts;
683 }
684 break;
685
686 case CEC_ST_RX_START_BIT_HIGH:
687 v = cec_pin_read(pin);
688 delta = ktime_us_delta(ts, pin->ts);
689
690
691
692
693 if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) {
694 pin->rx_start_bit_too_long_cnt++;
695 cec_pin_to_idle(pin);
696 break;
697 }
698 if (v)
699 break;
700
701 if (delta < CEC_TIM_START_BIT_TOTAL_MIN - CEC_TIM_IDLE_SAMPLE) {
702 if (!pin->rx_start_bit_too_short_cnt++) {
703 pin->rx_start_bit_too_short_ts = ktime_to_ns(pin->ts);
704 pin->rx_start_bit_too_short_delta = delta;
705 }
706 cec_pin_to_idle(pin);
707 break;
708 }
709 if (rx_low_drive(pin)) {
710
711 cec_pin_low(pin);
712 pin->state = CEC_ST_RX_LOW_DRIVE;
713 pin->rx_low_drive_cnt++;
714 break;
715 }
716 pin->state = CEC_ST_RX_DATA_SAMPLE;
717 pin->ts = ts;
718 pin->rx_eom = false;
719 break;
720
721 case CEC_ST_RX_DATA_SAMPLE:
722 v = cec_pin_read(pin);
723 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
724 switch (pin->rx_bit % 10) {
725 default:
726 if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
727 pin->rx_msg.msg[pin->rx_bit / 10] |=
728 v << (7 - (pin->rx_bit % 10));
729 break;
730 case EOM_BIT:
731 pin->rx_eom = v;
732 pin->rx_msg.len = pin->rx_bit / 10 + 1;
733 break;
734 case ACK_BIT:
735 break;
736 }
737 pin->rx_bit++;
738 break;
739
740 case CEC_ST_RX_DATA_POST_SAMPLE:
741 pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
742 break;
743
744 case CEC_ST_RX_DATA_WAIT_FOR_LOW:
745 v = cec_pin_read(pin);
746 delta = ktime_us_delta(ts, pin->ts);
747
748
749
750
751 if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) {
752 pin->rx_data_bit_too_long_cnt++;
753 cec_pin_to_idle(pin);
754 break;
755 }
756 if (v)
757 break;
758
759 if (rx_low_drive(pin)) {
760
761 cec_pin_low(pin);
762 pin->state = CEC_ST_RX_LOW_DRIVE;
763 pin->rx_low_drive_cnt++;
764 break;
765 }
766
767
768
769
770
771 if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
772 if (!pin->rx_data_bit_too_short_cnt++) {
773 pin->rx_data_bit_too_short_ts = ktime_to_ns(pin->ts);
774 pin->rx_data_bit_too_short_delta = delta;
775 }
776 cec_pin_low(pin);
777 pin->state = CEC_ST_RX_LOW_DRIVE;
778 pin->rx_low_drive_cnt++;
779 break;
780 }
781 pin->ts = ts;
782 if (pin->rx_bit % 10 != 9) {
783 pin->state = CEC_ST_RX_DATA_SAMPLE;
784 break;
785 }
786
787 dest = cec_msg_destination(&pin->rx_msg);
788 bcast = dest == CEC_LOG_ADDR_BROADCAST;
789
790 for_us = bcast || (pin->la_mask & (1 << dest));
791
792 ack = bcast ? 1 : !for_us;
793
794 if (for_us && rx_nack(pin)) {
795
796 ack = !ack;
797 }
798
799 if (ack) {
800
801 pin->state = CEC_ST_RX_ACK_HIGH_POST;
802 break;
803 }
804 cec_pin_low(pin);
805 pin->state = CEC_ST_RX_ACK_LOW;
806 break;
807
808 case CEC_ST_RX_ACK_LOW:
809 cec_pin_high(pin);
810 pin->state = CEC_ST_RX_ACK_LOW_POST;
811 break;
812
813 case CEC_ST_RX_ACK_LOW_POST:
814 case CEC_ST_RX_ACK_HIGH_POST:
815 v = cec_pin_read(pin);
816 if (v && pin->rx_eom) {
817 pin->work_rx_msg = pin->rx_msg;
818 pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
819 wake_up_interruptible(&pin->kthread_waitq);
820 pin->ts = ts;
821 pin->state = CEC_ST_RX_ACK_FINISH;
822 break;
823 }
824 pin->rx_bit++;
825 pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
826 break;
827
828 case CEC_ST_RX_ACK_FINISH:
829 cec_pin_to_idle(pin);
830 break;
831
832 default:
833 break;
834 }
835}
836
837
838
839
840
841static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
842{
843 struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
844 struct cec_adapter *adap = pin->adap;
845 ktime_t ts;
846 s32 delta;
847 u32 usecs;
848
849 ts = ktime_get();
850 if (ktime_to_ns(pin->timer_ts)) {
851 delta = ktime_us_delta(ts, pin->timer_ts);
852 pin->timer_cnt++;
853 if (delta > 100 && pin->state != CEC_ST_IDLE) {
854
855 pin->timer_sum_overrun += delta;
856 pin->timer_100ms_overruns++;
857 if (delta > 300)
858 pin->timer_300ms_overruns++;
859 if (delta > pin->timer_max_overrun)
860 pin->timer_max_overrun = delta;
861 }
862 }
863 if (adap->monitor_pin_cnt)
864 cec_pin_read(pin);
865
866 if (pin->wait_usecs) {
867
868
869
870
871 if (pin->wait_usecs > 150) {
872 pin->wait_usecs -= 100;
873 pin->timer_ts = ktime_add_us(ts, 100);
874 hrtimer_forward_now(timer, ns_to_ktime(100000));
875 return HRTIMER_RESTART;
876 }
877 if (pin->wait_usecs > 100) {
878 pin->wait_usecs /= 2;
879 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
880 hrtimer_forward_now(timer,
881 ns_to_ktime(pin->wait_usecs * 1000));
882 return HRTIMER_RESTART;
883 }
884 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
885 hrtimer_forward_now(timer,
886 ns_to_ktime(pin->wait_usecs * 1000));
887 pin->wait_usecs = 0;
888 return HRTIMER_RESTART;
889 }
890
891 switch (pin->state) {
892
893 case CEC_ST_TX_WAIT_FOR_HIGH:
894 case CEC_ST_TX_START_BIT_LOW:
895 case CEC_ST_TX_START_BIT_HIGH:
896 case CEC_ST_TX_START_BIT_HIGH_SHORT:
897 case CEC_ST_TX_START_BIT_HIGH_LONG:
898 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
899 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
900 case CEC_ST_TX_DATA_BIT_0_LOW:
901 case CEC_ST_TX_DATA_BIT_0_HIGH:
902 case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
903 case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
904 case CEC_ST_TX_DATA_BIT_1_LOW:
905 case CEC_ST_TX_DATA_BIT_1_HIGH:
906 case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
907 case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
908 case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
909 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
910 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
911 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
912 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
913 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
914 case CEC_ST_TX_PULSE_LOW_CUSTOM:
915 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
916 cec_pin_tx_states(pin, ts);
917 break;
918
919
920 case CEC_ST_RX_START_BIT_LOW:
921 case CEC_ST_RX_START_BIT_HIGH:
922 case CEC_ST_RX_DATA_SAMPLE:
923 case CEC_ST_RX_DATA_POST_SAMPLE:
924 case CEC_ST_RX_DATA_WAIT_FOR_LOW:
925 case CEC_ST_RX_ACK_LOW:
926 case CEC_ST_RX_ACK_LOW_POST:
927 case CEC_ST_RX_ACK_HIGH_POST:
928 case CEC_ST_RX_ACK_FINISH:
929 cec_pin_rx_states(pin, ts);
930 break;
931
932 case CEC_ST_IDLE:
933 case CEC_ST_TX_WAIT:
934 if (!cec_pin_high(pin)) {
935
936 pin->ts = ts;
937 pin->state = CEC_ST_RX_START_BIT_LOW;
938 break;
939 }
940 if (ktime_to_ns(pin->ts) == 0)
941 pin->ts = ts;
942 if (pin->tx_msg.len) {
943
944
945
946
947 delta = ktime_us_delta(ts, pin->ts);
948 if (delta / CEC_TIM_DATA_BIT_TOTAL >
949 pin->tx_signal_free_time) {
950 pin->tx_nacked = false;
951 if (tx_custom_start(pin))
952 pin->state = CEC_ST_TX_START_BIT_LOW_CUSTOM;
953 else
954 pin->state = CEC_ST_TX_START_BIT_LOW;
955
956 cec_pin_low(pin);
957 break;
958 }
959 if (delta / CEC_TIM_DATA_BIT_TOTAL >
960 pin->tx_signal_free_time - 1)
961 pin->state = CEC_ST_TX_WAIT;
962 break;
963 }
964 if (pin->tx_custom_pulse && pin->state == CEC_ST_IDLE) {
965 pin->tx_custom_pulse = false;
966
967 cec_pin_low(pin);
968 pin->state = CEC_ST_TX_PULSE_LOW_CUSTOM;
969 break;
970 }
971 if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
972 pin->enable_irq_failed || adap->is_configuring ||
973 adap->is_configured || adap->monitor_all_cnt)
974 break;
975
976 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
977 pin->state = CEC_ST_RX_IRQ;
978 wake_up_interruptible(&pin->kthread_waitq);
979 return HRTIMER_NORESTART;
980
981 case CEC_ST_TX_LOW_DRIVE:
982 case CEC_ST_RX_LOW_DRIVE:
983 cec_pin_high(pin);
984 cec_pin_to_idle(pin);
985 break;
986
987 default:
988 break;
989 }
990
991 switch (pin->state) {
992 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
993 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
994 case CEC_ST_TX_PULSE_LOW_CUSTOM:
995 usecs = pin->tx_custom_low_usecs;
996 break;
997 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
998 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
999 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
1000 usecs = pin->tx_custom_high_usecs;
1001 break;
1002 default:
1003 usecs = states[pin->state].usecs;
1004 break;
1005 }
1006
1007 if (!adap->monitor_pin_cnt || usecs <= 150) {
1008 pin->wait_usecs = 0;
1009 pin->timer_ts = ktime_add_us(ts, usecs);
1010 hrtimer_forward_now(timer,
1011 ns_to_ktime(usecs * 1000));
1012 return HRTIMER_RESTART;
1013 }
1014 pin->wait_usecs = usecs - 100;
1015 pin->timer_ts = ktime_add_us(ts, 100);
1016 hrtimer_forward_now(timer, ns_to_ktime(100000));
1017 return HRTIMER_RESTART;
1018}
1019
1020static int cec_pin_thread_func(void *_adap)
1021{
1022 struct cec_adapter *adap = _adap;
1023 struct cec_pin *pin = adap->pin;
1024
1025 for (;;) {
1026 wait_event_interruptible(pin->kthread_waitq,
1027 kthread_should_stop() ||
1028 pin->work_rx_msg.len ||
1029 pin->work_tx_status ||
1030 atomic_read(&pin->work_irq_change) ||
1031 atomic_read(&pin->work_pin_num_events));
1032
1033 if (pin->work_rx_msg.len) {
1034 struct cec_msg *msg = &pin->work_rx_msg;
1035
1036 if (msg->len > 1 && msg->len < CEC_MAX_MSG_SIZE &&
1037 rx_add_byte(pin)) {
1038
1039 msg->msg[msg->len++] = 0x55;
1040 }
1041 if (msg->len > 2 && rx_remove_byte(pin)) {
1042
1043 msg->len--;
1044 }
1045 if (msg->len > CEC_MAX_MSG_SIZE)
1046 msg->len = CEC_MAX_MSG_SIZE;
1047 cec_received_msg_ts(adap, msg,
1048 ns_to_ktime(pin->work_rx_msg.rx_ts));
1049 msg->len = 0;
1050 }
1051 if (pin->work_tx_status) {
1052 unsigned int tx_status = pin->work_tx_status;
1053
1054 pin->work_tx_status = 0;
1055 cec_transmit_attempt_done_ts(adap, tx_status,
1056 pin->work_tx_ts);
1057 }
1058
1059 while (atomic_read(&pin->work_pin_num_events)) {
1060 unsigned int idx = pin->work_pin_events_rd;
1061 u8 v = pin->work_pin_events[idx];
1062
1063 cec_queue_pin_cec_event(adap,
1064 v & CEC_PIN_EVENT_FL_IS_HIGH,
1065 v & CEC_PIN_EVENT_FL_DROPPED,
1066 pin->work_pin_ts[idx]);
1067 pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
1068 atomic_dec(&pin->work_pin_num_events);
1069 }
1070
1071 switch (atomic_xchg(&pin->work_irq_change,
1072 CEC_PIN_IRQ_UNCHANGED)) {
1073 case CEC_PIN_IRQ_DISABLE:
1074 pin->ops->disable_irq(adap);
1075 cec_pin_high(pin);
1076 cec_pin_to_idle(pin);
1077 hrtimer_start(&pin->timer, ns_to_ktime(0),
1078 HRTIMER_MODE_REL);
1079 break;
1080 case CEC_PIN_IRQ_ENABLE:
1081 pin->enable_irq_failed = !pin->ops->enable_irq(adap);
1082 if (pin->enable_irq_failed) {
1083 cec_pin_to_idle(pin);
1084 hrtimer_start(&pin->timer, ns_to_ktime(0),
1085 HRTIMER_MODE_REL);
1086 }
1087 break;
1088 default:
1089 break;
1090 }
1091
1092 if (kthread_should_stop())
1093 break;
1094 }
1095 return 0;
1096}
1097
1098static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
1099{
1100 struct cec_pin *pin = adap->pin;
1101
1102 pin->enabled = enable;
1103 if (enable) {
1104 atomic_set(&pin->work_pin_num_events, 0);
1105 pin->work_pin_events_rd = pin->work_pin_events_wr = 0;
1106 pin->work_pin_events_dropped = false;
1107 cec_pin_read(pin);
1108 cec_pin_to_idle(pin);
1109 pin->tx_msg.len = 0;
1110 pin->timer_ts = ns_to_ktime(0);
1111 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
1112 pin->kthread = kthread_run(cec_pin_thread_func, adap,
1113 "cec-pin");
1114 if (IS_ERR(pin->kthread)) {
1115 pr_err("cec-pin: kernel_thread() failed\n");
1116 return PTR_ERR(pin->kthread);
1117 }
1118 hrtimer_start(&pin->timer, ns_to_ktime(0),
1119 HRTIMER_MODE_REL);
1120 } else {
1121 if (pin->ops->disable_irq)
1122 pin->ops->disable_irq(adap);
1123 hrtimer_cancel(&pin->timer);
1124 kthread_stop(pin->kthread);
1125 cec_pin_read(pin);
1126 cec_pin_to_idle(pin);
1127 pin->state = CEC_ST_OFF;
1128 }
1129 return 0;
1130}
1131
1132static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
1133{
1134 struct cec_pin *pin = adap->pin;
1135
1136 if (log_addr == CEC_LOG_ADDR_INVALID)
1137 pin->la_mask = 0;
1138 else
1139 pin->la_mask |= (1 << log_addr);
1140 return 0;
1141}
1142
1143void cec_pin_start_timer(struct cec_pin *pin)
1144{
1145 if (pin->state != CEC_ST_RX_IRQ)
1146 return;
1147
1148 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
1149 pin->ops->disable_irq(pin->adap);
1150 cec_pin_high(pin);
1151 cec_pin_to_idle(pin);
1152 hrtimer_start(&pin->timer, ns_to_ktime(0), HRTIMER_MODE_REL);
1153}
1154
1155static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
1156 u32 signal_free_time, struct cec_msg *msg)
1157{
1158 struct cec_pin *pin = adap->pin;
1159
1160 pin->tx_signal_free_time = signal_free_time;
1161 pin->tx_extra_bytes = 0;
1162 pin->tx_msg = *msg;
1163 if (msg->len > 1) {
1164
1165 pin->tx_extra_bytes = tx_add_bytes(pin);
1166 }
1167 if (msg->len > 2 && tx_remove_byte(pin)) {
1168
1169 pin->tx_msg.len--;
1170 }
1171 pin->work_tx_status = 0;
1172 pin->tx_bit = 0;
1173 cec_pin_start_timer(pin);
1174 return 0;
1175}
1176
1177static void cec_pin_adap_status(struct cec_adapter *adap,
1178 struct seq_file *file)
1179{
1180 struct cec_pin *pin = adap->pin;
1181
1182 seq_printf(file, "state: %s\n", states[pin->state].name);
1183 seq_printf(file, "tx_bit: %d\n", pin->tx_bit);
1184 seq_printf(file, "rx_bit: %d\n", pin->rx_bit);
1185 seq_printf(file, "cec pin: %d\n", pin->ops->read(adap));
1186 seq_printf(file, "cec pin events dropped: %u\n",
1187 pin->work_pin_events_dropped_cnt);
1188 seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
1189 if (pin->timer_100ms_overruns) {
1190 seq_printf(file, "timer overruns > 100ms: %u of %u\n",
1191 pin->timer_100ms_overruns, pin->timer_cnt);
1192 seq_printf(file, "timer overruns > 300ms: %u of %u\n",
1193 pin->timer_300ms_overruns, pin->timer_cnt);
1194 seq_printf(file, "max timer overrun: %u usecs\n",
1195 pin->timer_max_overrun);
1196 seq_printf(file, "avg timer overrun: %u usecs\n",
1197 pin->timer_sum_overrun / pin->timer_100ms_overruns);
1198 }
1199 if (pin->rx_start_bit_low_too_short_cnt)
1200 seq_printf(file,
1201 "rx start bit low too short: %u (delta %u, ts %llu)\n",
1202 pin->rx_start_bit_low_too_short_cnt,
1203 pin->rx_start_bit_low_too_short_delta,
1204 pin->rx_start_bit_low_too_short_ts);
1205 if (pin->rx_start_bit_too_short_cnt)
1206 seq_printf(file,
1207 "rx start bit too short: %u (delta %u, ts %llu)\n",
1208 pin->rx_start_bit_too_short_cnt,
1209 pin->rx_start_bit_too_short_delta,
1210 pin->rx_start_bit_too_short_ts);
1211 if (pin->rx_start_bit_too_long_cnt)
1212 seq_printf(file, "rx start bit too long: %u\n",
1213 pin->rx_start_bit_too_long_cnt);
1214 if (pin->rx_data_bit_too_short_cnt)
1215 seq_printf(file,
1216 "rx data bit too short: %u (delta %u, ts %llu)\n",
1217 pin->rx_data_bit_too_short_cnt,
1218 pin->rx_data_bit_too_short_delta,
1219 pin->rx_data_bit_too_short_ts);
1220 if (pin->rx_data_bit_too_long_cnt)
1221 seq_printf(file, "rx data bit too long: %u\n",
1222 pin->rx_data_bit_too_long_cnt);
1223 seq_printf(file, "rx initiated low drive: %u\n", pin->rx_low_drive_cnt);
1224 seq_printf(file, "tx detected low drive: %u\n", pin->tx_low_drive_cnt);
1225 pin->work_pin_events_dropped_cnt = 0;
1226 pin->timer_cnt = 0;
1227 pin->timer_100ms_overruns = 0;
1228 pin->timer_300ms_overruns = 0;
1229 pin->timer_max_overrun = 0;
1230 pin->timer_sum_overrun = 0;
1231 pin->rx_start_bit_low_too_short_cnt = 0;
1232 pin->rx_start_bit_too_short_cnt = 0;
1233 pin->rx_start_bit_too_long_cnt = 0;
1234 pin->rx_data_bit_too_short_cnt = 0;
1235 pin->rx_data_bit_too_long_cnt = 0;
1236 pin->rx_low_drive_cnt = 0;
1237 pin->tx_low_drive_cnt = 0;
1238 if (pin->ops->status)
1239 pin->ops->status(adap, file);
1240}
1241
1242static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
1243 bool enable)
1244{
1245 struct cec_pin *pin = adap->pin;
1246
1247 pin->monitor_all = enable;
1248 return 0;
1249}
1250
1251static void cec_pin_adap_free(struct cec_adapter *adap)
1252{
1253 struct cec_pin *pin = adap->pin;
1254
1255 if (pin->ops->free)
1256 pin->ops->free(adap);
1257 adap->pin = NULL;
1258 kfree(pin);
1259}
1260
1261void cec_pin_changed(struct cec_adapter *adap, bool value)
1262{
1263 struct cec_pin *pin = adap->pin;
1264
1265 cec_pin_update(pin, value, false);
1266 if (!value && (adap->is_configuring || adap->is_configured ||
1267 adap->monitor_all_cnt))
1268 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1269}
1270EXPORT_SYMBOL_GPL(cec_pin_changed);
1271
1272static const struct cec_adap_ops cec_pin_adap_ops = {
1273 .adap_enable = cec_pin_adap_enable,
1274 .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
1275 .adap_log_addr = cec_pin_adap_log_addr,
1276 .adap_transmit = cec_pin_adap_transmit,
1277 .adap_status = cec_pin_adap_status,
1278 .adap_free = cec_pin_adap_free,
1279#ifdef CONFIG_CEC_PIN_ERROR_INJ
1280 .error_inj_parse_line = cec_pin_error_inj_parse_line,
1281 .error_inj_show = cec_pin_error_inj_show,
1282#endif
1283};
1284
1285struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
1286 void *priv, const char *name, u32 caps)
1287{
1288 struct cec_adapter *adap;
1289 struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
1290
1291 if (pin == NULL)
1292 return ERR_PTR(-ENOMEM);
1293 pin->ops = pin_ops;
1294 hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1295 pin->timer.function = cec_pin_timer;
1296 init_waitqueue_head(&pin->kthread_waitq);
1297 pin->tx_custom_low_usecs = CEC_TIM_CUSTOM_DEFAULT;
1298 pin->tx_custom_high_usecs = CEC_TIM_CUSTOM_DEFAULT;
1299
1300 adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
1301 caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
1302 CEC_MAX_LOG_ADDRS);
1303
1304 if (IS_ERR(adap)) {
1305 kfree(pin);
1306 return adap;
1307 }
1308
1309 adap->pin = pin;
1310 pin->adap = adap;
1311 cec_pin_update(pin, cec_pin_high(pin), true);
1312 return adap;
1313}
1314EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);
1315
