1/* 2 * Copyright (c) 2013 Johannes Berg <johannes@sipsolutions.net> 3 * 4 * This file is free software: you may copy, redistribute and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation, either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This file is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * This file incorporates work covered by the following copyright and 18 * permission notice: 19 * 20 * Copyright (c) 2012 Qualcomm Atheros, Inc. 21 * 22 * Permission to use, copy, modify, and/or distribute this software for any 23 * purpose with or without fee is hereby granted, provided that the above 24 * copyright notice and this permission notice appear in all copies. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 27 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 29 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 30 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 31 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 32 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 33 */ 34 35#ifndef _ALX_H_ 36#define _ALX_H_ 37 38#include <linux/types.h> 39#include <linux/etherdevice.h> 40#include <linux/dma-mapping.h> 41#include <linux/spinlock.h> 42#include "hw.h" 43 44#define ALX_WATCHDOG_TIME (5 * HZ) 45 46struct alx_buffer { 47 struct sk_buff *skb; 48 DEFINE_DMA_UNMAP_ADDR(dma); 49 DEFINE_DMA_UNMAP_LEN(size); 50}; 51 52struct alx_rx_queue { 53 struct net_device *netdev; 54 struct device *dev; 55 struct alx_napi *np; 56 57 struct alx_rrd *rrd; 58 dma_addr_t rrd_dma; 59 60 struct alx_rfd *rfd; 61 dma_addr_t rfd_dma; 62 63 struct alx_buffer *bufs; 64 65 u16 count; 66 u16 write_idx, read_idx; 67 u16 rrd_read_idx; 68 u16 queue_idx; 69}; 70#define ALX_RX_ALLOC_THRESH 32 71 72struct alx_tx_queue { 73 struct net_device *netdev; 74 struct device *dev; 75 76 struct alx_txd *tpd; 77 dma_addr_t tpd_dma; 78 79 struct alx_buffer *bufs; 80 81 u16 count; 82 u16 write_idx, read_idx; 83 u16 queue_idx; 84 u16 p_reg, c_reg; 85}; 86 87#define ALX_DEFAULT_TX_WORK 128 88 89enum alx_device_quirks { 90 ALX_DEV_QUIRK_MSI_INTX_DISABLE_BUG = BIT(0), 91}; 92 93struct alx_napi { 94 struct napi_struct napi; 95 struct alx_priv *alx; 96 struct alx_rx_queue *rxq; 97 struct alx_tx_queue *txq; 98 int vec_idx; 99 u32 vec_mask; 100 char irq_lbl[IFNAMSIZ + 8]; 101}; 102 103#define ALX_MAX_NAPIS 8 104 105struct alx_priv { 106 struct net_device *dev; 107 108 struct alx_hw hw; 109 110 /* msi-x vectors */ 111 int num_vec; 112 113 /* all descriptor memory */ 114 struct { 115 dma_addr_t dma; 116 void *virt; 117 unsigned int size; 118 } descmem; 119 120 struct alx_napi *qnapi[ALX_MAX_NAPIS]; 121 int num_txq; 122 int num_rxq; 123 int num_napi; 124 125 /* protect int_mask updates */ 126 spinlock_t irq_lock; 127 u32 int_mask; 128 129 unsigned int tx_ringsz; 130 unsigned int rx_ringsz; 131 unsigned int rxbuf_size; 132 133 struct work_struct link_check_wk; 134 struct work_struct reset_wk; 135 136 u16 msg_enable; 137 138 /* protects hw.stats */ 139 spinlock_t stats_lock; 140}; 141 142extern const struct ethtool_ops alx_ethtool_ops; 143extern const char alx_drv_name[]; 144 145#endif 146