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22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/dma-mapping.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/io.h>
30#include <linux/mii.h>
31#include <linux/module.h>
32#include <linux/mod_devicetable.h>
33#include <linux/netdevice.h>
34#include <linux/platform_device.h>
35
36#include "ftmac100.h"
37
38#define DRV_NAME "ftmac100"
39#define DRV_VERSION "0.2"
40
41#define RX_QUEUE_ENTRIES 128
42#define TX_QUEUE_ENTRIES 16
43
44#define MAX_PKT_SIZE 1518
45#define RX_BUF_SIZE 2044
46
47#if MAX_PKT_SIZE > 0x7ff
48#error invalid MAX_PKT_SIZE
49#endif
50
51#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
52#error invalid RX_BUF_SIZE
53#endif
54
55
56
57
58struct ftmac100_descs {
59 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
60 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
61};
62
63struct ftmac100 {
64 struct resource *res;
65 void __iomem *base;
66 int irq;
67
68 struct ftmac100_descs *descs;
69 dma_addr_t descs_dma_addr;
70
71 unsigned int rx_pointer;
72 unsigned int tx_clean_pointer;
73 unsigned int tx_pointer;
74 unsigned int tx_pending;
75
76 spinlock_t tx_lock;
77
78 struct net_device *netdev;
79 struct device *dev;
80 struct napi_struct napi;
81
82 struct mii_if_info mii;
83};
84
85static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
86 struct ftmac100_rxdes *rxdes, gfp_t gfp);
87
88
89
90
91#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
92 FTMAC100_INT_NORXBUF | \
93 FTMAC100_INT_XPKT_OK | \
94 FTMAC100_INT_XPKT_LOST | \
95 FTMAC100_INT_RPKT_LOST | \
96 FTMAC100_INT_AHB_ERR | \
97 FTMAC100_INT_PHYSTS_CHG)
98
99#define INT_MASK_ALL_DISABLED 0
100
101static void ftmac100_enable_all_int(struct ftmac100 *priv)
102{
103 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
104}
105
106static void ftmac100_disable_all_int(struct ftmac100 *priv)
107{
108 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
109}
110
111static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
112{
113 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
114}
115
116static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
117{
118 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
119}
120
121static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
122{
123 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
124}
125
126static int ftmac100_reset(struct ftmac100 *priv)
127{
128 struct net_device *netdev = priv->netdev;
129 int i;
130
131
132 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
133
134 for (i = 0; i < 5; i++) {
135 unsigned int maccr;
136
137 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
138 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
139
140
141
142
143
144 udelay(500);
145 return 0;
146 }
147
148 udelay(1000);
149 }
150
151 netdev_err(netdev, "software reset failed\n");
152 return -EIO;
153}
154
155static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
156{
157 unsigned int maddr = mac[0] << 8 | mac[1];
158 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
159
160 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
161 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
162}
163
164#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
165 FTMAC100_MACCR_RCV_EN | \
166 FTMAC100_MACCR_XDMA_EN | \
167 FTMAC100_MACCR_RDMA_EN | \
168 FTMAC100_MACCR_CRC_APD | \
169 FTMAC100_MACCR_FULLDUP | \
170 FTMAC100_MACCR_RX_RUNT | \
171 FTMAC100_MACCR_RX_BROADPKT)
172
173static int ftmac100_start_hw(struct ftmac100 *priv)
174{
175 struct net_device *netdev = priv->netdev;
176
177 if (ftmac100_reset(priv))
178 return -EIO;
179
180
181 ftmac100_set_rx_ring_base(priv,
182 priv->descs_dma_addr +
183 offsetof(struct ftmac100_descs, rxdes));
184 ftmac100_set_tx_ring_base(priv,
185 priv->descs_dma_addr +
186 offsetof(struct ftmac100_descs, txdes));
187
188 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
189
190 ftmac100_set_mac(priv, netdev->dev_addr);
191
192 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
193 return 0;
194}
195
196static void ftmac100_stop_hw(struct ftmac100 *priv)
197{
198 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
199}
200
201
202
203
204static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
205{
206 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
207}
208
209static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
210{
211 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
212}
213
214static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
215{
216 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
217}
218
219static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
220{
221
222 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
223}
224
225static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
226{
227 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
228}
229
230static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
231{
232 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
233}
234
235static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
236{
237 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
238}
239
240static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
241{
242 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
243}
244
245static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
246{
247 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
248}
249
250static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
251{
252 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
253}
254
255static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
256{
257 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
258}
259
260static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
261 unsigned int size)
262{
263 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
264 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
265}
266
267static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
268{
269 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
270}
271
272static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
273 dma_addr_t addr)
274{
275 rxdes->rxdes2 = cpu_to_le32(addr);
276}
277
278static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
279{
280 return le32_to_cpu(rxdes->rxdes2);
281}
282
283
284
285
286
287static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
288{
289 rxdes->rxdes3 = (unsigned int)page;
290}
291
292static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
293{
294 return (struct page *)rxdes->rxdes3;
295}
296
297
298
299
300static int ftmac100_next_rx_pointer(int pointer)
301{
302 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
303}
304
305static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
306{
307 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
308}
309
310static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
311{
312 return &priv->descs->rxdes[priv->rx_pointer];
313}
314
315static struct ftmac100_rxdes *
316ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
317{
318 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
319
320 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
321 if (ftmac100_rxdes_first_segment(rxdes))
322 return rxdes;
323
324 ftmac100_rxdes_set_dma_own(rxdes);
325 ftmac100_rx_pointer_advance(priv);
326 rxdes = ftmac100_current_rxdes(priv);
327 }
328
329 return NULL;
330}
331
332static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
333 struct ftmac100_rxdes *rxdes)
334{
335 struct net_device *netdev = priv->netdev;
336 bool error = false;
337
338 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
339 if (net_ratelimit())
340 netdev_info(netdev, "rx err\n");
341
342 netdev->stats.rx_errors++;
343 error = true;
344 }
345
346 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
347 if (net_ratelimit())
348 netdev_info(netdev, "rx crc err\n");
349
350 netdev->stats.rx_crc_errors++;
351 error = true;
352 }
353
354 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
355 if (net_ratelimit())
356 netdev_info(netdev, "rx frame too long\n");
357
358 netdev->stats.rx_length_errors++;
359 error = true;
360 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
361 if (net_ratelimit())
362 netdev_info(netdev, "rx runt\n");
363
364 netdev->stats.rx_length_errors++;
365 error = true;
366 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
367 if (net_ratelimit())
368 netdev_info(netdev, "rx odd nibble\n");
369
370 netdev->stats.rx_length_errors++;
371 error = true;
372 }
373
374 return error;
375}
376
377static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
378{
379 struct net_device *netdev = priv->netdev;
380 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
381 bool done = false;
382
383 if (net_ratelimit())
384 netdev_dbg(netdev, "drop packet %p\n", rxdes);
385
386 do {
387 if (ftmac100_rxdes_last_segment(rxdes))
388 done = true;
389
390 ftmac100_rxdes_set_dma_own(rxdes);
391 ftmac100_rx_pointer_advance(priv);
392 rxdes = ftmac100_current_rxdes(priv);
393 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
394
395 netdev->stats.rx_dropped++;
396}
397
398static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
399{
400 struct net_device *netdev = priv->netdev;
401 struct ftmac100_rxdes *rxdes;
402 struct sk_buff *skb;
403 struct page *page;
404 dma_addr_t map;
405 int length;
406 bool ret;
407
408 rxdes = ftmac100_rx_locate_first_segment(priv);
409 if (!rxdes)
410 return false;
411
412 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
413 ftmac100_rx_drop_packet(priv);
414 return true;
415 }
416
417
418
419
420
421 ret = ftmac100_rxdes_last_segment(rxdes);
422 BUG_ON(!ret);
423
424
425 skb = netdev_alloc_skb_ip_align(netdev, 128);
426 if (unlikely(!skb)) {
427 if (net_ratelimit())
428 netdev_err(netdev, "rx skb alloc failed\n");
429
430 ftmac100_rx_drop_packet(priv);
431 return true;
432 }
433
434 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
435 netdev->stats.multicast++;
436
437 map = ftmac100_rxdes_get_dma_addr(rxdes);
438 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
439
440 length = ftmac100_rxdes_frame_length(rxdes);
441 page = ftmac100_rxdes_get_page(rxdes);
442 skb_fill_page_desc(skb, 0, page, 0, length);
443 skb->len += length;
444 skb->data_len += length;
445
446 if (length > 128) {
447 skb->truesize += PAGE_SIZE;
448
449 __pskb_pull_tail(skb, ETH_HLEN);
450 } else {
451
452 __pskb_pull_tail(skb, length);
453 }
454 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
455
456 ftmac100_rx_pointer_advance(priv);
457
458 skb->protocol = eth_type_trans(skb, netdev);
459
460 netdev->stats.rx_packets++;
461 netdev->stats.rx_bytes += skb->len;
462
463
464 netif_receive_skb(skb);
465
466 (*processed)++;
467 return true;
468}
469
470
471
472
473static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
474{
475
476 txdes->txdes0 = 0;
477 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
478 txdes->txdes2 = 0;
479 txdes->txdes3 = 0;
480}
481
482static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
483{
484 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
485}
486
487static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
488{
489
490
491
492
493 wmb();
494 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
495}
496
497static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
498{
499 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
500}
501
502static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
503{
504 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
505}
506
507static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
508{
509 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
510}
511
512static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
513{
514 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
515}
516
517static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
518{
519 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
520}
521
522static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
523{
524 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
525}
526
527static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
528 unsigned int len)
529{
530 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
531}
532
533static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
534 dma_addr_t addr)
535{
536 txdes->txdes2 = cpu_to_le32(addr);
537}
538
539static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
540{
541 return le32_to_cpu(txdes->txdes2);
542}
543
544
545
546
547
548static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
549{
550 txdes->txdes3 = (unsigned int)skb;
551}
552
553static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
554{
555 return (struct sk_buff *)txdes->txdes3;
556}
557
558
559
560
561static int ftmac100_next_tx_pointer(int pointer)
562{
563 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
564}
565
566static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
567{
568 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
569}
570
571static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
572{
573 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
574}
575
576static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
577{
578 return &priv->descs->txdes[priv->tx_pointer];
579}
580
581static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
582{
583 return &priv->descs->txdes[priv->tx_clean_pointer];
584}
585
586static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
587{
588 struct net_device *netdev = priv->netdev;
589 struct ftmac100_txdes *txdes;
590 struct sk_buff *skb;
591 dma_addr_t map;
592
593 if (priv->tx_pending == 0)
594 return false;
595
596 txdes = ftmac100_current_clean_txdes(priv);
597
598 if (ftmac100_txdes_owned_by_dma(txdes))
599 return false;
600
601 skb = ftmac100_txdes_get_skb(txdes);
602 map = ftmac100_txdes_get_dma_addr(txdes);
603
604 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
605 ftmac100_txdes_late_collision(txdes))) {
606
607
608
609
610 netdev->stats.tx_aborted_errors++;
611 } else {
612 netdev->stats.tx_packets++;
613 netdev->stats.tx_bytes += skb->len;
614 }
615
616 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
617 dev_kfree_skb(skb);
618
619 ftmac100_txdes_reset(txdes);
620
621 ftmac100_tx_clean_pointer_advance(priv);
622
623 spin_lock(&priv->tx_lock);
624 priv->tx_pending--;
625 spin_unlock(&priv->tx_lock);
626 netif_wake_queue(netdev);
627
628 return true;
629}
630
631static void ftmac100_tx_complete(struct ftmac100 *priv)
632{
633 while (ftmac100_tx_complete_packet(priv))
634 ;
635}
636
637static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
638 dma_addr_t map)
639{
640 struct net_device *netdev = priv->netdev;
641 struct ftmac100_txdes *txdes;
642 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
643
644 txdes = ftmac100_current_txdes(priv);
645 ftmac100_tx_pointer_advance(priv);
646
647
648 ftmac100_txdes_set_skb(txdes, skb);
649 ftmac100_txdes_set_dma_addr(txdes, map);
650
651 ftmac100_txdes_set_first_segment(txdes);
652 ftmac100_txdes_set_last_segment(txdes);
653 ftmac100_txdes_set_txint(txdes);
654 ftmac100_txdes_set_buffer_size(txdes, len);
655
656 spin_lock(&priv->tx_lock);
657 priv->tx_pending++;
658 if (priv->tx_pending == TX_QUEUE_ENTRIES)
659 netif_stop_queue(netdev);
660
661
662 ftmac100_txdes_set_dma_own(txdes);
663 spin_unlock(&priv->tx_lock);
664
665 ftmac100_txdma_start_polling(priv);
666 return NETDEV_TX_OK;
667}
668
669
670
671
672static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
673 struct ftmac100_rxdes *rxdes, gfp_t gfp)
674{
675 struct net_device *netdev = priv->netdev;
676 struct page *page;
677 dma_addr_t map;
678
679 page = alloc_page(gfp);
680 if (!page) {
681 if (net_ratelimit())
682 netdev_err(netdev, "failed to allocate rx page\n");
683 return -ENOMEM;
684 }
685
686 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
687 if (unlikely(dma_mapping_error(priv->dev, map))) {
688 if (net_ratelimit())
689 netdev_err(netdev, "failed to map rx page\n");
690 __free_page(page);
691 return -ENOMEM;
692 }
693
694 ftmac100_rxdes_set_page(rxdes, page);
695 ftmac100_rxdes_set_dma_addr(rxdes, map);
696 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
697 ftmac100_rxdes_set_dma_own(rxdes);
698 return 0;
699}
700
701static void ftmac100_free_buffers(struct ftmac100 *priv)
702{
703 int i;
704
705 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
706 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
707 struct page *page = ftmac100_rxdes_get_page(rxdes);
708 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
709
710 if (!page)
711 continue;
712
713 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
714 __free_page(page);
715 }
716
717 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
718 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
719 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
720 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
721
722 if (!skb)
723 continue;
724
725 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
726 dev_kfree_skb(skb);
727 }
728
729 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
730 priv->descs, priv->descs_dma_addr);
731}
732
733static int ftmac100_alloc_buffers(struct ftmac100 *priv)
734{
735 int i;
736
737 priv->descs = dma_zalloc_coherent(priv->dev,
738 sizeof(struct ftmac100_descs),
739 &priv->descs_dma_addr,
740 GFP_KERNEL);
741 if (!priv->descs)
742 return -ENOMEM;
743
744
745 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
746
747 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
748 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
749
750 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
751 goto err;
752 }
753
754
755 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
756 return 0;
757
758err:
759 ftmac100_free_buffers(priv);
760 return -ENOMEM;
761}
762
763
764
765
766static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
767{
768 struct ftmac100 *priv = netdev_priv(netdev);
769 unsigned int phycr;
770 int i;
771
772 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
773 FTMAC100_PHYCR_REGAD(reg) |
774 FTMAC100_PHYCR_MIIRD;
775
776 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
777
778 for (i = 0; i < 10; i++) {
779 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
780
781 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
782 return phycr & FTMAC100_PHYCR_MIIRDATA;
783
784 udelay(100);
785 }
786
787 netdev_err(netdev, "mdio read timed out\n");
788 return 0;
789}
790
791static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
792 int data)
793{
794 struct ftmac100 *priv = netdev_priv(netdev);
795 unsigned int phycr;
796 int i;
797
798 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
799 FTMAC100_PHYCR_REGAD(reg) |
800 FTMAC100_PHYCR_MIIWR;
801
802 data = FTMAC100_PHYWDATA_MIIWDATA(data);
803
804 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
805 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
806
807 for (i = 0; i < 10; i++) {
808 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
809
810 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
811 return;
812
813 udelay(100);
814 }
815
816 netdev_err(netdev, "mdio write timed out\n");
817}
818
819
820
821
822static void ftmac100_get_drvinfo(struct net_device *netdev,
823 struct ethtool_drvinfo *info)
824{
825 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
826 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
827 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
828}
829
830static int ftmac100_get_link_ksettings(struct net_device *netdev,
831 struct ethtool_link_ksettings *cmd)
832{
833 struct ftmac100 *priv = netdev_priv(netdev);
834
835 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
836
837 return 0;
838}
839
840static int ftmac100_set_link_ksettings(struct net_device *netdev,
841 const struct ethtool_link_ksettings *cmd)
842{
843 struct ftmac100 *priv = netdev_priv(netdev);
844 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
845}
846
847static int ftmac100_nway_reset(struct net_device *netdev)
848{
849 struct ftmac100 *priv = netdev_priv(netdev);
850 return mii_nway_restart(&priv->mii);
851}
852
853static u32 ftmac100_get_link(struct net_device *netdev)
854{
855 struct ftmac100 *priv = netdev_priv(netdev);
856 return mii_link_ok(&priv->mii);
857}
858
859static const struct ethtool_ops ftmac100_ethtool_ops = {
860 .get_drvinfo = ftmac100_get_drvinfo,
861 .nway_reset = ftmac100_nway_reset,
862 .get_link = ftmac100_get_link,
863 .get_link_ksettings = ftmac100_get_link_ksettings,
864 .set_link_ksettings = ftmac100_set_link_ksettings,
865};
866
867
868
869
870static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
871{
872 struct net_device *netdev = dev_id;
873 struct ftmac100 *priv = netdev_priv(netdev);
874
875 if (likely(netif_running(netdev))) {
876
877 ftmac100_disable_all_int(priv);
878 napi_schedule(&priv->napi);
879 }
880
881 return IRQ_HANDLED;
882}
883
884
885
886
887static int ftmac100_poll(struct napi_struct *napi, int budget)
888{
889 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
890 struct net_device *netdev = priv->netdev;
891 unsigned int status;
892 bool completed = true;
893 int rx = 0;
894
895 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
896
897 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
898
899
900
901
902
903
904
905 bool retry;
906
907 do {
908 retry = ftmac100_rx_packet(priv, &rx);
909 } while (retry && rx < budget);
910
911 if (retry && rx == budget)
912 completed = false;
913 }
914
915 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
916
917
918
919
920
921
922
923
924 ftmac100_tx_complete(priv);
925 }
926
927 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
928 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
929 if (net_ratelimit())
930 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
931 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
932 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
933 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
934 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
935
936 if (status & FTMAC100_INT_NORXBUF) {
937
938 netdev->stats.rx_over_errors++;
939 }
940
941 if (status & FTMAC100_INT_RPKT_LOST) {
942
943 netdev->stats.rx_fifo_errors++;
944 }
945
946 if (status & FTMAC100_INT_PHYSTS_CHG) {
947
948 mii_check_link(&priv->mii);
949 }
950 }
951
952 if (completed) {
953
954 napi_complete(napi);
955 ftmac100_enable_all_int(priv);
956 }
957
958 return rx;
959}
960
961
962
963
964static int ftmac100_open(struct net_device *netdev)
965{
966 struct ftmac100 *priv = netdev_priv(netdev);
967 int err;
968
969 err = ftmac100_alloc_buffers(priv);
970 if (err) {
971 netdev_err(netdev, "failed to allocate buffers\n");
972 goto err_alloc;
973 }
974
975 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
976 if (err) {
977 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
978 goto err_irq;
979 }
980
981 priv->rx_pointer = 0;
982 priv->tx_clean_pointer = 0;
983 priv->tx_pointer = 0;
984 priv->tx_pending = 0;
985
986 err = ftmac100_start_hw(priv);
987 if (err)
988 goto err_hw;
989
990 napi_enable(&priv->napi);
991 netif_start_queue(netdev);
992
993 ftmac100_enable_all_int(priv);
994
995 return 0;
996
997err_hw:
998 free_irq(priv->irq, netdev);
999err_irq:
1000 ftmac100_free_buffers(priv);
1001err_alloc:
1002 return err;
1003}
1004
1005static int ftmac100_stop(struct net_device *netdev)
1006{
1007 struct ftmac100 *priv = netdev_priv(netdev);
1008
1009 ftmac100_disable_all_int(priv);
1010 netif_stop_queue(netdev);
1011 napi_disable(&priv->napi);
1012 ftmac100_stop_hw(priv);
1013 free_irq(priv->irq, netdev);
1014 ftmac100_free_buffers(priv);
1015
1016 return 0;
1017}
1018
1019static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1020{
1021 struct ftmac100 *priv = netdev_priv(netdev);
1022 dma_addr_t map;
1023
1024 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1025 if (net_ratelimit())
1026 netdev_dbg(netdev, "tx packet too big\n");
1027
1028 netdev->stats.tx_dropped++;
1029 dev_kfree_skb(skb);
1030 return NETDEV_TX_OK;
1031 }
1032
1033 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1034 if (unlikely(dma_mapping_error(priv->dev, map))) {
1035
1036 if (net_ratelimit())
1037 netdev_err(netdev, "map socket buffer failed\n");
1038
1039 netdev->stats.tx_dropped++;
1040 dev_kfree_skb(skb);
1041 return NETDEV_TX_OK;
1042 }
1043
1044 return ftmac100_xmit(priv, skb, map);
1045}
1046
1047
1048static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1049{
1050 struct ftmac100 *priv = netdev_priv(netdev);
1051 struct mii_ioctl_data *data = if_mii(ifr);
1052
1053 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1054}
1055
1056static const struct net_device_ops ftmac100_netdev_ops = {
1057 .ndo_open = ftmac100_open,
1058 .ndo_stop = ftmac100_stop,
1059 .ndo_start_xmit = ftmac100_hard_start_xmit,
1060 .ndo_set_mac_address = eth_mac_addr,
1061 .ndo_validate_addr = eth_validate_addr,
1062 .ndo_do_ioctl = ftmac100_do_ioctl,
1063};
1064
1065
1066
1067
1068static int ftmac100_probe(struct platform_device *pdev)
1069{
1070 struct resource *res;
1071 int irq;
1072 struct net_device *netdev;
1073 struct ftmac100 *priv;
1074 int err;
1075
1076 if (!pdev)
1077 return -ENODEV;
1078
1079 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1080 if (!res)
1081 return -ENXIO;
1082
1083 irq = platform_get_irq(pdev, 0);
1084 if (irq < 0)
1085 return irq;
1086
1087
1088 netdev = alloc_etherdev(sizeof(*priv));
1089 if (!netdev) {
1090 err = -ENOMEM;
1091 goto err_alloc_etherdev;
1092 }
1093
1094 SET_NETDEV_DEV(netdev, &pdev->dev);
1095 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1096 netdev->netdev_ops = &ftmac100_netdev_ops;
1097
1098 platform_set_drvdata(pdev, netdev);
1099
1100
1101 priv = netdev_priv(netdev);
1102 priv->netdev = netdev;
1103 priv->dev = &pdev->dev;
1104
1105 spin_lock_init(&priv->tx_lock);
1106
1107
1108 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1109
1110
1111 priv->res = request_mem_region(res->start, resource_size(res),
1112 dev_name(&pdev->dev));
1113 if (!priv->res) {
1114 dev_err(&pdev->dev, "Could not reserve memory region\n");
1115 err = -ENOMEM;
1116 goto err_req_mem;
1117 }
1118
1119 priv->base = ioremap(res->start, resource_size(res));
1120 if (!priv->base) {
1121 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1122 err = -EIO;
1123 goto err_ioremap;
1124 }
1125
1126 priv->irq = irq;
1127
1128
1129 priv->mii.phy_id = 0;
1130 priv->mii.phy_id_mask = 0x1f;
1131 priv->mii.reg_num_mask = 0x1f;
1132 priv->mii.dev = netdev;
1133 priv->mii.mdio_read = ftmac100_mdio_read;
1134 priv->mii.mdio_write = ftmac100_mdio_write;
1135
1136
1137 err = register_netdev(netdev);
1138 if (err) {
1139 dev_err(&pdev->dev, "Failed to register netdev\n");
1140 goto err_register_netdev;
1141 }
1142
1143 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1144
1145 if (!is_valid_ether_addr(netdev->dev_addr)) {
1146 eth_hw_addr_random(netdev);
1147 netdev_info(netdev, "generated random MAC address %pM\n",
1148 netdev->dev_addr);
1149 }
1150
1151 return 0;
1152
1153err_register_netdev:
1154 iounmap(priv->base);
1155err_ioremap:
1156 release_resource(priv->res);
1157err_req_mem:
1158 netif_napi_del(&priv->napi);
1159 free_netdev(netdev);
1160err_alloc_etherdev:
1161 return err;
1162}
1163
1164static int ftmac100_remove(struct platform_device *pdev)
1165{
1166 struct net_device *netdev;
1167 struct ftmac100 *priv;
1168
1169 netdev = platform_get_drvdata(pdev);
1170 priv = netdev_priv(netdev);
1171
1172 unregister_netdev(netdev);
1173
1174 iounmap(priv->base);
1175 release_resource(priv->res);
1176
1177 netif_napi_del(&priv->napi);
1178 free_netdev(netdev);
1179 return 0;
1180}
1181
1182static const struct of_device_id ftmac100_of_ids[] = {
1183 { .compatible = "andestech,atmac100" },
1184 { }
1185};
1186
1187static struct platform_driver ftmac100_driver = {
1188 .probe = ftmac100_probe,
1189 .remove = ftmac100_remove,
1190 .driver = {
1191 .name = DRV_NAME,
1192 .of_match_table = ftmac100_of_ids
1193 },
1194};
1195
1196
1197
1198
1199static int __init ftmac100_init(void)
1200{
1201 pr_info("Loading version " DRV_VERSION " ...\n");
1202 return platform_driver_register(&ftmac100_driver);
1203}
1204
1205static void __exit ftmac100_exit(void)
1206{
1207 platform_driver_unregister(&ftmac100_driver);
1208}
1209
1210module_init(ftmac100_init);
1211module_exit(ftmac100_exit);
1212
1213MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1214MODULE_DESCRIPTION("FTMAC100 driver");
1215MODULE_LICENSE("GPL");
1216MODULE_DEVICE_TABLE(of, ftmac100_of_ids);
1217