linux/drivers/net/ethernet/intel/e1000/e1000_osdep.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright(c) 1999 - 2006 Intel Corporation. */
   3
   4/* glue for the OS independent part of e1000
   5 * includes register access macros
   6 */
   7
   8#ifndef _E1000_OSDEP_H_
   9#define _E1000_OSDEP_H_
  10
  11#include <asm/io.h>
  12
  13#define CONFIG_RAM_BASE         0x60000
  14#define GBE_CONFIG_OFFSET       0x0
  15
  16#define GBE_CONFIG_RAM_BASE \
  17        ((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET))
  18
  19#define GBE_CONFIG_BASE_VIRT \
  20        ((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE))
  21
  22#define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
  23        (iowrite16_rep(base + offset, data, count))
  24
  25#define GBE_CONFIG_FLASH_READ(base, offset, count, data) \
  26        (ioread16_rep(base + (offset << 1), data, count))
  27
  28#define er32(reg)                                                       \
  29        (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543)             \
  30                               ? E1000_##reg : E1000_82542_##reg)))
  31
  32#define ew32(reg, value)                                                \
  33        (writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543)  \
  34                                         ? E1000_##reg : E1000_82542_##reg))))
  35
  36#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
  37    writel((value), ((a)->hw_addr + \
  38        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  39        ((offset) << 2))))
  40
  41#define E1000_READ_REG_ARRAY(a, reg, offset) ( \
  42    readl((a)->hw_addr + \
  43        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  44        ((offset) << 2)))
  45
  46#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
  47#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
  48
  49#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
  50    writew((value), ((a)->hw_addr + \
  51        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  52        ((offset) << 1))))
  53
  54#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
  55    readw((a)->hw_addr + \
  56        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  57        ((offset) << 1)))
  58
  59#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
  60    writeb((value), ((a)->hw_addr + \
  61        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  62        (offset))))
  63
  64#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
  65    readb((a)->hw_addr + \
  66        (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
  67        (offset)))
  68
  69#define E1000_WRITE_FLUSH() er32(STATUS)
  70
  71#define E1000_WRITE_ICH_FLASH_REG(a, reg, value) ( \
  72    writel((value), ((a)->flash_address + reg)))
  73
  74#define E1000_READ_ICH_FLASH_REG(a, reg) ( \
  75    readl((a)->flash_address + reg))
  76
  77#define E1000_WRITE_ICH_FLASH_REG16(a, reg, value) ( \
  78    writew((value), ((a)->flash_address + reg)))
  79
  80#define E1000_READ_ICH_FLASH_REG16(a, reg) ( \
  81    readw((a)->flash_address + reg))
  82
  83#endif /* _E1000_OSDEP_H_ */
  84