1
2
3
4#ifndef _IXGBE_PHY_H_
5#define _IXGBE_PHY_H_
6
7#include "ixgbe_type.h"
8#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0
9#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2
10
11
12#define IXGBE_SFF_IDENTIFIER 0x0
13#define IXGBE_SFF_IDENTIFIER_SFP 0x3
14#define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25
15#define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26
16#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27
17#define IXGBE_SFF_1GBE_COMP_CODES 0x6
18#define IXGBE_SFF_10GBE_COMP_CODES 0x3
19#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
20#define IXGBE_SFF_CABLE_SPEC_COMP 0x3C
21#define IXGBE_SFF_SFF_8472_SWAP 0x5C
22#define IXGBE_SFF_SFF_8472_COMP 0x5E
23#define IXGBE_SFF_SFF_8472_OSCB 0x6E
24#define IXGBE_SFF_SFF_8472_ESCB 0x76
25#define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD
26#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0 0xA5
27#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1 0xA6
28#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2 0xA7
29#define IXGBE_SFF_QSFP_CONNECTOR 0x82
30#define IXGBE_SFF_QSFP_10GBE_COMP 0x83
31#define IXGBE_SFF_QSFP_1GBE_COMP 0x86
32#define IXGBE_SFF_QSFP_CABLE_LENGTH 0x92
33#define IXGBE_SFF_QSFP_DEVICE_TECH 0x93
34
35
36#define IXGBE_SFF_DA_PASSIVE_CABLE 0x4
37#define IXGBE_SFF_DA_ACTIVE_CABLE 0x8
38#define IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING 0x4
39#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
40#define IXGBE_SFF_1GBASELX_CAPABLE 0x2
41#define IXGBE_SFF_1GBASET_CAPABLE 0x8
42#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
43#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
44#define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
45#define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8
46#define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0
47#define IXGBE_SFF_ADDRESSING_MODE 0x4
48#define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1
49#define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8
50#define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23
51#define IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL 0x0
52#define IXGBE_I2C_EEPROM_READ_MASK 0x100
53#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3
54#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0
55#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1
56#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2
57#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3
58#define IXGBE_CS4227 0xBE
59#define IXGBE_CS4227_GLOBAL_ID_LSB 0
60#define IXGBE_CS4227_GLOBAL_ID_MSB 1
61#define IXGBE_CS4227_SCRATCH 2
62#define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F
63#define IXGBE_CS4223_SKU_ID 0x0010
64#define IXGBE_CS4227_SKU_ID 0x0014
65#define IXGBE_CS4227_RESET_PENDING 0x1357
66#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5
67#define IXGBE_CS4227_RETRIES 15
68#define IXGBE_CS4227_EFUSE_STATUS 0x0181
69#define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD
70#define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0
71#define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD
72#define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0
73#define IXGBE_CS4227_EEPROM_STATUS 0x5001
74#define IXGBE_CS4227_EEPROM_LOAD_OK 0x0001
75#define IXGBE_CS4227_SPEED_1G 0x8000
76#define IXGBE_CS4227_SPEED_10G 0
77#define IXGBE_CS4227_EDC_MODE_CX1 0x0002
78#define IXGBE_CS4227_EDC_MODE_SR 0x0004
79#define IXGBE_CS4227_EDC_MODE_DIAG 0x0008
80#define IXGBE_CS4227_RESET_HOLD 500
81#define IXGBE_CS4227_RESET_DELAY 500
82#define IXGBE_CS4227_CHECK_DELAY 30
83#define IXGBE_PE 0xE0
84#define IXGBE_PE_OUTPUT 1
85#define IXGBE_PE_CONFIG 3
86#define IXGBE_PE_BIT1 BIT(1)
87
88
89#define IXGBE_TAF_SYM_PAUSE 0x400
90#define IXGBE_TAF_ASM_PAUSE 0x800
91
92
93#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24
94#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16
95#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8
96
97
98#define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600
99#define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500
100#define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00
101#define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100
102
103
104#define IXGBE_I2C_T_HD_STA 4
105#define IXGBE_I2C_T_LOW 5
106#define IXGBE_I2C_T_HIGH 4
107#define IXGBE_I2C_T_SU_STA 5
108#define IXGBE_I2C_T_HD_DATA 5
109#define IXGBE_I2C_T_SU_DATA 1
110#define IXGBE_I2C_T_RISE 1
111#define IXGBE_I2C_T_FALL 1
112#define IXGBE_I2C_T_SU_STO 4
113#define IXGBE_I2C_T_BUF 5
114
115#define IXGBE_SFP_DETECT_RETRIES 2
116
117#define IXGBE_TN_LASI_STATUS_REG 0x9005
118#define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008
119
120
121#define IXGBE_SFF_SFF_8472_UNSUP 0x00
122
123s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
124s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
125s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
126 u32 device_type, u16 *phy_data);
127s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
128 u32 device_type, u16 phy_data);
129s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
130 u32 device_type, u16 *phy_data);
131s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
132 u32 device_type, u16 phy_data);
133s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
134s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
135 ixgbe_link_speed speed,
136 bool autoneg_wait_to_complete);
137s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
138 ixgbe_link_speed *speed,
139 bool *autoneg);
140bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
141
142
143s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
144 ixgbe_link_speed *speed,
145 bool *link_up);
146s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
147
148s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
149s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on);
150s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);
151s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw);
152s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
153 u16 *list_offset,
154 u16 *data_offset);
155s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw);
156s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
157 u8 dev_addr, u8 *data);
158s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
159 u8 dev_addr, u8 *data);
160s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
161 u8 dev_addr, u8 data);
162s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
163 u8 dev_addr, u8 data);
164s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
165 u8 *eeprom_data);
166s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
167 u8 *sff8472_data);
168s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
169 u8 eeprom_data);
170s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
171 u16 *val, bool lock);
172s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
173 u16 val, bool lock);
174#endif
175