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30#include "xmit.h"
31#include "phy_common.h"
32#include "dma.h"
33#include "pio.h"
34
35static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
36 { B43_CCK_RATE_1MB, 0x0, 0x0 },
37 { B43_CCK_RATE_2MB, 0x0, 0x1 },
38 { B43_CCK_RATE_5MB, 0x0, 0x2 },
39 { B43_CCK_RATE_11MB, 0x0, 0x3 },
40 { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
41 { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
42 { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
43 { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
44 { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
45 { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
46 { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
47 { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
48};
49
50static const struct b43_tx_legacy_rate_phy_ctl_entry *
51b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
52{
53 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
54 unsigned int i;
55
56 for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
57 e = &(b43_tx_legacy_rate_phy_ctl[i]);
58 if (e->bitrate == bitrate)
59 return e;
60 }
61
62 B43_WARN_ON(1);
63 return NULL;
64}
65
66
67static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
68{
69 switch (plcp->raw[0]) {
70 case 0x0A:
71 return 0;
72 case 0x14:
73 return 1;
74 case 0x37:
75 return 2;
76 case 0x6E:
77 return 3;
78 }
79 return -1;
80}
81
82
83static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool ghz5)
84{
85
86 int base = ghz5 ? 0 : 4;
87
88 switch (plcp->raw[0] & 0xF) {
89 case 0xB:
90 return base + 0;
91 case 0xF:
92 return base + 1;
93 case 0xA:
94 return base + 2;
95 case 0xE:
96 return base + 3;
97 case 0x9:
98 return base + 4;
99 case 0xD:
100 return base + 5;
101 case 0x8:
102 return base + 6;
103 case 0xC:
104 return base + 7;
105 }
106 return -1;
107}
108
109u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
110{
111 switch (bitrate) {
112 case B43_CCK_RATE_1MB:
113 return 0x0A;
114 case B43_CCK_RATE_2MB:
115 return 0x14;
116 case B43_CCK_RATE_5MB:
117 return 0x37;
118 case B43_CCK_RATE_11MB:
119 return 0x6E;
120 }
121 B43_WARN_ON(1);
122 return 0;
123}
124
125u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate)
126{
127 switch (bitrate) {
128 case B43_OFDM_RATE_6MB:
129 return 0xB;
130 case B43_OFDM_RATE_9MB:
131 return 0xF;
132 case B43_OFDM_RATE_12MB:
133 return 0xA;
134 case B43_OFDM_RATE_18MB:
135 return 0xE;
136 case B43_OFDM_RATE_24MB:
137 return 0x9;
138 case B43_OFDM_RATE_36MB:
139 return 0xD;
140 case B43_OFDM_RATE_48MB:
141 return 0x8;
142 case B43_OFDM_RATE_54MB:
143 return 0xC;
144 }
145 B43_WARN_ON(1);
146 return 0;
147}
148
149void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
150 const u16 octets, const u8 bitrate)
151{
152 __u8 *raw = plcp->raw;
153
154 if (b43_is_ofdm_rate(bitrate)) {
155 u32 d;
156
157 d = b43_plcp_get_ratecode_ofdm(bitrate);
158 B43_WARN_ON(octets & 0xF000);
159 d |= (octets << 5);
160 plcp->data = cpu_to_le32(d);
161 } else {
162 u32 plen;
163
164 plen = octets * 16 / bitrate;
165 if ((octets * 16 % bitrate) > 0) {
166 plen++;
167 if ((bitrate == B43_CCK_RATE_11MB)
168 && ((octets * 8 % 11) < 4)) {
169 raw[1] = 0x84;
170 } else
171 raw[1] = 0x04;
172 } else
173 raw[1] = 0x04;
174 plcp->data |= cpu_to_le32(plen << 16);
175 raw[0] = b43_plcp_get_ratecode_cck(bitrate);
176 }
177}
178
179
180static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
181{
182 const struct b43_phy *phy = &dev->phy;
183 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
184 u16 control = 0;
185 u16 bw;
186
187 if (phy->type == B43_PHYTYPE_LP)
188 bw = B43_TXH_PHY1_BW_20;
189 else
190 bw = B43_TXH_PHY1_BW_20;
191
192 if (0) {
193 } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
194 control = bw;
195 } else {
196 control = bw;
197 e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
198 if (e) {
199 control |= e->coding_rate;
200 control |= e->modulation;
201 }
202 control |= B43_TXH_PHY1_MODE_SISO;
203 }
204
205 return control;
206}
207
208static u8 b43_calc_fallback_rate(u8 bitrate, int gmode)
209{
210 switch (bitrate) {
211 case B43_CCK_RATE_1MB:
212 return B43_CCK_RATE_1MB;
213 case B43_CCK_RATE_2MB:
214 return B43_CCK_RATE_1MB;
215 case B43_CCK_RATE_5MB:
216 return B43_CCK_RATE_2MB;
217 case B43_CCK_RATE_11MB:
218 return B43_CCK_RATE_5MB;
219
220
221
222
223 case B43_OFDM_RATE_6MB:
224 if (gmode)
225 return B43_CCK_RATE_5MB;
226 else
227 return B43_OFDM_RATE_6MB;
228 case B43_OFDM_RATE_9MB:
229 return B43_OFDM_RATE_6MB;
230 case B43_OFDM_RATE_12MB:
231 return B43_OFDM_RATE_9MB;
232 case B43_OFDM_RATE_18MB:
233 return B43_OFDM_RATE_12MB;
234 case B43_OFDM_RATE_24MB:
235 return B43_OFDM_RATE_18MB;
236 case B43_OFDM_RATE_36MB:
237 return B43_OFDM_RATE_24MB;
238 case B43_OFDM_RATE_48MB:
239 return B43_OFDM_RATE_36MB;
240 case B43_OFDM_RATE_54MB:
241 return B43_OFDM_RATE_48MB;
242 }
243 B43_WARN_ON(1);
244 return 0;
245}
246
247
248int b43_generate_txhdr(struct b43_wldev *dev,
249 u8 *_txhdr,
250 struct sk_buff *skb_frag,
251 struct ieee80211_tx_info *info,
252 u16 cookie)
253{
254 const unsigned char *fragment_data = skb_frag->data;
255 unsigned int fragment_len = skb_frag->len;
256 struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr;
257 const struct b43_phy *phy = &dev->phy;
258 const struct ieee80211_hdr *wlhdr =
259 (const struct ieee80211_hdr *)fragment_data;
260 int use_encryption = !!info->control.hw_key;
261 __le16 fctl = wlhdr->frame_control;
262 struct ieee80211_rate *fbrate;
263 u8 rate, rate_fb;
264 int rate_ofdm, rate_fb_ofdm;
265 unsigned int plcp_fragment_len;
266 u32 mac_ctl = 0;
267 u16 phy_ctl = 0;
268 bool fill_phy_ctl1 = (phy->type == B43_PHYTYPE_LP ||
269 phy->type == B43_PHYTYPE_N ||
270 phy->type == B43_PHYTYPE_HT);
271 u8 extra_ft = 0;
272 struct ieee80211_rate *txrate;
273 struct ieee80211_tx_rate *rates;
274
275 memset(txhdr, 0, sizeof(*txhdr));
276
277 txrate = ieee80211_get_tx_rate(dev->wl->hw, info);
278 rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB;
279 rate_ofdm = b43_is_ofdm_rate(rate);
280 fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate;
281 rate_fb = fbrate->hw_value;
282 rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
283
284 if (rate_ofdm)
285 txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate);
286 else
287 txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate);
288 txhdr->mac_frame_ctl = wlhdr->frame_control;
289 memcpy(txhdr->tx_receiver, wlhdr->addr1, ETH_ALEN);
290
291
292 if ((rate_fb == rate) ||
293 (wlhdr->duration_id & cpu_to_le16(0x8000)) ||
294 (wlhdr->duration_id == cpu_to_le16(0))) {
295
296
297
298 txhdr->dur_fb = wlhdr->duration_id;
299 } else {
300 txhdr->dur_fb = ieee80211_generic_frame_duration(
301 dev->wl->hw, info->control.vif, info->band,
302 fragment_len, fbrate);
303 }
304
305 plcp_fragment_len = fragment_len + FCS_LEN;
306 if (use_encryption) {
307 u8 key_idx = info->control.hw_key->hw_key_idx;
308 struct b43_key *key;
309 int wlhdr_len;
310 size_t iv_len;
311
312 B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key));
313 key = &(dev->key[key_idx]);
314
315 if (unlikely(!key->keyconf)) {
316
317
318
319
320
321 return -ENOKEY;
322 }
323
324
325 plcp_fragment_len += info->control.hw_key->icv_len;
326
327 key_idx = b43_kidx_to_fw(dev, key_idx);
328 mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) &
329 B43_TXH_MAC_KEYIDX;
330 mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) &
331 B43_TXH_MAC_KEYALG;
332 wlhdr_len = ieee80211_hdrlen(fctl);
333 if (key->algorithm == B43_SEC_ALGO_TKIP) {
334 u16 phase1key[5];
335 int i;
336
337
338
339 ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key);
340
341 for (i = 0; i < 5; i++) {
342 txhdr->iv[i * 2 + 0] = phase1key[i];
343 txhdr->iv[i * 2 + 1] = phase1key[i] >> 8;
344 }
345
346 memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3);
347 } else {
348 iv_len = min_t(size_t, info->control.hw_key->iv_len,
349 ARRAY_SIZE(txhdr->iv));
350 memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len);
351 }
352 }
353 switch (dev->fw.hdr_format) {
354 case B43_FW_HDR_598:
355 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp),
356 plcp_fragment_len, rate);
357 break;
358 case B43_FW_HDR_351:
359 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp),
360 plcp_fragment_len, rate);
361 break;
362 case B43_FW_HDR_410:
363 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp),
364 plcp_fragment_len, rate);
365 break;
366 }
367 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb),
368 plcp_fragment_len, rate_fb);
369
370
371 if (rate_fb_ofdm)
372 extra_ft |= B43_TXH_EFT_FB_OFDM;
373 else
374 extra_ft |= B43_TXH_EFT_FB_CCK;
375
376
377
378
379
380 txhdr->chan_radio_code = phy->channel;
381
382
383 if (rate_ofdm)
384 phy_ctl |= B43_TXH_PHY_ENC_OFDM;
385 else
386 phy_ctl |= B43_TXH_PHY_ENC_CCK;
387 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
388 phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
389
390 switch (b43_ieee80211_antenna_sanitize(dev, 0)) {
391 case 0:
392 phy_ctl |= B43_TXH_PHY_ANT01AUTO;
393 break;
394 case 1:
395 phy_ctl |= B43_TXH_PHY_ANT0;
396 break;
397 case 2:
398 phy_ctl |= B43_TXH_PHY_ANT1;
399 break;
400 case 3:
401 phy_ctl |= B43_TXH_PHY_ANT2;
402 break;
403 case 4:
404 phy_ctl |= B43_TXH_PHY_ANT3;
405 break;
406 default:
407 B43_WARN_ON(1);
408 }
409
410 rates = info->control.rates;
411
412 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
413 mac_ctl |= B43_TXH_MAC_ACK;
414
415 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
416 mac_ctl |= B43_TXH_MAC_HWSEQ;
417 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
418 mac_ctl |= B43_TXH_MAC_STMSDU;
419 if (!phy->gmode)
420 mac_ctl |= B43_TXH_MAC_5GHZ;
421
422
423
424
425
426 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
427 (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) {
428 rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count;
429 mac_ctl |= B43_TXH_MAC_LONGFRAME;
430 } else {
431 rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count;
432 }
433
434
435 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
436 (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) {
437 unsigned int len;
438 struct ieee80211_hdr *uninitialized_var(hdr);
439 int rts_rate, rts_rate_fb;
440 int rts_rate_ofdm, rts_rate_fb_ofdm;
441 struct b43_plcp_hdr6 *uninitialized_var(plcp);
442 struct ieee80211_rate *rts_cts_rate;
443
444 rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info);
445
446 rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
447 rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
448 rts_rate_fb = b43_calc_fallback_rate(rts_rate, phy->gmode);
449 rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
450
451 if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
452 struct ieee80211_cts *uninitialized_var(cts);
453
454 switch (dev->fw.hdr_format) {
455 case B43_FW_HDR_598:
456 cts = (struct ieee80211_cts *)
457 (txhdr->format_598.rts_frame);
458 break;
459 case B43_FW_HDR_351:
460 cts = (struct ieee80211_cts *)
461 (txhdr->format_351.rts_frame);
462 break;
463 case B43_FW_HDR_410:
464 cts = (struct ieee80211_cts *)
465 (txhdr->format_410.rts_frame);
466 break;
467 }
468 ieee80211_ctstoself_get(dev->wl->hw, info->control.vif,
469 fragment_data, fragment_len,
470 info, cts);
471 mac_ctl |= B43_TXH_MAC_SENDCTS;
472 len = sizeof(struct ieee80211_cts);
473 } else {
474 struct ieee80211_rts *uninitialized_var(rts);
475
476 switch (dev->fw.hdr_format) {
477 case B43_FW_HDR_598:
478 rts = (struct ieee80211_rts *)
479 (txhdr->format_598.rts_frame);
480 break;
481 case B43_FW_HDR_351:
482 rts = (struct ieee80211_rts *)
483 (txhdr->format_351.rts_frame);
484 break;
485 case B43_FW_HDR_410:
486 rts = (struct ieee80211_rts *)
487 (txhdr->format_410.rts_frame);
488 break;
489 }
490 ieee80211_rts_get(dev->wl->hw, info->control.vif,
491 fragment_data, fragment_len,
492 info, rts);
493 mac_ctl |= B43_TXH_MAC_SENDRTS;
494 len = sizeof(struct ieee80211_rts);
495 }
496 len += FCS_LEN;
497
498
499 switch (dev->fw.hdr_format) {
500 case B43_FW_HDR_598:
501 plcp = &txhdr->format_598.rts_plcp;
502 break;
503 case B43_FW_HDR_351:
504 plcp = &txhdr->format_351.rts_plcp;
505 break;
506 case B43_FW_HDR_410:
507 plcp = &txhdr->format_410.rts_plcp;
508 break;
509 }
510 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
511 len, rts_rate);
512 plcp = &txhdr->rts_plcp_fb;
513 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
514 len, rts_rate_fb);
515
516 switch (dev->fw.hdr_format) {
517 case B43_FW_HDR_598:
518 hdr = (struct ieee80211_hdr *)
519 (&txhdr->format_598.rts_frame);
520 break;
521 case B43_FW_HDR_351:
522 hdr = (struct ieee80211_hdr *)
523 (&txhdr->format_351.rts_frame);
524 break;
525 case B43_FW_HDR_410:
526 hdr = (struct ieee80211_hdr *)
527 (&txhdr->format_410.rts_frame);
528 break;
529 }
530 txhdr->rts_dur_fb = hdr->duration_id;
531
532 if (rts_rate_ofdm) {
533 extra_ft |= B43_TXH_EFT_RTS_OFDM;
534 txhdr->phy_rate_rts =
535 b43_plcp_get_ratecode_ofdm(rts_rate);
536 } else {
537 extra_ft |= B43_TXH_EFT_RTS_CCK;
538 txhdr->phy_rate_rts =
539 b43_plcp_get_ratecode_cck(rts_rate);
540 }
541 if (rts_rate_fb_ofdm)
542 extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
543 else
544 extra_ft |= B43_TXH_EFT_RTSFB_CCK;
545
546 if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
547 fill_phy_ctl1) {
548 txhdr->phy_ctl1_rts = cpu_to_le16(
549 b43_generate_tx_phy_ctl1(dev, rts_rate));
550 txhdr->phy_ctl1_rts_fb = cpu_to_le16(
551 b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
552 }
553 }
554
555
556 switch (dev->fw.hdr_format) {
557 case B43_FW_HDR_598:
558 txhdr->format_598.cookie = cpu_to_le16(cookie);
559 break;
560 case B43_FW_HDR_351:
561 txhdr->format_351.cookie = cpu_to_le16(cookie);
562 break;
563 case B43_FW_HDR_410:
564 txhdr->format_410.cookie = cpu_to_le16(cookie);
565 break;
566 }
567
568 if (fill_phy_ctl1) {
569 txhdr->phy_ctl1 =
570 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
571 txhdr->phy_ctl1_fb =
572 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
573 }
574
575
576 txhdr->mac_ctl = cpu_to_le32(mac_ctl);
577 txhdr->phy_ctl = cpu_to_le16(phy_ctl);
578 txhdr->extra_ft = extra_ft;
579
580 return 0;
581}
582
583static s8 b43_rssi_postprocess(struct b43_wldev *dev,
584 u8 in_rssi, int ofdm,
585 int adjust_2053, int adjust_2050)
586{
587 struct b43_phy *phy = &dev->phy;
588 struct b43_phy_g *gphy = phy->g;
589 s32 tmp;
590
591 switch (phy->radio_ver) {
592 case 0x2050:
593 if (ofdm) {
594 tmp = in_rssi;
595 if (tmp > 127)
596 tmp -= 256;
597 tmp *= 73;
598 tmp /= 64;
599 if (adjust_2050)
600 tmp += 25;
601 else
602 tmp -= 3;
603 } else {
604 if (dev->dev->bus_sprom->
605 boardflags_lo & B43_BFL_RSSI) {
606 if (in_rssi > 63)
607 in_rssi = 63;
608 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
609 tmp = gphy->nrssi_lt[in_rssi];
610 tmp = 31 - tmp;
611 tmp *= -131;
612 tmp /= 128;
613 tmp -= 57;
614 } else {
615 tmp = in_rssi;
616 tmp = 31 - tmp;
617 tmp *= -149;
618 tmp /= 128;
619 tmp -= 68;
620 }
621 if (phy->type == B43_PHYTYPE_G && adjust_2050)
622 tmp += 25;
623 }
624 break;
625 case 0x2060:
626 if (in_rssi > 127)
627 tmp = in_rssi - 256;
628 else
629 tmp = in_rssi;
630 break;
631 default:
632 tmp = in_rssi;
633 tmp -= 11;
634 tmp *= 103;
635 tmp /= 64;
636 if (adjust_2053)
637 tmp -= 109;
638 else
639 tmp -= 83;
640 }
641
642 return (s8) tmp;
643}
644
645
646#if 0
647static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi)
648{
649 struct b43_phy *phy = &dev->phy;
650 s8 ret;
651
652 ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1);
653
654 return ret;
655}
656#endif
657
658void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
659{
660 struct ieee80211_rx_status status;
661 struct b43_plcp_hdr6 *plcp;
662 struct ieee80211_hdr *wlhdr;
663 const struct b43_rxhdr_fw4 *rxhdr = _rxhdr;
664 __le16 fctl;
665 u16 phystat0, phystat3;
666 u16 uninitialized_var(chanstat), uninitialized_var(mactime);
667 u32 uninitialized_var(macstat);
668 u16 chanid;
669 int padding, rate_idx;
670
671 memset(&status, 0, sizeof(status));
672
673
674 phystat0 = le16_to_cpu(rxhdr->phy_status0);
675 phystat3 = le16_to_cpu(rxhdr->phy_status3);
676 switch (dev->fw.hdr_format) {
677 case B43_FW_HDR_598:
678 macstat = le32_to_cpu(rxhdr->format_598.mac_status);
679 mactime = le16_to_cpu(rxhdr->format_598.mac_time);
680 chanstat = le16_to_cpu(rxhdr->format_598.channel);
681 break;
682 case B43_FW_HDR_410:
683 case B43_FW_HDR_351:
684 macstat = le32_to_cpu(rxhdr->format_351.mac_status);
685 mactime = le16_to_cpu(rxhdr->format_351.mac_time);
686 chanstat = le16_to_cpu(rxhdr->format_351.channel);
687 break;
688 }
689
690 if (unlikely(macstat & B43_RX_MAC_FCSERR)) {
691 dev->wl->ieee_stats.dot11FCSErrorCount++;
692 status.flag |= RX_FLAG_FAILED_FCS_CRC;
693 }
694 if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV)))
695 status.flag |= RX_FLAG_FAILED_PLCP_CRC;
696 if (phystat0 & B43_RX_PHYST0_SHORTPRMBL)
697 status.enc_flags |= RX_ENC_FLAG_SHORTPRE;
698 if (macstat & B43_RX_MAC_DECERR) {
699
700
701
702 goto drop;
703 }
704
705
706 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
707 if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) {
708 b43dbg(dev->wl, "RX: Packet size underrun (1)\n");
709 goto drop;
710 }
711 plcp = (struct b43_plcp_hdr6 *)(skb->data + padding);
712 skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding);
713
714 if (unlikely(skb->len < (2 + 2 + 6 + FCS_LEN))) {
715 b43dbg(dev->wl, "RX: Packet size underrun (2)\n");
716 goto drop;
717 }
718 wlhdr = (struct ieee80211_hdr *)(skb->data);
719 fctl = wlhdr->frame_control;
720
721 if (macstat & B43_RX_MAC_DEC) {
722 unsigned int keyidx;
723 int wlhdr_len;
724
725 keyidx = ((macstat & B43_RX_MAC_KEYIDX)
726 >> B43_RX_MAC_KEYIDX_SHIFT);
727
728
729
730 keyidx = b43_kidx_to_raw(dev, keyidx);
731 B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key));
732
733 if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) {
734 wlhdr_len = ieee80211_hdrlen(fctl);
735 if (unlikely(skb->len < (wlhdr_len + 3))) {
736 b43dbg(dev->wl,
737 "RX: Packet size underrun (3)\n");
738 goto drop;
739 }
740 status.flag |= RX_FLAG_DECRYPTED;
741 }
742 }
743
744
745 switch (chanstat & B43_RX_CHAN_PHYTYPE) {
746 case B43_PHYTYPE_HT:
747
748 status.signal = max_t(__s8,
749 max(rxhdr->phy_ht_power0, rxhdr->phy_ht_power1),
750 rxhdr->phy_ht_power2);
751 break;
752 case B43_PHYTYPE_N:
753
754 if (rxhdr->power0 == 16 || rxhdr->power0 == 32)
755 status.signal = max(rxhdr->power1, rxhdr->power2);
756 else
757 status.signal = max(rxhdr->power0, rxhdr->power1);
758 break;
759 case B43_PHYTYPE_B:
760 case B43_PHYTYPE_G:
761 case B43_PHYTYPE_LP:
762 status.signal = b43_rssi_postprocess(dev, rxhdr->jssi,
763 (phystat0 & B43_RX_PHYST0_OFDM),
764 (phystat0 & B43_RX_PHYST0_GAINCTL),
765 (phystat3 & B43_RX_PHYST3_TRSTATE));
766 break;
767 }
768
769 if (phystat0 & B43_RX_PHYST0_OFDM)
770 rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
771 !!(chanstat & B43_RX_CHAN_5GHZ));
772 else
773 rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
774 if (unlikely(rate_idx == -1)) {
775
776
777 if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
778 goto drop;
779 }
780 status.rate_idx = rate_idx;
781 status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
782
783
784
785
786
787
788
789
790
791 if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) {
792 u16 low_mactime_now;
793
794 b43_tsf_read(dev, &status.mactime);
795 low_mactime_now = status.mactime;
796 status.mactime = status.mactime & ~0xFFFFULL;
797 status.mactime += mactime;
798 if (low_mactime_now <= mactime)
799 status.mactime -= 0x10000;
800 status.flag |= RX_FLAG_MACTIME_START;
801 }
802
803 chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
804 switch (chanstat & B43_RX_CHAN_PHYTYPE) {
805 case B43_PHYTYPE_G:
806 status.band = NL80211_BAND_2GHZ;
807
808
809
810 if (dev->fw.rev >= 508)
811 status.freq = ieee80211_channel_to_frequency(chanid, status.band);
812 else
813 status.freq = chanid + 2400;
814 break;
815 case B43_PHYTYPE_N:
816 case B43_PHYTYPE_LP:
817 case B43_PHYTYPE_HT:
818
819
820 if (chanstat & B43_RX_CHAN_5GHZ)
821 status.band = NL80211_BAND_5GHZ;
822 else
823 status.band = NL80211_BAND_2GHZ;
824 status.freq =
825 ieee80211_channel_to_frequency(chanid, status.band);
826 break;
827 default:
828 B43_WARN_ON(1);
829 goto drop;
830 }
831
832 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
833 ieee80211_rx_ni(dev->wl->hw, skb);
834
835#if B43_DEBUG
836 dev->rx_count++;
837#endif
838 return;
839drop:
840 dev_kfree_skb_any(skb);
841}
842
843void b43_handle_txstatus(struct b43_wldev *dev,
844 const struct b43_txstatus *status)
845{
846 b43_debugfs_log_txstat(dev, status);
847
848 if (status->intermediate)
849 return;
850 if (status->for_ampdu)
851 return;
852 if (!status->acked)
853 dev->wl->ieee_stats.dot11ACKFailureCount++;
854 if (status->rts_count) {
855 if (status->rts_count == 0xF)
856 dev->wl->ieee_stats.dot11RTSFailureCount++;
857 else
858 dev->wl->ieee_stats.dot11RTSSuccessCount++;
859 }
860
861 if (b43_using_pio_transfers(dev))
862 b43_pio_handle_txstatus(dev, status);
863 else
864 b43_dma_handle_txstatus(dev, status);
865
866 b43_phy_txpower_check(dev, 0);
867}
868
869
870
871
872bool b43_fill_txstatus_report(struct b43_wldev *dev,
873 struct ieee80211_tx_info *report,
874 const struct b43_txstatus *status)
875{
876 bool frame_success = true;
877 int retry_limit;
878
879
880
881
882 retry_limit = report->status.rates[0].count;
883 ieee80211_tx_info_clear_status(report);
884
885 if (status->acked) {
886
887 report->flags |= IEEE80211_TX_STAT_ACK;
888 } else {
889
890 if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) {
891
892 frame_success = false;
893 }
894 }
895 if (status->frame_count == 0) {
896
897 report->status.rates[0].count = 0;
898 } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) {
899
900
901
902
903
904
905
906 report->status.rates[0].count = 0;
907 report->status.rates[1].count = status->frame_count;
908 } else {
909 if (status->frame_count > retry_limit) {
910 report->status.rates[0].count = retry_limit;
911 report->status.rates[1].count = status->frame_count -
912 retry_limit;
913
914 } else {
915 report->status.rates[0].count = status->frame_count;
916 report->status.rates[1].idx = -1;
917 }
918 }
919
920 return frame_success;
921}
922
923
924void b43_tx_suspend(struct b43_wldev *dev)
925{
926 if (b43_using_pio_transfers(dev))
927 b43_pio_tx_suspend(dev);
928 else
929 b43_dma_tx_suspend(dev);
930}
931
932
933void b43_tx_resume(struct b43_wldev *dev)
934{
935 if (b43_using_pio_transfers(dev))
936 b43_pio_tx_resume(dev);
937 else
938 b43_dma_tx_resume(dev);
939}
940