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20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static struct mwifiex_if_ops pcie_ops;
35
36static const struct of_device_id mwifiex_pcie_of_match_table[] = {
37 { .compatible = "pci11ab,2b42" },
38 { .compatible = "pci1b4b,2b42" },
39 { }
40};
41
42static int mwifiex_pcie_probe_of(struct device *dev)
43{
44 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
45 dev_err(dev, "required compatible string missing\n");
46 return -EINVAL;
47 }
48
49 return 0;
50}
51
52static void mwifiex_pcie_work(struct work_struct *work);
53
54static int
55mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
56 size_t size, int flags)
57{
58 struct pcie_service_card *card = adapter->card;
59 struct mwifiex_dma_mapping mapping;
60
61 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
62 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
63 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
64 return -1;
65 }
66 mapping.len = size;
67 mwifiex_store_mapping(skb, &mapping);
68 return 0;
69}
70
71static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
72 struct sk_buff *skb, int flags)
73{
74 struct pcie_service_card *card = adapter->card;
75 struct mwifiex_dma_mapping mapping;
76
77 mwifiex_get_mapping(skb, &mapping);
78 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
79}
80
81
82
83
84static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
85{
86 struct pcie_service_card *card = adapter->card;
87
88 iowrite32(data, card->pci_mmap1 + reg);
89
90 return 0;
91}
92
93
94
95static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
96{
97 struct pcie_service_card *card = adapter->card;
98
99 *data = ioread32(card->pci_mmap1 + reg);
100 if (*data == 0xffffffff)
101 return 0xffffffff;
102
103 return 0;
104}
105
106
107static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
108 int reg, u8 *data)
109{
110 struct pcie_service_card *card = adapter->card;
111
112 *data = ioread8(card->pci_mmap1 + reg);
113
114 return 0;
115}
116
117
118
119
120static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
121{
122 u32 cookie_value;
123 struct pcie_service_card *card = adapter->card;
124 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
125
126 if (!reg->sleep_cookie)
127 return true;
128
129 if (card->sleep_cookie_vbase) {
130 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
131 mwifiex_dbg(adapter, INFO,
132 "info: ACCESS_HW: sleep cookie=0x%x\n",
133 cookie_value);
134 if (cookie_value == FW_AWAKE_COOKIE)
135 return true;
136 }
137
138 return false;
139}
140
141#ifdef CONFIG_PM_SLEEP
142
143
144
145
146
147
148
149
150static int mwifiex_pcie_suspend(struct device *dev)
151{
152 struct mwifiex_adapter *adapter;
153 struct pcie_service_card *card;
154 struct pci_dev *pdev = to_pci_dev(dev);
155
156 card = pci_get_drvdata(pdev);
157
158
159 wait_for_completion(&card->fw_done);
160
161 adapter = card->adapter;
162 if (!adapter) {
163 dev_err(dev, "adapter is not valid\n");
164 return 0;
165 }
166
167 mwifiex_enable_wake(adapter);
168
169
170 if (!mwifiex_enable_hs(adapter)) {
171 mwifiex_dbg(adapter, ERROR,
172 "cmd: failed to suspend\n");
173 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
174 mwifiex_disable_wake(adapter);
175 return -EFAULT;
176 }
177
178 flush_workqueue(adapter->workqueue);
179
180
181 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
182 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
183
184 return 0;
185}
186
187
188
189
190
191
192
193
194
195static int mwifiex_pcie_resume(struct device *dev)
196{
197 struct mwifiex_adapter *adapter;
198 struct pcie_service_card *card;
199 struct pci_dev *pdev = to_pci_dev(dev);
200
201 card = pci_get_drvdata(pdev);
202
203 if (!card->adapter) {
204 dev_err(dev, "adapter structure is not valid\n");
205 return 0;
206 }
207
208 adapter = card->adapter;
209
210 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
211 mwifiex_dbg(adapter, WARN,
212 "Device already resumed\n");
213 return 0;
214 }
215
216 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
217
218 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
219 MWIFIEX_ASYNC_CMD);
220 mwifiex_disable_wake(adapter);
221
222 return 0;
223}
224#endif
225
226
227
228
229
230
231
232static int mwifiex_pcie_probe(struct pci_dev *pdev,
233 const struct pci_device_id *ent)
234{
235 struct pcie_service_card *card;
236 int ret;
237
238 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
239 pdev->vendor, pdev->device, pdev->revision);
240
241 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
242 if (!card)
243 return -ENOMEM;
244
245 init_completion(&card->fw_done);
246
247 card->dev = pdev;
248
249 if (ent->driver_data) {
250 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
251 card->pcie.reg = data->reg;
252 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
253 card->pcie.tx_buf_size = data->tx_buf_size;
254 card->pcie.can_dump_fw = data->can_dump_fw;
255 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
256 card->pcie.num_mem_types = data->num_mem_types;
257 card->pcie.can_ext_scan = data->can_ext_scan;
258 INIT_WORK(&card->work, mwifiex_pcie_work);
259 }
260
261
262 if (pdev->dev.of_node) {
263 ret = mwifiex_pcie_probe_of(&pdev->dev);
264 if (ret)
265 return ret;
266 }
267
268 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
269 MWIFIEX_PCIE, &pdev->dev)) {
270 pr_err("%s failed\n", __func__);
271 return -1;
272 }
273
274 return 0;
275}
276
277
278
279
280static void mwifiex_pcie_remove(struct pci_dev *pdev)
281{
282 struct pcie_service_card *card;
283 struct mwifiex_adapter *adapter;
284 struct mwifiex_private *priv;
285 const struct mwifiex_pcie_card_reg *reg;
286 u32 fw_status;
287 int ret;
288
289 card = pci_get_drvdata(pdev);
290
291 wait_for_completion(&card->fw_done);
292
293 adapter = card->adapter;
294 if (!adapter || !adapter->priv_num)
295 return;
296
297 reg = card->pcie.reg;
298 if (reg)
299 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
300 else
301 fw_status = -1;
302
303 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
304 mwifiex_deauthenticate_all(adapter);
305
306 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
307
308 mwifiex_disable_auto_ds(priv);
309
310 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
311 }
312
313 mwifiex_remove_card(adapter);
314}
315
316static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
317{
318 mwifiex_pcie_remove(pdev);
319
320 return;
321}
322
323static void mwifiex_pcie_coredump(struct device *dev)
324{
325 struct pci_dev *pdev;
326 struct pcie_service_card *card;
327
328 pdev = container_of(dev, struct pci_dev, dev);
329 card = pci_get_drvdata(pdev);
330
331 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
332 &card->work_flags))
333 schedule_work(&card->work);
334}
335
336static const struct pci_device_id mwifiex_ids[] = {
337 {
338 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
339 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
340 .driver_data = (unsigned long)&mwifiex_pcie8766,
341 },
342 {
343 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
344 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
345 .driver_data = (unsigned long)&mwifiex_pcie8897,
346 },
347 {
348 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
349 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
350 .driver_data = (unsigned long)&mwifiex_pcie8997,
351 },
352 {
353 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
354 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
355 .driver_data = (unsigned long)&mwifiex_pcie8997,
356 },
357 {},
358};
359
360MODULE_DEVICE_TABLE(pci, mwifiex_ids);
361
362
363
364
365static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
366{
367 struct pcie_service_card *card = pci_get_drvdata(pdev);
368 struct mwifiex_adapter *adapter = card->adapter;
369
370 if (!adapter) {
371 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
372 __func__);
373 return;
374 }
375
376 mwifiex_dbg(adapter, INFO,
377 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
378 __func__, pdev->vendor, pdev->device, pdev->revision);
379
380 mwifiex_shutdown_sw(adapter);
381 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
382 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
383 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
384}
385
386
387
388
389
390
391static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
392{
393 struct pcie_service_card *card = pci_get_drvdata(pdev);
394 struct mwifiex_adapter *adapter = card->adapter;
395 int ret;
396
397 if (!adapter) {
398 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
399 __func__);
400 return;
401 }
402
403 mwifiex_dbg(adapter, INFO,
404 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
405 __func__, pdev->vendor, pdev->device, pdev->revision);
406
407 ret = mwifiex_reinit_sw(adapter);
408 if (ret)
409 dev_err(&pdev->dev, "reinit failed: %d\n", ret);
410 else
411 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
412}
413
414static const struct pci_error_handlers mwifiex_pcie_err_handler = {
415 .reset_prepare = mwifiex_pcie_reset_prepare,
416 .reset_done = mwifiex_pcie_reset_done,
417};
418
419#ifdef CONFIG_PM_SLEEP
420
421static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
422 mwifiex_pcie_resume);
423#endif
424
425
426static struct pci_driver __refdata mwifiex_pcie = {
427 .name = "mwifiex_pcie",
428 .id_table = mwifiex_ids,
429 .probe = mwifiex_pcie_probe,
430 .remove = mwifiex_pcie_remove,
431 .driver = {
432 .coredump = mwifiex_pcie_coredump,
433#ifdef CONFIG_PM_SLEEP
434 .pm = &mwifiex_pcie_pm_ops,
435#endif
436 },
437 .shutdown = mwifiex_pcie_shutdown,
438 .err_handler = &mwifiex_pcie_err_handler,
439};
440
441
442
443
444static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
445{
446 int i = 0;
447
448 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
449 i++;
450 usleep_range(10, 20);
451
452 if (i == 5000)
453 break;
454 }
455
456 return;
457}
458
459static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
460 u32 max_delay_loop_cnt)
461{
462 struct pcie_service_card *card = adapter->card;
463 u8 *buffer;
464 u32 sleep_cookie, count;
465 struct sk_buff *cmdrsp = card->cmdrsp_buf;
466
467 for (count = 0; count < max_delay_loop_cnt; count++) {
468 pci_dma_sync_single_for_cpu(card->dev,
469 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
470 sizeof(sleep_cookie),
471 PCI_DMA_FROMDEVICE);
472 buffer = cmdrsp->data;
473 sleep_cookie = get_unaligned_le32(buffer);
474
475 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
476 mwifiex_dbg(adapter, INFO,
477 "sleep cookie found at count %d\n", count);
478 break;
479 }
480 pci_dma_sync_single_for_device(card->dev,
481 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
482 sizeof(sleep_cookie),
483 PCI_DMA_FROMDEVICE);
484 usleep_range(20, 30);
485 }
486
487 if (count >= max_delay_loop_cnt)
488 mwifiex_dbg(adapter, INFO,
489 "max count reached while accessing sleep cookie\n");
490}
491
492
493static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
494{
495 struct pcie_service_card *card = adapter->card;
496 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
497
498 mwifiex_dbg(adapter, EVENT,
499 "event: Wakeup device...\n");
500
501 if (reg->sleep_cookie)
502 mwifiex_pcie_dev_wakeup_delay(adapter);
503
504
505 if (mwifiex_write_reg(adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
506 mwifiex_dbg(adapter, ERROR,
507 "Writing fw_status register failed\n");
508 return -1;
509 }
510
511 if (reg->sleep_cookie) {
512 mwifiex_pcie_dev_wakeup_delay(adapter);
513 mwifiex_dbg(adapter, INFO,
514 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
515 adapter->ps_state = PS_STATE_AWAKE;
516 }
517
518 return 0;
519}
520
521
522
523
524
525
526static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
527{
528 mwifiex_dbg(adapter, CMD,
529 "cmd: Wakeup device completed\n");
530
531 return 0;
532}
533
534
535
536
537
538
539
540static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
541{
542 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
543 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
544 0x00000000)) {
545 mwifiex_dbg(adapter, ERROR,
546 "Disable host interrupt failed\n");
547 return -1;
548 }
549 }
550
551 atomic_set(&adapter->tx_hw_pending, 0);
552 return 0;
553}
554
555static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
556{
557 WARN_ON(mwifiex_pcie_disable_host_int(adapter));
558}
559
560
561
562
563
564
565
566static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
567{
568 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
569
570 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
571 HOST_INTR_MASK)) {
572 mwifiex_dbg(adapter, ERROR,
573 "Enable host interrupt failed\n");
574 return -1;
575 }
576 }
577
578 return 0;
579}
580
581
582
583
584static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
585{
586 struct pcie_service_card *card = adapter->card;
587 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
588 struct mwifiex_pcie_buf_desc *desc;
589 struct mwifiex_pfu_buf_desc *desc2;
590 int i;
591
592 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
593 card->tx_buf_list[i] = NULL;
594 if (reg->pfu_enabled) {
595 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
596 (sizeof(*desc2) * i);
597 desc2 = card->txbd_ring[i];
598 memset(desc2, 0, sizeof(*desc2));
599 } else {
600 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
601 (sizeof(*desc) * i);
602 desc = card->txbd_ring[i];
603 memset(desc, 0, sizeof(*desc));
604 }
605 }
606
607 return 0;
608}
609
610
611
612
613
614static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
615{
616 struct pcie_service_card *card = adapter->card;
617 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
618 struct sk_buff *skb;
619 struct mwifiex_pcie_buf_desc *desc;
620 struct mwifiex_pfu_buf_desc *desc2;
621 dma_addr_t buf_pa;
622 int i;
623
624 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
625
626 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
627 GFP_KERNEL);
628 if (!skb) {
629 mwifiex_dbg(adapter, ERROR,
630 "Unable to allocate skb for RX ring.\n");
631 kfree(card->rxbd_ring_vbase);
632 return -ENOMEM;
633 }
634
635 if (mwifiex_map_pci_memory(adapter, skb,
636 MWIFIEX_RX_DATA_BUF_SIZE,
637 PCI_DMA_FROMDEVICE))
638 return -1;
639
640 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
641
642 mwifiex_dbg(adapter, INFO,
643 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
644 skb, skb->len, skb->data, (u32)buf_pa,
645 (u32)((u64)buf_pa >> 32));
646
647 card->rx_buf_list[i] = skb;
648 if (reg->pfu_enabled) {
649 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
650 (sizeof(*desc2) * i);
651 desc2 = card->rxbd_ring[i];
652 desc2->paddr = buf_pa;
653 desc2->len = (u16)skb->len;
654 desc2->frag_len = (u16)skb->len;
655 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
656 desc2->offset = 0;
657 } else {
658 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
659 (sizeof(*desc) * i));
660 desc = card->rxbd_ring[i];
661 desc->paddr = buf_pa;
662 desc->len = (u16)skb->len;
663 desc->flags = 0;
664 }
665 }
666
667 return 0;
668}
669
670
671
672
673
674static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
675{
676 struct pcie_service_card *card = adapter->card;
677 struct mwifiex_evt_buf_desc *desc;
678 struct sk_buff *skb;
679 dma_addr_t buf_pa;
680 int i;
681
682 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
683
684 skb = dev_alloc_skb(MAX_EVENT_SIZE);
685 if (!skb) {
686 mwifiex_dbg(adapter, ERROR,
687 "Unable to allocate skb for EVENT buf.\n");
688 kfree(card->evtbd_ring_vbase);
689 return -ENOMEM;
690 }
691 skb_put(skb, MAX_EVENT_SIZE);
692
693 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
694 PCI_DMA_FROMDEVICE))
695 return -1;
696
697 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
698
699 mwifiex_dbg(adapter, EVENT,
700 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
701 skb, skb->len, skb->data, (u32)buf_pa,
702 (u32)((u64)buf_pa >> 32));
703
704 card->evt_buf_list[i] = skb;
705 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
706 (sizeof(*desc) * i));
707 desc = card->evtbd_ring[i];
708 desc->paddr = buf_pa;
709 desc->len = (u16)skb->len;
710 desc->flags = 0;
711 }
712
713 return 0;
714}
715
716
717
718
719static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
720{
721 struct pcie_service_card *card = adapter->card;
722 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
723 struct sk_buff *skb;
724 struct mwifiex_pcie_buf_desc *desc;
725 struct mwifiex_pfu_buf_desc *desc2;
726 int i;
727
728 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
729 if (reg->pfu_enabled) {
730 desc2 = card->txbd_ring[i];
731 if (card->tx_buf_list[i]) {
732 skb = card->tx_buf_list[i];
733 mwifiex_unmap_pci_memory(adapter, skb,
734 PCI_DMA_TODEVICE);
735 dev_kfree_skb_any(skb);
736 }
737 memset(desc2, 0, sizeof(*desc2));
738 } else {
739 desc = card->txbd_ring[i];
740 if (card->tx_buf_list[i]) {
741 skb = card->tx_buf_list[i];
742 mwifiex_unmap_pci_memory(adapter, skb,
743 PCI_DMA_TODEVICE);
744 dev_kfree_skb_any(skb);
745 }
746 memset(desc, 0, sizeof(*desc));
747 }
748 card->tx_buf_list[i] = NULL;
749 }
750
751 atomic_set(&adapter->tx_hw_pending, 0);
752 return;
753}
754
755
756
757
758static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
759{
760 struct pcie_service_card *card = adapter->card;
761 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
762 struct mwifiex_pcie_buf_desc *desc;
763 struct mwifiex_pfu_buf_desc *desc2;
764 struct sk_buff *skb;
765 int i;
766
767 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
768 if (reg->pfu_enabled) {
769 desc2 = card->rxbd_ring[i];
770 if (card->rx_buf_list[i]) {
771 skb = card->rx_buf_list[i];
772 mwifiex_unmap_pci_memory(adapter, skb,
773 PCI_DMA_FROMDEVICE);
774 dev_kfree_skb_any(skb);
775 }
776 memset(desc2, 0, sizeof(*desc2));
777 } else {
778 desc = card->rxbd_ring[i];
779 if (card->rx_buf_list[i]) {
780 skb = card->rx_buf_list[i];
781 mwifiex_unmap_pci_memory(adapter, skb,
782 PCI_DMA_FROMDEVICE);
783 dev_kfree_skb_any(skb);
784 }
785 memset(desc, 0, sizeof(*desc));
786 }
787 card->rx_buf_list[i] = NULL;
788 }
789
790 return;
791}
792
793
794
795
796static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
797{
798 struct pcie_service_card *card = adapter->card;
799 struct mwifiex_evt_buf_desc *desc;
800 struct sk_buff *skb;
801 int i;
802
803 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
804 desc = card->evtbd_ring[i];
805 if (card->evt_buf_list[i]) {
806 skb = card->evt_buf_list[i];
807 mwifiex_unmap_pci_memory(adapter, skb,
808 PCI_DMA_FROMDEVICE);
809 dev_kfree_skb_any(skb);
810 }
811 card->evt_buf_list[i] = NULL;
812 memset(desc, 0, sizeof(*desc));
813 }
814
815 return;
816}
817
818
819
820static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
821{
822 struct pcie_service_card *card = adapter->card;
823 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
824
825
826
827
828
829
830 card->txbd_wrptr = 0;
831
832 if (reg->pfu_enabled)
833 card->txbd_rdptr = 0;
834 else
835 card->txbd_rdptr |= reg->tx_rollover_ind;
836
837
838
839 if (reg->pfu_enabled)
840 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
841 MWIFIEX_MAX_TXRX_BD;
842 else
843 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
844 MWIFIEX_MAX_TXRX_BD;
845
846 mwifiex_dbg(adapter, INFO,
847 "info: txbd_ring: Allocating %d bytes\n",
848 card->txbd_ring_size);
849 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
850 card->txbd_ring_size,
851 &card->txbd_ring_pbase);
852 if (!card->txbd_ring_vbase) {
853 mwifiex_dbg(adapter, ERROR,
854 "allocate consistent memory (%d bytes) failed!\n",
855 card->txbd_ring_size);
856 return -ENOMEM;
857 }
858 mwifiex_dbg(adapter, DATA,
859 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
860 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
861 (u32)((u64)card->txbd_ring_pbase >> 32),
862 card->txbd_ring_size);
863
864 return mwifiex_init_txq_ring(adapter);
865}
866
867static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
868{
869 struct pcie_service_card *card = adapter->card;
870 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
871
872 mwifiex_cleanup_txq_ring(adapter);
873
874 if (card->txbd_ring_vbase)
875 pci_free_consistent(card->dev, card->txbd_ring_size,
876 card->txbd_ring_vbase,
877 card->txbd_ring_pbase);
878 card->txbd_ring_size = 0;
879 card->txbd_wrptr = 0;
880 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
881 card->txbd_ring_vbase = NULL;
882 card->txbd_ring_pbase = 0;
883
884 return 0;
885}
886
887
888
889
890static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
891{
892 struct pcie_service_card *card = adapter->card;
893 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
894
895
896
897
898
899
900 card->rxbd_wrptr = 0;
901 card->rxbd_rdptr = reg->rx_rollover_ind;
902
903 if (reg->pfu_enabled)
904 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
905 MWIFIEX_MAX_TXRX_BD;
906 else
907 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
908 MWIFIEX_MAX_TXRX_BD;
909
910 mwifiex_dbg(adapter, INFO,
911 "info: rxbd_ring: Allocating %d bytes\n",
912 card->rxbd_ring_size);
913 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
914 card->rxbd_ring_size,
915 &card->rxbd_ring_pbase);
916 if (!card->rxbd_ring_vbase) {
917 mwifiex_dbg(adapter, ERROR,
918 "allocate consistent memory (%d bytes) failed!\n",
919 card->rxbd_ring_size);
920 return -ENOMEM;
921 }
922
923 mwifiex_dbg(adapter, DATA,
924 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
925 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
926 (u32)((u64)card->rxbd_ring_pbase >> 32),
927 card->rxbd_ring_size);
928
929 return mwifiex_init_rxq_ring(adapter);
930}
931
932
933
934
935static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
936{
937 struct pcie_service_card *card = adapter->card;
938 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
939
940 mwifiex_cleanup_rxq_ring(adapter);
941
942 if (card->rxbd_ring_vbase)
943 pci_free_consistent(card->dev, card->rxbd_ring_size,
944 card->rxbd_ring_vbase,
945 card->rxbd_ring_pbase);
946 card->rxbd_ring_size = 0;
947 card->rxbd_wrptr = 0;
948 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
949 card->rxbd_ring_vbase = NULL;
950 card->rxbd_ring_pbase = 0;
951
952 return 0;
953}
954
955
956
957
958static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
959{
960 struct pcie_service_card *card = adapter->card;
961 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
962
963
964
965
966
967
968 card->evtbd_wrptr = 0;
969 card->evtbd_rdptr = reg->evt_rollover_ind;
970
971 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
972 MWIFIEX_MAX_EVT_BD;
973
974 mwifiex_dbg(adapter, INFO,
975 "info: evtbd_ring: Allocating %d bytes\n",
976 card->evtbd_ring_size);
977 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
978 card->evtbd_ring_size,
979 &card->evtbd_ring_pbase);
980 if (!card->evtbd_ring_vbase) {
981 mwifiex_dbg(adapter, ERROR,
982 "allocate consistent memory (%d bytes) failed!\n",
983 card->evtbd_ring_size);
984 return -ENOMEM;
985 }
986
987 mwifiex_dbg(adapter, EVENT,
988 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
989 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
990 (u32)((u64)card->evtbd_ring_pbase >> 32),
991 card->evtbd_ring_size);
992
993 return mwifiex_pcie_init_evt_ring(adapter);
994}
995
996
997
998
999static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
1000{
1001 struct pcie_service_card *card = adapter->card;
1002 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1003
1004 mwifiex_cleanup_evt_ring(adapter);
1005
1006 if (card->evtbd_ring_vbase)
1007 pci_free_consistent(card->dev, card->evtbd_ring_size,
1008 card->evtbd_ring_vbase,
1009 card->evtbd_ring_pbase);
1010 card->evtbd_wrptr = 0;
1011 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1012 card->evtbd_ring_size = 0;
1013 card->evtbd_ring_vbase = NULL;
1014 card->evtbd_ring_pbase = 0;
1015
1016 return 0;
1017}
1018
1019
1020
1021
1022static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1023{
1024 struct pcie_service_card *card = adapter->card;
1025 struct sk_buff *skb;
1026
1027
1028 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1029 if (!skb) {
1030 mwifiex_dbg(adapter, ERROR,
1031 "Unable to allocate skb for command response data.\n");
1032 return -ENOMEM;
1033 }
1034 skb_put(skb, MWIFIEX_UPLD_SIZE);
1035 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1036 PCI_DMA_FROMDEVICE))
1037 return -1;
1038
1039 card->cmdrsp_buf = skb;
1040
1041 return 0;
1042}
1043
1044
1045
1046
1047static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1048{
1049 struct pcie_service_card *card;
1050
1051 if (!adapter)
1052 return 0;
1053
1054 card = adapter->card;
1055
1056 if (card && card->cmdrsp_buf) {
1057 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1058 PCI_DMA_FROMDEVICE);
1059 dev_kfree_skb_any(card->cmdrsp_buf);
1060 card->cmdrsp_buf = NULL;
1061 }
1062
1063 if (card && card->cmd_buf) {
1064 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1065 PCI_DMA_TODEVICE);
1066 dev_kfree_skb_any(card->cmd_buf);
1067 card->cmd_buf = NULL;
1068 }
1069 return 0;
1070}
1071
1072
1073
1074
1075static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1076{
1077 struct pcie_service_card *card = adapter->card;
1078 u32 tmp;
1079
1080 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
1081 &card->sleep_cookie_pbase);
1082 if (!card->sleep_cookie_vbase) {
1083 mwifiex_dbg(adapter, ERROR,
1084 "pci_alloc_consistent failed!\n");
1085 return -ENOMEM;
1086 }
1087
1088 tmp = FW_AWAKE_COOKIE;
1089 put_unaligned(tmp, card->sleep_cookie_vbase);
1090
1091 mwifiex_dbg(adapter, INFO,
1092 "alloc_scook: sleep cookie=0x%x\n",
1093 get_unaligned(card->sleep_cookie_vbase));
1094
1095 return 0;
1096}
1097
1098
1099
1100
1101static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1102{
1103 struct pcie_service_card *card;
1104
1105 if (!adapter)
1106 return 0;
1107
1108 card = adapter->card;
1109
1110 if (card && card->sleep_cookie_vbase) {
1111 pci_free_consistent(card->dev, sizeof(u32),
1112 card->sleep_cookie_vbase,
1113 card->sleep_cookie_pbase);
1114 card->sleep_cookie_vbase = NULL;
1115 }
1116
1117 return 0;
1118}
1119
1120
1121
1122
1123
1124static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1125{
1126 struct pcie_service_card *card = adapter->card;
1127
1128 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1129 card->txbd_flush = 1;
1130
1131
1132
1133 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1134 CPU_INTR_DNLD_RDY)) {
1135 mwifiex_dbg(adapter, ERROR,
1136 "failed to assert dnld-rdy interrupt.\n");
1137 return -1;
1138 }
1139 }
1140 return 0;
1141}
1142
1143
1144
1145
1146static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1147{
1148 struct sk_buff *skb;
1149 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1150 struct mwifiex_pcie_buf_desc *desc;
1151 struct mwifiex_pfu_buf_desc *desc2;
1152 struct pcie_service_card *card = adapter->card;
1153 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1154
1155 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1156 mwifiex_pm_wakeup_card(adapter);
1157
1158
1159 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1160 mwifiex_dbg(adapter, ERROR,
1161 "SEND COMP: failed to read reg->tx_rdptr\n");
1162 return -1;
1163 }
1164
1165 mwifiex_dbg(adapter, DATA,
1166 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1167 card->txbd_rdptr, rdptr);
1168
1169 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1170
1171 while (((card->txbd_rdptr & reg->tx_mask) !=
1172 (rdptr & reg->tx_mask)) ||
1173 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1174 (rdptr & reg->tx_rollover_ind))) {
1175 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1176 reg->tx_start_ptr;
1177
1178 skb = card->tx_buf_list[wrdoneidx];
1179
1180 if (skb) {
1181 mwifiex_dbg(adapter, DATA,
1182 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1183 skb, wrdoneidx);
1184 mwifiex_unmap_pci_memory(adapter, skb,
1185 PCI_DMA_TODEVICE);
1186
1187 unmap_count++;
1188
1189 if (card->txbd_flush)
1190 mwifiex_write_data_complete(adapter, skb, 0,
1191 -1);
1192 else
1193 mwifiex_write_data_complete(adapter, skb, 0, 0);
1194 atomic_dec(&adapter->tx_hw_pending);
1195 }
1196
1197 card->tx_buf_list[wrdoneidx] = NULL;
1198
1199 if (reg->pfu_enabled) {
1200 desc2 = card->txbd_ring[wrdoneidx];
1201 memset(desc2, 0, sizeof(*desc2));
1202 } else {
1203 desc = card->txbd_ring[wrdoneidx];
1204 memset(desc, 0, sizeof(*desc));
1205 }
1206 switch (card->dev->device) {
1207 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1208 card->txbd_rdptr++;
1209 break;
1210 case PCIE_DEVICE_ID_MARVELL_88W8897:
1211 case PCIE_DEVICE_ID_MARVELL_88W8997:
1212 card->txbd_rdptr += reg->ring_tx_start_ptr;
1213 break;
1214 }
1215
1216
1217 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1218 card->txbd_rdptr = ((card->txbd_rdptr &
1219 reg->tx_rollover_ind) ^
1220 reg->tx_rollover_ind);
1221 }
1222
1223 if (unmap_count)
1224 adapter->data_sent = false;
1225
1226 if (card->txbd_flush) {
1227 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1228 card->txbd_flush = 0;
1229 else
1230 mwifiex_clean_pcie_ring_buf(adapter);
1231 }
1232
1233 return 0;
1234}
1235
1236
1237
1238
1239
1240
1241
1242
1243static int
1244mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1245 struct mwifiex_tx_param *tx_param)
1246{
1247 struct pcie_service_card *card = adapter->card;
1248 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1249 u32 wrindx, num_tx_buffs, rx_val;
1250 int ret;
1251 dma_addr_t buf_pa;
1252 struct mwifiex_pcie_buf_desc *desc = NULL;
1253 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1254
1255 if (!(skb->data && skb->len)) {
1256 mwifiex_dbg(adapter, ERROR,
1257 "%s(): invalid parameter <%p, %#x>\n",
1258 __func__, skb->data, skb->len);
1259 return -1;
1260 }
1261
1262 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1263 mwifiex_pm_wakeup_card(adapter);
1264
1265 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1266 mwifiex_dbg(adapter, DATA,
1267 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1268 card->txbd_rdptr, card->txbd_wrptr);
1269 if (mwifiex_pcie_txbd_not_full(card)) {
1270 u8 *payload;
1271
1272 adapter->data_sent = true;
1273 payload = skb->data;
1274 put_unaligned_le16((u16)skb->len, payload + 0);
1275 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1276
1277 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1278 PCI_DMA_TODEVICE))
1279 return -1;
1280
1281 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1282 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1283 card->tx_buf_list[wrindx] = skb;
1284 atomic_inc(&adapter->tx_hw_pending);
1285
1286 if (reg->pfu_enabled) {
1287 desc2 = card->txbd_ring[wrindx];
1288 desc2->paddr = buf_pa;
1289 desc2->len = (u16)skb->len;
1290 desc2->frag_len = (u16)skb->len;
1291 desc2->offset = 0;
1292 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1293 MWIFIEX_BD_FLAG_LAST_DESC;
1294 } else {
1295 desc = card->txbd_ring[wrindx];
1296 desc->paddr = buf_pa;
1297 desc->len = (u16)skb->len;
1298 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1299 MWIFIEX_BD_FLAG_LAST_DESC;
1300 }
1301
1302 switch (card->dev->device) {
1303 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1304 card->txbd_wrptr++;
1305 break;
1306 case PCIE_DEVICE_ID_MARVELL_88W8897:
1307 case PCIE_DEVICE_ID_MARVELL_88W8997:
1308 card->txbd_wrptr += reg->ring_tx_start_ptr;
1309 break;
1310 }
1311
1312 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1313 card->txbd_wrptr = ((card->txbd_wrptr &
1314 reg->tx_rollover_ind) ^
1315 reg->tx_rollover_ind);
1316
1317 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1318
1319 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1320 card->txbd_wrptr | rx_val)) {
1321 mwifiex_dbg(adapter, ERROR,
1322 "SEND DATA: failed to write reg->tx_wrptr\n");
1323 ret = -1;
1324 goto done_unmap;
1325 }
1326 if ((mwifiex_pcie_txbd_not_full(card)) &&
1327 tx_param->next_pkt_len) {
1328
1329 mwifiex_dbg(adapter, DATA,
1330 "SEND DATA: delay dnld-rdy interrupt.\n");
1331 adapter->data_sent = false;
1332 } else {
1333
1334 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1335 CPU_INTR_DNLD_RDY)) {
1336 mwifiex_dbg(adapter, ERROR,
1337 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1338 ret = -1;
1339 goto done_unmap;
1340 }
1341 }
1342 mwifiex_dbg(adapter, DATA,
1343 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1344 "%#x> and sent packet to firmware successfully\n",
1345 card->txbd_rdptr, card->txbd_wrptr);
1346 } else {
1347 mwifiex_dbg(adapter, DATA,
1348 "info: TX Ring full, can't send packets to fw\n");
1349 adapter->data_sent = true;
1350
1351 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1352 CPU_INTR_DNLD_RDY))
1353 mwifiex_dbg(adapter, ERROR,
1354 "SEND DATA: failed to assert door-bell intr\n");
1355 return -EBUSY;
1356 }
1357
1358 return -EINPROGRESS;
1359done_unmap:
1360 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1361 card->tx_buf_list[wrindx] = NULL;
1362 atomic_dec(&adapter->tx_hw_pending);
1363 if (reg->pfu_enabled)
1364 memset(desc2, 0, sizeof(*desc2));
1365 else
1366 memset(desc, 0, sizeof(*desc));
1367
1368 return ret;
1369}
1370
1371
1372
1373
1374
1375static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1376{
1377 struct pcie_service_card *card = adapter->card;
1378 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1379 u32 wrptr, rd_index, tx_val;
1380 dma_addr_t buf_pa;
1381 int ret = 0;
1382 struct sk_buff *skb_tmp = NULL;
1383 struct mwifiex_pcie_buf_desc *desc;
1384 struct mwifiex_pfu_buf_desc *desc2;
1385
1386 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1387 mwifiex_pm_wakeup_card(adapter);
1388
1389
1390 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1391 mwifiex_dbg(adapter, ERROR,
1392 "RECV DATA: failed to read reg->rx_wrptr\n");
1393 ret = -1;
1394 goto done;
1395 }
1396 card->rxbd_wrptr = wrptr;
1397
1398 while (((wrptr & reg->rx_mask) !=
1399 (card->rxbd_rdptr & reg->rx_mask)) ||
1400 ((wrptr & reg->rx_rollover_ind) ==
1401 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1402 struct sk_buff *skb_data;
1403 u16 rx_len;
1404
1405 rd_index = card->rxbd_rdptr & reg->rx_mask;
1406 skb_data = card->rx_buf_list[rd_index];
1407
1408
1409
1410
1411 if (!skb_data)
1412 return -ENOMEM;
1413
1414 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1415 card->rx_buf_list[rd_index] = NULL;
1416
1417
1418
1419
1420 rx_len = get_unaligned_le16(skb_data->data);
1421 if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1422 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1423 mwifiex_dbg(adapter, ERROR,
1424 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1425 rx_len, card->rxbd_rdptr, wrptr);
1426 dev_kfree_skb_any(skb_data);
1427 } else {
1428 skb_put(skb_data, rx_len);
1429 mwifiex_dbg(adapter, DATA,
1430 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1431 card->rxbd_rdptr, wrptr, rx_len);
1432 skb_pull(skb_data, adapter->intf_hdr_len);
1433 if (adapter->rx_work_enabled) {
1434 skb_queue_tail(&adapter->rx_data_q, skb_data);
1435 adapter->data_received = true;
1436 atomic_inc(&adapter->rx_pending);
1437 } else {
1438 mwifiex_handle_rx_packet(adapter, skb_data);
1439 }
1440 }
1441
1442 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1443 GFP_KERNEL);
1444 if (!skb_tmp) {
1445 mwifiex_dbg(adapter, ERROR,
1446 "Unable to allocate skb.\n");
1447 return -ENOMEM;
1448 }
1449
1450 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1451 MWIFIEX_RX_DATA_BUF_SIZE,
1452 PCI_DMA_FROMDEVICE))
1453 return -1;
1454
1455 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1456
1457 mwifiex_dbg(adapter, INFO,
1458 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1459 skb_tmp, rd_index);
1460 card->rx_buf_list[rd_index] = skb_tmp;
1461
1462 if (reg->pfu_enabled) {
1463 desc2 = card->rxbd_ring[rd_index];
1464 desc2->paddr = buf_pa;
1465 desc2->len = skb_tmp->len;
1466 desc2->frag_len = skb_tmp->len;
1467 desc2->offset = 0;
1468 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1469 } else {
1470 desc = card->rxbd_ring[rd_index];
1471 desc->paddr = buf_pa;
1472 desc->len = skb_tmp->len;
1473 desc->flags = 0;
1474 }
1475
1476 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1477 MWIFIEX_MAX_TXRX_BD) {
1478 card->rxbd_rdptr = ((card->rxbd_rdptr &
1479 reg->rx_rollover_ind) ^
1480 reg->rx_rollover_ind);
1481 }
1482 mwifiex_dbg(adapter, DATA,
1483 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1484 card->rxbd_rdptr, wrptr);
1485
1486 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1487
1488 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1489 card->rxbd_rdptr | tx_val)) {
1490 mwifiex_dbg(adapter, DATA,
1491 "RECV DATA: failed to write reg->rx_rdptr\n");
1492 ret = -1;
1493 goto done;
1494 }
1495
1496
1497 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1498 mwifiex_dbg(adapter, ERROR,
1499 "RECV DATA: failed to read reg->rx_wrptr\n");
1500 ret = -1;
1501 goto done;
1502 }
1503 mwifiex_dbg(adapter, DATA,
1504 "info: RECV DATA: Rcvd packet from fw successfully\n");
1505 card->rxbd_wrptr = wrptr;
1506 }
1507
1508done:
1509 return ret;
1510}
1511
1512
1513
1514
1515static int
1516mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1517{
1518 dma_addr_t buf_pa;
1519 struct pcie_service_card *card = adapter->card;
1520 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1521
1522 if (!(skb->data && skb->len)) {
1523 mwifiex_dbg(adapter, ERROR,
1524 "Invalid parameter in %s <%p. len %d>\n",
1525 __func__, skb->data, skb->len);
1526 return -1;
1527 }
1528
1529 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1530 return -1;
1531
1532 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1533
1534
1535
1536
1537 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1538 mwifiex_dbg(adapter, ERROR,
1539 "%s: failed to write download command to boot code.\n",
1540 __func__);
1541 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1542 return -1;
1543 }
1544
1545
1546
1547
1548 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1549 (u32)((u64)buf_pa >> 32))) {
1550 mwifiex_dbg(adapter, ERROR,
1551 "%s: failed to write download command to boot code.\n",
1552 __func__);
1553 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1554 return -1;
1555 }
1556
1557
1558 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1559 mwifiex_dbg(adapter, ERROR,
1560 "%s: failed to write command len to cmd_size scratch reg\n",
1561 __func__);
1562 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1563 return -1;
1564 }
1565
1566
1567 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1568 CPU_INTR_DOOR_BELL)) {
1569 mwifiex_dbg(adapter, ERROR,
1570 "%s: failed to assert door-bell intr\n", __func__);
1571 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1572 return -1;
1573 }
1574
1575 return 0;
1576}
1577
1578
1579
1580
1581static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1582{
1583 struct pcie_service_card *card = adapter->card;
1584 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1585 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1586
1587
1588 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1589 tx_wrap)) {
1590 mwifiex_dbg(adapter, ERROR,
1591 "RECV DATA: failed to write reg->rx_rdptr\n");
1592 return -1;
1593 }
1594 return 0;
1595}
1596
1597
1598
1599static int
1600mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1601{
1602 struct pcie_service_card *card = adapter->card;
1603 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1604 int ret = 0;
1605 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1606 u8 *payload = (u8 *)skb->data;
1607
1608 if (!(skb->data && skb->len)) {
1609 mwifiex_dbg(adapter, ERROR,
1610 "Invalid parameter in %s <%p, %#x>\n",
1611 __func__, skb->data, skb->len);
1612 return -1;
1613 }
1614
1615
1616 if (!card->cmdrsp_buf) {
1617 mwifiex_dbg(adapter, ERROR,
1618 "No response buffer available, send command failed\n");
1619 return -EBUSY;
1620 }
1621
1622 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1623 mwifiex_pm_wakeup_card(adapter);
1624
1625 adapter->cmd_sent = true;
1626
1627 put_unaligned_le16((u16)skb->len, &payload[0]);
1628 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1629
1630 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1631 return -1;
1632
1633 card->cmd_buf = skb;
1634
1635
1636
1637
1638 skb_get(skb);
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650 if (card->cmdrsp_buf) {
1651 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1652
1653
1654 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1655 (u32)cmdrsp_buf_pa)) {
1656 mwifiex_dbg(adapter, ERROR,
1657 "Failed to write download cmd to boot code.\n");
1658 ret = -1;
1659 goto done;
1660 }
1661
1662
1663 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1664 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1665 mwifiex_dbg(adapter, ERROR,
1666 "Failed to write download cmd to boot code.\n");
1667 ret = -1;
1668 goto done;
1669 }
1670 }
1671
1672 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1673
1674 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1675 (u32)cmd_buf_pa)) {
1676 mwifiex_dbg(adapter, ERROR,
1677 "Failed to write download cmd to boot code.\n");
1678 ret = -1;
1679 goto done;
1680 }
1681
1682 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1683 (u32)((u64)cmd_buf_pa >> 32))) {
1684 mwifiex_dbg(adapter, ERROR,
1685 "Failed to write download cmd to boot code.\n");
1686 ret = -1;
1687 goto done;
1688 }
1689
1690
1691 if (mwifiex_write_reg(adapter, reg->cmd_size,
1692 card->cmd_buf->len)) {
1693 mwifiex_dbg(adapter, ERROR,
1694 "Failed to write cmd len to reg->cmd_size\n");
1695 ret = -1;
1696 goto done;
1697 }
1698
1699
1700 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1701 CPU_INTR_DOOR_BELL)) {
1702 mwifiex_dbg(adapter, ERROR,
1703 "Failed to assert door-bell intr\n");
1704 ret = -1;
1705 goto done;
1706 }
1707
1708done:
1709 if (ret)
1710 adapter->cmd_sent = false;
1711
1712 return 0;
1713}
1714
1715
1716
1717
1718static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1719{
1720 struct pcie_service_card *card = adapter->card;
1721 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1722 struct sk_buff *skb = card->cmdrsp_buf;
1723 int count = 0;
1724 u16 rx_len;
1725
1726 mwifiex_dbg(adapter, CMD,
1727 "info: Rx CMD Response\n");
1728
1729 if (adapter->curr_cmd)
1730 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1731 else
1732 pci_dma_sync_single_for_cpu(card->dev,
1733 MWIFIEX_SKB_DMA_ADDR(skb),
1734 MWIFIEX_UPLD_SIZE,
1735 PCI_DMA_FROMDEVICE);
1736
1737
1738 if (card->cmd_buf) {
1739 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1740 PCI_DMA_TODEVICE);
1741 dev_kfree_skb_any(card->cmd_buf);
1742 card->cmd_buf = NULL;
1743 }
1744
1745 rx_len = get_unaligned_le16(skb->data);
1746 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1747 skb_trim(skb, rx_len);
1748
1749 if (!adapter->curr_cmd) {
1750 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1751 pci_dma_sync_single_for_device(card->dev,
1752 MWIFIEX_SKB_DMA_ADDR(skb),
1753 MWIFIEX_SLEEP_COOKIE_SIZE,
1754 PCI_DMA_FROMDEVICE);
1755 if (mwifiex_write_reg(adapter,
1756 PCIE_CPU_INT_EVENT,
1757 CPU_INTR_SLEEP_CFM_DONE)) {
1758 mwifiex_dbg(adapter, ERROR,
1759 "Write register failed\n");
1760 return -1;
1761 }
1762 mwifiex_delay_for_sleep_cookie(adapter,
1763 MWIFIEX_MAX_DELAY_COUNT);
1764 mwifiex_unmap_pci_memory(adapter, skb,
1765 PCI_DMA_FROMDEVICE);
1766 skb_pull(skb, adapter->intf_hdr_len);
1767 while (reg->sleep_cookie && (count++ < 10) &&
1768 mwifiex_pcie_ok_to_access_hw(adapter))
1769 usleep_range(50, 60);
1770 mwifiex_pcie_enable_host_int(adapter);
1771 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1772 skb->len);
1773 } else {
1774 mwifiex_dbg(adapter, ERROR,
1775 "There is no command but got cmdrsp\n");
1776 }
1777 memcpy(adapter->upld_buf, skb->data,
1778 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1779 skb_push(skb, adapter->intf_hdr_len);
1780 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1781 PCI_DMA_FROMDEVICE))
1782 return -1;
1783 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1784 skb_pull(skb, adapter->intf_hdr_len);
1785 adapter->curr_cmd->resp_skb = skb;
1786 adapter->cmd_resp_received = true;
1787
1788
1789 card->cmdrsp_buf = NULL;
1790
1791
1792
1793
1794 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1795 mwifiex_dbg(adapter, ERROR,
1796 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1797 return -1;
1798 }
1799
1800
1801 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1802 mwifiex_dbg(adapter, ERROR,
1803 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1804 return -1;
1805 }
1806 }
1807
1808 return 0;
1809}
1810
1811
1812
1813
1814static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1815 struct sk_buff *skb)
1816{
1817 struct pcie_service_card *card = adapter->card;
1818
1819 if (skb) {
1820 card->cmdrsp_buf = skb;
1821 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
1822 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1823 PCI_DMA_FROMDEVICE))
1824 return -1;
1825 }
1826
1827 return 0;
1828}
1829
1830
1831
1832
1833static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1834{
1835 struct pcie_service_card *card = adapter->card;
1836 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1837 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1838 u32 wrptr, event;
1839 struct mwifiex_evt_buf_desc *desc;
1840
1841 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1842 mwifiex_pm_wakeup_card(adapter);
1843
1844 if (adapter->event_received) {
1845 mwifiex_dbg(adapter, EVENT,
1846 "info: Event being processed,\t"
1847 "do not process this interrupt just yet\n");
1848 return 0;
1849 }
1850
1851 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1852 mwifiex_dbg(adapter, ERROR,
1853 "info: Invalid read pointer...\n");
1854 return -1;
1855 }
1856
1857
1858 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1859 mwifiex_dbg(adapter, ERROR,
1860 "EventReady: failed to read reg->evt_wrptr\n");
1861 return -1;
1862 }
1863
1864 mwifiex_dbg(adapter, EVENT,
1865 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1866 card->evtbd_rdptr, wrptr);
1867 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1868 & MWIFIEX_EVTBD_MASK)) ||
1869 ((wrptr & reg->evt_rollover_ind) ==
1870 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1871 struct sk_buff *skb_cmd;
1872 __le16 data_len = 0;
1873 u16 evt_len;
1874
1875 mwifiex_dbg(adapter, INFO,
1876 "info: Read Index: %d\n", rdptr);
1877 skb_cmd = card->evt_buf_list[rdptr];
1878 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1879
1880
1881
1882 card->evt_buf_list[rdptr] = NULL;
1883 desc = card->evtbd_ring[rdptr];
1884 memset(desc, 0, sizeof(*desc));
1885
1886 event = get_unaligned_le32(
1887 &skb_cmd->data[adapter->intf_hdr_len]);
1888 adapter->event_cause = event;
1889
1890
1891 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1892 evt_len = le16_to_cpu(data_len);
1893 skb_trim(skb_cmd, evt_len);
1894 skb_pull(skb_cmd, adapter->intf_hdr_len);
1895 mwifiex_dbg(adapter, EVENT,
1896 "info: Event length: %d\n", evt_len);
1897
1898 if (evt_len > MWIFIEX_EVENT_HEADER_LEN &&
1899 evt_len < MAX_EVENT_SIZE)
1900 memcpy(adapter->event_body, skb_cmd->data +
1901 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1902 MWIFIEX_EVENT_HEADER_LEN);
1903
1904 adapter->event_received = true;
1905 adapter->event_skb = skb_cmd;
1906
1907
1908
1909
1910
1911 } else {
1912 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1913 CPU_INTR_EVENT_DONE)) {
1914 mwifiex_dbg(adapter, ERROR,
1915 "Write register failed\n");
1916 return -1;
1917 }
1918 }
1919
1920 return 0;
1921}
1922
1923
1924
1925
1926static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1927 struct sk_buff *skb)
1928{
1929 struct pcie_service_card *card = adapter->card;
1930 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1931 int ret = 0;
1932 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1933 u32 wrptr;
1934 struct mwifiex_evt_buf_desc *desc;
1935
1936 if (!skb)
1937 return 0;
1938
1939 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1940 mwifiex_dbg(adapter, ERROR,
1941 "event_complete: Invalid rdptr 0x%x\n",
1942 rdptr);
1943 return -EINVAL;
1944 }
1945
1946
1947 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1948 mwifiex_dbg(adapter, ERROR,
1949 "event_complete: failed to read reg->evt_wrptr\n");
1950 return -1;
1951 }
1952
1953 if (!card->evt_buf_list[rdptr]) {
1954 skb_push(skb, adapter->intf_hdr_len);
1955 skb_put(skb, MAX_EVENT_SIZE - skb->len);
1956 if (mwifiex_map_pci_memory(adapter, skb,
1957 MAX_EVENT_SIZE,
1958 PCI_DMA_FROMDEVICE))
1959 return -1;
1960 card->evt_buf_list[rdptr] = skb;
1961 desc = card->evtbd_ring[rdptr];
1962 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1963 desc->len = (u16)skb->len;
1964 desc->flags = 0;
1965 skb = NULL;
1966 } else {
1967 mwifiex_dbg(adapter, ERROR,
1968 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1969 rdptr, card->evt_buf_list[rdptr], skb);
1970 }
1971
1972 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1973 card->evtbd_rdptr = ((card->evtbd_rdptr &
1974 reg->evt_rollover_ind) ^
1975 reg->evt_rollover_ind);
1976 }
1977
1978 mwifiex_dbg(adapter, EVENT,
1979 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1980 card->evtbd_rdptr, wrptr);
1981
1982
1983 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1984 card->evtbd_rdptr)) {
1985 mwifiex_dbg(adapter, ERROR,
1986 "event_complete: failed to read reg->evt_rdptr\n");
1987 return -1;
1988 }
1989
1990 mwifiex_dbg(adapter, EVENT,
1991 "info: Check Events Again\n");
1992 ret = mwifiex_pcie_process_event_ready(adapter);
1993
1994 return ret;
1995}
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2008 const void *firmware, u32 firmware_len) {
2009 const struct mwifiex_fw_data *fwdata;
2010 u32 offset = 0, data_len, dnld_cmd;
2011 int ret = 0;
2012 bool cmd7_before = false, first_cmd = false;
2013
2014 while (1) {
2015
2016 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2017 offset + sizeof(fwdata->header) >= firmware_len) {
2018 mwifiex_dbg(adapter, ERROR,
2019 "extract wifi-only fw failure!\n");
2020 ret = -1;
2021 goto done;
2022 }
2023
2024 fwdata = firmware + offset;
2025 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2026 data_len = le32_to_cpu(fwdata->header.data_length);
2027
2028
2029 offset += sizeof(fwdata->header);
2030
2031 switch (dnld_cmd) {
2032 case MWIFIEX_FW_DNLD_CMD_1:
2033 if (offset + data_len < data_len) {
2034 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2035 ret = -1;
2036 goto done;
2037 }
2038
2039
2040 if (!first_cmd) {
2041 mwifiex_dbg(adapter, MSG,
2042 "input wifi-only firmware\n");
2043 return 0;
2044 }
2045
2046 if (!cmd7_before) {
2047 mwifiex_dbg(adapter, ERROR,
2048 "no cmd7 before cmd1!\n");
2049 ret = -1;
2050 goto done;
2051 }
2052 offset += data_len;
2053 break;
2054 case MWIFIEX_FW_DNLD_CMD_5:
2055 first_cmd = true;
2056
2057 if (offset + data_len < data_len) {
2058 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2059 ret = -1;
2060 goto done;
2061 }
2062 offset += data_len;
2063 break;
2064 case MWIFIEX_FW_DNLD_CMD_6:
2065 first_cmd = true;
2066
2067 if (offset + data_len < data_len) {
2068 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2069 ret = -1;
2070 goto done;
2071 }
2072 offset += data_len;
2073 if (offset >= firmware_len) {
2074 mwifiex_dbg(adapter, ERROR,
2075 "extract wifi-only fw failure!\n");
2076 ret = -1;
2077 } else {
2078 ret = offset;
2079 }
2080 goto done;
2081 case MWIFIEX_FW_DNLD_CMD_7:
2082 first_cmd = true;
2083 cmd7_before = true;
2084 break;
2085 default:
2086 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2087 dnld_cmd);
2088 ret = -1;
2089 goto done;
2090 }
2091 }
2092
2093done:
2094 return ret;
2095}
2096
2097
2098
2099
2100
2101
2102
2103
2104static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2105 struct mwifiex_fw_image *fw)
2106{
2107 int ret;
2108 u8 *firmware = fw->fw_buf;
2109 u32 firmware_len = fw->fw_len;
2110 u32 offset = 0;
2111 struct sk_buff *skb;
2112 u32 txlen, tx_blocks = 0, tries, len, val;
2113 u32 block_retry_cnt = 0;
2114 struct pcie_service_card *card = adapter->card;
2115 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2116
2117 if (!firmware || !firmware_len) {
2118 mwifiex_dbg(adapter, ERROR,
2119 "No firmware image found! Terminating download\n");
2120 return -1;
2121 }
2122
2123 mwifiex_dbg(adapter, INFO,
2124 "info: Downloading FW image (%d bytes)\n",
2125 firmware_len);
2126
2127 if (mwifiex_pcie_disable_host_int(adapter)) {
2128 mwifiex_dbg(adapter, ERROR,
2129 "%s: Disabling interrupts failed.\n", __func__);
2130 return -1;
2131 }
2132
2133 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2134 if (!skb) {
2135 ret = -ENOMEM;
2136 goto done;
2137 }
2138
2139 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2140 if (ret) {
2141 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2142 goto done;
2143 }
2144
2145
2146 if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2147 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2148 if (ret < 0) {
2149 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2150 goto done;
2151 }
2152 offset = ret;
2153 mwifiex_dbg(adapter, MSG,
2154 "info: dnld wifi firmware from %d bytes\n", offset);
2155 }
2156
2157
2158 do {
2159 u32 ireg_intr = 0;
2160
2161
2162 if (offset >= firmware_len)
2163 break;
2164
2165 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2166 ret = mwifiex_read_reg(adapter, reg->cmd_size,
2167 &len);
2168 if (ret) {
2169 mwifiex_dbg(adapter, FATAL,
2170 "Failed reading len from boot code\n");
2171 goto done;
2172 }
2173 if (len)
2174 break;
2175 usleep_range(10, 20);
2176 }
2177
2178 if (!len) {
2179 break;
2180 } else if (len > MWIFIEX_UPLD_SIZE) {
2181 mwifiex_dbg(adapter, ERROR,
2182 "FW download failure @ %d, invalid length %d\n",
2183 offset, len);
2184 ret = -1;
2185 goto done;
2186 }
2187
2188 txlen = len;
2189
2190 if (len & BIT(0)) {
2191 block_retry_cnt++;
2192 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2193 mwifiex_dbg(adapter, ERROR,
2194 "FW download failure @ %d, over max\t"
2195 "retry count\n", offset);
2196 ret = -1;
2197 goto done;
2198 }
2199 mwifiex_dbg(adapter, ERROR,
2200 "FW CRC error indicated by the\t"
2201 "helper: len = 0x%04X, txlen = %d\n",
2202 len, txlen);
2203 len &= ~BIT(0);
2204
2205 txlen = 0;
2206 } else {
2207 block_retry_cnt = 0;
2208
2209
2210 if (firmware_len - offset < txlen)
2211 txlen = firmware_len - offset;
2212
2213 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2214 card->pcie.blksz_fw_dl;
2215
2216
2217 memmove(skb->data, &firmware[offset], txlen);
2218 }
2219
2220 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2221 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2222
2223
2224 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2225 mwifiex_dbg(adapter, ERROR,
2226 "Failed to send firmware download command\n");
2227 ret = -1;
2228 goto done;
2229 }
2230
2231
2232 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2233 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2234 &ireg_intr)) {
2235 mwifiex_dbg(adapter, ERROR,
2236 "%s: Failed to read\t"
2237 "interrupt status during fw dnld.\n",
2238 __func__);
2239 mwifiex_unmap_pci_memory(adapter, skb,
2240 PCI_DMA_TODEVICE);
2241 ret = -1;
2242 goto done;
2243 }
2244 if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2245 break;
2246 usleep_range(10, 20);
2247 }
2248 if (ireg_intr & CPU_INTR_DOOR_BELL) {
2249 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2250 __func__);
2251 mwifiex_unmap_pci_memory(adapter, skb,
2252 PCI_DMA_TODEVICE);
2253 ret = -1;
2254 goto done;
2255 }
2256
2257 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
2258
2259 offset += txlen;
2260 } while (true);
2261
2262 mwifiex_dbg(adapter, MSG,
2263 "info: FW download over, size %d bytes\n", offset);
2264
2265 ret = 0;
2266
2267done:
2268 dev_kfree_skb_any(skb);
2269 return ret;
2270}
2271
2272
2273
2274
2275static int
2276mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2277{
2278 int ret = 0;
2279 u32 firmware_stat;
2280 struct pcie_service_card *card = adapter->card;
2281 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2282 u32 tries;
2283
2284
2285 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2286 HOST_INTR_MASK)) {
2287 mwifiex_dbg(adapter, ERROR,
2288 "Write register failed\n");
2289 return -1;
2290 }
2291
2292 mwifiex_dbg(adapter, INFO,
2293 "Setting driver ready signature\n");
2294 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2295 FIRMWARE_READY_PCIE)) {
2296 mwifiex_dbg(adapter, ERROR,
2297 "Failed to write driver ready signature\n");
2298 return -1;
2299 }
2300
2301
2302 for (tries = 0; tries < poll_num; tries++) {
2303 if (mwifiex_read_reg(adapter, reg->fw_status,
2304 &firmware_stat))
2305 ret = -1;
2306 else
2307 ret = 0;
2308
2309 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2310 tries, ret, firmware_stat);
2311
2312 if (ret)
2313 continue;
2314 if (firmware_stat == FIRMWARE_READY_PCIE) {
2315 ret = 0;
2316 break;
2317 } else {
2318 msleep(100);
2319 ret = -1;
2320 }
2321 }
2322
2323 return ret;
2324}
2325
2326
2327
2328static int
2329mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2330{
2331 u32 winner = 0;
2332 int ret = 0;
2333 struct pcie_service_card *card = adapter->card;
2334 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2335
2336 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2337 ret = -1;
2338 } else if (!winner) {
2339 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2340 adapter->winner = 1;
2341 } else {
2342 mwifiex_dbg(adapter, ERROR,
2343 "PCI-E is not the winner <%#x>", winner);
2344 }
2345
2346 return ret;
2347}
2348
2349
2350
2351
2352static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2353 int msg_id)
2354{
2355 u32 pcie_ireg;
2356 unsigned long flags;
2357 struct pcie_service_card *card = adapter->card;
2358
2359 if (card->msi_enable) {
2360 spin_lock_irqsave(&adapter->int_lock, flags);
2361 adapter->int_status = 1;
2362 spin_unlock_irqrestore(&adapter->int_lock, flags);
2363 return;
2364 }
2365
2366 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2367 return;
2368
2369 if (card->msix_enable && msg_id >= 0) {
2370 pcie_ireg = BIT(msg_id);
2371 } else {
2372 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2373 &pcie_ireg)) {
2374 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2375 return;
2376 }
2377
2378 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2379 return;
2380
2381
2382 mwifiex_pcie_disable_host_int(adapter);
2383
2384
2385 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2386 ~pcie_ireg)) {
2387 mwifiex_dbg(adapter, ERROR,
2388 "Write register failed\n");
2389 return;
2390 }
2391 }
2392
2393 if (!adapter->pps_uapsd_mode &&
2394 adapter->ps_state == PS_STATE_SLEEP &&
2395 mwifiex_pcie_ok_to_access_hw(adapter)) {
2396
2397
2398
2399
2400 adapter->ps_state = PS_STATE_AWAKE;
2401 adapter->pm_wakeup_fw_try = false;
2402 del_timer(&adapter->wakeup_timer);
2403 }
2404
2405 spin_lock_irqsave(&adapter->int_lock, flags);
2406 adapter->int_status |= pcie_ireg;
2407 spin_unlock_irqrestore(&adapter->int_lock, flags);
2408 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2409}
2410
2411
2412
2413
2414
2415
2416
2417static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2418{
2419 struct mwifiex_msix_context *ctx = context;
2420 struct pci_dev *pdev = ctx->dev;
2421 struct pcie_service_card *card;
2422 struct mwifiex_adapter *adapter;
2423
2424 card = pci_get_drvdata(pdev);
2425
2426 if (!card->adapter) {
2427 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2428 card ? card->adapter : NULL);
2429 goto exit;
2430 }
2431 adapter = card->adapter;
2432
2433 if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags))
2434 goto exit;
2435
2436 if (card->msix_enable)
2437 mwifiex_interrupt_status(adapter, ctx->msg_id);
2438 else
2439 mwifiex_interrupt_status(adapter, -1);
2440
2441 mwifiex_queue_main_work(adapter);
2442
2443exit:
2444 return IRQ_HANDLED;
2445}
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2461{
2462 int ret;
2463 u32 pcie_ireg = 0;
2464 unsigned long flags;
2465 struct pcie_service_card *card = adapter->card;
2466
2467 spin_lock_irqsave(&adapter->int_lock, flags);
2468 if (!card->msi_enable) {
2469
2470 pcie_ireg = adapter->int_status;
2471 }
2472 adapter->int_status = 0;
2473 spin_unlock_irqrestore(&adapter->int_lock, flags);
2474
2475 if (card->msi_enable) {
2476 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2477 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2478 &pcie_ireg)) {
2479 mwifiex_dbg(adapter, ERROR,
2480 "Read register failed\n");
2481 return -1;
2482 }
2483
2484 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2485 if (mwifiex_write_reg(adapter,
2486 PCIE_HOST_INT_STATUS,
2487 ~pcie_ireg)) {
2488 mwifiex_dbg(adapter, ERROR,
2489 "Write register failed\n");
2490 return -1;
2491 }
2492 if (!adapter->pps_uapsd_mode &&
2493 adapter->ps_state == PS_STATE_SLEEP) {
2494 adapter->ps_state = PS_STATE_AWAKE;
2495 adapter->pm_wakeup_fw_try = false;
2496 del_timer(&adapter->wakeup_timer);
2497 }
2498 }
2499 }
2500 }
2501
2502 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2503 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2504 ret = mwifiex_pcie_send_data_complete(adapter);
2505 if (ret)
2506 return ret;
2507 }
2508 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2509 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2510 ret = mwifiex_pcie_process_recv_data(adapter);
2511 if (ret)
2512 return ret;
2513 }
2514 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2515 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2516 ret = mwifiex_pcie_process_event_ready(adapter);
2517 if (ret)
2518 return ret;
2519 }
2520 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2521 if (adapter->cmd_sent) {
2522 mwifiex_dbg(adapter, INTR,
2523 "info: CMD sent Interrupt\n");
2524 adapter->cmd_sent = false;
2525 }
2526
2527 ret = mwifiex_pcie_process_cmd_complete(adapter);
2528 if (ret)
2529 return ret;
2530 }
2531
2532 mwifiex_dbg(adapter, INTR,
2533 "info: cmd_sent=%d data_sent=%d\n",
2534 adapter->cmd_sent, adapter->data_sent);
2535 if (!card->msi_enable && !card->msix_enable &&
2536 adapter->ps_state != PS_STATE_SLEEP)
2537 mwifiex_pcie_enable_host_int(adapter);
2538
2539 return 0;
2540}
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2553 struct sk_buff *skb,
2554 struct mwifiex_tx_param *tx_param)
2555{
2556 if (!skb) {
2557 mwifiex_dbg(adapter, ERROR,
2558 "Passed NULL skb to %s\n", __func__);
2559 return -1;
2560 }
2561
2562 if (type == MWIFIEX_TYPE_DATA)
2563 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2564 else if (type == MWIFIEX_TYPE_CMD)
2565 return mwifiex_pcie_send_cmd(adapter, skb);
2566
2567 return 0;
2568}
2569
2570
2571
2572static int
2573mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2574{
2575 char *p = drv_buf;
2576 char buf[256], *ptr;
2577 int i;
2578 u32 value;
2579 struct pcie_service_card *card = adapter->card;
2580 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2581 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2582 PCIE_SCRATCH_14_REG,
2583 PCIE_SCRATCH_15_REG};
2584
2585 if (!p)
2586 return 0;
2587
2588 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2589
2590 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2591 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2592 return 0;
2593 }
2594
2595 ptr = buf;
2596 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2597 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2598 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2599 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2600 pcie_scratch_reg[i], value);
2601 }
2602
2603 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2604 p += sprintf(p, "%s\n", buf);
2605
2606 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2607
2608 return p - drv_buf;
2609}
2610
2611
2612static enum rdwr_status
2613mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2614{
2615 int ret, tries;
2616 u8 ctrl_data;
2617 u32 fw_status;
2618 struct pcie_service_card *card = adapter->card;
2619 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2620
2621 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2622 return RDWR_STATUS_FAILURE;
2623
2624 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2625 reg->fw_dump_host_ready);
2626 if (ret) {
2627 mwifiex_dbg(adapter, ERROR,
2628 "PCIE write err\n");
2629 return RDWR_STATUS_FAILURE;
2630 }
2631
2632 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2633 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2634 if (ctrl_data == FW_DUMP_DONE)
2635 return RDWR_STATUS_SUCCESS;
2636 if (doneflag && ctrl_data == doneflag)
2637 return RDWR_STATUS_DONE;
2638 if (ctrl_data != reg->fw_dump_host_ready) {
2639 mwifiex_dbg(adapter, WARN,
2640 "The ctrl reg was changed, re-try again!\n");
2641 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2642 reg->fw_dump_host_ready);
2643 if (ret) {
2644 mwifiex_dbg(adapter, ERROR,
2645 "PCIE write err\n");
2646 return RDWR_STATUS_FAILURE;
2647 }
2648 }
2649 usleep_range(100, 200);
2650 }
2651
2652 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2653 return RDWR_STATUS_FAILURE;
2654}
2655
2656
2657static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2658{
2659 struct pcie_service_card *card = adapter->card;
2660 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2661 unsigned int reg, reg_start, reg_end;
2662 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2663 u8 idx, i, read_reg, doneflag = 0;
2664 enum rdwr_status stat;
2665 u32 memory_size;
2666 int ret;
2667
2668 if (!card->pcie.can_dump_fw)
2669 return;
2670
2671 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2672 struct memory_type_mapping *entry =
2673 &adapter->mem_type_mapping_tbl[idx];
2674
2675 if (entry->mem_ptr) {
2676 vfree(entry->mem_ptr);
2677 entry->mem_ptr = NULL;
2678 }
2679 entry->mem_size = 0;
2680 }
2681
2682 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2683
2684
2685 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2686 if (stat == RDWR_STATUS_FAILURE)
2687 return;
2688
2689 reg = creg->fw_dump_start;
2690 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2691
2692
2693 if (fw_dump_num == 0)
2694 dump_num = 1;
2695 else
2696 dump_num = fw_dump_num;
2697
2698
2699 for (idx = 0; idx < dump_num; idx++) {
2700 struct memory_type_mapping *entry =
2701 &adapter->mem_type_mapping_tbl[idx];
2702 memory_size = 0;
2703 if (fw_dump_num != 0) {
2704 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2705 if (stat == RDWR_STATUS_FAILURE)
2706 return;
2707
2708 reg = creg->fw_dump_start;
2709 for (i = 0; i < 4; i++) {
2710 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2711 memory_size |= (read_reg << (i * 8));
2712 reg++;
2713 }
2714 } else {
2715 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2716 }
2717
2718 if (memory_size == 0) {
2719 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2720 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2721 creg->fw_dump_read_done);
2722 if (ret) {
2723 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2724 return;
2725 }
2726 break;
2727 }
2728
2729 mwifiex_dbg(adapter, DUMP,
2730 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2731 entry->mem_ptr = vmalloc(memory_size + 1);
2732 entry->mem_size = memory_size;
2733 if (!entry->mem_ptr) {
2734 mwifiex_dbg(adapter, ERROR,
2735 "Vmalloc %s failed\n", entry->mem_name);
2736 return;
2737 }
2738 dbg_ptr = entry->mem_ptr;
2739 end_ptr = dbg_ptr + memory_size;
2740
2741 doneflag = entry->done_flag;
2742 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2743 entry->mem_name);
2744
2745 do {
2746 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2747 if (RDWR_STATUS_FAILURE == stat)
2748 return;
2749
2750 reg_start = creg->fw_dump_start;
2751 reg_end = creg->fw_dump_end;
2752 for (reg = reg_start; reg <= reg_end; reg++) {
2753 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2754 if (dbg_ptr < end_ptr) {
2755 dbg_ptr++;
2756 continue;
2757 }
2758 mwifiex_dbg(adapter, ERROR,
2759 "pre-allocated buf not enough\n");
2760 tmp_ptr =
2761 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2762 if (!tmp_ptr)
2763 return;
2764 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2765 vfree(entry->mem_ptr);
2766 entry->mem_ptr = tmp_ptr;
2767 tmp_ptr = NULL;
2768 dbg_ptr = entry->mem_ptr + memory_size;
2769 memory_size += MWIFIEX_SIZE_4K;
2770 end_ptr = entry->mem_ptr + memory_size;
2771 }
2772
2773 if (stat != RDWR_STATUS_DONE)
2774 continue;
2775
2776 mwifiex_dbg(adapter, DUMP,
2777 "%s done: size=0x%tx\n",
2778 entry->mem_name, dbg_ptr - entry->mem_ptr);
2779 break;
2780 } while (true);
2781 }
2782 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2783}
2784
2785static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2786{
2787 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2788 if (!adapter->devdump_data) {
2789 mwifiex_dbg(adapter, ERROR,
2790 "vzalloc devdump data failure!\n");
2791 return;
2792 }
2793
2794 mwifiex_drv_info_dump(adapter);
2795 mwifiex_pcie_fw_dump(adapter);
2796 mwifiex_prepare_fw_dump_info(adapter);
2797 mwifiex_upload_device_dump(adapter);
2798}
2799
2800static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2801{
2802 struct pcie_service_card *card = adapter->card;
2803
2804
2805
2806
2807 pci_try_reset_function(card->dev);
2808}
2809
2810static void mwifiex_pcie_work(struct work_struct *work)
2811{
2812 struct pcie_service_card *card =
2813 container_of(work, struct pcie_service_card, work);
2814
2815 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2816 &card->work_flags))
2817 mwifiex_pcie_device_dump_work(card->adapter);
2818 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2819 &card->work_flags))
2820 mwifiex_pcie_card_reset_work(card->adapter);
2821}
2822
2823
2824static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2825{
2826 struct pcie_service_card *card = adapter->card;
2827
2828 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2829 &card->work_flags))
2830 schedule_work(&card->work);
2831}
2832
2833static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
2834{
2835 struct pcie_service_card *card = adapter->card;
2836
2837 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2838 schedule_work(&card->work);
2839}
2840
2841static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
2842{
2843 struct pcie_service_card *card = adapter->card;
2844 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2845 int ret;
2846
2847 card->cmdrsp_buf = NULL;
2848 ret = mwifiex_pcie_create_txbd_ring(adapter);
2849 if (ret) {
2850 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
2851 goto err_cre_txbd;
2852 }
2853
2854 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2855 if (ret) {
2856 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
2857 goto err_cre_rxbd;
2858 }
2859
2860 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2861 if (ret) {
2862 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
2863 goto err_cre_evtbd;
2864 }
2865
2866 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2867 if (ret) {
2868 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
2869 goto err_alloc_cmdbuf;
2870 }
2871
2872 if (reg->sleep_cookie) {
2873 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2874 if (ret) {
2875 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
2876 goto err_alloc_cookie;
2877 }
2878 } else {
2879 card->sleep_cookie_vbase = NULL;
2880 }
2881
2882 return 0;
2883
2884err_alloc_cookie:
2885 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2886err_alloc_cmdbuf:
2887 mwifiex_pcie_delete_evtbd_ring(adapter);
2888err_cre_evtbd:
2889 mwifiex_pcie_delete_rxbd_ring(adapter);
2890err_cre_rxbd:
2891 mwifiex_pcie_delete_txbd_ring(adapter);
2892err_cre_txbd:
2893 return ret;
2894}
2895
2896static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
2897{
2898 struct pcie_service_card *card = adapter->card;
2899 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2900
2901 if (reg->sleep_cookie)
2902 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2903
2904 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2905 mwifiex_pcie_delete_evtbd_ring(adapter);
2906 mwifiex_pcie_delete_rxbd_ring(adapter);
2907 mwifiex_pcie_delete_txbd_ring(adapter);
2908}
2909
2910
2911
2912
2913static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
2914{
2915 struct pcie_service_card *card = adapter->card;
2916 int ret;
2917 struct pci_dev *pdev = card->dev;
2918
2919 pci_set_drvdata(pdev, card);
2920
2921 ret = pci_enable_device(pdev);
2922 if (ret)
2923 goto err_enable_dev;
2924
2925 pci_set_master(pdev);
2926
2927 pr_notice("try set_consistent_dma_mask(32)\n");
2928 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2929 if (ret) {
2930 pr_err("set_dma_mask(32) failed\n");
2931 goto err_set_dma_mask;
2932 }
2933
2934 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2935 if (ret) {
2936 pr_err("set_consistent_dma_mask(64) failed\n");
2937 goto err_set_dma_mask;
2938 }
2939
2940 ret = pci_request_region(pdev, 0, DRV_NAME);
2941 if (ret) {
2942 pr_err("req_reg(0) error\n");
2943 goto err_req_region0;
2944 }
2945 card->pci_mmap = pci_iomap(pdev, 0, 0);
2946 if (!card->pci_mmap) {
2947 pr_err("iomap(0) error\n");
2948 ret = -EIO;
2949 goto err_iomap0;
2950 }
2951 ret = pci_request_region(pdev, 2, DRV_NAME);
2952 if (ret) {
2953 pr_err("req_reg(2) error\n");
2954 goto err_req_region2;
2955 }
2956 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2957 if (!card->pci_mmap1) {
2958 pr_err("iomap(2) error\n");
2959 ret = -EIO;
2960 goto err_iomap2;
2961 }
2962
2963 pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2964 card->pci_mmap, card->pci_mmap1);
2965
2966 ret = mwifiex_pcie_alloc_buffers(adapter);
2967 if (ret)
2968 goto err_alloc_buffers;
2969
2970 return 0;
2971
2972err_alloc_buffers:
2973 pci_iounmap(pdev, card->pci_mmap1);
2974err_iomap2:
2975 pci_release_region(pdev, 2);
2976err_req_region2:
2977 pci_iounmap(pdev, card->pci_mmap);
2978err_iomap0:
2979 pci_release_region(pdev, 0);
2980err_req_region0:
2981err_set_dma_mask:
2982 pci_disable_device(pdev);
2983err_enable_dev:
2984 return ret;
2985}
2986
2987
2988
2989
2990static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
2991{
2992 struct pcie_service_card *card = adapter->card;
2993 struct pci_dev *pdev = card->dev;
2994 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2995 int ret;
2996 u32 fw_status;
2997
2998 cancel_work_sync(&card->work);
2999
3000 ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
3001 if (fw_status == FIRMWARE_READY_PCIE) {
3002 mwifiex_dbg(adapter, INFO,
3003 "Clearing driver ready signature\n");
3004 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3005 mwifiex_dbg(adapter, ERROR,
3006 "Failed to write driver not-ready signature\n");
3007 }
3008
3009 pci_disable_device(pdev);
3010
3011 pci_iounmap(pdev, card->pci_mmap);
3012 pci_iounmap(pdev, card->pci_mmap1);
3013 pci_release_region(pdev, 2);
3014 pci_release_region(pdev, 0);
3015
3016 mwifiex_pcie_free_buffers(adapter);
3017}
3018
3019static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3020{
3021 int ret, i, j;
3022 struct pcie_service_card *card = adapter->card;
3023 struct pci_dev *pdev = card->dev;
3024
3025 if (card->pcie.reg->msix_support) {
3026 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3027 card->msix_entries[i].entry = i;
3028 ret = pci_enable_msix_exact(pdev, card->msix_entries,
3029 MWIFIEX_NUM_MSIX_VECTORS);
3030 if (!ret) {
3031 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3032 card->msix_ctx[i].dev = pdev;
3033 card->msix_ctx[i].msg_id = i;
3034
3035 ret = request_irq(card->msix_entries[i].vector,
3036 mwifiex_pcie_interrupt, 0,
3037 "MWIFIEX_PCIE_MSIX",
3038 &card->msix_ctx[i]);
3039 if (ret)
3040 break;
3041 }
3042
3043 if (ret) {
3044 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3045 ret);
3046 for (j = 0; j < i; j++)
3047 free_irq(card->msix_entries[j].vector,
3048 &card->msix_ctx[i]);
3049 pci_disable_msix(pdev);
3050 } else {
3051 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3052 card->msix_enable = 1;
3053 return 0;
3054 }
3055 }
3056 }
3057
3058 if (pci_enable_msi(pdev) != 0)
3059 pci_disable_msi(pdev);
3060 else
3061 card->msi_enable = 1;
3062
3063 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3064
3065 card->share_irq_ctx.dev = pdev;
3066 card->share_irq_ctx.msg_id = -1;
3067 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3068 "MRVL_PCIE", &card->share_irq_ctx);
3069 if (ret) {
3070 pr_err("request_irq failed: ret=%d\n", ret);
3071 return -1;
3072 }
3073
3074 return 0;
3075}
3076
3077
3078
3079
3080
3081
3082static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3083{
3084 int revision_id = 0;
3085 int version, magic;
3086 struct pcie_service_card *card = adapter->card;
3087
3088 switch (card->dev->device) {
3089 case PCIE_DEVICE_ID_MARVELL_88W8766P:
3090 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3091 break;
3092 case PCIE_DEVICE_ID_MARVELL_88W8897:
3093 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3094 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3095 revision_id &= 0xff00;
3096 switch (revision_id) {
3097 case PCIE8897_A0:
3098 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3099 break;
3100 case PCIE8897_B0:
3101 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3102 break;
3103 default:
3104 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3105
3106 break;
3107 }
3108 break;
3109 case PCIE_DEVICE_ID_MARVELL_88W8997:
3110 mwifiex_read_reg(adapter, 0x8, &revision_id);
3111 mwifiex_read_reg(adapter, 0x0cd0, &version);
3112 mwifiex_read_reg(adapter, 0x0cd4, &magic);
3113 revision_id &= 0xff;
3114 version &= 0x7;
3115 magic &= 0xff;
3116 if (revision_id == PCIE8997_A1 &&
3117 magic == CHIP_MAGIC_VALUE &&
3118 version == CHIP_VER_PCIEUART)
3119 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3120 else
3121 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3122 break;
3123 default:
3124 break;
3125 }
3126}
3127
3128
3129
3130
3131
3132
3133static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3134{
3135 struct pcie_service_card *card = adapter->card;
3136
3137
3138 card->adapter = adapter;
3139
3140 if (mwifiex_pcie_request_irq(adapter))
3141 return -1;
3142
3143 adapter->tx_buf_size = card->pcie.tx_buf_size;
3144 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3145 adapter->num_mem_types = card->pcie.num_mem_types;
3146 adapter->ext_scan = card->pcie.can_ext_scan;
3147 mwifiex_pcie_get_fw_name(adapter);
3148
3149 return 0;
3150}
3151
3152
3153
3154
3155
3156
3157
3158static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3159{
3160 struct pcie_service_card *card = adapter->card;
3161 struct pci_dev *pdev = card->dev;
3162 int i;
3163
3164 if (card->msix_enable) {
3165 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3166 synchronize_irq(card->msix_entries[i].vector);
3167
3168 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3169 free_irq(card->msix_entries[i].vector,
3170 &card->msix_ctx[i]);
3171
3172 card->msix_enable = 0;
3173 pci_disable_msix(pdev);
3174 } else {
3175 mwifiex_dbg(adapter, INFO,
3176 "%s(): calling free_irq()\n", __func__);
3177 free_irq(card->dev->irq, &card->share_irq_ctx);
3178
3179 if (card->msi_enable)
3180 pci_disable_msi(pdev);
3181 }
3182 card->adapter = NULL;
3183}
3184
3185
3186
3187
3188
3189static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3190{
3191 struct pcie_service_card *card = adapter->card;
3192 struct pci_dev *pdev = card->dev;
3193
3194
3195
3196
3197 adapter->tx_buf_size = card->pcie.tx_buf_size;
3198
3199 mwifiex_pcie_alloc_buffers(adapter);
3200
3201 pci_set_master(pdev);
3202}
3203
3204
3205static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3206{
3207 struct pcie_service_card *card = adapter->card;
3208 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3209 struct pci_dev *pdev = card->dev;
3210
3211 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3212 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3213
3214 pci_clear_master(pdev);
3215
3216 adapter->seq_num = 0;
3217
3218 mwifiex_pcie_free_buffers(adapter);
3219}
3220
3221static struct mwifiex_if_ops pcie_ops = {
3222 .init_if = mwifiex_init_pcie,
3223 .cleanup_if = mwifiex_cleanup_pcie,
3224 .check_fw_status = mwifiex_check_fw_status,
3225 .check_winner_status = mwifiex_check_winner_status,
3226 .prog_fw = mwifiex_prog_fw_w_helper,
3227 .register_dev = mwifiex_register_dev,
3228 .unregister_dev = mwifiex_unregister_dev,
3229 .enable_int = mwifiex_pcie_enable_host_int,
3230 .disable_int = mwifiex_pcie_disable_host_int_noerr,
3231 .process_int_status = mwifiex_process_int_status,
3232 .host_to_card = mwifiex_pcie_host_to_card,
3233 .wakeup = mwifiex_pm_wakeup_card,
3234 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3235
3236
3237 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
3238 .event_complete = mwifiex_pcie_event_complete,
3239 .update_mp_end_port = NULL,
3240 .cleanup_mpa_buf = NULL,
3241 .init_fw_port = mwifiex_pcie_init_fw_port,
3242 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
3243 .card_reset = mwifiex_pcie_card_reset,
3244 .reg_dump = mwifiex_pcie_reg_dump,
3245 .device_dump = mwifiex_pcie_device_dump,
3246 .down_dev = mwifiex_pcie_down_dev,
3247 .up_dev = mwifiex_pcie_up_dev,
3248};
3249
3250module_pci_driver(mwifiex_pcie);
3251
3252MODULE_AUTHOR("Marvell International Ltd.");
3253MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3254MODULE_VERSION(PCIE_VERSION);
3255MODULE_LICENSE("GPL v2");
3256