linux/drivers/rtc/rtc-sh.c
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   1/*
   2 * SuperH On-Chip RTC Support
   3 *
   4 * Copyright (C) 2006 - 2009  Paul Mundt
   5 * Copyright (C) 2006  Jamie Lenehan
   6 * Copyright (C) 2008  Angelo Castello
   7 *
   8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
   9 *
  10 *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
  11 *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
  12 *
  13 * This file is subject to the terms and conditions of the GNU General Public
  14 * License.  See the file "COPYING" in the main directory of this archive
  15 * for more details.
  16 */
  17#include <linux/module.h>
  18#include <linux/mod_devicetable.h>
  19#include <linux/kernel.h>
  20#include <linux/bcd.h>
  21#include <linux/rtc.h>
  22#include <linux/init.h>
  23#include <linux/platform_device.h>
  24#include <linux/seq_file.h>
  25#include <linux/interrupt.h>
  26#include <linux/spinlock.h>
  27#include <linux/io.h>
  28#include <linux/log2.h>
  29#include <linux/clk.h>
  30#include <linux/slab.h>
  31#ifdef CONFIG_SUPERH
  32#include <asm/rtc.h>
  33#else
  34/* Default values for RZ/A RTC */
  35#define rtc_reg_size            sizeof(u16)
  36#define RTC_BIT_INVERTED        0       /* no chip bugs */
  37#define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
  38#define RTC_DEF_CAPABILITIES    RTC_CAP_4_DIGIT_YEAR
  39#endif
  40
  41#define DRV_NAME        "sh-rtc"
  42
  43#define RTC_REG(r)      ((r) * rtc_reg_size)
  44
  45#define R64CNT          RTC_REG(0)
  46
  47#define RSECCNT         RTC_REG(1)      /* RTC sec */
  48#define RMINCNT         RTC_REG(2)      /* RTC min */
  49#define RHRCNT          RTC_REG(3)      /* RTC hour */
  50#define RWKCNT          RTC_REG(4)      /* RTC week */
  51#define RDAYCNT         RTC_REG(5)      /* RTC day */
  52#define RMONCNT         RTC_REG(6)      /* RTC month */
  53#define RYRCNT          RTC_REG(7)      /* RTC year */
  54#define RSECAR          RTC_REG(8)      /* ALARM sec */
  55#define RMINAR          RTC_REG(9)      /* ALARM min */
  56#define RHRAR           RTC_REG(10)     /* ALARM hour */
  57#define RWKAR           RTC_REG(11)     /* ALARM week */
  58#define RDAYAR          RTC_REG(12)     /* ALARM day */
  59#define RMONAR          RTC_REG(13)     /* ALARM month */
  60#define RCR1            RTC_REG(14)     /* Control */
  61#define RCR2            RTC_REG(15)     /* Control */
  62
  63/*
  64 * Note on RYRAR and RCR3: Up until this point most of the register
  65 * definitions are consistent across all of the available parts. However,
  66 * the placement of the optional RYRAR and RCR3 (the RYRAR control
  67 * register used to control RYRCNT/RYRAR compare) varies considerably
  68 * across various parts, occasionally being mapped in to a completely
  69 * unrelated address space. For proper RYRAR support a separate resource
  70 * would have to be handed off, but as this is purely optional in
  71 * practice, we simply opt not to support it, thereby keeping the code
  72 * quite a bit more simplified.
  73 */
  74
  75/* ALARM Bits - or with BCD encoded value */
  76#define AR_ENB          0x80    /* Enable for alarm cmp   */
  77
  78/* Period Bits */
  79#define PF_HP           0x100   /* Enable Half Period to support 8,32,128Hz */
  80#define PF_COUNT        0x200   /* Half periodic counter */
  81#define PF_OXS          0x400   /* Periodic One x Second */
  82#define PF_KOU          0x800   /* Kernel or User periodic request 1=kernel */
  83#define PF_MASK         0xf00
  84
  85/* RCR1 Bits */
  86#define RCR1_CF         0x80    /* Carry Flag             */
  87#define RCR1_CIE        0x10    /* Carry Interrupt Enable */
  88#define RCR1_AIE        0x08    /* Alarm Interrupt Enable */
  89#define RCR1_AF         0x01    /* Alarm Flag             */
  90
  91/* RCR2 Bits */
  92#define RCR2_PEF        0x80    /* PEriodic interrupt Flag */
  93#define RCR2_PESMASK    0x70    /* Periodic interrupt Set  */
  94#define RCR2_RTCEN      0x08    /* ENable RTC              */
  95#define RCR2_ADJ        0x04    /* ADJustment (30-second)  */
  96#define RCR2_RESET      0x02    /* Reset bit               */
  97#define RCR2_START      0x01    /* Start bit               */
  98
  99struct sh_rtc {
 100        void __iomem            *regbase;
 101        unsigned long           regsize;
 102        struct resource         *res;
 103        int                     alarm_irq;
 104        int                     periodic_irq;
 105        int                     carry_irq;
 106        struct clk              *clk;
 107        struct rtc_device       *rtc_dev;
 108        spinlock_t              lock;
 109        unsigned long           capabilities;   /* See asm/rtc.h for cap bits */
 110        unsigned short          periodic_freq;
 111};
 112
 113static int __sh_rtc_interrupt(struct sh_rtc *rtc)
 114{
 115        unsigned int tmp, pending;
 116
 117        tmp = readb(rtc->regbase + RCR1);
 118        pending = tmp & RCR1_CF;
 119        tmp &= ~RCR1_CF;
 120        writeb(tmp, rtc->regbase + RCR1);
 121
 122        /* Users have requested One x Second IRQ */
 123        if (pending && rtc->periodic_freq & PF_OXS)
 124                rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
 125
 126        return pending;
 127}
 128
 129static int __sh_rtc_alarm(struct sh_rtc *rtc)
 130{
 131        unsigned int tmp, pending;
 132
 133        tmp = readb(rtc->regbase + RCR1);
 134        pending = tmp & RCR1_AF;
 135        tmp &= ~(RCR1_AF | RCR1_AIE);
 136        writeb(tmp, rtc->regbase + RCR1);
 137
 138        if (pending)
 139                rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
 140
 141        return pending;
 142}
 143
 144static int __sh_rtc_periodic(struct sh_rtc *rtc)
 145{
 146        unsigned int tmp, pending;
 147
 148        tmp = readb(rtc->regbase + RCR2);
 149        pending = tmp & RCR2_PEF;
 150        tmp &= ~RCR2_PEF;
 151        writeb(tmp, rtc->regbase + RCR2);
 152
 153        if (!pending)
 154                return 0;
 155
 156        /* Half period enabled than one skipped and the next notified */
 157        if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
 158                rtc->periodic_freq &= ~PF_COUNT;
 159        else {
 160                if (rtc->periodic_freq & PF_HP)
 161                        rtc->periodic_freq |= PF_COUNT;
 162                rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
 163        }
 164
 165        return pending;
 166}
 167
 168static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
 169{
 170        struct sh_rtc *rtc = dev_id;
 171        int ret;
 172
 173        spin_lock(&rtc->lock);
 174        ret = __sh_rtc_interrupt(rtc);
 175        spin_unlock(&rtc->lock);
 176
 177        return IRQ_RETVAL(ret);
 178}
 179
 180static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
 181{
 182        struct sh_rtc *rtc = dev_id;
 183        int ret;
 184
 185        spin_lock(&rtc->lock);
 186        ret = __sh_rtc_alarm(rtc);
 187        spin_unlock(&rtc->lock);
 188
 189        return IRQ_RETVAL(ret);
 190}
 191
 192static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
 193{
 194        struct sh_rtc *rtc = dev_id;
 195        int ret;
 196
 197        spin_lock(&rtc->lock);
 198        ret = __sh_rtc_periodic(rtc);
 199        spin_unlock(&rtc->lock);
 200
 201        return IRQ_RETVAL(ret);
 202}
 203
 204static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
 205{
 206        struct sh_rtc *rtc = dev_id;
 207        int ret;
 208
 209        spin_lock(&rtc->lock);
 210        ret = __sh_rtc_interrupt(rtc);
 211        ret |= __sh_rtc_alarm(rtc);
 212        ret |= __sh_rtc_periodic(rtc);
 213        spin_unlock(&rtc->lock);
 214
 215        return IRQ_RETVAL(ret);
 216}
 217
 218static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
 219{
 220        struct sh_rtc *rtc = dev_get_drvdata(dev);
 221        unsigned int tmp;
 222
 223        spin_lock_irq(&rtc->lock);
 224
 225        tmp = readb(rtc->regbase + RCR1);
 226
 227        if (enable)
 228                tmp |= RCR1_AIE;
 229        else
 230                tmp &= ~RCR1_AIE;
 231
 232        writeb(tmp, rtc->regbase + RCR1);
 233
 234        spin_unlock_irq(&rtc->lock);
 235}
 236
 237static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
 238{
 239        struct sh_rtc *rtc = dev_get_drvdata(dev);
 240        unsigned int tmp;
 241
 242        tmp = readb(rtc->regbase + RCR1);
 243        seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
 244
 245        tmp = readb(rtc->regbase + RCR2);
 246        seq_printf(seq, "periodic_IRQ\t: %s\n",
 247                   (tmp & RCR2_PESMASK) ? "yes" : "no");
 248
 249        return 0;
 250}
 251
 252static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
 253{
 254        struct sh_rtc *rtc = dev_get_drvdata(dev);
 255        unsigned int tmp;
 256
 257        spin_lock_irq(&rtc->lock);
 258
 259        tmp = readb(rtc->regbase + RCR1);
 260
 261        if (!enable)
 262                tmp &= ~RCR1_CIE;
 263        else
 264                tmp |= RCR1_CIE;
 265
 266        writeb(tmp, rtc->regbase + RCR1);
 267
 268        spin_unlock_irq(&rtc->lock);
 269}
 270
 271static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 272{
 273        sh_rtc_setaie(dev, enabled);
 274        return 0;
 275}
 276
 277static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
 278{
 279        struct sh_rtc *rtc = dev_get_drvdata(dev);
 280        unsigned int sec128, sec2, yr, yr100, cf_bit;
 281
 282        do {
 283                unsigned int tmp;
 284
 285                spin_lock_irq(&rtc->lock);
 286
 287                tmp = readb(rtc->regbase + RCR1);
 288                tmp &= ~RCR1_CF; /* Clear CF-bit */
 289                tmp |= RCR1_CIE;
 290                writeb(tmp, rtc->regbase + RCR1);
 291
 292                sec128 = readb(rtc->regbase + R64CNT);
 293
 294                tm->tm_sec      = bcd2bin(readb(rtc->regbase + RSECCNT));
 295                tm->tm_min      = bcd2bin(readb(rtc->regbase + RMINCNT));
 296                tm->tm_hour     = bcd2bin(readb(rtc->regbase + RHRCNT));
 297                tm->tm_wday     = bcd2bin(readb(rtc->regbase + RWKCNT));
 298                tm->tm_mday     = bcd2bin(readb(rtc->regbase + RDAYCNT));
 299                tm->tm_mon      = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
 300
 301                if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
 302                        yr  = readw(rtc->regbase + RYRCNT);
 303                        yr100 = bcd2bin(yr >> 8);
 304                        yr &= 0xff;
 305                } else {
 306                        yr  = readb(rtc->regbase + RYRCNT);
 307                        yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
 308                }
 309
 310                tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
 311
 312                sec2 = readb(rtc->regbase + R64CNT);
 313                cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
 314
 315                spin_unlock_irq(&rtc->lock);
 316        } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
 317
 318#if RTC_BIT_INVERTED != 0
 319        if ((sec128 & RTC_BIT_INVERTED))
 320                tm->tm_sec--;
 321#endif
 322
 323        /* only keep the carry interrupt enabled if UIE is on */
 324        if (!(rtc->periodic_freq & PF_OXS))
 325                sh_rtc_setcie(dev, 0);
 326
 327        dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 328                "mday=%d, mon=%d, year=%d, wday=%d\n",
 329                __func__,
 330                tm->tm_sec, tm->tm_min, tm->tm_hour,
 331                tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
 332
 333        return 0;
 334}
 335
 336static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
 337{
 338        struct sh_rtc *rtc = dev_get_drvdata(dev);
 339        unsigned int tmp;
 340        int year;
 341
 342        spin_lock_irq(&rtc->lock);
 343
 344        /* Reset pre-scaler & stop RTC */
 345        tmp = readb(rtc->regbase + RCR2);
 346        tmp |= RCR2_RESET;
 347        tmp &= ~RCR2_START;
 348        writeb(tmp, rtc->regbase + RCR2);
 349
 350        writeb(bin2bcd(tm->tm_sec),  rtc->regbase + RSECCNT);
 351        writeb(bin2bcd(tm->tm_min),  rtc->regbase + RMINCNT);
 352        writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
 353        writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
 354        writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
 355        writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
 356
 357        if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
 358                year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
 359                        bin2bcd(tm->tm_year % 100);
 360                writew(year, rtc->regbase + RYRCNT);
 361        } else {
 362                year = tm->tm_year % 100;
 363                writeb(bin2bcd(year), rtc->regbase + RYRCNT);
 364        }
 365
 366        /* Start RTC */
 367        tmp = readb(rtc->regbase + RCR2);
 368        tmp &= ~RCR2_RESET;
 369        tmp |= RCR2_RTCEN | RCR2_START;
 370        writeb(tmp, rtc->regbase + RCR2);
 371
 372        spin_unlock_irq(&rtc->lock);
 373
 374        return 0;
 375}
 376
 377static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
 378{
 379        unsigned int byte;
 380        int value = 0xff;       /* return 0xff for ignored values */
 381
 382        byte = readb(rtc->regbase + reg_off);
 383        if (byte & AR_ENB) {
 384                byte &= ~AR_ENB;        /* strip the enable bit */
 385                value = bcd2bin(byte);
 386        }
 387
 388        return value;
 389}
 390
 391static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 392{
 393        struct sh_rtc *rtc = dev_get_drvdata(dev);
 394        struct rtc_time *tm = &wkalrm->time;
 395
 396        spin_lock_irq(&rtc->lock);
 397
 398        tm->tm_sec      = sh_rtc_read_alarm_value(rtc, RSECAR);
 399        tm->tm_min      = sh_rtc_read_alarm_value(rtc, RMINAR);
 400        tm->tm_hour     = sh_rtc_read_alarm_value(rtc, RHRAR);
 401        tm->tm_wday     = sh_rtc_read_alarm_value(rtc, RWKAR);
 402        tm->tm_mday     = sh_rtc_read_alarm_value(rtc, RDAYAR);
 403        tm->tm_mon      = sh_rtc_read_alarm_value(rtc, RMONAR);
 404        if (tm->tm_mon > 0)
 405                tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
 406
 407        wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
 408
 409        spin_unlock_irq(&rtc->lock);
 410
 411        return 0;
 412}
 413
 414static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
 415                                            int value, int reg_off)
 416{
 417        /* < 0 for a value that is ignored */
 418        if (value < 0)
 419                writeb(0, rtc->regbase + reg_off);
 420        else
 421                writeb(bin2bcd(value) | AR_ENB,  rtc->regbase + reg_off);
 422}
 423
 424static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 425{
 426        struct sh_rtc *rtc = dev_get_drvdata(dev);
 427        unsigned int rcr1;
 428        struct rtc_time *tm = &wkalrm->time;
 429        int mon;
 430
 431        spin_lock_irq(&rtc->lock);
 432
 433        /* disable alarm interrupt and clear the alarm flag */
 434        rcr1 = readb(rtc->regbase + RCR1);
 435        rcr1 &= ~(RCR1_AF | RCR1_AIE);
 436        writeb(rcr1, rtc->regbase + RCR1);
 437
 438        /* set alarm time */
 439        sh_rtc_write_alarm_value(rtc, tm->tm_sec,  RSECAR);
 440        sh_rtc_write_alarm_value(rtc, tm->tm_min,  RMINAR);
 441        sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
 442        sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
 443        sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
 444        mon = tm->tm_mon;
 445        if (mon >= 0)
 446                mon += 1;
 447        sh_rtc_write_alarm_value(rtc, mon, RMONAR);
 448
 449        if (wkalrm->enabled) {
 450                rcr1 |= RCR1_AIE;
 451                writeb(rcr1, rtc->regbase + RCR1);
 452        }
 453
 454        spin_unlock_irq(&rtc->lock);
 455
 456        return 0;
 457}
 458
 459static const struct rtc_class_ops sh_rtc_ops = {
 460        .read_time      = sh_rtc_read_time,
 461        .set_time       = sh_rtc_set_time,
 462        .read_alarm     = sh_rtc_read_alarm,
 463        .set_alarm      = sh_rtc_set_alarm,
 464        .proc           = sh_rtc_proc,
 465        .alarm_irq_enable = sh_rtc_alarm_irq_enable,
 466};
 467
 468static int __init sh_rtc_probe(struct platform_device *pdev)
 469{
 470        struct sh_rtc *rtc;
 471        struct resource *res;
 472        struct rtc_time r;
 473        char clk_name[6];
 474        int clk_id, ret;
 475
 476        rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
 477        if (unlikely(!rtc))
 478                return -ENOMEM;
 479
 480        spin_lock_init(&rtc->lock);
 481
 482        /* get periodic/carry/alarm irqs */
 483        ret = platform_get_irq(pdev, 0);
 484        if (unlikely(ret <= 0)) {
 485                dev_err(&pdev->dev, "No IRQ resource\n");
 486                return -ENOENT;
 487        }
 488
 489        rtc->periodic_irq = ret;
 490        rtc->carry_irq = platform_get_irq(pdev, 1);
 491        rtc->alarm_irq = platform_get_irq(pdev, 2);
 492
 493        res = platform_get_resource(pdev, IORESOURCE_IO, 0);
 494        if (!res)
 495                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 496        if (unlikely(res == NULL)) {
 497                dev_err(&pdev->dev, "No IO resource\n");
 498                return -ENOENT;
 499        }
 500
 501        rtc->regsize = resource_size(res);
 502
 503        rtc->res = devm_request_mem_region(&pdev->dev, res->start,
 504                                        rtc->regsize, pdev->name);
 505        if (unlikely(!rtc->res))
 506                return -EBUSY;
 507
 508        rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
 509                                        rtc->regsize);
 510        if (unlikely(!rtc->regbase))
 511                return -EINVAL;
 512
 513        if (!pdev->dev.of_node) {
 514                clk_id = pdev->id;
 515                /* With a single device, the clock id is still "rtc0" */
 516                if (clk_id < 0)
 517                        clk_id = 0;
 518
 519                snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
 520        } else
 521                snprintf(clk_name, sizeof(clk_name), "fck");
 522
 523        rtc->clk = devm_clk_get(&pdev->dev, clk_name);
 524        if (IS_ERR(rtc->clk)) {
 525                /*
 526                 * No error handling for rtc->clk intentionally, not all
 527                 * platforms will have a unique clock for the RTC, and
 528                 * the clk API can handle the struct clk pointer being
 529                 * NULL.
 530                 */
 531                rtc->clk = NULL;
 532        }
 533
 534        clk_enable(rtc->clk);
 535
 536        rtc->capabilities = RTC_DEF_CAPABILITIES;
 537
 538#ifdef CONFIG_SUPERH
 539        if (dev_get_platdata(&pdev->dev)) {
 540                struct sh_rtc_platform_info *pinfo =
 541                        dev_get_platdata(&pdev->dev);
 542
 543                /*
 544                 * Some CPUs have special capabilities in addition to the
 545                 * default set. Add those in here.
 546                 */
 547                rtc->capabilities |= pinfo->capabilities;
 548        }
 549#endif
 550
 551        if (rtc->carry_irq <= 0) {
 552                /* register shared periodic/carry/alarm irq */
 553                ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
 554                                sh_rtc_shared, 0, "sh-rtc", rtc);
 555                if (unlikely(ret)) {
 556                        dev_err(&pdev->dev,
 557                                "request IRQ failed with %d, IRQ %d\n", ret,
 558                                rtc->periodic_irq);
 559                        goto err_unmap;
 560                }
 561        } else {
 562                /* register periodic/carry/alarm irqs */
 563                ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
 564                                sh_rtc_periodic, 0, "sh-rtc period", rtc);
 565                if (unlikely(ret)) {
 566                        dev_err(&pdev->dev,
 567                                "request period IRQ failed with %d, IRQ %d\n",
 568                                ret, rtc->periodic_irq);
 569                        goto err_unmap;
 570                }
 571
 572                ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
 573                                sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
 574                if (unlikely(ret)) {
 575                        dev_err(&pdev->dev,
 576                                "request carry IRQ failed with %d, IRQ %d\n",
 577                                ret, rtc->carry_irq);
 578                        goto err_unmap;
 579                }
 580
 581                ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
 582                                sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
 583                if (unlikely(ret)) {
 584                        dev_err(&pdev->dev,
 585                                "request alarm IRQ failed with %d, IRQ %d\n",
 586                                ret, rtc->alarm_irq);
 587                        goto err_unmap;
 588                }
 589        }
 590
 591        platform_set_drvdata(pdev, rtc);
 592
 593        /* everything disabled by default */
 594        sh_rtc_setaie(&pdev->dev, 0);
 595        sh_rtc_setcie(&pdev->dev, 0);
 596
 597        rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
 598                                           &sh_rtc_ops, THIS_MODULE);
 599        if (IS_ERR(rtc->rtc_dev)) {
 600                ret = PTR_ERR(rtc->rtc_dev);
 601                goto err_unmap;
 602        }
 603
 604        rtc->rtc_dev->max_user_freq = 256;
 605
 606        /* reset rtc to epoch 0 if time is invalid */
 607        if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
 608                rtc_time_to_tm(0, &r);
 609                rtc_set_time(rtc->rtc_dev, &r);
 610        }
 611
 612        device_init_wakeup(&pdev->dev, 1);
 613        return 0;
 614
 615err_unmap:
 616        clk_disable(rtc->clk);
 617
 618        return ret;
 619}
 620
 621static int __exit sh_rtc_remove(struct platform_device *pdev)
 622{
 623        struct sh_rtc *rtc = platform_get_drvdata(pdev);
 624
 625        sh_rtc_setaie(&pdev->dev, 0);
 626        sh_rtc_setcie(&pdev->dev, 0);
 627
 628        clk_disable(rtc->clk);
 629
 630        return 0;
 631}
 632
 633static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
 634{
 635        struct sh_rtc *rtc = dev_get_drvdata(dev);
 636
 637        irq_set_irq_wake(rtc->periodic_irq, enabled);
 638
 639        if (rtc->carry_irq > 0) {
 640                irq_set_irq_wake(rtc->carry_irq, enabled);
 641                irq_set_irq_wake(rtc->alarm_irq, enabled);
 642        }
 643}
 644
 645static int __maybe_unused sh_rtc_suspend(struct device *dev)
 646{
 647        if (device_may_wakeup(dev))
 648                sh_rtc_set_irq_wake(dev, 1);
 649
 650        return 0;
 651}
 652
 653static int __maybe_unused sh_rtc_resume(struct device *dev)
 654{
 655        if (device_may_wakeup(dev))
 656                sh_rtc_set_irq_wake(dev, 0);
 657
 658        return 0;
 659}
 660
 661static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
 662
 663static const struct of_device_id sh_rtc_of_match[] = {
 664        { .compatible = "renesas,sh-rtc", },
 665        { /* sentinel */ }
 666};
 667MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
 668
 669static struct platform_driver sh_rtc_platform_driver = {
 670        .driver         = {
 671                .name   = DRV_NAME,
 672                .pm     = &sh_rtc_pm_ops,
 673                .of_match_table = sh_rtc_of_match,
 674        },
 675        .remove         = __exit_p(sh_rtc_remove),
 676};
 677
 678module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
 679
 680MODULE_DESCRIPTION("SuperH on-chip RTC driver");
 681MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
 682              "Jamie Lenehan <lenehan@twibble.org>, "
 683              "Angelo Castello <angelo.castello@st.com>");
 684MODULE_LICENSE("GPL");
 685MODULE_ALIAS("platform:" DRV_NAME);
 686