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9#ifndef __QETH_CORE_MPC_H__
10#define __QETH_CORE_MPC_H__
11
12#include <asm/qeth.h>
13#include <uapi/linux/if_ether.h>
14
15#define IPA_PDU_HEADER_SIZE 0x40
16#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
17#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
18#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
19#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
20
21extern unsigned char IPA_PDU_HEADER[];
22#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
23
24#define IPA_CMD_LENGTH (IPA_PDU_HEADER_SIZE + sizeof(struct qeth_ipa_cmd))
25
26#define QETH_SEQ_NO_LENGTH 4
27#define QETH_MPC_TOKEN_LENGTH 4
28#define QETH_MCL_LENGTH 4
29
30#define QETH_TIMEOUT (10 * HZ)
31#define QETH_IPA_TIMEOUT (45 * HZ)
32#define QETH_IDX_COMMAND_SEQNO 0xffff0000
33
34#define QETH_CLEAR_CHANNEL_PARM -10
35#define QETH_HALT_CHANNEL_PARM -11
36#define QETH_RCD_PARM -12
37
38static inline bool qeth_intparm_is_iob(unsigned long intparm)
39{
40 switch (intparm) {
41 case QETH_CLEAR_CHANNEL_PARM:
42 case QETH_HALT_CHANNEL_PARM:
43 case QETH_RCD_PARM:
44 case 0:
45 return false;
46 }
47 return true;
48}
49
50
51
52
53#define IPA_CMD_INITIATOR_HOST 0x00
54#define IPA_CMD_INITIATOR_OSA 0x01
55#define IPA_CMD_INITIATOR_HOST_REPLY 0x80
56#define IPA_CMD_INITIATOR_OSA_REPLY 0x81
57#define IPA_CMD_PRIM_VERSION_NO 0x01
58
59enum qeth_card_types {
60 QETH_CARD_TYPE_OSD = 1,
61 QETH_CARD_TYPE_IQD = 5,
62 QETH_CARD_TYPE_OSN = 6,
63 QETH_CARD_TYPE_OSM = 3,
64 QETH_CARD_TYPE_OSX = 2,
65};
66
67#define IS_IQD(card) ((card)->info.type == QETH_CARD_TYPE_IQD)
68#define IS_OSN(card) ((card)->info.type == QETH_CARD_TYPE_OSN)
69
70#define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
71
72enum qeth_link_types {
73 QETH_LINK_TYPE_FAST_ETH = 0x01,
74 QETH_LINK_TYPE_HSTR = 0x02,
75 QETH_LINK_TYPE_GBIT_ETH = 0x03,
76 QETH_LINK_TYPE_OSN = 0x04,
77 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
78 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
79 QETH_LINK_TYPE_LANE_TR = 0x82,
80 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
81 QETH_LINK_TYPE_LANE = 0x88,
82};
83
84
85
86
87#define RESET_ROUTING_FLAG 0x10
88enum qeth_routing_types {
89
90 NO_ROUTER = 0,
91 PRIMARY_ROUTER = 1,
92 SECONDARY_ROUTER = 2,
93 MULTICAST_ROUTER = 3,
94 PRIMARY_CONNECTOR = 4,
95 SECONDARY_CONNECTOR = 5,
96};
97
98
99enum qeth_ipa_cmds {
100 IPA_CMD_STARTLAN = 0x01,
101 IPA_CMD_STOPLAN = 0x02,
102 IPA_CMD_SETVMAC = 0x21,
103 IPA_CMD_DELVMAC = 0x22,
104 IPA_CMD_SETGMAC = 0x23,
105 IPA_CMD_DELGMAC = 0x24,
106 IPA_CMD_SETVLAN = 0x25,
107 IPA_CMD_DELVLAN = 0x26,
108 IPA_CMD_VNICC = 0x2a,
109 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
110 IPA_CMD_SETCCID = 0x41,
111 IPA_CMD_DELCCID = 0x42,
112 IPA_CMD_MODCCID = 0x43,
113 IPA_CMD_SETIP = 0xb1,
114 IPA_CMD_QIPASSIST = 0xb2,
115 IPA_CMD_SETASSPARMS = 0xb3,
116 IPA_CMD_SETIPM = 0xb4,
117 IPA_CMD_DELIPM = 0xb5,
118 IPA_CMD_SETRTG = 0xb6,
119 IPA_CMD_DELIP = 0xb7,
120 IPA_CMD_SETADAPTERPARMS = 0xb8,
121 IPA_CMD_SET_DIAG_ASS = 0xb9,
122 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
123 IPA_CMD_CREATE_ADDR = 0xc3,
124 IPA_CMD_DESTROY_ADDR = 0xc4,
125 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
126 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
127 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
128 IPA_CMD_UNKNOWN = 0x00
129};
130
131enum qeth_ip_ass_cmds {
132 IPA_CMD_ASS_START = 0x0001,
133 IPA_CMD_ASS_STOP = 0x0002,
134 IPA_CMD_ASS_CONFIGURE = 0x0003,
135 IPA_CMD_ASS_ENABLE = 0x0004,
136};
137
138enum qeth_arp_process_subcmds {
139 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
140 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
141 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
142 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
143 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
144 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
145 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
146};
147
148
149
150
151
152enum qeth_ipa_return_codes {
153 IPA_RC_SUCCESS = 0x0000,
154 IPA_RC_NOTSUPP = 0x0001,
155 IPA_RC_IP_TABLE_FULL = 0x0002,
156 IPA_RC_UNKNOWN_ERROR = 0x0003,
157 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
158 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
159 IPA_RC_INVALID_FORMAT = 0x0006,
160 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
161 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
162 IPA_RC_DUP_IPV6_HOME = 0x0010,
163 IPA_RC_UNREGISTERED_ADDR = 0x0011,
164 IPA_RC_NO_ID_AVAILABLE = 0x0012,
165 IPA_RC_ID_NOT_FOUND = 0x0013,
166 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
167 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
168 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
169 IPA_RC_INVALID_IP_VERSION = 0x0020,
170 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
171 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
172 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
173 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
174 IPA_RC_L2_DUP_MAC = 0x2005,
175 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
176 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
177 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
178 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
179 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
180 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
181 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
182 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
183 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
184 IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050,
185 IPA_RC_VNICC_VNICBP = 0x20B0,
186 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
187 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
188 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
189 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
190 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
191 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
192 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
193 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
194 IPA_RC_DATA_MISMATCH = 0xe001,
195 IPA_RC_INVALID_MTU_SIZE = 0xe002,
196 IPA_RC_INVALID_LANTYPE = 0xe003,
197 IPA_RC_INVALID_LANNUM = 0xe004,
198 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
199 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
200 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
201 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
202 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
203 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
204 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
205 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
206 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
207 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
208 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
209 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
210 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
211 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
212 IPA_RC_LAN_OFFLINE = 0xe080,
213 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
214 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
215 IPA_RC_ENOMEM = 0xfffe,
216 IPA_RC_FFFF = 0xffff
217};
218
219#define IPA_RC_VNICC_OOSEQ 0x0005
220
221
222#define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL
223#define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR
224
225
226#define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME
227#define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION
228
229
230enum qeth_ipa_funcs {
231 IPA_ARP_PROCESSING = 0x00000001L,
232 IPA_INBOUND_CHECKSUM = 0x00000002L,
233 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
234
235 IPA_FILTERING = 0x00000010L,
236 IPA_IPV6 = 0x00000020L,
237 IPA_MULTICASTING = 0x00000040L,
238 IPA_IP_REASSEMBLY = 0x00000080L,
239 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
240 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
241 IPA_SETADAPTERPARMS = 0x00000400L,
242 IPA_VLAN_PRIO = 0x00000800L,
243 IPA_PASSTHRU = 0x00001000L,
244 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
245 IPA_FULL_VLAN = 0x00004000L,
246 IPA_INBOUND_PASSTHRU = 0x00008000L,
247 IPA_SOURCE_MAC = 0x00010000L,
248 IPA_OSA_MC_ROUTER = 0x00020000L,
249 IPA_QUERY_ARP_ASSIST = 0x00040000L,
250 IPA_INBOUND_TSO = 0x00080000L,
251 IPA_OUTBOUND_TSO = 0x00100000L,
252 IPA_INBOUND_CHECKSUM_V6 = 0x00400000L,
253 IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L,
254};
255
256
257enum qeth_ipa_setdelip_flags {
258 QETH_IPA_SETDELIP_DEFAULT = 0x00L,
259 QETH_IPA_SETIP_VIPA_FLAG = 0x01L,
260 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L,
261 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
262 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
263 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
264};
265
266
267enum qeth_ipa_setadp_cmd {
268 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
269 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
270 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
271 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
272 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
273 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
274 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
275 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
276 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
277 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
278 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
279 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
280 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
281 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
282 IPA_SETADP_QUERY_OAT = 0x00080000L,
283 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
284};
285enum qeth_ipa_mac_ops {
286 CHANGE_ADDR_READ_MAC = 0,
287 CHANGE_ADDR_REPLACE_MAC = 1,
288 CHANGE_ADDR_ADD_MAC = 2,
289 CHANGE_ADDR_DEL_MAC = 4,
290 CHANGE_ADDR_RESET_MAC = 8,
291};
292enum qeth_ipa_addr_ops {
293 CHANGE_ADDR_READ_ADDR = 0,
294 CHANGE_ADDR_ADD_ADDR = 1,
295 CHANGE_ADDR_DEL_ADDR = 2,
296 CHANGE_ADDR_FLUSH_ADDR_TABLE = 4,
297};
298enum qeth_ipa_promisc_modes {
299 SET_PROMISC_MODE_OFF = 0,
300 SET_PROMISC_MODE_ON = 1,
301};
302enum qeth_ipa_isolation_modes {
303 ISOLATION_MODE_NONE = 0x00000000L,
304 ISOLATION_MODE_FWD = 0x00000001L,
305 ISOLATION_MODE_DROP = 0x00000002L,
306};
307enum qeth_ipa_set_access_mode_rc {
308 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
309 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
310 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
311 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
312 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
313 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
314 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
315 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
316 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
317};
318enum qeth_card_info_card_type {
319 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
320 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
321 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
322 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
323 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
324 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
325};
326enum qeth_card_info_port_mode {
327 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
328 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
329};
330enum qeth_card_info_port_speed {
331 CARD_INFO_PORTS_10M = 0x00000005,
332 CARD_INFO_PORTS_100M = 0x00000006,
333 CARD_INFO_PORTS_1G = 0x00000007,
334 CARD_INFO_PORTS_10G = 0x00000008,
335};
336
337
338struct qeth_ipacmd_setdelip4 {
339 __u8 ip_addr[4];
340 __u8 mask[4];
341 __u32 flags;
342} __attribute__ ((packed));
343
344struct qeth_ipacmd_setdelip6 {
345 __u8 ip_addr[16];
346 __u8 mask[16];
347 __u32 flags;
348} __attribute__ ((packed));
349
350struct qeth_ipacmd_setdelipm {
351 __u8 mac[6];
352 __u8 padding[2];
353 __u8 ip6[12];
354 __u8 ip4[4];
355} __attribute__ ((packed));
356
357struct qeth_ipacmd_layer2setdelmac {
358 __u32 mac_length;
359 __u8 mac[6];
360} __attribute__ ((packed));
361
362struct qeth_ipacmd_layer2setdelvlan {
363 __u16 vlan_id;
364} __attribute__ ((packed));
365
366
367struct qeth_ipacmd_setassparms_hdr {
368 __u32 assist_no;
369 __u16 length;
370 __u16 command_code;
371 __u16 return_code;
372 __u8 number_of_replies;
373 __u8 seq_no;
374} __attribute__((packed));
375
376struct qeth_arp_query_data {
377 __u16 request_bits;
378 __u16 reply_bits;
379 __u32 no_entries;
380 char data;
381} __attribute__((packed));
382
383
384struct qeth_arp_query_info {
385 __u32 udata_len;
386 __u16 mask_bits;
387 __u32 udata_offset;
388 __u32 no_entries;
389 char *udata;
390};
391
392
393
394
395enum qeth_ipa_checksum_bits {
396 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
397 QETH_IPA_CHECKSUM_UDP = 0x0008,
398 QETH_IPA_CHECKSUM_TCP = 0x0010,
399 QETH_IPA_CHECKSUM_LP2LP = 0x0020
400};
401
402
403struct qeth_checksum_cmd {
404 __u32 supported;
405 __u32 enabled;
406} __packed;
407
408
409struct qeth_ipacmd_setassparms {
410 struct qeth_ipacmd_setassparms_hdr hdr;
411 union {
412 __u32 flags_32bit;
413 struct qeth_checksum_cmd chksum;
414 struct qeth_arp_cache_entry add_arp_entry;
415 struct qeth_arp_query_data query_arp;
416 __u8 ip[16];
417 } data;
418} __attribute__ ((packed));
419
420
421
422struct qeth_set_routing {
423 __u8 type;
424};
425
426
427struct qeth_query_cmds_supp {
428 __u32 no_lantypes_supp;
429 __u8 lan_type;
430 __u8 reserved1[3];
431 __u32 supported_cmds;
432 __u8 reserved2[8];
433} __attribute__ ((packed));
434
435struct qeth_change_addr {
436 u32 cmd;
437 u32 addr_size;
438 u32 no_macs;
439 u8 addr[ETH_ALEN];
440};
441
442struct qeth_snmp_cmd {
443 __u8 token[16];
444 __u32 request;
445 __u32 interface;
446 __u32 returncode;
447 __u32 firmwarelevel;
448 __u32 seqno;
449 __u8 data;
450} __attribute__ ((packed));
451
452struct qeth_snmp_ureq_hdr {
453 __u32 data_len;
454 __u32 req_len;
455 __u32 reserved1;
456 __u32 reserved2;
457} __attribute__ ((packed));
458
459struct qeth_snmp_ureq {
460 struct qeth_snmp_ureq_hdr hdr;
461 struct qeth_snmp_cmd cmd;
462} __attribute__((packed));
463
464
465struct qeth_set_access_ctrl {
466 __u32 subcmd_code;
467 __u8 reserved[8];
468} __attribute__((packed));
469
470struct qeth_query_oat {
471 __u32 subcmd_code;
472 __u8 reserved[12];
473} __packed;
474
475struct qeth_qoat_priv {
476 __u32 buffer_len;
477 __u32 response_len;
478 char *buffer;
479};
480
481struct qeth_query_card_info {
482 __u8 card_type;
483 __u8 reserved1;
484 __u16 port_mode;
485 __u32 port_speed;
486 __u32 reserved2;
487};
488
489#define QETH_SWITCH_FORW_802_1 0x00000001
490#define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
491#define QETH_SWITCH_CAP_RTE 0x00000004
492#define QETH_SWITCH_CAP_ECP 0x00000008
493#define QETH_SWITCH_CAP_VDP 0x00000010
494
495struct qeth_query_switch_attributes {
496 __u8 version;
497 __u8 reserved1;
498 __u16 reserved2;
499 __u32 capabilities;
500 __u32 settings;
501 __u8 reserved3[8];
502};
503
504struct qeth_ipacmd_setadpparms_hdr {
505 __u32 supp_hw_cmds;
506 __u32 reserved1;
507 __u16 cmdlength;
508 __u16 reserved2;
509 __u32 command_code;
510 __u16 return_code;
511 __u8 used_total;
512 __u8 seq_no;
513 __u32 reserved3;
514} __attribute__ ((packed));
515
516struct qeth_ipacmd_setadpparms {
517 struct qeth_ipacmd_setadpparms_hdr hdr;
518 union {
519 struct qeth_query_cmds_supp query_cmds_supp;
520 struct qeth_change_addr change_addr;
521 struct qeth_snmp_cmd snmp;
522 struct qeth_set_access_ctrl set_access_ctrl;
523 struct qeth_query_oat query_oat;
524 struct qeth_query_card_info card_info;
525 struct qeth_query_switch_attributes query_switch_attributes;
526 __u32 mode;
527 } data;
528} __attribute__ ((packed));
529
530
531struct qeth_create_destroy_address {
532 __u8 unique_id[8];
533} __attribute__ ((packed));
534
535
536
537enum qeth_diags_cmds {
538 QETH_DIAGS_CMD_QUERY = 0x0001,
539 QETH_DIAGS_CMD_TRAP = 0x0002,
540 QETH_DIAGS_CMD_TRACE = 0x0004,
541 QETH_DIAGS_CMD_NOLOG = 0x0008,
542 QETH_DIAGS_CMD_DUMP = 0x0010,
543};
544
545enum qeth_diags_trace_types {
546 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
547};
548
549enum qeth_diags_trace_cmds {
550 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
551 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
552 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
553 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
554 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
555};
556
557enum qeth_diags_trap_action {
558 QETH_DIAGS_TRAP_ARM = 0x01,
559 QETH_DIAGS_TRAP_DISARM = 0x02,
560 QETH_DIAGS_TRAP_CAPTURE = 0x04,
561};
562
563struct qeth_ipacmd_diagass {
564 __u32 host_tod2;
565 __u32:32;
566 __u16 subcmd_len;
567 __u16:16;
568 __u32 subcmd;
569 __u8 type;
570 __u8 action;
571 __u16 options;
572 __u32 ext;
573 __u8 cdata[64];
574} __attribute__ ((packed));
575
576
577
578#define IPA_VNICC_QUERY_CHARS 0x00000000L
579#define IPA_VNICC_QUERY_CMDS 0x00000001L
580#define IPA_VNICC_ENABLE 0x00000002L
581#define IPA_VNICC_DISABLE 0x00000004L
582#define IPA_VNICC_SET_TIMEOUT 0x00000008L
583#define IPA_VNICC_GET_TIMEOUT 0x00000010L
584
585
586#define QETH_VNICC_FLOODING 0x80000000
587#define QETH_VNICC_MCAST_FLOODING 0x40000000
588#define QETH_VNICC_LEARNING 0x20000000
589#define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000
590#define QETH_VNICC_TAKEOVER_LEARNING 0x08000000
591#define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000
592#define QETH_VNICC_RX_BCAST 0x02000000
593
594
595#define QETH_VNICC_ALL 0xff000000
596#define QETH_VNICC_DEFAULT QETH_VNICC_RX_BCAST
597
598#define QETH_VNICC_DEFAULT_TIMEOUT 600
599
600
601struct qeth_ipacmd_vnicc_hdr {
602 u32 sup;
603 u32 cur;
604};
605
606
607struct qeth_vnicc_sub_hdr {
608 u16 data_length;
609 u16 reserved;
610 u32 sub_command;
611};
612
613
614struct qeth_vnicc_query_cmds {
615 u32 vnic_char;
616 u32 sup_cmds;
617};
618
619
620struct qeth_vnicc_set_char {
621 u32 vnic_char;
622};
623
624
625struct qeth_vnicc_getset_timeout {
626 u32 vnic_char;
627 u32 timeout;
628};
629
630
631struct qeth_ipacmd_vnicc {
632 struct qeth_ipacmd_vnicc_hdr hdr;
633 struct qeth_vnicc_sub_hdr sub_hdr;
634 union {
635 struct qeth_vnicc_query_cmds query_cmds;
636 struct qeth_vnicc_set_char set_char;
637 struct qeth_vnicc_getset_timeout getset_timeout;
638 };
639};
640
641
642enum qeth_ipa_sbp_cmd {
643 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
644 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
645 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
646 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
647 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
648 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
649};
650
651struct net_if_token {
652 __u16 devnum;
653 __u8 cssid;
654 __u8 iid;
655 __u8 ssid;
656 __u8 chpid;
657 __u16 chid;
658} __packed;
659
660struct mac_addr_lnid {
661 __u8 mac[6];
662 __u16 lnid;
663} __packed;
664
665struct qeth_ipacmd_sbp_hdr {
666 __u32 supported_sbp_cmds;
667 __u32 enabled_sbp_cmds;
668 __u16 cmdlength;
669 __u16 reserved1;
670 __u32 command_code;
671 __u16 return_code;
672 __u8 used_total;
673 __u8 seq_no;
674 __u32 reserved2;
675} __packed;
676
677struct qeth_sbp_query_cmds_supp {
678 __u32 supported_cmds;
679 __u32 reserved;
680} __packed;
681
682struct qeth_sbp_reset_role {
683} __packed;
684
685struct qeth_sbp_set_primary {
686 struct net_if_token token;
687} __packed;
688
689struct qeth_sbp_set_secondary {
690} __packed;
691
692struct qeth_sbp_port_entry {
693 __u8 role;
694 __u8 state;
695 __u8 reserved1;
696 __u8 reserved2;
697 struct net_if_token token;
698} __packed;
699
700struct qeth_sbp_query_ports {
701 __u8 primary_bp_supported;
702 __u8 secondary_bp_supported;
703 __u8 num_entries;
704 __u8 entry_length;
705 struct qeth_sbp_port_entry entry[];
706} __packed;
707
708struct qeth_sbp_state_change {
709 __u8 primary_bp_supported;
710 __u8 secondary_bp_supported;
711 __u8 num_entries;
712 __u8 entry_length;
713 struct qeth_sbp_port_entry entry[];
714} __packed;
715
716struct qeth_ipacmd_setbridgeport {
717 struct qeth_ipacmd_sbp_hdr hdr;
718 union {
719 struct qeth_sbp_query_cmds_supp query_cmds_supp;
720 struct qeth_sbp_reset_role reset_role;
721 struct qeth_sbp_set_primary set_primary;
722 struct qeth_sbp_set_secondary set_secondary;
723 struct qeth_sbp_query_ports query_ports;
724 struct qeth_sbp_state_change state_change;
725 } data;
726} __packed;
727
728
729
730enum qeth_ipa_addr_change_code {
731 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
732 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
733 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80,
734};
735
736struct qeth_ipacmd_addr_change_entry {
737 struct net_if_token token;
738 struct mac_addr_lnid addr_lnid;
739 __u8 change_code;
740 __u8 reserved1;
741 __u16 reserved2;
742} __packed;
743
744struct qeth_ipacmd_addr_change {
745 __u8 lost_event_mask;
746 __u8 reserved;
747 __u16 num_entries;
748 struct qeth_ipacmd_addr_change_entry entry[];
749} __packed;
750
751
752struct qeth_ipacmd_hdr {
753 __u8 command;
754 __u8 initiator;
755 __u16 seqno;
756 __u16 return_code;
757 __u8 adapter_type;
758 __u8 rel_adapter_no;
759 __u8 prim_version_no;
760 __u8 param_count;
761 __u16 prot_version;
762 __u32 ipa_supported;
763 __u32 ipa_enabled;
764} __attribute__ ((packed));
765
766
767struct qeth_ipa_cmd {
768 struct qeth_ipacmd_hdr hdr;
769 union {
770 struct qeth_ipacmd_setdelip4 setdelip4;
771 struct qeth_ipacmd_setdelip6 setdelip6;
772 struct qeth_ipacmd_setdelipm setdelipm;
773 struct qeth_ipacmd_setassparms setassparms;
774 struct qeth_ipacmd_layer2setdelmac setdelmac;
775 struct qeth_ipacmd_layer2setdelvlan setdelvlan;
776 struct qeth_create_destroy_address create_destroy_addr;
777 struct qeth_ipacmd_setadpparms setadapterparms;
778 struct qeth_set_routing setrtg;
779 struct qeth_ipacmd_diagass diagass;
780 struct qeth_ipacmd_setbridgeport sbp;
781 struct qeth_ipacmd_addr_change addrchange;
782 struct qeth_ipacmd_vnicc vnicc;
783 } data;
784} __attribute__ ((packed));
785
786
787
788
789
790
791enum qeth_ipa_arp_return_codes {
792 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
793 QETH_IPA_ARP_RC_FAILED = 0x0001,
794 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
795 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
796 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
797 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
798};
799
800extern const char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc);
801extern const char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
802
803#define QETH_SETASS_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
804 sizeof(struct qeth_ipacmd_setassparms_hdr))
805#define QETH_IPA_ARP_DATA_POS(buffer) (buffer + IPA_PDU_HEADER_SIZE + \
806 QETH_SETASS_BASE_LEN)
807#define QETH_SETADP_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
808 sizeof(struct qeth_ipacmd_setadpparms_hdr))
809#define QETH_SNMP_SETADP_CMDLENGTH 16
810
811#define QETH_ARP_DATA_SIZE 3968
812#define QETH_ARP_CMD_LEN (QETH_ARP_DATA_SIZE + 8)
813
814#define IS_IPA_REPLY(cmd) ((cmd->hdr.initiator == IPA_CMD_INITIATOR_HOST) || \
815 (cmd->hdr.initiator == IPA_CMD_INITIATOR_OSA_REPLY))
816
817
818
819
820
821extern unsigned char CM_ENABLE[];
822#define CM_ENABLE_SIZE 0x63
823#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
824#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
825#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
826
827#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \
828 (PDU_ENCAPSULATION(buffer) + 0x13)
829
830
831extern unsigned char CM_SETUP[];
832#define CM_SETUP_SIZE 0x64
833#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
834#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
835#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
836
837#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \
838 (PDU_ENCAPSULATION(buffer) + 0x1a)
839
840extern unsigned char ULP_ENABLE[];
841#define ULP_ENABLE_SIZE 0x6b
842#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
843#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
844#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
845#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
846#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \
847 (PDU_ENCAPSULATION(buffer) + 0x13)
848#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \
849 (PDU_ENCAPSULATION(buffer) + 0x1f)
850#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \
851 (PDU_ENCAPSULATION(buffer) + 0x17)
852#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \
853 (PDU_ENCAPSULATION(buffer) + 0x2b)
854
855#define QETH_PROT_LAYER2 0x08
856#define QETH_PROT_TCPIP 0x03
857#define QETH_PROT_OSN2 0x0a
858#define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
859#define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
860
861extern unsigned char ULP_SETUP[];
862#define ULP_SETUP_SIZE 0x6c
863#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
864#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
865#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
866#define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
867#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
868
869#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \
870 (PDU_ENCAPSULATION(buffer) + 0x1a)
871
872
873extern unsigned char DM_ACT[];
874#define DM_ACT_SIZE 0x55
875#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
876#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
877
878
879
880#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4)
881#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
882#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
883
884extern unsigned char IDX_ACTIVATE_READ[];
885extern unsigned char IDX_ACTIVATE_WRITE[];
886
887#define IDX_ACTIVATE_SIZE 0x22
888#define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
889#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
890#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
891#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
892#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
893#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
894#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
895#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
896#define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
897#define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
898#define QETH_IDX_ACT_ERR_EXCL 0x19
899#define QETH_IDX_ACT_ERR_AUTH 0x1E
900#define QETH_IDX_ACT_ERR_AUTH_USER 0x20
901
902#define PDU_ENCAPSULATION(buffer) \
903 (buffer + *(buffer + (*(buffer + 0x0b)) + \
904 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
905
906#define IS_IPA(buffer) \
907 ((buffer) && \
908 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))
909
910#endif
911
