LXR linux/arch/parisc/include/asm/assembly.h

   1/*
   2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
   3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
   4 * Copyright (C) 1999 SuSE GmbH
   5 *
   6 *    This program is free software; you can redistribute it and/or modify
   7 *    it under the terms of the GNU General Public License as published by
   8 *    the Free Software Foundation; either version 2, or (at your option)
   9 *    any later version.
  10 *
  11 *    This program is distributed in the hope that it will be useful,
  12 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 *    GNU General Public License for more details.
  15 *
  16 *    You should have received a copy of the GNU General Public License
  17 *    along with this program; if not, write to the Free Software
  18 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19 */
  20
  21#ifndef _PARISC_ASSEMBLY_H
  22#define _PARISC_ASSEMBLY_H
  23
  24#define CALLEE_FLOAT_FRAME_SIZE 80
  25
  26#ifdef CONFIG_64BIT
  27#define LDREG   ldd
  28#define STREG   std
  29#define LDREGX  ldd,s
  30#define LDREGM  ldd,mb
  31#define STREGM  std,ma
  32#define SHRREG  shrd
  33#define SHLREG  shld
  34#define ANDCM   andcm,*
  35#define COND(x) * ## x
  36#define RP_OFFSET       16
  37#define FRAME_SIZE      128
  38#define CALLEE_REG_FRAME_SIZE   144
  39#define REG_SZ          8
  40#define ASM_ULONG_INSN  .dword
  41#else   /* CONFIG_64BIT */
  42#define LDREG   ldw
  43#define STREG   stw
  44#define LDREGX  ldwx,s
  45#define LDREGM  ldwm
  46#define STREGM  stwm
  47#define SHRREG  shr
  48#define SHLREG  shlw
  49#define ANDCM   andcm
  50#define COND(x) x
  51#define RP_OFFSET       20
  52#define FRAME_SIZE      64
  53#define CALLEE_REG_FRAME_SIZE   128
  54#define REG_SZ          4
  55#define ASM_ULONG_INSN  .word
  56#endif
  57
  58#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
  59
  60#ifdef CONFIG_PA20
  61#define LDCW            ldcw,co
  62#define BL              b,l
  63# ifdef CONFIG_64BIT
  64#  define LEVEL         2.0w
  65# else
  66#  define LEVEL         2.0
  67# endif
  68#else
  69#define LDCW            ldcw
  70#define BL              bl
  71#define LEVEL           1.1
  72#endif
  73
  74#ifdef __ASSEMBLY__
  75
  76#ifdef CONFIG_64BIT
  77/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
  78 * work around that for now... */
  79        .level 2.0w
  80#endif
  81
  82#include <asm/asm-offsets.h>
  83#include <asm/page.h>
  84#include <asm/types.h>
  85
  86#include <asm/asmregs.h>
  87
  88        sp      =       30
  89        gp      =       27
  90        ipsw    =       22
  91
  92        /*
  93         * We provide two versions of each macro to convert from physical
  94         * to virtual and vice versa. The "_r1" versions take one argument
  95         * register, but trashes r1 to do the conversion. The other
  96         * version takes two arguments: a src and destination register.
  97         * However, the source and destination registers can not be
  98         * the same register.
  99         */
 100
 101        .macro  tophys  grvirt, grphys
 102        ldil    L%(__PAGE_OFFSET), \grphys
 103        sub     \grvirt, \grphys, \grphys
 104        .endm
 105        
 106        .macro  tovirt  grphys, grvirt
 107        ldil    L%(__PAGE_OFFSET), \grvirt
 108        add     \grphys, \grvirt, \grvirt
 109        .endm
 110
 111        .macro  tophys_r1  gr
 112        ldil    L%(__PAGE_OFFSET), %r1
 113        sub     \gr, %r1, \gr
 114        .endm
 115        
 116        .macro  tovirt_r1  gr
 117        ldil    L%(__PAGE_OFFSET), %r1
 118        add     \gr, %r1, \gr
 119        .endm
 120
 121        .macro delay value
 122        ldil    L%\value, 1
 123        ldo     R%\value(1), 1
 124        addib,UV,n -1,1,.
 125        addib,NUV,n -1,1,.+8
 126        nop
 127        .endm
 128
 129        .macro  debug value
 130        .endm
 131
 132
 133        /* Shift Left - note the r and t can NOT be the same! */
 134        .macro shl r, sa, t
 135        dep,z   \r, 31-(\sa), 32-(\sa), \t
 136        .endm
 137
 138        /* The PA 2.0 shift left */
 139        .macro shlw r, sa, t
 140        depw,z  \r, 31-(\sa), 32-(\sa), \t
 141        .endm
 142
 143        /* And the PA 2.0W shift left */
 144        .macro shld r, sa, t
 145        depd,z  \r, 63-(\sa), 64-(\sa), \t
 146        .endm
 147
 148        /* Shift Right - note the r and t can NOT be the same! */
 149        .macro shr r, sa, t
 150        extru \r, 31-(\sa), 32-(\sa), \t
 151        .endm
 152
 153        /* pa20w version of shift right */
 154        .macro shrd r, sa, t
 155        extrd,u \r, 63-(\sa), 64-(\sa), \t
 156        .endm
 157
 158        /* load 32-bit 'value' into 'reg' compensating for the ldil
 159         * sign-extension when running in wide mode.
 160         * WARNING!! neither 'value' nor 'reg' can be expressions
 161         * containing '.'!!!! */
 162        .macro  load32 value, reg
 163        ldil    L%\value, \reg
 164        ldo     R%\value(\reg), \reg
 165        .endm
 166
 167        .macro loadgp
 168#ifdef CONFIG_64BIT
 169        ldil            L%__gp, %r27
 170        ldo             R%__gp(%r27), %r27
 171#else
 172        ldil            L%$global$, %r27
 173        ldo             R%$global$(%r27), %r27
 174#endif
 175        .endm
 176
 177#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
 178#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
 179#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
 180#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
 181
 182        .macro  save_general    regs
 183        STREG %r1, PT_GR1 (\regs)
 184        STREG %r2, PT_GR2 (\regs)
 185        STREG %r3, PT_GR3 (\regs)
 186        STREG %r4, PT_GR4 (\regs)
 187        STREG %r5, PT_GR5 (\regs)
 188        STREG %r6, PT_GR6 (\regs)
 189        STREG %r7, PT_GR7 (\regs)
 190        STREG %r8, PT_GR8 (\regs)
 191        STREG %r9, PT_GR9 (\regs)
 192        STREG %r10, PT_GR10(\regs)
 193        STREG %r11, PT_GR11(\regs)
 194        STREG %r12, PT_GR12(\regs)
 195        STREG %r13, PT_GR13(\regs)
 196        STREG %r14, PT_GR14(\regs)
 197        STREG %r15, PT_GR15(\regs)
 198        STREG %r16, PT_GR16(\regs)
 199        STREG %r17, PT_GR17(\regs)
 200        STREG %r18, PT_GR18(\regs)
 201        STREG %r19, PT_GR19(\regs)
 202        STREG %r20, PT_GR20(\regs)
 203        STREG %r21, PT_GR21(\regs)
 204        STREG %r22, PT_GR22(\regs)
 205        STREG %r23, PT_GR23(\regs)
 206        STREG %r24, PT_GR24(\regs)
 207        STREG %r25, PT_GR25(\regs)
 208        /* r26 is saved in get_stack and used to preserve a value across virt_map */
 209        STREG %r27, PT_GR27(\regs)
 210        STREG %r28, PT_GR28(\regs)
 211        /* r29 is saved in get_stack and used to point to saved registers */
 212        /* r30 stack pointer saved in get_stack */
 213        STREG %r31, PT_GR31(\regs)
 214        .endm
 215
 216        .macro  rest_general    regs
 217        /* r1 used as a temp in rest_stack and is restored there */
 218        LDREG PT_GR2 (\regs), %r2
 219        LDREG PT_GR3 (\regs), %r3
 220        LDREG PT_GR4 (\regs), %r4
 221        LDREG PT_GR5 (\regs), %r5
 222        LDREG PT_GR6 (\regs), %r6
 223        LDREG PT_GR7 (\regs), %r7
 224        LDREG PT_GR8 (\regs), %r8
 225        LDREG PT_GR9 (\regs), %r9
 226        LDREG PT_GR10(\regs), %r10
 227        LDREG PT_GR11(\regs), %r11
 228        LDREG PT_GR12(\regs), %r12
 229        LDREG PT_GR13(\regs), %r13
 230        LDREG PT_GR14(\regs), %r14
 231        LDREG PT_GR15(\regs), %r15
 232        LDREG PT_GR16(\regs), %r16
 233        LDREG PT_GR17(\regs), %r17
 234        LDREG PT_GR18(\regs), %r18
 235        LDREG PT_GR19(\regs), %r19
 236        LDREG PT_GR20(\regs), %r20
 237        LDREG PT_GR21(\regs), %r21
 238        LDREG PT_GR22(\regs), %r22
 239        LDREG PT_GR23(\regs), %r23
 240        LDREG PT_GR24(\regs), %r24
 241        LDREG PT_GR25(\regs), %r25
 242        LDREG PT_GR26(\regs), %r26
 243        LDREG PT_GR27(\regs), %r27
 244        LDREG PT_GR28(\regs), %r28
 245        /* r29 points to register save area, and is restored in rest_stack */
 246        /* r30 stack pointer restored in rest_stack */
 247        LDREG PT_GR31(\regs), %r31
 248        .endm
 249
 250        .macro  save_fp         regs
 251        fstd,ma  %fr0, 8(\regs)
 252        fstd,ma  %fr1, 8(\regs)
 253        fstd,ma  %fr2, 8(\regs)
 254        fstd,ma  %fr3, 8(\regs)
 255        fstd,ma  %fr4, 8(\regs)
 256        fstd,ma  %fr5, 8(\regs)
 257        fstd,ma  %fr6, 8(\regs)
 258        fstd,ma  %fr7, 8(\regs)
 259        fstd,ma  %fr8, 8(\regs)
 260        fstd,ma  %fr9, 8(\regs)
 261        fstd,ma %fr10, 8(\regs)
 262        fstd,ma %fr11, 8(\regs)
 263        fstd,ma %fr12, 8(\regs)
 264        fstd,ma %fr13, 8(\regs)
 265        fstd,ma %fr14, 8(\regs)
 266        fstd,ma %fr15, 8(\regs)
 267        fstd,ma %fr16, 8(\regs)
 268        fstd,ma %fr17, 8(\regs)
 269        fstd,ma %fr18, 8(\regs)
 270        fstd,ma %fr19, 8(\regs)
 271        fstd,ma %fr20, 8(\regs)
 272        fstd,ma %fr21, 8(\regs)
 273        fstd,ma %fr22, 8(\regs)
 274        fstd,ma %fr23, 8(\regs)
 275        fstd,ma %fr24, 8(\regs)
 276        fstd,ma %fr25, 8(\regs)
 277        fstd,ma %fr26, 8(\regs)
 278        fstd,ma %fr27, 8(\regs)
 279        fstd,ma %fr28, 8(\regs)
 280        fstd,ma %fr29, 8(\regs)
 281        fstd,ma %fr30, 8(\regs)
 282        fstd    %fr31, 0(\regs)
 283        .endm
 284
 285        .macro  rest_fp         regs
 286        fldd    0(\regs),        %fr31
 287        fldd,mb -8(\regs),       %fr30
 288        fldd,mb -8(\regs),       %fr29
 289        fldd,mb -8(\regs),       %fr28
 290        fldd,mb -8(\regs),       %fr27
 291        fldd,mb -8(\regs),       %fr26
 292        fldd,mb -8(\regs),       %fr25
 293        fldd,mb -8(\regs),       %fr24
 294        fldd,mb -8(\regs),       %fr23
 295        fldd,mb -8(\regs),       %fr22
 296        fldd,mb -8(\regs),       %fr21
 297        fldd,mb -8(\regs),       %fr20
 298        fldd,mb -8(\regs),       %fr19
 299        fldd,mb -8(\regs),       %fr18
 300        fldd,mb -8(\regs),       %fr17
 301        fldd,mb -8(\regs),       %fr16
 302        fldd,mb -8(\regs),       %fr15
 303        fldd,mb -8(\regs),       %fr14
 304        fldd,mb -8(\regs),       %fr13
 305        fldd,mb -8(\regs),       %fr12
 306        fldd,mb -8(\regs),       %fr11
 307        fldd,mb -8(\regs),       %fr10
 308        fldd,mb -8(\regs),       %fr9
 309        fldd,mb -8(\regs),       %fr8
 310        fldd,mb -8(\regs),       %fr7
 311        fldd,mb -8(\regs),       %fr6
 312        fldd,mb -8(\regs),       %fr5
 313        fldd,mb -8(\regs),       %fr4
 314        fldd,mb -8(\regs),       %fr3
 315        fldd,mb -8(\regs),       %fr2
 316        fldd,mb -8(\regs),       %fr1
 317        fldd,mb -8(\regs),       %fr0
 318        .endm
 319
 320        .macro  callee_save_float
 321        fstd,ma  %fr12, 8(%r30)
 322        fstd,ma  %fr13, 8(%r30)
 323        fstd,ma  %fr14, 8(%r30)
 324        fstd,ma  %fr15, 8(%r30)
 325        fstd,ma  %fr16, 8(%r30)
 326        fstd,ma  %fr17, 8(%r30)
 327        fstd,ma  %fr18, 8(%r30)
 328        fstd,ma  %fr19, 8(%r30)
 329        fstd,ma  %fr20, 8(%r30)
 330        fstd,ma  %fr21, 8(%r30)
 331        .endm
 332
 333        .macro  callee_rest_float
 334        fldd,mb -8(%r30),   %fr21
 335        fldd,mb -8(%r30),   %fr20
 336        fldd,mb -8(%r30),   %fr19
 337        fldd,mb -8(%r30),   %fr18
 338        fldd,mb -8(%r30),   %fr17
 339        fldd,mb -8(%r30),   %fr16
 340        fldd,mb -8(%r30),   %fr15
 341        fldd,mb -8(%r30),   %fr14
 342        fldd,mb -8(%r30),   %fr13
 343        fldd,mb -8(%r30),   %fr12
 344        .endm
 345
 346#ifdef CONFIG_64BIT
 347        .macro  callee_save
 348        std,ma    %r3,   CALLEE_REG_FRAME_SIZE(%r30)
 349        mfctl     %cr27, %r3
 350        std       %r4,  -136(%r30)
 351        std       %r5,  -128(%r30)
 352        std       %r6,  -120(%r30)
 353        std       %r7,  -112(%r30)
 354        std       %r8,  -104(%r30)
 355        std       %r9,   -96(%r30)
 356        std      %r10,   -88(%r30)
 357        std      %r11,   -80(%r30)
 358        std      %r12,   -72(%r30)
 359        std      %r13,   -64(%r30)
 360        std      %r14,   -56(%r30)
 361        std      %r15,   -48(%r30)
 362        std      %r16,   -40(%r30)
 363        std      %r17,   -32(%r30)
 364        std      %r18,   -24(%r30)
 365        std       %r3,   -16(%r30)
 366        .endm
 367
 368        .macro  callee_rest
 369        ldd      -16(%r30),    %r3
 370        ldd      -24(%r30),   %r18
 371        ldd      -32(%r30),   %r17
 372        ldd      -40(%r30),   %r16
 373        ldd      -48(%r30),   %r15
 374        ldd      -56(%r30),   %r14
 375        ldd      -64(%r30),   %r13
 376        ldd      -72(%r30),   %r12
 377        ldd      -80(%r30),   %r11
 378        ldd      -88(%r30),   %r10
 379        ldd      -96(%r30),    %r9
 380        ldd     -104(%r30),    %r8
 381        ldd     -112(%r30),    %r7
 382        ldd     -120(%r30),    %r6
 383        ldd     -128(%r30),    %r5
 384        ldd     -136(%r30),    %r4
 385        mtctl   %r3, %cr27
 386        ldd,mb  -CALLEE_REG_FRAME_SIZE(%r30),    %r3
 387        .endm
 388
 389#else /* ! CONFIG_64BIT */
 390
 391        .macro  callee_save
 392        stw,ma   %r3,   CALLEE_REG_FRAME_SIZE(%r30)
 393        mfctl    %cr27, %r3
 394        stw      %r4,   -124(%r30)
 395        stw      %r5,   -120(%r30)
 396        stw      %r6,   -116(%r30)
 397        stw      %r7,   -112(%r30)
 398        stw      %r8,   -108(%r30)
 399        stw      %r9,   -104(%r30)
 400        stw      %r10,  -100(%r30)
 401        stw      %r11,   -96(%r30)
 402        stw      %r12,   -92(%r30)
 403        stw      %r13,   -88(%r30)
 404        stw      %r14,   -84(%r30)
 405        stw      %r15,   -80(%r30)
 406        stw      %r16,   -76(%r30)
 407        stw      %r17,   -72(%r30)
 408        stw      %r18,   -68(%r30)
 409        stw       %r3,   -64(%r30)
 410        .endm
 411
 412        .macro  callee_rest
 413        ldw      -64(%r30),    %r3
 414        ldw      -68(%r30),   %r18
 415        ldw      -72(%r30),   %r17
 416        ldw      -76(%r30),   %r16
 417        ldw      -80(%r30),   %r15
 418        ldw      -84(%r30),   %r14
 419        ldw      -88(%r30),   %r13
 420        ldw      -92(%r30),   %r12
 421        ldw      -96(%r30),   %r11
 422        ldw     -100(%r30),   %r10
 423        ldw     -104(%r30),   %r9
 424        ldw     -108(%r30),   %r8
 425        ldw     -112(%r30),   %r7
 426        ldw     -116(%r30),   %r6
 427        ldw     -120(%r30),   %r5
 428        ldw     -124(%r30),   %r4
 429        mtctl   %r3, %cr27
 430        ldw,mb  -CALLEE_REG_FRAME_SIZE(%r30),   %r3
 431        .endm
 432#endif /* ! CONFIG_64BIT */
 433
 434        .macro  save_specials   regs
 435
 436        SAVE_SP  (%sr0, PT_SR0 (\regs))
 437        SAVE_SP  (%sr1, PT_SR1 (\regs))
 438        SAVE_SP  (%sr2, PT_SR2 (\regs))
 439        SAVE_SP  (%sr3, PT_SR3 (\regs))
 440        SAVE_SP  (%sr4, PT_SR4 (\regs))
 441        SAVE_SP  (%sr5, PT_SR5 (\regs))
 442        SAVE_SP  (%sr6, PT_SR6 (\regs))
 443
 444        SAVE_CR  (%cr17, PT_IASQ0(\regs))
 445        mtctl    %r0,   %cr17
 446        SAVE_CR  (%cr17, PT_IASQ1(\regs))
 447
 448        SAVE_CR  (%cr18, PT_IAOQ0(\regs))
 449        mtctl    %r0,   %cr18
 450        SAVE_CR  (%cr18, PT_IAOQ1(\regs))
 451
 452#ifdef CONFIG_64BIT
 453        /* cr11 (sar) is a funny one.  5 bits on PA1.1 and 6 bit on PA2.0
 454         * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
 455         * reads 5 bits.  Use mfctl,w to read all six bits.  Otherwise
 456         * we lose the 6th bit on a save/restore over interrupt.
 457         */
 458        mfctl,w  %cr11, %r1
 459        STREG    %r1, PT_SAR (\regs)
 460#else
 461        SAVE_CR  (%cr11, PT_SAR  (\regs))
 462#endif
 463        SAVE_CR  (%cr19, PT_IIR  (\regs))
 464
 465        /*
 466         * Code immediately following this macro (in intr_save) relies
 467         * on r8 containing ipsw.
 468         */
 469        mfctl    %cr22, %r8
 470        STREG    %r8,   PT_PSW(\regs)
 471        .endm
 472
 473        .macro  rest_specials   regs
 474
 475        REST_SP  (%sr0, PT_SR0 (\regs))
 476        REST_SP  (%sr1, PT_SR1 (\regs))
 477        REST_SP  (%sr2, PT_SR2 (\regs))
 478        REST_SP  (%sr3, PT_SR3 (\regs))
 479        REST_SP  (%sr4, PT_SR4 (\regs))
 480        REST_SP  (%sr5, PT_SR5 (\regs))
 481        REST_SP  (%sr6, PT_SR6 (\regs))
 482        REST_SP  (%sr7, PT_SR7 (\regs))
 483
 484        REST_CR (%cr17, PT_IASQ0(\regs))
 485        REST_CR (%cr17, PT_IASQ1(\regs))
 486
 487        REST_CR (%cr18, PT_IAOQ0(\regs))
 488        REST_CR (%cr18, PT_IAOQ1(\regs))
 489
 490        REST_CR (%cr11, PT_SAR  (\regs))
 491
 492        REST_CR (%cr22, PT_PSW  (\regs))
 493        .endm
 494
 495
 496        /* First step to create a "relied upon translation"
 497         * See PA 2.0 Arch. page F-4 and F-5.
 498         *
 499         * The ssm was originally necessary due to a "PCxT bug".
 500         * But someone decided it needed to be added to the architecture
 501         * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
 502         * It's been carried forward into PA 2.0 Arch as well. :^(
 503         *
 504         * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
 505         * rsm/ssm prevents the ifetch unit from speculatively fetching
 506         * instructions past this line in the code stream.
 507         * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
 508         */
 509        .macro  pcxt_ssm_bug
 510        rsm     PSW_SM_I,%r0
 511        nop     /* 1 */
 512        nop     /* 2 */
 513        nop     /* 3 */
 514        nop     /* 4 */
 515        nop     /* 5 */
 516        nop     /* 6 */
 517        nop     /* 7 */
 518        .endm
 519
 520        /*
 521         * ASM_EXCEPTIONTABLE_ENTRY
 522         *
 523         * Creates an exception table entry.
 524         * Do not convert to a assembler macro. This won't work.
 525         */
 526#define ASM_EXCEPTIONTABLE_ENTRY(fault_addr, except_addr)       \
 527        .section __ex_table,"aw"                        !       \
 528        .word (fault_addr - .), (except_addr - .)       !       \
 529        .previous
 530
 531
 532#endif /* __ASSEMBLY__ */
 533#endif
 534