1/* 2 * Copyright 2012 STEC, Inc. 3 * Copyright (c) 2017 Western Digital Corporation or its affiliates. 4 * 5 * This file is part of the Linux kernel, and is made available under 6 * the terms of the GNU General Public License version 2. 7 */ 8 9 10#ifndef SKD_S1120_H 11#define SKD_S1120_H 12 13/* 14 * Q-channel, 64-bit r/w 15 */ 16#define FIT_Q_COMMAND 0x400u 17#define FIT_QCMD_QID_MASK (0x3 << 1) 18#define FIT_QCMD_QID0 (0x0 << 1) 19#define FIT_QCMD_QID_NORMAL FIT_QCMD_QID0 20#define FIT_QCMD_QID1 (0x1 << 1) 21#define FIT_QCMD_QID2 (0x2 << 1) 22#define FIT_QCMD_QID3 (0x3 << 1) 23#define FIT_QCMD_FLUSH_QUEUE (0ull) /* add QID */ 24#define FIT_QCMD_MSGSIZE_MASK (0x3 << 4) 25#define FIT_QCMD_MSGSIZE_64 (0x0 << 4) 26#define FIT_QCMD_MSGSIZE_128 (0x1 << 4) 27#define FIT_QCMD_MSGSIZE_256 (0x2 << 4) 28#define FIT_QCMD_MSGSIZE_512 (0x3 << 4) 29#define FIT_QCMD_ALIGN L1_CACHE_BYTES 30 31/* 32 * Control, 32-bit r/w 33 */ 34#define FIT_CONTROL 0x500u 35#define FIT_CR_HARD_RESET (1u << 0u) 36#define FIT_CR_SOFT_RESET (1u << 1u) 37#define FIT_CR_DIS_TIMESTAMPS (1u << 6u) 38#define FIT_CR_ENABLE_INTERRUPTS (1u << 7u) 39 40/* 41 * Status, 32-bit, r/o 42 */ 43#define FIT_STATUS 0x510u 44#define FIT_SR_DRIVE_STATE_MASK 0x000000FFu 45#define FIT_SR_SIGNATURE (0xFF << 8) 46#define FIT_SR_PIO_DMA (1 << 16) 47#define FIT_SR_DRIVE_OFFLINE 0x00 48#define FIT_SR_DRIVE_INIT 0x01 49/* #define FIT_SR_DRIVE_READY 0x02 */ 50#define FIT_SR_DRIVE_ONLINE 0x03 51#define FIT_SR_DRIVE_BUSY 0x04 52#define FIT_SR_DRIVE_FAULT 0x05 53#define FIT_SR_DRIVE_DEGRADED 0x06 54#define FIT_SR_PCIE_LINK_DOWN 0x07 55#define FIT_SR_DRIVE_SOFT_RESET 0x08 56#define FIT_SR_DRIVE_INIT_FAULT 0x09 57#define FIT_SR_DRIVE_BUSY_SANITIZE 0x0A 58#define FIT_SR_DRIVE_BUSY_ERASE 0x0B 59#define FIT_SR_DRIVE_FW_BOOTING 0x0C 60#define FIT_SR_DRIVE_NEED_FW_DOWNLOAD 0xFE 61#define FIT_SR_DEVICE_MISSING 0xFF 62#define FIT_SR__RESERVED 0xFFFFFF00u 63 64/* 65 * FIT_STATUS - Status register data definition 66 */ 67#define FIT_SR_STATE_MASK (0xFF << 0) 68#define FIT_SR_SIGNATURE (0xFF << 8) 69#define FIT_SR_PIO_DMA (1 << 16) 70 71/* 72 * Interrupt status, 32-bit r/w1c (w1c ==> write 1 to clear) 73 */ 74#define FIT_INT_STATUS_HOST 0x520u 75#define FIT_ISH_FW_STATE_CHANGE (1u << 0u) 76#define FIT_ISH_COMPLETION_POSTED (1u << 1u) 77#define FIT_ISH_MSG_FROM_DEV (1u << 2u) 78#define FIT_ISH_UNDEFINED_3 (1u << 3u) 79#define FIT_ISH_UNDEFINED_4 (1u << 4u) 80#define FIT_ISH_Q0_FULL (1u << 5u) 81#define FIT_ISH_Q1_FULL (1u << 6u) 82#define FIT_ISH_Q2_FULL (1u << 7u) 83#define FIT_ISH_Q3_FULL (1u << 8u) 84#define FIT_ISH_QCMD_FIFO_OVERRUN (1u << 9u) 85#define FIT_ISH_BAD_EXP_ROM_READ (1u << 10u) 86 87#define FIT_INT_DEF_MASK \ 88 (FIT_ISH_FW_STATE_CHANGE | \ 89 FIT_ISH_COMPLETION_POSTED | \ 90 FIT_ISH_MSG_FROM_DEV | \ 91 FIT_ISH_Q0_FULL | \ 92 FIT_ISH_Q1_FULL | \ 93 FIT_ISH_Q2_FULL | \ 94 FIT_ISH_Q3_FULL | \ 95 FIT_ISH_QCMD_FIFO_OVERRUN | \ 96 FIT_ISH_BAD_EXP_ROM_READ) 97 98#define FIT_INT_QUEUE_FULL \ 99 (FIT_ISH_Q0_FULL | \ 100 FIT_ISH_Q1_FULL | \ 101 FIT_ISH_Q2_FULL | \ 102 FIT_ISH_Q3_FULL) 103 104#define MSI_MSG_NWL_ERROR_0 0x00000000 105#define MSI_MSG_NWL_ERROR_1 0x00000001 106#define MSI_MSG_NWL_ERROR_2 0x00000002 107#define MSI_MSG_NWL_ERROR_3 0x00000003 108#define MSI_MSG_STATE_CHANGE 0x00000004 109#define MSI_MSG_COMPLETION_POSTED 0x00000005 110#define MSI_MSG_MSG_FROM_DEV 0x00000006 111#define MSI_MSG_RESERVED_0 0x00000007 112#define MSI_MSG_RESERVED_1 0x00000008 113#define MSI_MSG_QUEUE_0_FULL 0x00000009 114#define MSI_MSG_QUEUE_1_FULL 0x0000000A 115#define MSI_MSG_QUEUE_2_FULL 0x0000000B 116#define MSI_MSG_QUEUE_3_FULL 0x0000000C 117 118#define FIT_INT_RESERVED_MASK \ 119 (FIT_ISH_UNDEFINED_3 | \ 120 FIT_ISH_UNDEFINED_4) 121 122/* 123 * Interrupt mask, 32-bit r/w 124 * Bit definitions are the same as FIT_INT_STATUS_HOST 125 */ 126#define FIT_INT_MASK_HOST 0x528u 127 128/* 129 * Message to device, 32-bit r/w 130 */ 131#define FIT_MSG_TO_DEVICE 0x540u 132 133/* 134 * Message from device, 32-bit, r/o 135 */ 136#define FIT_MSG_FROM_DEVICE 0x548u 137 138/* 139 * 32-bit messages to/from device, composition/extraction macros 140 */ 141#define FIT_MXD_CONS(TYPE, PARAM, DATA) \ 142 ((((TYPE) & 0xFFu) << 24u) | \ 143 (((PARAM) & 0xFFu) << 16u) | \ 144 (((DATA) & 0xFFFFu) << 0u)) 145#define FIT_MXD_TYPE(MXD) (((MXD) >> 24u) & 0xFFu) 146#define FIT_MXD_PARAM(MXD) (((MXD) >> 16u) & 0xFFu) 147#define FIT_MXD_DATA(MXD) (((MXD) >> 0u) & 0xFFFFu) 148 149/* 150 * Types of messages to/from device 151 */ 152#define FIT_MTD_FITFW_INIT 0x01u 153#define FIT_MTD_GET_CMDQ_DEPTH 0x02u 154#define FIT_MTD_SET_COMPQ_DEPTH 0x03u 155#define FIT_MTD_SET_COMPQ_ADDR 0x04u 156#define FIT_MTD_ARM_QUEUE 0x05u 157#define FIT_MTD_CMD_LOG_HOST_ID 0x07u 158#define FIT_MTD_CMD_LOG_TIME_STAMP_LO 0x08u 159#define FIT_MTD_CMD_LOG_TIME_STAMP_HI 0x09u 160#define FIT_MFD_SMART_EXCEEDED 0x10u 161#define FIT_MFD_POWER_DOWN 0x11u 162#define FIT_MFD_OFFLINE 0x12u 163#define FIT_MFD_ONLINE 0x13u 164#define FIT_MFD_FW_RESTARTING 0x14u 165#define FIT_MFD_PM_ACTIVE 0x15u 166#define FIT_MFD_PM_STANDBY 0x16u 167#define FIT_MFD_PM_SLEEP 0x17u 168#define FIT_MFD_CMD_PROGRESS 0x18u 169 170#define FIT_MTD_DEBUG 0xFEu 171#define FIT_MFD_DEBUG 0xFFu 172 173#define FIT_MFD_MASK (0xFFu) 174#define FIT_MFD_DATA_MASK (0xFFu) 175#define FIT_MFD_MSG(x) (((x) >> 24) & FIT_MFD_MASK) 176#define FIT_MFD_DATA(x) ((x) & FIT_MFD_MASK) 177 178/* 179 * Extra arg to FIT_MSG_TO_DEVICE, 64-bit r/w 180 * Used to set completion queue address (FIT_MTD_SET_COMPQ_ADDR) 181 * (was Response buffer in docs) 182 */ 183#define FIT_MSG_TO_DEVICE_ARG 0x580u 184 185/* 186 * Hardware (ASIC) version, 32-bit r/o 187 */ 188#define FIT_HW_VERSION 0x588u 189 190/* 191 * Scatter/gather list descriptor. 192 * 32-bytes and must be aligned on a 32-byte boundary. 193 * All fields are in little endian order. 194 */ 195struct fit_sg_descriptor { 196 uint32_t control; 197 uint32_t byte_count; 198 uint64_t host_side_addr; 199 uint64_t dev_side_addr; 200 uint64_t next_desc_ptr; 201}; 202 203#define FIT_SGD_CONTROL_NOT_LAST 0x000u 204#define FIT_SGD_CONTROL_LAST 0x40Eu 205 206/* 207 * Header at the beginning of a FIT message. The header 208 * is followed by SSDI requests each 64 bytes. 209 * A FIT message can be up to 512 bytes long and must start 210 * on a 64-byte boundary. 211 */ 212struct fit_msg_hdr { 213 uint8_t protocol_id; 214 uint8_t num_protocol_cmds_coalesced; 215 uint8_t _reserved[62]; 216}; 217 218#define FIT_PROTOCOL_ID_FIT 1 219#define FIT_PROTOCOL_ID_SSDI 2 220#define FIT_PROTOCOL_ID_SOFIT 3 221 222 223#define FIT_PROTOCOL_MINOR_VER(mtd_val) ((mtd_val >> 16) & 0xF) 224#define FIT_PROTOCOL_MAJOR_VER(mtd_val) ((mtd_val >> 20) & 0xF) 225 226/* 227 * Format of a completion entry. The completion queue is circular 228 * and must have at least as many entries as the maximum number 229 * of commands that may be issued to the device. 230 * 231 * There are no head/tail pointers. The cycle value is used to 232 * infer the presence of new completion records. 233 * Initially the cycle in all entries is 0, the index is 0, and 234 * the cycle value to expect is 1. When completions are added 235 * their cycle values are set to 1. When the index wraps the 236 * cycle value to expect is incremented. 237 * 238 * Command_context is opaque and taken verbatim from the SSDI command. 239 * All other fields are big endian. 240 */ 241#define FIT_PROTOCOL_VERSION_0 0 242 243/* 244 * Protocol major version 1 completion entry. 245 * The major protocol version is found in bits 246 * 20-23 of the FIT_MTD_FITFW_INIT response. 247 */ 248struct fit_completion_entry_v1 { 249 __be32 num_returned_bytes; 250 uint16_t tag; 251 uint8_t status; /* SCSI status */ 252 uint8_t cycle; 253}; 254#define FIT_PROTOCOL_VERSION_1 1 255#define FIT_PROTOCOL_VERSION_CURRENT FIT_PROTOCOL_VERSION_1 256 257struct fit_comp_error_info { 258 uint8_t type:7; /* 00: Bits0-6 indicates the type of sense data. */ 259 uint8_t valid:1; /* 00: Bit 7 := 1 ==> info field is valid. */ 260 uint8_t reserved0; /* 01: Obsolete field */ 261 uint8_t key:4; /* 02: Bits0-3 indicate the sense key. */ 262 uint8_t reserved2:1; /* 02: Reserved bit. */ 263 uint8_t bad_length:1; /* 02: Incorrect Length Indicator */ 264 uint8_t end_medium:1; /* 02: End of Medium */ 265 uint8_t file_mark:1; /* 02: Filemark */ 266 uint8_t info[4]; /* 03: */ 267 uint8_t reserved1; /* 07: Additional Sense Length */ 268 uint8_t cmd_spec[4]; /* 08: Command Specific Information */ 269 uint8_t code; /* 0C: Additional Sense Code */ 270 uint8_t qual; /* 0D: Additional Sense Code Qualifier */ 271 uint8_t fruc; /* 0E: Field Replaceable Unit Code */ 272 uint8_t sks_high:7; /* 0F: Sense Key Specific (MSB) */ 273 uint8_t sks_valid:1; /* 0F: Sense Key Specific Valid */ 274 uint16_t sks_low; /* 10: Sense Key Specific (LSW) */ 275 uint16_t reserved3; /* 12: Part of additional sense bytes (unused) */ 276 uint16_t uec; /* 14: Additional Sense Bytes */ 277 uint64_t per __packed; /* 16: Additional Sense Bytes */ 278 uint8_t reserved4[2]; /* 1E: Additional Sense Bytes (unused) */ 279}; 280 281 282/* Task management constants */ 283#define SOFT_TASK_SIMPLE 0x00 284#define SOFT_TASK_HEAD_OF_QUEUE 0x01 285#define SOFT_TASK_ORDERED 0x02 286 287/* Version zero has the last 32 bits reserved, 288 * Version one has the last 32 bits sg_list_len_bytes; 289 */ 290struct skd_command_header { 291 __be64 sg_list_dma_address; 292 uint16_t tag; 293 uint8_t attribute; 294 uint8_t add_cdb_len; /* In 32 bit words */ 295 __be32 sg_list_len_bytes; 296}; 297 298struct skd_scsi_request { 299 struct skd_command_header hdr; 300 unsigned char cdb[16]; 301/* unsigned char _reserved[16]; */ 302}; 303 304struct driver_inquiry_data { 305 uint8_t peripheral_device_type:5; 306 uint8_t qualifier:3; 307 uint8_t page_code; 308 __be16 page_length; 309 __be16 pcie_bus_number; 310 uint8_t pcie_device_number; 311 uint8_t pcie_function_number; 312 uint8_t pcie_link_speed; 313 uint8_t pcie_link_lanes; 314 __be16 pcie_vendor_id; 315 __be16 pcie_device_id; 316 __be16 pcie_subsystem_vendor_id; 317 __be16 pcie_subsystem_device_id; 318 uint8_t reserved1[2]; 319 uint8_t reserved2[3]; 320 uint8_t driver_version_length; 321 uint8_t driver_version[0x14]; 322}; 323 324#endif /* SKD_S1120_H */ 325