linux/drivers/clk/clk-si514.c
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   1/*
   2 * Driver for Silicon Labs Si514 Programmable Oscillator
   3 *
   4 * Copyright (C) 2015 Topic Embedded Products
   5 *
   6 * Author: Mike Looijmans <mike.looijmans@topic.nl>
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 */
  18
  19#include <linux/clk-provider.h>
  20#include <linux/delay.h>
  21#include <linux/module.h>
  22#include <linux/i2c.h>
  23#include <linux/regmap.h>
  24#include <linux/slab.h>
  25
  26/* I2C registers */
  27#define SI514_REG_LP            0
  28#define SI514_REG_M_FRAC1       5
  29#define SI514_REG_M_FRAC2       6
  30#define SI514_REG_M_FRAC3       7
  31#define SI514_REG_M_INT_FRAC    8
  32#define SI514_REG_M_INT         9
  33#define SI514_REG_HS_DIV        10
  34#define SI514_REG_LS_HS_DIV     11
  35#define SI514_REG_OE_STATE      14
  36#define SI514_REG_RESET         128
  37#define SI514_REG_CONTROL       132
  38
  39/* Register values */
  40#define SI514_RESET_RST         BIT(7)
  41
  42#define SI514_CONTROL_FCAL      BIT(0)
  43#define SI514_CONTROL_OE        BIT(2)
  44
  45#define SI514_MIN_FREQ      100000U
  46#define SI514_MAX_FREQ   250000000U
  47
  48#define FXO               31980000U
  49
  50#define FVCO_MIN        2080000000U
  51#define FVCO_MAX        2500000000U
  52
  53#define HS_DIV_MAX      1022
  54
  55struct clk_si514 {
  56        struct clk_hw hw;
  57        struct regmap *regmap;
  58        struct i2c_client *i2c_client;
  59};
  60#define to_clk_si514(_hw)       container_of(_hw, struct clk_si514, hw)
  61
  62/* Multiplier/divider settings */
  63struct clk_si514_muldiv {
  64        u32 m_frac;  /* 29-bit Fractional part of multiplier M */
  65        u8 m_int; /* Integer part of multiplier M, 65..78 */
  66        u8 ls_div_bits; /* 2nd divider, as 2^x */
  67        u16 hs_div; /* 1st divider, must be even and 10<=x<=1022 */
  68};
  69
  70/* Enables or disables the output driver */
  71static int si514_enable_output(struct clk_si514 *data, bool enable)
  72{
  73        return regmap_update_bits(data->regmap, SI514_REG_CONTROL,
  74                SI514_CONTROL_OE, enable ? SI514_CONTROL_OE : 0);
  75}
  76
  77static int si514_prepare(struct clk_hw *hw)
  78{
  79        struct clk_si514 *data = to_clk_si514(hw);
  80
  81        return si514_enable_output(data, true);
  82}
  83
  84static void si514_unprepare(struct clk_hw *hw)
  85{
  86        struct clk_si514 *data = to_clk_si514(hw);
  87
  88        si514_enable_output(data, false);
  89}
  90
  91static int si514_is_prepared(struct clk_hw *hw)
  92{
  93        struct clk_si514 *data = to_clk_si514(hw);
  94        unsigned int val;
  95        int err;
  96
  97        err = regmap_read(data->regmap, SI514_REG_CONTROL, &val);
  98        if (err < 0)
  99                return err;
 100
 101        return !!(val & SI514_CONTROL_OE);
 102}
 103
 104/* Retrieve clock multiplier and dividers from hardware */
 105static int si514_get_muldiv(struct clk_si514 *data,
 106        struct clk_si514_muldiv *settings)
 107{
 108        int err;
 109        u8 reg[7];
 110
 111        err = regmap_bulk_read(data->regmap, SI514_REG_M_FRAC1,
 112                        reg, ARRAY_SIZE(reg));
 113        if (err)
 114                return err;
 115
 116        settings->m_frac = reg[0] | reg[1] << 8 | reg[2] << 16 |
 117                           (reg[3] & 0x1F) << 24;
 118        settings->m_int = (reg[4] & 0x3f) << 3 | reg[3] >> 5;
 119        settings->ls_div_bits = (reg[6] >> 4) & 0x07;
 120        settings->hs_div = (reg[6] & 0x03) << 8 | reg[5];
 121        return 0;
 122}
 123
 124static int si514_set_muldiv(struct clk_si514 *data,
 125        struct clk_si514_muldiv *settings)
 126{
 127        u8 lp;
 128        u8 reg[7];
 129        int err;
 130
 131        /* Calculate LP1/LP2 according to table 13 in the datasheet */
 132        /* 65.259980246 */
 133        if (settings->m_int < 65 ||
 134                (settings->m_int == 65 && settings->m_frac <= 139575831))
 135                lp = 0x22;
 136        /* 67.859763463 */
 137        else if (settings->m_int < 67 ||
 138                (settings->m_int == 67 && settings->m_frac <= 461581994))
 139                lp = 0x23;
 140        /* 72.937624981 */
 141        else if (settings->m_int < 72 ||
 142                (settings->m_int == 72 && settings->m_frac <= 503383578))
 143                lp = 0x33;
 144        /* 75.843265046 */
 145        else if (settings->m_int < 75 ||
 146                (settings->m_int == 75 && settings->m_frac <= 452724474))
 147                lp = 0x34;
 148        else
 149                lp = 0x44;
 150
 151        err = regmap_write(data->regmap, SI514_REG_LP, lp);
 152        if (err < 0)
 153                return err;
 154
 155        reg[0] = settings->m_frac;
 156        reg[1] = settings->m_frac >> 8;
 157        reg[2] = settings->m_frac >> 16;
 158        reg[3] = settings->m_frac >> 24 | settings->m_int << 5;
 159        reg[4] = settings->m_int >> 3;
 160        reg[5] = settings->hs_div;
 161        reg[6] = (settings->hs_div >> 8) | (settings->ls_div_bits << 4);
 162
 163        err = regmap_bulk_write(data->regmap, SI514_REG_HS_DIV, reg + 5, 2);
 164        if (err < 0)
 165                return err;
 166        /*
 167         * Writing to SI514_REG_M_INT_FRAC triggers the clock change, so that
 168         * must be written last
 169         */
 170        return regmap_bulk_write(data->regmap, SI514_REG_M_FRAC1, reg, 5);
 171}
 172
 173/* Calculate divider settings for a given frequency */
 174static int si514_calc_muldiv(struct clk_si514_muldiv *settings,
 175        unsigned long frequency)
 176{
 177        u64 m;
 178        u32 ls_freq;
 179        u32 tmp;
 180        u8 res;
 181
 182        if ((frequency < SI514_MIN_FREQ) || (frequency > SI514_MAX_FREQ))
 183                return -EINVAL;
 184
 185        /* Determine the minimum value of LS_DIV and resulting target freq. */
 186        ls_freq = frequency;
 187        if (frequency >= (FVCO_MIN / HS_DIV_MAX))
 188                settings->ls_div_bits = 0;
 189        else {
 190                res = 1;
 191                tmp = 2 * HS_DIV_MAX;
 192                while (tmp <= (HS_DIV_MAX * 32)) {
 193                        if ((frequency * tmp) >= FVCO_MIN)
 194                                break;
 195                        ++res;
 196                        tmp <<= 1;
 197                }
 198                settings->ls_div_bits = res;
 199                ls_freq = frequency << res;
 200        }
 201
 202        /* Determine minimum HS_DIV, round up to even number */
 203        settings->hs_div = DIV_ROUND_UP(FVCO_MIN >> 1, ls_freq) << 1;
 204
 205        /* M = LS_DIV x HS_DIV x frequency / F_XO (in fixed-point) */
 206        m = ((u64)(ls_freq * settings->hs_div) << 29) + (FXO / 2);
 207        do_div(m, FXO);
 208        settings->m_frac = (u32)m & (BIT(29) - 1);
 209        settings->m_int = (u32)(m >> 29);
 210
 211        return 0;
 212}
 213
 214/* Calculate resulting frequency given the register settings */
 215static unsigned long si514_calc_rate(struct clk_si514_muldiv *settings)
 216{
 217        u64 m = settings->m_frac | ((u64)settings->m_int << 29);
 218        u32 d = settings->hs_div * BIT(settings->ls_div_bits);
 219
 220        return ((u32)(((m * FXO) + (FXO / 2)) >> 29)) / d;
 221}
 222
 223static unsigned long si514_recalc_rate(struct clk_hw *hw,
 224                unsigned long parent_rate)
 225{
 226        struct clk_si514 *data = to_clk_si514(hw);
 227        struct clk_si514_muldiv settings;
 228        int err;
 229
 230        err = si514_get_muldiv(data, &settings);
 231        if (err) {
 232                dev_err(&data->i2c_client->dev, "unable to retrieve settings\n");
 233                return 0;
 234        }
 235
 236        return si514_calc_rate(&settings);
 237}
 238
 239static long si514_round_rate(struct clk_hw *hw, unsigned long rate,
 240                unsigned long *parent_rate)
 241{
 242        struct clk_si514_muldiv settings;
 243        int err;
 244
 245        if (!rate)
 246                return 0;
 247
 248        err = si514_calc_muldiv(&settings, rate);
 249        if (err)
 250                return err;
 251
 252        return si514_calc_rate(&settings);
 253}
 254
 255/*
 256 * Update output frequency for big frequency changes (> 1000 ppm).
 257 * The chip supports <1000ppm changes "on the fly", we haven't implemented
 258 * that here.
 259 */
 260static int si514_set_rate(struct clk_hw *hw, unsigned long rate,
 261                unsigned long parent_rate)
 262{
 263        struct clk_si514 *data = to_clk_si514(hw);
 264        struct clk_si514_muldiv settings;
 265        unsigned int old_oe_state;
 266        int err;
 267
 268        err = si514_calc_muldiv(&settings, rate);
 269        if (err)
 270                return err;
 271
 272        err = regmap_read(data->regmap, SI514_REG_CONTROL, &old_oe_state);
 273        if (err)
 274                return err;
 275
 276        si514_enable_output(data, false);
 277
 278        err = si514_set_muldiv(data, &settings);
 279        if (err < 0)
 280                return err; /* Undefined state now, best to leave disabled */
 281
 282        /* Trigger calibration */
 283        err = regmap_write(data->regmap, SI514_REG_CONTROL, SI514_CONTROL_FCAL);
 284        if (err < 0)
 285                return err;
 286
 287        /* Applying a new frequency can take up to 10ms */
 288        usleep_range(10000, 12000);
 289
 290        if (old_oe_state & SI514_CONTROL_OE)
 291                si514_enable_output(data, true);
 292
 293        return err;
 294}
 295
 296static const struct clk_ops si514_clk_ops = {
 297        .prepare = si514_prepare,
 298        .unprepare = si514_unprepare,
 299        .is_prepared = si514_is_prepared,
 300        .recalc_rate = si514_recalc_rate,
 301        .round_rate = si514_round_rate,
 302        .set_rate = si514_set_rate,
 303};
 304
 305static bool si514_regmap_is_volatile(struct device *dev, unsigned int reg)
 306{
 307        switch (reg) {
 308        case SI514_REG_CONTROL:
 309        case SI514_REG_RESET:
 310                return true;
 311        default:
 312                return false;
 313        }
 314}
 315
 316static bool si514_regmap_is_writeable(struct device *dev, unsigned int reg)
 317{
 318        switch (reg) {
 319        case SI514_REG_LP:
 320        case SI514_REG_M_FRAC1 ... SI514_REG_LS_HS_DIV:
 321        case SI514_REG_OE_STATE:
 322        case SI514_REG_RESET:
 323        case SI514_REG_CONTROL:
 324                return true;
 325        default:
 326                return false;
 327        }
 328}
 329
 330static const struct regmap_config si514_regmap_config = {
 331        .reg_bits = 8,
 332        .val_bits = 8,
 333        .cache_type = REGCACHE_RBTREE,
 334        .max_register = SI514_REG_CONTROL,
 335        .writeable_reg = si514_regmap_is_writeable,
 336        .volatile_reg = si514_regmap_is_volatile,
 337};
 338
 339static int si514_probe(struct i2c_client *client,
 340                const struct i2c_device_id *id)
 341{
 342        struct clk_si514 *data;
 343        struct clk_init_data init;
 344        int err;
 345
 346        data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
 347        if (!data)
 348                return -ENOMEM;
 349
 350        init.ops = &si514_clk_ops;
 351        init.flags = 0;
 352        init.num_parents = 0;
 353        data->hw.init = &init;
 354        data->i2c_client = client;
 355
 356        if (of_property_read_string(client->dev.of_node, "clock-output-names",
 357                        &init.name))
 358                init.name = client->dev.of_node->name;
 359
 360        data->regmap = devm_regmap_init_i2c(client, &si514_regmap_config);
 361        if (IS_ERR(data->regmap)) {
 362                dev_err(&client->dev, "failed to allocate register map\n");
 363                return PTR_ERR(data->regmap);
 364        }
 365
 366        i2c_set_clientdata(client, data);
 367
 368        err = devm_clk_hw_register(&client->dev, &data->hw);
 369        if (err) {
 370                dev_err(&client->dev, "clock registration failed\n");
 371                return err;
 372        }
 373        err = of_clk_add_hw_provider(client->dev.of_node, of_clk_hw_simple_get,
 374                                     &data->hw);
 375        if (err) {
 376                dev_err(&client->dev, "unable to add clk provider\n");
 377                return err;
 378        }
 379
 380        return 0;
 381}
 382
 383static int si514_remove(struct i2c_client *client)
 384{
 385        of_clk_del_provider(client->dev.of_node);
 386        return 0;
 387}
 388
 389static const struct i2c_device_id si514_id[] = {
 390        { "si514", 0 },
 391        { }
 392};
 393MODULE_DEVICE_TABLE(i2c, si514_id);
 394
 395static const struct of_device_id clk_si514_of_match[] = {
 396        { .compatible = "silabs,si514" },
 397        { },
 398};
 399MODULE_DEVICE_TABLE(of, clk_si514_of_match);
 400
 401static struct i2c_driver si514_driver = {
 402        .driver = {
 403                .name = "si514",
 404                .of_match_table = clk_si514_of_match,
 405        },
 406        .probe          = si514_probe,
 407        .remove         = si514_remove,
 408        .id_table       = si514_id,
 409};
 410module_i2c_driver(si514_driver);
 411
 412MODULE_AUTHOR("Mike Looijmans <mike.looijmans@topic.nl>");
 413MODULE_DESCRIPTION("Si514 driver");
 414MODULE_LICENSE("GPL");
 415