LXR linux/drivers/gpu/drm/amd/display/dc/inc/hw

   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DC_HW_SEQUENCER_H__
  27#define __DC_HW_SEQUENCER_H__
  28#include "dc_types.h"
  29#include "clock_source.h"
  30#include "inc/hw/timing_generator.h"
  31#include "inc/hw/opp.h"
  32#include "inc/hw/link_encoder.h"
  33#include "core_status.h"
  34
  35#define EDP_BACKLIGHT_RAMP_DISABLE_LEVEL 0xFFFFFFFF
  36
  37enum pipe_gating_control {
  38        PIPE_GATING_CONTROL_DISABLE = 0,
  39        PIPE_GATING_CONTROL_ENABLE,
  40        PIPE_GATING_CONTROL_INIT
  41};
  42
  43struct dce_hwseq_wa {
  44        bool blnd_crtc_trigger;
  45        bool DEGVIDCN10_253;
  46        bool false_optc_underflow;
  47        bool DEGVIDCN10_254;
  48};
  49
  50struct hwseq_wa_state {
  51        bool DEGVIDCN10_253_applied;
  52};
  53
  54struct dce_hwseq {
  55        struct dc_context *ctx;
  56        const struct dce_hwseq_registers *regs;
  57        const struct dce_hwseq_shift *shifts;
  58        const struct dce_hwseq_mask *masks;
  59        struct dce_hwseq_wa wa;
  60        struct hwseq_wa_state wa_state;
  61};
  62
  63struct pipe_ctx;
  64struct dc_state;
  65struct dchub_init_data;
  66struct dc_static_screen_events;
  67struct resource_pool;
  68struct resource_context;
  69struct stream_resource;
  70
  71struct hw_sequencer_funcs {
  72
  73        void (*init_hw)(struct dc *dc);
  74
  75        enum dc_status (*apply_ctx_to_hw)(
  76                        struct dc *dc, struct dc_state *context);
  77
  78        void (*reset_hw_ctx_wrap)(
  79                        struct dc *dc, struct dc_state *context);
  80
  81        void (*apply_ctx_for_surface)(
  82                        struct dc *dc,
  83                        const struct dc_stream_state *stream,
  84                        int num_planes,
  85                        struct dc_state *context);
  86
  87        void (*program_gamut_remap)(
  88                        struct pipe_ctx *pipe_ctx);
  89
  90        void (*program_csc_matrix)(
  91                        struct pipe_ctx *pipe_ctx,
  92                        enum dc_color_space colorspace,
  93                        uint16_t *matrix);
  94
  95        void (*program_output_csc)(struct dc *dc,
  96                        struct pipe_ctx *pipe_ctx,
  97                        enum dc_color_space colorspace,
  98                        uint16_t *matrix,
  99                        int opp_id);
 100
 101        void (*update_plane_addr)(
 102                const struct dc *dc,
 103                struct pipe_ctx *pipe_ctx);
 104
 105        void (*plane_atomic_disconnect)(
 106                struct dc *dc,
 107                struct pipe_ctx *pipe_ctx);
 108
 109        void (*update_dchub)(
 110                struct dce_hwseq *hws,
 111                struct dchub_init_data *dh_data);
 112
 113        void (*update_mpcc)(
 114                struct dc *dc,
 115                struct pipe_ctx *pipe_ctx);
 116
 117        void (*update_pending_status)(
 118                        struct pipe_ctx *pipe_ctx);
 119
 120        bool (*set_input_transfer_func)(
 121                                struct pipe_ctx *pipe_ctx,
 122                                const struct dc_plane_state *plane_state);
 123
 124        bool (*set_output_transfer_func)(
 125                                struct pipe_ctx *pipe_ctx,
 126                                const struct dc_stream_state *stream);
 127
 128        void (*power_down)(struct dc *dc);
 129
 130        void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context);
 131
 132        void (*enable_timing_synchronization)(
 133                        struct dc *dc,
 134                        int group_index,
 135                        int group_size,
 136                        struct pipe_ctx *grouped_pipes[]);
 137
 138        void (*enable_per_frame_crtc_position_reset)(
 139                        struct dc *dc,
 140                        int group_size,
 141                        struct pipe_ctx *grouped_pipes[]);
 142
 143        void (*enable_display_pipe_clock_gating)(
 144                                        struct dc_context *ctx,
 145                                        bool clock_gating);
 146
 147        bool (*enable_display_power_gating)(
 148                                        struct dc *dc,
 149                                        uint8_t controller_id,
 150                                        struct dc_bios *dcb,
 151                                        enum pipe_gating_control power_gating);
 152
 153        void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
 154
 155        void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
 156
 157        void (*enable_stream)(struct pipe_ctx *pipe_ctx);
 158
 159        void (*disable_stream)(struct pipe_ctx *pipe_ctx,
 160                        int option);
 161
 162        void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
 163                        struct dc_link_settings *link_settings);
 164
 165        void (*blank_stream)(struct pipe_ctx *pipe_ctx);
 166
 167        void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
 168
 169        void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx, int option);
 170
 171        void (*pipe_control_lock)(
 172                                struct dc *dc,
 173                                struct pipe_ctx *pipe,
 174                                bool lock);
 175        void (*blank_pixel_data)(
 176                        struct dc *dc,
 177                        struct pipe_ctx *pipe_ctx,
 178                        bool blank);
 179
 180        void (*set_bandwidth)(
 181                        struct dc *dc,
 182                        struct dc_state *context,
 183                        bool safe_to_lower);
 184
 185        void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
 186                        int vmin, int vmax);
 187
 188        void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
 189                        struct crtc_position *position);
 190
 191        void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
 192                        int num_pipes, const struct dc_static_screen_events *events);
 193
 194        enum dc_status (*enable_stream_timing)(
 195                        struct pipe_ctx *pipe_ctx,
 196                        struct dc_state *context,
 197                        struct dc *dc);
 198
 199        void (*setup_stereo)(
 200                        struct pipe_ctx *pipe_ctx,
 201                        struct dc *dc);
 202
 203        void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
 204
 205        void (*log_hw_state)(struct dc *dc);
 206
 207        void (*wait_for_mpcc_disconnect)(struct dc *dc,
 208                        struct resource_pool *res_pool,
 209                        struct pipe_ctx *pipe_ctx);
 210
 211        void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);
 212        void (*optimize_shared_resources)(struct dc *dc);
 213        void (*pplib_apply_display_requirements)(
 214                        struct dc *dc,
 215                        struct dc_state *context);
 216        void (*edp_power_control)(
 217                        struct dc_link *link,
 218                        bool enable);
 219        void (*edp_backlight_control)(
 220                        struct dc_link *link,
 221                        bool enable);
 222        void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
 223
 224        void (*set_cursor_position)(struct pipe_ctx *pipe);
 225        void (*set_cursor_attribute)(struct pipe_ctx *pipe);
 226        void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
 227
 228};
 229
 230void color_space_to_black_color(
 231        const struct dc *dc,
 232        enum dc_color_space colorspace,
 233        struct tg_color *black_color);
 234
 235bool hwss_wait_for_blank_complete(
 236                struct timing_generator *tg);
 237
 238const uint16_t *find_color_matrix(
 239                enum dc_color_space color_space,
 240                uint32_t *array_size);
 241
 242#endif /* __DC_HW_SEQUENCER_H__ */
 243