linux/drivers/iio/adc/stm32-dfsdm-core.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * This file is part the core part STM32 DFSDM driver
   4 *
   5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
   6 * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com> for STMicroelectronics.
   7 */
   8
   9#include <linux/clk.h>
  10#include <linux/iio/iio.h>
  11#include <linux/iio/sysfs.h>
  12#include <linux/interrupt.h>
  13#include <linux/module.h>
  14#include <linux/of_device.h>
  15#include <linux/regmap.h>
  16#include <linux/slab.h>
  17
  18#include "stm32-dfsdm.h"
  19
  20struct stm32_dfsdm_dev_data {
  21        unsigned int num_filters;
  22        unsigned int num_channels;
  23        const struct regmap_config *regmap_cfg;
  24};
  25
  26#define STM32H7_DFSDM_NUM_FILTERS       4
  27#define STM32H7_DFSDM_NUM_CHANNELS      8
  28#define STM32MP1_DFSDM_NUM_FILTERS      6
  29#define STM32MP1_DFSDM_NUM_CHANNELS     8
  30
  31static bool stm32_dfsdm_volatile_reg(struct device *dev, unsigned int reg)
  32{
  33        if (reg < DFSDM_FILTER_BASE_ADR)
  34                return false;
  35
  36        /*
  37         * Mask is done on register to avoid to list registers of all
  38         * filter instances.
  39         */
  40        switch (reg & DFSDM_FILTER_REG_MASK) {
  41        case DFSDM_CR1(0) & DFSDM_FILTER_REG_MASK:
  42        case DFSDM_ISR(0) & DFSDM_FILTER_REG_MASK:
  43        case DFSDM_JDATAR(0) & DFSDM_FILTER_REG_MASK:
  44        case DFSDM_RDATAR(0) & DFSDM_FILTER_REG_MASK:
  45                return true;
  46        }
  47
  48        return false;
  49}
  50
  51static const struct regmap_config stm32h7_dfsdm_regmap_cfg = {
  52        .reg_bits = 32,
  53        .val_bits = 32,
  54        .reg_stride = sizeof(u32),
  55        .max_register = 0x2B8,
  56        .volatile_reg = stm32_dfsdm_volatile_reg,
  57        .fast_io = true,
  58};
  59
  60static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_data = {
  61        .num_filters = STM32H7_DFSDM_NUM_FILTERS,
  62        .num_channels = STM32H7_DFSDM_NUM_CHANNELS,
  63        .regmap_cfg = &stm32h7_dfsdm_regmap_cfg,
  64};
  65
  66static const struct regmap_config stm32mp1_dfsdm_regmap_cfg = {
  67        .reg_bits = 32,
  68        .val_bits = 32,
  69        .reg_stride = sizeof(u32),
  70        .max_register = 0x7fc,
  71        .volatile_reg = stm32_dfsdm_volatile_reg,
  72        .fast_io = true,
  73};
  74
  75static const struct stm32_dfsdm_dev_data stm32mp1_dfsdm_data = {
  76        .num_filters = STM32MP1_DFSDM_NUM_FILTERS,
  77        .num_channels = STM32MP1_DFSDM_NUM_CHANNELS,
  78        .regmap_cfg = &stm32mp1_dfsdm_regmap_cfg,
  79};
  80
  81struct dfsdm_priv {
  82        struct platform_device *pdev; /* platform device */
  83
  84        struct stm32_dfsdm dfsdm; /* common data exported for all instances */
  85
  86        unsigned int spi_clk_out_div; /* SPI clkout divider value */
  87        atomic_t n_active_ch;   /* number of current active channels */
  88
  89        struct clk *clk; /* DFSDM clock */
  90        struct clk *aclk; /* audio clock */
  91};
  92
  93/**
  94 * stm32_dfsdm_start_dfsdm - start global dfsdm interface.
  95 *
  96 * Enable interface if n_active_ch is not null.
  97 * @dfsdm: Handle used to retrieve dfsdm context.
  98 */
  99int stm32_dfsdm_start_dfsdm(struct stm32_dfsdm *dfsdm)
 100{
 101        struct dfsdm_priv *priv = container_of(dfsdm, struct dfsdm_priv, dfsdm);
 102        struct device *dev = &priv->pdev->dev;
 103        unsigned int clk_div = priv->spi_clk_out_div, clk_src;
 104        int ret;
 105
 106        if (atomic_inc_return(&priv->n_active_ch) == 1) {
 107                ret = clk_prepare_enable(priv->clk);
 108                if (ret < 0) {
 109                        dev_err(dev, "Failed to start clock\n");
 110                        goto error_ret;
 111                }
 112                if (priv->aclk) {
 113                        ret = clk_prepare_enable(priv->aclk);
 114                        if (ret < 0) {
 115                                dev_err(dev, "Failed to start audio clock\n");
 116                                goto disable_clk;
 117                        }
 118                }
 119
 120                /* select clock source, e.g. 0 for "dfsdm" or 1 for "audio" */
 121                clk_src = priv->aclk ? 1 : 0;
 122                ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
 123                                         DFSDM_CHCFGR1_CKOUTSRC_MASK,
 124                                         DFSDM_CHCFGR1_CKOUTSRC(clk_src));
 125                if (ret < 0)
 126                        goto disable_aclk;
 127
 128                /* Output the SPI CLKOUT (if clk_div == 0 clock if OFF) */
 129                ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
 130                                         DFSDM_CHCFGR1_CKOUTDIV_MASK,
 131                                         DFSDM_CHCFGR1_CKOUTDIV(clk_div));
 132                if (ret < 0)
 133                        goto disable_aclk;
 134
 135                /* Global enable of DFSDM interface */
 136                ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
 137                                         DFSDM_CHCFGR1_DFSDMEN_MASK,
 138                                         DFSDM_CHCFGR1_DFSDMEN(1));
 139                if (ret < 0)
 140                        goto disable_aclk;
 141        }
 142
 143        dev_dbg(dev, "%s: n_active_ch %d\n", __func__,
 144                atomic_read(&priv->n_active_ch));
 145
 146        return 0;
 147
 148disable_aclk:
 149        clk_disable_unprepare(priv->aclk);
 150disable_clk:
 151        clk_disable_unprepare(priv->clk);
 152
 153error_ret:
 154        atomic_dec(&priv->n_active_ch);
 155
 156        return ret;
 157}
 158EXPORT_SYMBOL_GPL(stm32_dfsdm_start_dfsdm);
 159
 160/**
 161 * stm32_dfsdm_stop_dfsdm - stop global DFSDM interface.
 162 *
 163 * Disable interface if n_active_ch is null
 164 * @dfsdm: Handle used to retrieve dfsdm context.
 165 */
 166int stm32_dfsdm_stop_dfsdm(struct stm32_dfsdm *dfsdm)
 167{
 168        struct dfsdm_priv *priv = container_of(dfsdm, struct dfsdm_priv, dfsdm);
 169        int ret;
 170
 171        if (atomic_dec_and_test(&priv->n_active_ch)) {
 172                /* Global disable of DFSDM interface */
 173                ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
 174                                         DFSDM_CHCFGR1_DFSDMEN_MASK,
 175                                         DFSDM_CHCFGR1_DFSDMEN(0));
 176                if (ret < 0)
 177                        return ret;
 178
 179                /* Stop SPI CLKOUT */
 180                ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
 181                                         DFSDM_CHCFGR1_CKOUTDIV_MASK,
 182                                         DFSDM_CHCFGR1_CKOUTDIV(0));
 183                if (ret < 0)
 184                        return ret;
 185
 186                clk_disable_unprepare(priv->clk);
 187                if (priv->aclk)
 188                        clk_disable_unprepare(priv->aclk);
 189        }
 190        dev_dbg(&priv->pdev->dev, "%s: n_active_ch %d\n", __func__,
 191                atomic_read(&priv->n_active_ch));
 192
 193        return 0;
 194}
 195EXPORT_SYMBOL_GPL(stm32_dfsdm_stop_dfsdm);
 196
 197static int stm32_dfsdm_parse_of(struct platform_device *pdev,
 198                                struct dfsdm_priv *priv)
 199{
 200        struct device_node *node = pdev->dev.of_node;
 201        struct resource *res;
 202        unsigned long clk_freq;
 203        unsigned int spi_freq, rem;
 204        int ret;
 205
 206        if (!node)
 207                return -EINVAL;
 208
 209        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 210        if (!res) {
 211                dev_err(&pdev->dev, "Failed to get memory resource\n");
 212                return -ENODEV;
 213        }
 214        priv->dfsdm.phys_base = res->start;
 215        priv->dfsdm.base = devm_ioremap_resource(&pdev->dev, res);
 216
 217        /*
 218         * "dfsdm" clock is mandatory for DFSDM peripheral clocking.
 219         * "dfsdm" or "audio" clocks can be used as source clock for
 220         * the SPI clock out signal and internal processing, depending
 221         * on use case.
 222         */
 223        priv->clk = devm_clk_get(&pdev->dev, "dfsdm");
 224        if (IS_ERR(priv->clk)) {
 225                dev_err(&pdev->dev, "No stm32_dfsdm_clk clock found\n");
 226                return -EINVAL;
 227        }
 228
 229        priv->aclk = devm_clk_get(&pdev->dev, "audio");
 230        if (IS_ERR(priv->aclk))
 231                priv->aclk = NULL;
 232
 233        if (priv->aclk)
 234                clk_freq = clk_get_rate(priv->aclk);
 235        else
 236                clk_freq = clk_get_rate(priv->clk);
 237
 238        /* SPI clock out frequency */
 239        ret = of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
 240                                   &spi_freq);
 241        if (ret < 0) {
 242                /* No SPI master mode */
 243                return 0;
 244        }
 245
 246        priv->spi_clk_out_div = div_u64_rem(clk_freq, spi_freq, &rem) - 1;
 247        if (!priv->spi_clk_out_div) {
 248                /* spi_clk_out_div == 0 means ckout is OFF */
 249                dev_err(&pdev->dev, "spi-max-frequency not achievable\n");
 250                return -EINVAL;
 251        }
 252        priv->dfsdm.spi_master_freq = spi_freq;
 253
 254        if (rem) {
 255                dev_warn(&pdev->dev, "SPI clock not accurate\n");
 256                dev_warn(&pdev->dev, "%ld = %d * %d + %d\n",
 257                         clk_freq, spi_freq, priv->spi_clk_out_div + 1, rem);
 258        }
 259
 260        return 0;
 261};
 262
 263static const struct of_device_id stm32_dfsdm_of_match[] = {
 264        {
 265                .compatible = "st,stm32h7-dfsdm",
 266                .data = &stm32h7_dfsdm_data,
 267        },
 268        {
 269                .compatible = "st,stm32mp1-dfsdm",
 270                .data = &stm32mp1_dfsdm_data,
 271        },
 272        {}
 273};
 274MODULE_DEVICE_TABLE(of, stm32_dfsdm_of_match);
 275
 276static int stm32_dfsdm_probe(struct platform_device *pdev)
 277{
 278        struct dfsdm_priv *priv;
 279        const struct stm32_dfsdm_dev_data *dev_data;
 280        struct stm32_dfsdm *dfsdm;
 281        int ret;
 282
 283        priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 284        if (!priv)
 285                return -ENOMEM;
 286
 287        priv->pdev = pdev;
 288
 289        dev_data = of_device_get_match_data(&pdev->dev);
 290
 291        dfsdm = &priv->dfsdm;
 292        dfsdm->fl_list = devm_kcalloc(&pdev->dev, dev_data->num_filters,
 293                                      sizeof(*dfsdm->fl_list), GFP_KERNEL);
 294        if (!dfsdm->fl_list)
 295                return -ENOMEM;
 296
 297        dfsdm->num_fls = dev_data->num_filters;
 298        dfsdm->ch_list = devm_kcalloc(&pdev->dev, dev_data->num_channels,
 299                                      sizeof(*dfsdm->ch_list),
 300                                      GFP_KERNEL);
 301        if (!dfsdm->ch_list)
 302                return -ENOMEM;
 303        dfsdm->num_chs = dev_data->num_channels;
 304
 305        ret = stm32_dfsdm_parse_of(pdev, priv);
 306        if (ret < 0)
 307                return ret;
 308
 309        dfsdm->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dfsdm",
 310                                                  dfsdm->base,
 311                                                  dev_data->regmap_cfg);
 312        if (IS_ERR(dfsdm->regmap)) {
 313                ret = PTR_ERR(dfsdm->regmap);
 314                dev_err(&pdev->dev, "%s: Failed to allocate regmap: %d\n",
 315                        __func__, ret);
 316                return ret;
 317        }
 318
 319        platform_set_drvdata(pdev, dfsdm);
 320
 321        return devm_of_platform_populate(&pdev->dev);
 322}
 323
 324static struct platform_driver stm32_dfsdm_driver = {
 325        .probe = stm32_dfsdm_probe,
 326        .driver = {
 327                .name = "stm32-dfsdm",
 328                .of_match_table = stm32_dfsdm_of_match,
 329        },
 330};
 331
 332module_platform_driver(stm32_dfsdm_driver);
 333
 334MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
 335MODULE_DESCRIPTION("STMicroelectronics STM32 dfsdm driver");
 336MODULE_LICENSE("GPL v2");
 337