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18#include <linux/err.h>
19#include <linux/errno.h>
20#include <linux/module.h>
21#include <linux/device.h>
22
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h>
25
26#include <linux/spi/spi.h>
27#include <linux/spi/spi-mem.h>
28#include <linux/spi/flash.h>
29#include <linux/mtd/spi-nor.h>
30
31struct m25p {
32 struct spi_mem *spimem;
33 struct spi_nor spi_nor;
34};
35
36static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
37{
38 struct m25p *flash = nor->priv;
39 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
40 SPI_MEM_OP_NO_ADDR,
41 SPI_MEM_OP_NO_DUMMY,
42 SPI_MEM_OP_DATA_IN(len, NULL, 1));
43 void *scratchbuf;
44 int ret;
45
46 scratchbuf = kmalloc(len, GFP_KERNEL);
47 if (!scratchbuf)
48 return -ENOMEM;
49
50 op.data.buf.in = scratchbuf;
51 ret = spi_mem_exec_op(flash->spimem, &op);
52 if (ret < 0)
53 dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
54 code);
55 else
56 memcpy(val, scratchbuf, len);
57
58 kfree(scratchbuf);
59
60 return ret;
61}
62
63static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
64{
65 struct m25p *flash = nor->priv;
66 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
67 SPI_MEM_OP_NO_ADDR,
68 SPI_MEM_OP_NO_DUMMY,
69 SPI_MEM_OP_DATA_OUT(len, NULL, 1));
70 void *scratchbuf;
71 int ret;
72
73 scratchbuf = kmemdup(buf, len, GFP_KERNEL);
74 if (!scratchbuf)
75 return -ENOMEM;
76
77 op.data.buf.out = scratchbuf;
78 ret = spi_mem_exec_op(flash->spimem, &op);
79 kfree(scratchbuf);
80
81 return ret;
82}
83
84static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
85 const u_char *buf)
86{
87 struct m25p *flash = nor->priv;
88 struct spi_mem_op op =
89 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
90 SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
91 SPI_MEM_OP_NO_DUMMY,
92 SPI_MEM_OP_DATA_OUT(len, buf, 1));
93 size_t remaining = len;
94 int ret;
95
96
97 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
98 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
99 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
100
101 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
102 op.addr.nbytes = 0;
103
104 while (remaining) {
105 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
106 ret = spi_mem_adjust_op_size(flash->spimem, &op);
107 if (ret)
108 return ret;
109
110 ret = spi_mem_exec_op(flash->spimem, &op);
111 if (ret)
112 return ret;
113
114 op.addr.val += op.data.nbytes;
115 remaining -= op.data.nbytes;
116 op.data.buf.out += op.data.nbytes;
117 }
118
119 return len;
120}
121
122
123
124
125
126static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
127 u_char *buf)
128{
129 struct m25p *flash = nor->priv;
130 struct spi_mem_op op =
131 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
132 SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
133 SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
134 SPI_MEM_OP_DATA_IN(len, buf, 1));
135 size_t remaining = len;
136 int ret;
137
138
139 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
140 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
141 op.dummy.buswidth = op.addr.buswidth;
142 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
143
144
145 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
146
147 while (remaining) {
148 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
149 ret = spi_mem_adjust_op_size(flash->spimem, &op);
150 if (ret)
151 return ret;
152
153 ret = spi_mem_exec_op(flash->spimem, &op);
154 if (ret)
155 return ret;
156
157 op.addr.val += op.data.nbytes;
158 remaining -= op.data.nbytes;
159 op.data.buf.in += op.data.nbytes;
160 }
161
162 return len;
163}
164
165
166
167
168
169
170static int m25p_probe(struct spi_mem *spimem)
171{
172 struct spi_device *spi = spimem->spi;
173 struct flash_platform_data *data;
174 struct m25p *flash;
175 struct spi_nor *nor;
176 struct spi_nor_hwcaps hwcaps = {
177 .mask = SNOR_HWCAPS_READ |
178 SNOR_HWCAPS_READ_FAST |
179 SNOR_HWCAPS_PP,
180 };
181 char *flash_name;
182 int ret;
183
184 data = dev_get_platdata(&spimem->spi->dev);
185
186 flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
187 if (!flash)
188 return -ENOMEM;
189
190 nor = &flash->spi_nor;
191
192
193 nor->read = m25p80_read;
194 nor->write = m25p80_write;
195 nor->write_reg = m25p80_write_reg;
196 nor->read_reg = m25p80_read_reg;
197
198 nor->dev = &spimem->spi->dev;
199 spi_nor_set_flash_node(nor, spi->dev.of_node);
200 nor->priv = flash;
201
202 spi_mem_set_drvdata(spimem, flash);
203 flash->spimem = spimem;
204 nor->spi = spi;
205
206 if (spi->mode & SPI_RX_OCTAL) {
207 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
208
209 if (spi->mode & SPI_TX_OCTAL)
210 hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
211 SNOR_HWCAPS_PP_1_1_8 |
212 SNOR_HWCAPS_PP_1_8_8);
213 } else if (spi->mode & SPI_RX_QUAD) {
214 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
215
216 if (spi->mode & SPI_TX_QUAD)
217 hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
218 SNOR_HWCAPS_PP_1_1_4 |
219 SNOR_HWCAPS_PP_1_4_4);
220 } else if (spi->mode & SPI_RX_DUAL) {
221 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
222
223 if (spi->mode & SPI_TX_DUAL)
224 hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
225 }
226
227 if (data && data->name)
228 nor->mtd.name = data->name;
229
230 if (!nor->mtd.name)
231 nor->mtd.name = spi_mem_get_name(spimem);
232
233
234
235
236
237
238 if (data && data->type)
239 flash_name = data->type;
240 else if (!strcmp(spi->modalias, "spi-nor"))
241 flash_name = NULL;
242 else
243 flash_name = spi->modalias;
244
245 ret = spi_nor_scan(nor, flash_name, &hwcaps);
246 if (ret)
247 return ret;
248
249 return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
250 data ? data->nr_parts : 0);
251}
252
253
254static int m25p_remove(struct spi_mem *spimem)
255{
256 struct m25p *flash = spi_mem_get_drvdata(spimem);
257
258 spi_nor_restore(&flash->spi_nor);
259
260
261 return mtd_device_unregister(&flash->spi_nor.mtd);
262}
263
264static void m25p_shutdown(struct spi_mem *spimem)
265{
266 struct m25p *flash = spi_mem_get_drvdata(spimem);
267
268 spi_nor_restore(&flash->spi_nor);
269}
270
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280
281
282static const struct spi_device_id m25p_ids[] = {
283
284
285
286
287
288 {"spi-nor"},
289
290
291
292
293
294 {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
295
296
297
298
299
300 {"at25df321a"}, {"at25df641"}, {"at26df081a"},
301 {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
302 {"mx25l25635e"},{"mx66l51235l"},
303 {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
304 {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
305 {"s25fl064k"},
306 {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
307 {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
308 {"m25p64"}, {"m25p128"},
309 {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
310 {"w25q80bl"}, {"w25q128"}, {"w25q256"},
311
312
313 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
314 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
315 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
316
317
318 { "mr25h128" },
319 { "mr25h256" },
320 { "mr25h10" },
321 { "mr25h40" },
322
323 { },
324};
325MODULE_DEVICE_TABLE(spi, m25p_ids);
326
327static const struct of_device_id m25p_of_table[] = {
328
329
330
331
332 { .compatible = "jedec,spi-nor" },
333 {}
334};
335MODULE_DEVICE_TABLE(of, m25p_of_table);
336
337static struct spi_mem_driver m25p80_driver = {
338 .spidrv = {
339 .driver = {
340 .name = "m25p80",
341 .of_match_table = m25p_of_table,
342 },
343 .id_table = m25p_ids,
344 },
345 .probe = m25p_probe,
346 .remove = m25p_remove,
347 .shutdown = m25p_shutdown,
348
349
350
351
352
353};
354
355module_spi_mem_driver(m25p80_driver);
356
357MODULE_LICENSE("GPL");
358MODULE_AUTHOR("Mike Lavender");
359MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
360