LXR linux/drivers/net/ethernet/intel/ice/ice.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (c) 2018, Intel Corporation. */
   3
   4#ifndef _ICE_H_
   5#define _ICE_H_
   6
   7#include <linux/types.h>
   8#include <linux/errno.h>
   9#include <linux/kernel.h>
  10#include <linux/module.h>
  11#include <linux/netdevice.h>
  12#include <linux/compiler.h>
  13#include <linux/etherdevice.h>
  14#include <linux/skbuff.h>
  15#include <linux/cpumask.h>
  16#include <linux/rtnetlink.h>
  17#include <linux/if_vlan.h>
  18#include <linux/dma-mapping.h>
  19#include <linux/pci.h>
  20#include <linux/workqueue.h>
  21#include <linux/aer.h>
  22#include <linux/interrupt.h>
  23#include <linux/ethtool.h>
  24#include <linux/timer.h>
  25#include <linux/delay.h>
  26#include <linux/bitmap.h>
  27#include <linux/log2.h>
  28#include <linux/ip.h>
  29#include <linux/ipv6.h>
  30#include <linux/if_bridge.h>
  31#include <net/ipv6.h>
  32#include "ice_devids.h"
  33#include "ice_type.h"
  34#include "ice_txrx.h"
  35#include "ice_switch.h"
  36#include "ice_common.h"
  37#include "ice_sched.h"
  38
  39extern const char ice_drv_ver[];
  40#define ICE_BAR0                0
  41#define ICE_DFLT_NUM_DESC       128
  42#define ICE_MIN_NUM_DESC        8
  43#define ICE_MAX_NUM_DESC        8160
  44#define ICE_REQ_DESC_MULTIPLE   32
  45#define ICE_DFLT_TRAFFIC_CLASS  BIT(0)
  46#define ICE_INT_NAME_STR_LEN    (IFNAMSIZ + 16)
  47#define ICE_ETHTOOL_FWVER_LEN   32
  48#define ICE_AQ_LEN              64
  49#define ICE_MIN_MSIX            2
  50#define ICE_NO_VSI              0xffff
  51#define ICE_MAX_VSI_ALLOC       130
  52#define ICE_MAX_TXQS            2048
  53#define ICE_MAX_RXQS            2048
  54#define ICE_VSI_MAP_CONTIG      0
  55#define ICE_VSI_MAP_SCATTER     1
  56#define ICE_MAX_SCATTER_TXQS    16
  57#define ICE_MAX_SCATTER_RXQS    16
  58#define ICE_Q_WAIT_RETRY_LIMIT  10
  59#define ICE_Q_WAIT_MAX_RETRY    (5 * ICE_Q_WAIT_RETRY_LIMIT)
  60#define ICE_MAX_LG_RSS_QS       256
  61#define ICE_MAX_SMALL_RSS_QS    8
  62#define ICE_RES_VALID_BIT       0x8000
  63#define ICE_RES_MISC_VEC_ID     (ICE_RES_VALID_BIT - 1)
  64#define ICE_INVAL_Q_INDEX       0xffff
  65
  66#define ICE_VSIQF_HKEY_ARRAY_SIZE       ((VSIQF_HKEY_MAX_INDEX + 1) *   4)
  67
  68#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  69
  70#define ICE_MAX_MTU     (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \
  71                         ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)
  72
  73#define ICE_UP_TABLE_TRANSLATE(val, i) \
  74                (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
  75                  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
  76
  77#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
  78#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
  79#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
  80
  81/* Macro for each VSI in a PF */
  82#define ice_for_each_vsi(pf, i) \
  83        for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
  84
  85/* Macros for each tx/rx ring in a VSI */
  86#define ice_for_each_txq(vsi, i) \
  87        for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
  88
  89#define ice_for_each_rxq(vsi, i) \
  90        for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
  91
  92/* Macros for each allocated tx/rx ring whether used or not in a VSI */
  93#define ice_for_each_alloc_txq(vsi, i) \
  94        for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
  95
  96#define ice_for_each_alloc_rxq(vsi, i) \
  97        for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
  98
  99struct ice_tc_info {
 100        u16 qoffset;
 101        u16 qcount;
 102};
 103
 104struct ice_tc_cfg {
 105        u8 numtc; /* Total number of enabled TCs */
 106        u8 ena_tc; /* TX map */
 107        struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
 108};
 109
 110struct ice_res_tracker {
 111        u16 num_entries;
 112        u16 search_hint;
 113        u16 list[1];
 114};
 115
 116struct ice_sw {
 117        struct ice_pf *pf;
 118        u16 sw_id;              /* switch ID for this switch */
 119        u16 bridge_mode;        /* VEB/VEPA/Port Virtualizer */
 120};
 121
 122enum ice_state {
 123        __ICE_DOWN,
 124        __ICE_NEEDS_RESTART,
 125        __ICE_RESET_RECOVERY_PENDING,   /* set by driver when reset starts */
 126        __ICE_PFR_REQ,                  /* set by driver and peers */
 127        __ICE_CORER_REQ,                /* set by driver and peers */
 128        __ICE_GLOBR_REQ,                /* set by driver and peers */
 129        __ICE_CORER_RECV,               /* set by OICR handler */
 130        __ICE_GLOBR_RECV,               /* set by OICR handler */
 131        __ICE_EMPR_RECV,                /* set by OICR handler */
 132        __ICE_SUSPENDED,                /* set on module remove path */
 133        __ICE_RESET_FAILED,             /* set by reset/rebuild */
 134        __ICE_ADMINQ_EVENT_PENDING,
 135        __ICE_FLTR_OVERFLOW_PROMISC,
 136        __ICE_CFG_BUSY,
 137        __ICE_SERVICE_SCHED,
 138        __ICE_STATE_NBITS               /* must be last */
 139};
 140
 141enum ice_vsi_flags {
 142        ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
 143        ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
 144        ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
 145        ICE_VSI_FLAG_PROMISC_CHANGED,
 146        ICE_VSI_FLAG_NBITS              /* must be last */
 147};
 148
 149/* struct that defines a VSI, associated with a dev */
 150struct ice_vsi {
 151        struct net_device *netdev;
 152        struct ice_sw *vsw;              /* switch this VSI is on */
 153        struct ice_pf *back;             /* back pointer to PF */
 154        struct ice_port_info *port_info; /* back pointer to port_info */
 155        struct ice_ring **rx_rings;      /* rx ring array */
 156        struct ice_ring **tx_rings;      /* tx ring array */
 157        struct ice_q_vector **q_vectors; /* q_vector array */
 158
 159        irqreturn_t (*irq_handler)(int irq, void *data);
 160
 161        u64 tx_linearize;
 162        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 163        DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
 164        unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 165        unsigned int current_netdev_flags;
 166        u32 tx_restart;
 167        u32 tx_busy;
 168        u32 rx_buf_failed;
 169        u32 rx_page_failed;
 170        int num_q_vectors;
 171        int base_vector;
 172        enum ice_vsi_type type;
 173        u16 vsi_num;                     /* HW (absolute) index of this VSI */
 174        u16 idx;                         /* software index in pf->vsi[] */
 175
 176        /* Interrupt thresholds */
 177        u16 work_lmt;
 178
 179        /* RSS config */
 180        u16 rss_table_size;     /* HW RSS table size */
 181        u16 rss_size;           /* Allocated RSS queues */
 182        u8 *rss_hkey_user;      /* User configured hash keys */
 183        u8 *rss_lut_user;       /* User configured lookup table entries */
 184        u8 rss_lut_type;        /* used to configure Get/Set RSS LUT AQ call */
 185
 186        u16 max_frame;
 187        u16 rx_buf_len;
 188
 189        struct ice_aqc_vsi_props info;   /* VSI properties */
 190
 191        /* VSI stats */
 192        struct rtnl_link_stats64 net_stats;
 193        struct ice_eth_stats eth_stats;
 194        struct ice_eth_stats eth_stats_prev;
 195
 196        struct list_head tmp_sync_list;         /* MAC filters to be synced */
 197        struct list_head tmp_unsync_list;       /* MAC filters to be unsynced */
 198
 199        u8 irqs_ready;
 200        u8 current_isup;                 /* Sync 'link up' logging */
 201        u8 stat_offsets_loaded;
 202
 203        /* queue information */
 204        u8 tx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 205        u8 rx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 206        u16 txq_map[ICE_MAX_TXQS];       /* index in pf->avail_txqs */
 207        u16 rxq_map[ICE_MAX_RXQS];       /* index in pf->avail_rxqs */
 208        u16 alloc_txq;                   /* Allocated Tx queues */
 209        u16 num_txq;                     /* Used Tx queues */
 210        u16 alloc_rxq;                   /* Allocated Rx queues */
 211        u16 num_rxq;                     /* Used Rx queues */
 212        u16 num_desc;
 213        struct ice_tc_cfg tc_cfg;
 214} ____cacheline_internodealigned_in_smp;
 215
 216/* struct that defines an interrupt vector */
 217struct ice_q_vector {
 218        struct ice_vsi *vsi;
 219        cpumask_t affinity_mask;
 220        struct napi_struct napi;
 221        struct ice_ring_container rx;
 222        struct ice_ring_container tx;
 223        struct irq_affinity_notify affinity_notify;
 224        u16 v_idx;                      /* index in the vsi->q_vector array. */
 225        u8 num_ring_tx;                 /* total number of tx rings in vector */
 226        u8 num_ring_rx;                 /* total number of rx rings in vector */
 227        char name[ICE_INT_NAME_STR_LEN];
 228} ____cacheline_internodealigned_in_smp;
 229
 230enum ice_pf_flags {
 231        ICE_FLAG_MSIX_ENA,
 232        ICE_FLAG_FLTR_SYNC,
 233        ICE_FLAG_RSS_ENA,
 234        ICE_PF_FLAGS_NBITS              /* must be last */
 235};
 236
 237struct ice_pf {
 238        struct pci_dev *pdev;
 239        struct msix_entry *msix_entries;
 240        struct ice_res_tracker *irq_tracker;
 241        struct ice_vsi **vsi;           /* VSIs created by the driver */
 242        struct ice_sw *first_sw;        /* first switch created by firmware */
 243        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 244        DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS);
 245        DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS);
 246        DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
 247        unsigned long serv_tmr_period;
 248        unsigned long serv_tmr_prev;
 249        struct timer_list serv_tmr;
 250        struct work_struct serv_task;
 251        struct mutex avail_q_mutex;     /* protects access to avail_[rx|tx]qs */
 252        struct mutex sw_mutex;          /* lock for protecting VSI alloc flow */
 253        u32 msg_enable;
 254        u32 hw_csum_rx_error;
 255        u32 oicr_idx;           /* Other interrupt cause vector index */
 256        u32 num_lan_msix;       /* Total MSIX vectors for base driver */
 257        u32 num_avail_msix;     /* remaining MSIX vectors left unclaimed */
 258        u16 num_lan_tx;         /* num lan tx queues setup */
 259        u16 num_lan_rx;         /* num lan rx queues setup */
 260        u16 q_left_tx;          /* remaining num tx queues left unclaimed */
 261        u16 q_left_rx;          /* remaining num rx queues left unclaimed */
 262        u16 next_vsi;           /* Next free slot in pf->vsi[] - 0-based! */
 263        u16 num_alloc_vsi;
 264        u16 corer_count;        /* Core reset count */
 265        u16 globr_count;        /* Global reset count */
 266        u16 empr_count;         /* EMP reset count */
 267        u16 pfr_count;          /* PF reset count */
 268
 269        struct ice_hw_port_stats stats;
 270        struct ice_hw_port_stats stats_prev;
 271        struct ice_hw hw;
 272        u8 stat_prev_loaded;    /* has previous stats been loaded */
 273        char int_name[ICE_INT_NAME_STR_LEN];
 274};
 275
 276struct ice_netdev_priv {
 277        struct ice_vsi *vsi;
 278};
 279
 280/**
 281 * ice_irq_dynamic_ena - Enable default interrupt generation settings
 282 * @hw: pointer to hw struct
 283 * @vsi: pointer to vsi struct, can be NULL
 284 * @q_vector: pointer to q_vector, can be NULL
 285 */
 286static inline void ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
 287                                       struct ice_q_vector *q_vector)
 288{
 289        u32 vector = (vsi && q_vector) ? vsi->base_vector + q_vector->v_idx :
 290                                        ((struct ice_pf *)hw->back)->oicr_idx;
 291        int itr = ICE_ITR_NONE;
 292        u32 val;
 293
 294        /* clear the PBA here, as this function is meant to clean out all
 295         * previous interrupts and enable the interrupt
 296         */
 297        val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
 298              (itr << GLINT_DYN_CTL_ITR_INDX_S);
 299        if (vsi)
 300                if (test_bit(__ICE_DOWN, vsi->state))
 301                        return;
 302        wr32(hw, GLINT_DYN_CTL(vector), val);
 303}
 304
 305static inline void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
 306{
 307        vsi->tc_cfg.ena_tc =  ICE_DFLT_TRAFFIC_CLASS;
 308        vsi->tc_cfg.numtc = 1;
 309}
 310
 311void ice_set_ethtool_ops(struct net_device *netdev);
 312int ice_up(struct ice_vsi *vsi);
 313int ice_down(struct ice_vsi *vsi);
 314int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 315int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 316void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
 317void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
 318
 319#endif /* _ICE_H_ */
 320