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19#ifndef _WMI_H_
20#define _WMI_H_
21
22#include <linux/types.h>
23#include <net/mac80211.h>
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65struct wmi_cmd_hdr {
66 __le32 cmd_id;
67} __packed;
68
69#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
70#define WMI_CMD_HDR_CMD_ID_LSB 0
71#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
72#define WMI_CMD_HDR_PLT_PRIV_LSB 24
73
74#define HTC_PROTOCOL_VERSION 0x0002
75#define WMI_PROTOCOL_VERSION 0x0002
76
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83
84typedef __s32 __bitwise a_sle32;
85
86static inline a_sle32 a_cpu_to_sle32(s32 val)
87{
88 return (__force a_sle32)cpu_to_le32(val);
89}
90
91static inline s32 a_sle32_to_cpu(a_sle32 val)
92{
93 return le32_to_cpu((__force __le32)val);
94}
95
96enum wmi_service {
97 WMI_SERVICE_BEACON_OFFLOAD = 0,
98 WMI_SERVICE_SCAN_OFFLOAD,
99 WMI_SERVICE_ROAM_OFFLOAD,
100 WMI_SERVICE_BCN_MISS_OFFLOAD,
101 WMI_SERVICE_STA_PWRSAVE,
102 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
103 WMI_SERVICE_AP_UAPSD,
104 WMI_SERVICE_AP_DFS,
105 WMI_SERVICE_11AC,
106 WMI_SERVICE_BLOCKACK,
107 WMI_SERVICE_PHYERR,
108 WMI_SERVICE_BCN_FILTER,
109 WMI_SERVICE_RTT,
110 WMI_SERVICE_RATECTRL,
111 WMI_SERVICE_WOW,
112 WMI_SERVICE_RATECTRL_CACHE,
113 WMI_SERVICE_IRAM_TIDS,
114 WMI_SERVICE_ARPNS_OFFLOAD,
115 WMI_SERVICE_NLO,
116 WMI_SERVICE_GTK_OFFLOAD,
117 WMI_SERVICE_SCAN_SCH,
118 WMI_SERVICE_CSA_OFFLOAD,
119 WMI_SERVICE_CHATTER,
120 WMI_SERVICE_COEX_FREQAVOID,
121 WMI_SERVICE_PACKET_POWER_SAVE,
122 WMI_SERVICE_FORCE_FW_HANG,
123 WMI_SERVICE_GPIO,
124 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
125 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
126 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
127 WMI_SERVICE_STA_KEEP_ALIVE,
128 WMI_SERVICE_TX_ENCAP,
129 WMI_SERVICE_BURST,
130 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
131 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
132 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
133 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
134 WMI_SERVICE_EARLY_RX,
135 WMI_SERVICE_STA_SMPS,
136 WMI_SERVICE_FWTEST,
137 WMI_SERVICE_STA_WMMAC,
138 WMI_SERVICE_TDLS,
139 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
140 WMI_SERVICE_ADAPTIVE_OCS,
141 WMI_SERVICE_BA_SSN_SUPPORT,
142 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
143 WMI_SERVICE_WLAN_HB,
144 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
145 WMI_SERVICE_BATCH_SCAN,
146 WMI_SERVICE_QPOWER,
147 WMI_SERVICE_PLMREQ,
148 WMI_SERVICE_THERMAL_MGMT,
149 WMI_SERVICE_RMC,
150 WMI_SERVICE_MHF_OFFLOAD,
151 WMI_SERVICE_COEX_SAR,
152 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
153 WMI_SERVICE_NAN,
154 WMI_SERVICE_L1SS_STAT,
155 WMI_SERVICE_ESTIMATE_LINKSPEED,
156 WMI_SERVICE_OBSS_SCAN,
157 WMI_SERVICE_TDLS_OFFCHAN,
158 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
159 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
160 WMI_SERVICE_IBSS_PWRSAVE,
161 WMI_SERVICE_LPASS,
162 WMI_SERVICE_EXTSCAN,
163 WMI_SERVICE_D0WOW,
164 WMI_SERVICE_HSOFFLOAD,
165 WMI_SERVICE_ROAM_HO_OFFLOAD,
166 WMI_SERVICE_RX_FULL_REORDER,
167 WMI_SERVICE_DHCP_OFFLOAD,
168 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
169 WMI_SERVICE_MDNS_OFFLOAD,
170 WMI_SERVICE_SAP_AUTH_OFFLOAD,
171 WMI_SERVICE_ATF,
172 WMI_SERVICE_COEX_GPIO,
173 WMI_SERVICE_ENHANCED_PROXY_STA,
174 WMI_SERVICE_TT,
175 WMI_SERVICE_PEER_CACHING,
176 WMI_SERVICE_AUX_SPECTRAL_INTF,
177 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
178 WMI_SERVICE_BSS_CHANNEL_INFO_64,
179 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
180 WMI_SERVICE_MESH_11S,
181 WMI_SERVICE_MESH_NON_11S,
182 WMI_SERVICE_PEER_STATS,
183 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
184 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
185 WMI_SERVICE_TX_MODE_PUSH_ONLY,
186 WMI_SERVICE_TX_MODE_PUSH_PULL,
187 WMI_SERVICE_TX_MODE_DYNAMIC,
188 WMI_SERVICE_VDEV_RX_FILTER,
189 WMI_SERVICE_BTCOEX,
190 WMI_SERVICE_CHECK_CAL_VERSION,
191 WMI_SERVICE_DBGLOG_WARN2,
192 WMI_SERVICE_BTCOEX_DUTY_CYCLE,
193 WMI_SERVICE_4_WIRE_COEX_SUPPORT,
194 WMI_SERVICE_EXTENDED_NSS_SUPPORT,
195 WMI_SERVICE_PROG_GPIO_BAND_SELECT,
196 WMI_SERVICE_SMART_LOGGING_SUPPORT,
197 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
198 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
199 WMI_SERVICE_MGMT_TX_WMI,
200 WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
201 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
202 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
203 WMI_SERVICE_TPC_STATS_FINAL,
204 WMI_SERVICE_RESET_CHIP,
205 WMI_SERVICE_SPOOF_MAC_SUPPORT,
206
207
208 WMI_SERVICE_MAX,
209};
210
211enum wmi_10x_service {
212 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
213 WMI_10X_SERVICE_SCAN_OFFLOAD,
214 WMI_10X_SERVICE_ROAM_OFFLOAD,
215 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
216 WMI_10X_SERVICE_STA_PWRSAVE,
217 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
218 WMI_10X_SERVICE_AP_UAPSD,
219 WMI_10X_SERVICE_AP_DFS,
220 WMI_10X_SERVICE_11AC,
221 WMI_10X_SERVICE_BLOCKACK,
222 WMI_10X_SERVICE_PHYERR,
223 WMI_10X_SERVICE_BCN_FILTER,
224 WMI_10X_SERVICE_RTT,
225 WMI_10X_SERVICE_RATECTRL,
226 WMI_10X_SERVICE_WOW,
227 WMI_10X_SERVICE_RATECTRL_CACHE,
228 WMI_10X_SERVICE_IRAM_TIDS,
229 WMI_10X_SERVICE_BURST,
230
231
232 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
233 WMI_10X_SERVICE_FORCE_FW_HANG,
234 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
235 WMI_10X_SERVICE_ATF,
236 WMI_10X_SERVICE_COEX_GPIO,
237 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
238 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
239 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
240 WMI_10X_SERVICE_MESH,
241 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
242 WMI_10X_SERVICE_PEER_STATS,
243 WMI_10X_SERVICE_RESET_CHIP,
244 WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
245};
246
247enum wmi_main_service {
248 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
249 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
250 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
251 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
252 WMI_MAIN_SERVICE_STA_PWRSAVE,
253 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
254 WMI_MAIN_SERVICE_AP_UAPSD,
255 WMI_MAIN_SERVICE_AP_DFS,
256 WMI_MAIN_SERVICE_11AC,
257 WMI_MAIN_SERVICE_BLOCKACK,
258 WMI_MAIN_SERVICE_PHYERR,
259 WMI_MAIN_SERVICE_BCN_FILTER,
260 WMI_MAIN_SERVICE_RTT,
261 WMI_MAIN_SERVICE_RATECTRL,
262 WMI_MAIN_SERVICE_WOW,
263 WMI_MAIN_SERVICE_RATECTRL_CACHE,
264 WMI_MAIN_SERVICE_IRAM_TIDS,
265 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
266 WMI_MAIN_SERVICE_NLO,
267 WMI_MAIN_SERVICE_GTK_OFFLOAD,
268 WMI_MAIN_SERVICE_SCAN_SCH,
269 WMI_MAIN_SERVICE_CSA_OFFLOAD,
270 WMI_MAIN_SERVICE_CHATTER,
271 WMI_MAIN_SERVICE_COEX_FREQAVOID,
272 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
273 WMI_MAIN_SERVICE_FORCE_FW_HANG,
274 WMI_MAIN_SERVICE_GPIO,
275 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
276 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
277 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
278 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
279 WMI_MAIN_SERVICE_TX_ENCAP,
280};
281
282enum wmi_10_4_service {
283 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
284 WMI_10_4_SERVICE_SCAN_OFFLOAD,
285 WMI_10_4_SERVICE_ROAM_OFFLOAD,
286 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
287 WMI_10_4_SERVICE_STA_PWRSAVE,
288 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
289 WMI_10_4_SERVICE_AP_UAPSD,
290 WMI_10_4_SERVICE_AP_DFS,
291 WMI_10_4_SERVICE_11AC,
292 WMI_10_4_SERVICE_BLOCKACK,
293 WMI_10_4_SERVICE_PHYERR,
294 WMI_10_4_SERVICE_BCN_FILTER,
295 WMI_10_4_SERVICE_RTT,
296 WMI_10_4_SERVICE_RATECTRL,
297 WMI_10_4_SERVICE_WOW,
298 WMI_10_4_SERVICE_RATECTRL_CACHE,
299 WMI_10_4_SERVICE_IRAM_TIDS,
300 WMI_10_4_SERVICE_BURST,
301 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
302 WMI_10_4_SERVICE_GTK_OFFLOAD,
303 WMI_10_4_SERVICE_SCAN_SCH,
304 WMI_10_4_SERVICE_CSA_OFFLOAD,
305 WMI_10_4_SERVICE_CHATTER,
306 WMI_10_4_SERVICE_COEX_FREQAVOID,
307 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
308 WMI_10_4_SERVICE_FORCE_FW_HANG,
309 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
310 WMI_10_4_SERVICE_GPIO,
311 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
312 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
313 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
314 WMI_10_4_SERVICE_TX_ENCAP,
315 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
316 WMI_10_4_SERVICE_EARLY_RX,
317 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
318 WMI_10_4_SERVICE_TT,
319 WMI_10_4_SERVICE_ATF,
320 WMI_10_4_SERVICE_PEER_CACHING,
321 WMI_10_4_SERVICE_COEX_GPIO,
322 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
323 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
324 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
325 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
326 WMI_10_4_SERVICE_MESH_NON_11S,
327 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
328 WMI_10_4_SERVICE_PEER_STATS,
329 WMI_10_4_SERVICE_MESH_11S,
330 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
331 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
332 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
333 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
334 WMI_10_4_SERVICE_VDEV_RX_FILTER,
335 WMI_10_4_SERVICE_BTCOEX,
336 WMI_10_4_SERVICE_CHECK_CAL_VERSION,
337 WMI_10_4_SERVICE_DBGLOG_WARN2,
338 WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
339 WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
340 WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
341 WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
342 WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
343 WMI_10_4_SERVICE_TDLS,
344 WMI_10_4_SERVICE_TDLS_OFFCHAN,
345 WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
346 WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
347 WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
348 WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
349 WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
350 WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
351 WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
352 WMI_10_4_SERVICE_TPC_STATS_FINAL,
353};
354
355static inline char *wmi_service_name(int service_id)
356{
357#define SVCSTR(x) case x: return #x
358
359 switch (service_id) {
360 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
361 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
362 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
363 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
364 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
365 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
366 SVCSTR(WMI_SERVICE_AP_UAPSD);
367 SVCSTR(WMI_SERVICE_AP_DFS);
368 SVCSTR(WMI_SERVICE_11AC);
369 SVCSTR(WMI_SERVICE_BLOCKACK);
370 SVCSTR(WMI_SERVICE_PHYERR);
371 SVCSTR(WMI_SERVICE_BCN_FILTER);
372 SVCSTR(WMI_SERVICE_RTT);
373 SVCSTR(WMI_SERVICE_RATECTRL);
374 SVCSTR(WMI_SERVICE_WOW);
375 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
376 SVCSTR(WMI_SERVICE_IRAM_TIDS);
377 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
378 SVCSTR(WMI_SERVICE_NLO);
379 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
380 SVCSTR(WMI_SERVICE_SCAN_SCH);
381 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
382 SVCSTR(WMI_SERVICE_CHATTER);
383 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
384 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
385 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
386 SVCSTR(WMI_SERVICE_GPIO);
387 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
388 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
389 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
390 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
391 SVCSTR(WMI_SERVICE_TX_ENCAP);
392 SVCSTR(WMI_SERVICE_BURST);
393 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
394 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
395 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
396 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
397 SVCSTR(WMI_SERVICE_EARLY_RX);
398 SVCSTR(WMI_SERVICE_STA_SMPS);
399 SVCSTR(WMI_SERVICE_FWTEST);
400 SVCSTR(WMI_SERVICE_STA_WMMAC);
401 SVCSTR(WMI_SERVICE_TDLS);
402 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
403 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
404 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
405 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
406 SVCSTR(WMI_SERVICE_WLAN_HB);
407 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
408 SVCSTR(WMI_SERVICE_BATCH_SCAN);
409 SVCSTR(WMI_SERVICE_QPOWER);
410 SVCSTR(WMI_SERVICE_PLMREQ);
411 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
412 SVCSTR(WMI_SERVICE_RMC);
413 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
414 SVCSTR(WMI_SERVICE_COEX_SAR);
415 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
416 SVCSTR(WMI_SERVICE_NAN);
417 SVCSTR(WMI_SERVICE_L1SS_STAT);
418 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
419 SVCSTR(WMI_SERVICE_OBSS_SCAN);
420 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
421 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
422 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
423 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
424 SVCSTR(WMI_SERVICE_LPASS);
425 SVCSTR(WMI_SERVICE_EXTSCAN);
426 SVCSTR(WMI_SERVICE_D0WOW);
427 SVCSTR(WMI_SERVICE_HSOFFLOAD);
428 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
429 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
430 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
431 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
432 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
433 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
434 SVCSTR(WMI_SERVICE_ATF);
435 SVCSTR(WMI_SERVICE_COEX_GPIO);
436 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
437 SVCSTR(WMI_SERVICE_TT);
438 SVCSTR(WMI_SERVICE_PEER_CACHING);
439 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
440 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
441 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
442 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
443 SVCSTR(WMI_SERVICE_MESH_11S);
444 SVCSTR(WMI_SERVICE_MESH_NON_11S);
445 SVCSTR(WMI_SERVICE_PEER_STATS);
446 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
447 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
448 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
449 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
450 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
451 SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
452 SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
453 SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
454 SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
455 SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
456 SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
457 SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
458 SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
459 SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
460 SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
461 SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
462 SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
463 SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
464 SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
465 SVCSTR(WMI_SERVICE_RESET_CHIP);
466 default:
467 return NULL;
468 }
469
470#undef SVCSTR
471}
472
473#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
474 ((svc_id) < (len) && \
475 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
476 BIT((svc_id) % (sizeof(u32))))
477
478
479
480
481
482
483#define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
484 ((svc_id) >= (len) && \
485 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
486 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
487
488#define SVCMAP(x, y, len) \
489 do { \
490 if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
491 (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
492 __set_bit(y, out); \
493 } while (0)
494
495static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
496 size_t len)
497{
498 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
499 WMI_SERVICE_BEACON_OFFLOAD, len);
500 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
501 WMI_SERVICE_SCAN_OFFLOAD, len);
502 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
503 WMI_SERVICE_ROAM_OFFLOAD, len);
504 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
505 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
506 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
507 WMI_SERVICE_STA_PWRSAVE, len);
508 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
509 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
510 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
511 WMI_SERVICE_AP_UAPSD, len);
512 SVCMAP(WMI_10X_SERVICE_AP_DFS,
513 WMI_SERVICE_AP_DFS, len);
514 SVCMAP(WMI_10X_SERVICE_11AC,
515 WMI_SERVICE_11AC, len);
516 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
517 WMI_SERVICE_BLOCKACK, len);
518 SVCMAP(WMI_10X_SERVICE_PHYERR,
519 WMI_SERVICE_PHYERR, len);
520 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
521 WMI_SERVICE_BCN_FILTER, len);
522 SVCMAP(WMI_10X_SERVICE_RTT,
523 WMI_SERVICE_RTT, len);
524 SVCMAP(WMI_10X_SERVICE_RATECTRL,
525 WMI_SERVICE_RATECTRL, len);
526 SVCMAP(WMI_10X_SERVICE_WOW,
527 WMI_SERVICE_WOW, len);
528 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
529 WMI_SERVICE_RATECTRL_CACHE, len);
530 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
531 WMI_SERVICE_IRAM_TIDS, len);
532 SVCMAP(WMI_10X_SERVICE_BURST,
533 WMI_SERVICE_BURST, len);
534 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
535 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
536 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
537 WMI_SERVICE_FORCE_FW_HANG, len);
538 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
539 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
540 SVCMAP(WMI_10X_SERVICE_ATF,
541 WMI_SERVICE_ATF, len);
542 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
543 WMI_SERVICE_COEX_GPIO, len);
544 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
545 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
546 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
547 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
548 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
549 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
550 SVCMAP(WMI_10X_SERVICE_MESH,
551 WMI_SERVICE_MESH_11S, len);
552 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
553 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
554 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
555 WMI_SERVICE_PEER_STATS, len);
556 SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
557 WMI_SERVICE_RESET_CHIP, len);
558 SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
559 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
560}
561
562static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
563 size_t len)
564{
565 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
566 WMI_SERVICE_BEACON_OFFLOAD, len);
567 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
568 WMI_SERVICE_SCAN_OFFLOAD, len);
569 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
570 WMI_SERVICE_ROAM_OFFLOAD, len);
571 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
572 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
573 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
574 WMI_SERVICE_STA_PWRSAVE, len);
575 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
576 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
577 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
578 WMI_SERVICE_AP_UAPSD, len);
579 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
580 WMI_SERVICE_AP_DFS, len);
581 SVCMAP(WMI_MAIN_SERVICE_11AC,
582 WMI_SERVICE_11AC, len);
583 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
584 WMI_SERVICE_BLOCKACK, len);
585 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
586 WMI_SERVICE_PHYERR, len);
587 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
588 WMI_SERVICE_BCN_FILTER, len);
589 SVCMAP(WMI_MAIN_SERVICE_RTT,
590 WMI_SERVICE_RTT, len);
591 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
592 WMI_SERVICE_RATECTRL, len);
593 SVCMAP(WMI_MAIN_SERVICE_WOW,
594 WMI_SERVICE_WOW, len);
595 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
596 WMI_SERVICE_RATECTRL_CACHE, len);
597 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
598 WMI_SERVICE_IRAM_TIDS, len);
599 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
600 WMI_SERVICE_ARPNS_OFFLOAD, len);
601 SVCMAP(WMI_MAIN_SERVICE_NLO,
602 WMI_SERVICE_NLO, len);
603 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
604 WMI_SERVICE_GTK_OFFLOAD, len);
605 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
606 WMI_SERVICE_SCAN_SCH, len);
607 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
608 WMI_SERVICE_CSA_OFFLOAD, len);
609 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
610 WMI_SERVICE_CHATTER, len);
611 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
612 WMI_SERVICE_COEX_FREQAVOID, len);
613 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
614 WMI_SERVICE_PACKET_POWER_SAVE, len);
615 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
616 WMI_SERVICE_FORCE_FW_HANG, len);
617 SVCMAP(WMI_MAIN_SERVICE_GPIO,
618 WMI_SERVICE_GPIO, len);
619 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
620 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
621 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
622 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
623 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
624 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
625 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
626 WMI_SERVICE_STA_KEEP_ALIVE, len);
627 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
628 WMI_SERVICE_TX_ENCAP, len);
629}
630
631static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
632 size_t len)
633{
634 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
635 WMI_SERVICE_BEACON_OFFLOAD, len);
636 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
637 WMI_SERVICE_SCAN_OFFLOAD, len);
638 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
639 WMI_SERVICE_ROAM_OFFLOAD, len);
640 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
641 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
642 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
643 WMI_SERVICE_STA_PWRSAVE, len);
644 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
645 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
646 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
647 WMI_SERVICE_AP_UAPSD, len);
648 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
649 WMI_SERVICE_AP_DFS, len);
650 SVCMAP(WMI_10_4_SERVICE_11AC,
651 WMI_SERVICE_11AC, len);
652 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
653 WMI_SERVICE_BLOCKACK, len);
654 SVCMAP(WMI_10_4_SERVICE_PHYERR,
655 WMI_SERVICE_PHYERR, len);
656 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
657 WMI_SERVICE_BCN_FILTER, len);
658 SVCMAP(WMI_10_4_SERVICE_RTT,
659 WMI_SERVICE_RTT, len);
660 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
661 WMI_SERVICE_RATECTRL, len);
662 SVCMAP(WMI_10_4_SERVICE_WOW,
663 WMI_SERVICE_WOW, len);
664 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
665 WMI_SERVICE_RATECTRL_CACHE, len);
666 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
667 WMI_SERVICE_IRAM_TIDS, len);
668 SVCMAP(WMI_10_4_SERVICE_BURST,
669 WMI_SERVICE_BURST, len);
670 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
671 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
672 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
673 WMI_SERVICE_GTK_OFFLOAD, len);
674 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
675 WMI_SERVICE_SCAN_SCH, len);
676 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
677 WMI_SERVICE_CSA_OFFLOAD, len);
678 SVCMAP(WMI_10_4_SERVICE_CHATTER,
679 WMI_SERVICE_CHATTER, len);
680 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
681 WMI_SERVICE_COEX_FREQAVOID, len);
682 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
683 WMI_SERVICE_PACKET_POWER_SAVE, len);
684 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
685 WMI_SERVICE_FORCE_FW_HANG, len);
686 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
687 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
688 SVCMAP(WMI_10_4_SERVICE_GPIO,
689 WMI_SERVICE_GPIO, len);
690 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
691 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
692 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
693 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
694 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
695 WMI_SERVICE_STA_KEEP_ALIVE, len);
696 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
697 WMI_SERVICE_TX_ENCAP, len);
698 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
699 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
700 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
701 WMI_SERVICE_EARLY_RX, len);
702 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
703 WMI_SERVICE_ENHANCED_PROXY_STA, len);
704 SVCMAP(WMI_10_4_SERVICE_TT,
705 WMI_SERVICE_TT, len);
706 SVCMAP(WMI_10_4_SERVICE_ATF,
707 WMI_SERVICE_ATF, len);
708 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
709 WMI_SERVICE_PEER_CACHING, len);
710 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
711 WMI_SERVICE_COEX_GPIO, len);
712 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
713 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
714 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
715 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
716 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
717 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
718 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
719 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
720 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
721 WMI_SERVICE_MESH_NON_11S, len);
722 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
723 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
724 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
725 WMI_SERVICE_PEER_STATS, len);
726 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
727 WMI_SERVICE_MESH_11S, len);
728 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
729 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
730 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
731 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
732 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
733 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
734 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
735 WMI_SERVICE_TX_MODE_DYNAMIC, len);
736 SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
737 WMI_SERVICE_VDEV_RX_FILTER, len);
738 SVCMAP(WMI_10_4_SERVICE_BTCOEX,
739 WMI_SERVICE_BTCOEX, len);
740 SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
741 WMI_SERVICE_CHECK_CAL_VERSION, len);
742 SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
743 WMI_SERVICE_DBGLOG_WARN2, len);
744 SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
745 WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
746 SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
747 WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
748 SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
749 WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
750 SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
751 WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
752 SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
753 WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
754 SVCMAP(WMI_10_4_SERVICE_TDLS,
755 WMI_SERVICE_TDLS, len);
756 SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
757 WMI_SERVICE_TDLS_OFFCHAN, len);
758 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
759 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
760 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
761 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
762 SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
763 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
764 SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
765 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
766 SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
767 WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
768 SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
769 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
770 SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
771 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
772 SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
773 WMI_SERVICE_TPC_STATS_FINAL, len);
774}
775
776#undef SVCMAP
777
778
779struct wmi_mac_addr {
780 union {
781 u8 addr[6];
782 struct {
783 u32 word0;
784 u32 word1;
785 } __packed;
786 } __packed;
787} __packed;
788
789struct wmi_cmd_map {
790 u32 init_cmdid;
791 u32 start_scan_cmdid;
792 u32 stop_scan_cmdid;
793 u32 scan_chan_list_cmdid;
794 u32 scan_sch_prio_tbl_cmdid;
795 u32 scan_prob_req_oui_cmdid;
796 u32 pdev_set_regdomain_cmdid;
797 u32 pdev_set_channel_cmdid;
798 u32 pdev_set_param_cmdid;
799 u32 pdev_pktlog_enable_cmdid;
800 u32 pdev_pktlog_disable_cmdid;
801 u32 pdev_set_wmm_params_cmdid;
802 u32 pdev_set_ht_cap_ie_cmdid;
803 u32 pdev_set_vht_cap_ie_cmdid;
804 u32 pdev_set_dscp_tid_map_cmdid;
805 u32 pdev_set_quiet_mode_cmdid;
806 u32 pdev_green_ap_ps_enable_cmdid;
807 u32 pdev_get_tpc_config_cmdid;
808 u32 pdev_set_base_macaddr_cmdid;
809 u32 vdev_create_cmdid;
810 u32 vdev_delete_cmdid;
811 u32 vdev_start_request_cmdid;
812 u32 vdev_restart_request_cmdid;
813 u32 vdev_up_cmdid;
814 u32 vdev_stop_cmdid;
815 u32 vdev_down_cmdid;
816 u32 vdev_set_param_cmdid;
817 u32 vdev_install_key_cmdid;
818 u32 peer_create_cmdid;
819 u32 peer_delete_cmdid;
820 u32 peer_flush_tids_cmdid;
821 u32 peer_set_param_cmdid;
822 u32 peer_assoc_cmdid;
823 u32 peer_add_wds_entry_cmdid;
824 u32 peer_remove_wds_entry_cmdid;
825 u32 peer_mcast_group_cmdid;
826 u32 bcn_tx_cmdid;
827 u32 pdev_send_bcn_cmdid;
828 u32 bcn_tmpl_cmdid;
829 u32 bcn_filter_rx_cmdid;
830 u32 prb_req_filter_rx_cmdid;
831 u32 mgmt_tx_cmdid;
832 u32 mgmt_tx_send_cmdid;
833 u32 prb_tmpl_cmdid;
834 u32 addba_clear_resp_cmdid;
835 u32 addba_send_cmdid;
836 u32 addba_status_cmdid;
837 u32 delba_send_cmdid;
838 u32 addba_set_resp_cmdid;
839 u32 send_singleamsdu_cmdid;
840 u32 sta_powersave_mode_cmdid;
841 u32 sta_powersave_param_cmdid;
842 u32 sta_mimo_ps_mode_cmdid;
843 u32 pdev_dfs_enable_cmdid;
844 u32 pdev_dfs_disable_cmdid;
845 u32 roam_scan_mode;
846 u32 roam_scan_rssi_threshold;
847 u32 roam_scan_period;
848 u32 roam_scan_rssi_change_threshold;
849 u32 roam_ap_profile;
850 u32 ofl_scan_add_ap_profile;
851 u32 ofl_scan_remove_ap_profile;
852 u32 ofl_scan_period;
853 u32 p2p_dev_set_device_info;
854 u32 p2p_dev_set_discoverability;
855 u32 p2p_go_set_beacon_ie;
856 u32 p2p_go_set_probe_resp_ie;
857 u32 p2p_set_vendor_ie_data_cmdid;
858 u32 ap_ps_peer_param_cmdid;
859 u32 ap_ps_peer_uapsd_coex_cmdid;
860 u32 peer_rate_retry_sched_cmdid;
861 u32 wlan_profile_trigger_cmdid;
862 u32 wlan_profile_set_hist_intvl_cmdid;
863 u32 wlan_profile_get_profile_data_cmdid;
864 u32 wlan_profile_enable_profile_id_cmdid;
865 u32 wlan_profile_list_profile_id_cmdid;
866 u32 pdev_suspend_cmdid;
867 u32 pdev_resume_cmdid;
868 u32 add_bcn_filter_cmdid;
869 u32 rmv_bcn_filter_cmdid;
870 u32 wow_add_wake_pattern_cmdid;
871 u32 wow_del_wake_pattern_cmdid;
872 u32 wow_enable_disable_wake_event_cmdid;
873 u32 wow_enable_cmdid;
874 u32 wow_hostwakeup_from_sleep_cmdid;
875 u32 rtt_measreq_cmdid;
876 u32 rtt_tsf_cmdid;
877 u32 vdev_spectral_scan_configure_cmdid;
878 u32 vdev_spectral_scan_enable_cmdid;
879 u32 request_stats_cmdid;
880 u32 set_arp_ns_offload_cmdid;
881 u32 network_list_offload_config_cmdid;
882 u32 gtk_offload_cmdid;
883 u32 csa_offload_enable_cmdid;
884 u32 csa_offload_chanswitch_cmdid;
885 u32 chatter_set_mode_cmdid;
886 u32 peer_tid_addba_cmdid;
887 u32 peer_tid_delba_cmdid;
888 u32 sta_dtim_ps_method_cmdid;
889 u32 sta_uapsd_auto_trig_cmdid;
890 u32 sta_keepalive_cmd;
891 u32 echo_cmdid;
892 u32 pdev_utf_cmdid;
893 u32 dbglog_cfg_cmdid;
894 u32 pdev_qvit_cmdid;
895 u32 pdev_ftm_intg_cmdid;
896 u32 vdev_set_keepalive_cmdid;
897 u32 vdev_get_keepalive_cmdid;
898 u32 force_fw_hang_cmdid;
899 u32 gpio_config_cmdid;
900 u32 gpio_output_cmdid;
901 u32 pdev_get_temperature_cmdid;
902 u32 vdev_set_wmm_params_cmdid;
903 u32 tdls_set_state_cmdid;
904 u32 tdls_peer_update_cmdid;
905 u32 adaptive_qcs_cmdid;
906 u32 scan_update_request_cmdid;
907 u32 vdev_standby_response_cmdid;
908 u32 vdev_resume_response_cmdid;
909 u32 wlan_peer_caching_add_peer_cmdid;
910 u32 wlan_peer_caching_evict_peer_cmdid;
911 u32 wlan_peer_caching_restore_peer_cmdid;
912 u32 wlan_peer_caching_print_all_peers_info_cmdid;
913 u32 peer_update_wds_entry_cmdid;
914 u32 peer_add_proxy_sta_entry_cmdid;
915 u32 rtt_keepalive_cmdid;
916 u32 oem_req_cmdid;
917 u32 nan_cmdid;
918 u32 vdev_ratemask_cmdid;
919 u32 qboost_cfg_cmdid;
920 u32 pdev_smart_ant_enable_cmdid;
921 u32 pdev_smart_ant_set_rx_antenna_cmdid;
922 u32 peer_smart_ant_set_tx_antenna_cmdid;
923 u32 peer_smart_ant_set_train_info_cmdid;
924 u32 peer_smart_ant_set_node_config_ops_cmdid;
925 u32 pdev_set_antenna_switch_table_cmdid;
926 u32 pdev_set_ctl_table_cmdid;
927 u32 pdev_set_mimogain_table_cmdid;
928 u32 pdev_ratepwr_table_cmdid;
929 u32 pdev_ratepwr_chainmsk_table_cmdid;
930 u32 pdev_fips_cmdid;
931 u32 tt_set_conf_cmdid;
932 u32 fwtest_cmdid;
933 u32 vdev_atf_request_cmdid;
934 u32 peer_atf_request_cmdid;
935 u32 pdev_get_ani_cck_config_cmdid;
936 u32 pdev_get_ani_ofdm_config_cmdid;
937 u32 pdev_reserve_ast_entry_cmdid;
938 u32 pdev_get_nfcal_power_cmdid;
939 u32 pdev_get_tpc_cmdid;
940 u32 pdev_get_ast_info_cmdid;
941 u32 vdev_set_dscp_tid_map_cmdid;
942 u32 pdev_get_info_cmdid;
943 u32 vdev_get_info_cmdid;
944 u32 vdev_filter_neighbor_rx_packets_cmdid;
945 u32 mu_cal_start_cmdid;
946 u32 set_cca_params_cmdid;
947 u32 pdev_bss_chan_info_request_cmdid;
948 u32 pdev_enable_adaptive_cca_cmdid;
949 u32 ext_resource_cfg_cmdid;
950 u32 vdev_set_ie_cmdid;
951 u32 set_lteu_config_cmdid;
952 u32 atf_ssid_grouping_request_cmdid;
953 u32 peer_atf_ext_request_cmdid;
954 u32 set_periodic_channel_stats_cfg_cmdid;
955 u32 peer_bwf_request_cmdid;
956 u32 btcoex_cfg_cmdid;
957 u32 peer_tx_mu_txmit_count_cmdid;
958 u32 peer_tx_mu_txmit_rstcnt_cmdid;
959 u32 peer_gid_userpos_list_cmdid;
960 u32 pdev_check_cal_version_cmdid;
961 u32 coex_version_cfg_cmid;
962 u32 pdev_get_rx_filter_cmdid;
963 u32 pdev_extended_nss_cfg_cmdid;
964 u32 vdev_set_scan_nac_rssi_cmdid;
965 u32 prog_gpio_band_select_cmdid;
966 u32 config_smart_logging_cmdid;
967 u32 debug_fatal_condition_cmdid;
968 u32 get_tsf_timer_cmdid;
969 u32 pdev_get_tpc_table_cmdid;
970 u32 vdev_sifs_trigger_time_cmdid;
971 u32 pdev_wds_entry_list_cmdid;
972 u32 tdls_set_offchan_mode_cmdid;
973 u32 radar_found_cmdid;
974};
975
976
977
978
979enum wmi_cmd_group {
980
981 WMI_GRP_START = 0x3,
982 WMI_GRP_SCAN = WMI_GRP_START,
983 WMI_GRP_PDEV,
984 WMI_GRP_VDEV,
985 WMI_GRP_PEER,
986 WMI_GRP_MGMT,
987 WMI_GRP_BA_NEG,
988 WMI_GRP_STA_PS,
989 WMI_GRP_DFS,
990 WMI_GRP_ROAM,
991 WMI_GRP_OFL_SCAN,
992 WMI_GRP_P2P,
993 WMI_GRP_AP_PS,
994 WMI_GRP_RATE_CTRL,
995 WMI_GRP_PROFILE,
996 WMI_GRP_SUSPEND,
997 WMI_GRP_BCN_FILTER,
998 WMI_GRP_WOW,
999 WMI_GRP_RTT,
1000 WMI_GRP_SPECTRAL,
1001 WMI_GRP_STATS,
1002 WMI_GRP_ARP_NS_OFL,
1003 WMI_GRP_NLO_OFL,
1004 WMI_GRP_GTK_OFL,
1005 WMI_GRP_CSA_OFL,
1006 WMI_GRP_CHATTER,
1007 WMI_GRP_TID_ADDBA,
1008 WMI_GRP_MISC,
1009 WMI_GRP_GPIO,
1010};
1011
1012#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
1013#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
1014
1015#define WMI_CMD_UNSUPPORTED 0
1016
1017
1018enum wmi_cmd_id {
1019 WMI_INIT_CMDID = 0x1,
1020
1021
1022 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
1023 WMI_STOP_SCAN_CMDID,
1024 WMI_SCAN_CHAN_LIST_CMDID,
1025 WMI_SCAN_SCH_PRIO_TBL_CMDID,
1026
1027
1028 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
1029 WMI_PDEV_SET_CHANNEL_CMDID,
1030 WMI_PDEV_SET_PARAM_CMDID,
1031 WMI_PDEV_PKTLOG_ENABLE_CMDID,
1032 WMI_PDEV_PKTLOG_DISABLE_CMDID,
1033 WMI_PDEV_SET_WMM_PARAMS_CMDID,
1034 WMI_PDEV_SET_HT_CAP_IE_CMDID,
1035 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
1036 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
1037 WMI_PDEV_SET_QUIET_MODE_CMDID,
1038 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1039 WMI_PDEV_GET_TPC_CONFIG_CMDID,
1040 WMI_PDEV_SET_BASE_MACADDR_CMDID,
1041
1042
1043 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
1044 WMI_VDEV_DELETE_CMDID,
1045 WMI_VDEV_START_REQUEST_CMDID,
1046 WMI_VDEV_RESTART_REQUEST_CMDID,
1047 WMI_VDEV_UP_CMDID,
1048 WMI_VDEV_STOP_CMDID,
1049 WMI_VDEV_DOWN_CMDID,
1050 WMI_VDEV_SET_PARAM_CMDID,
1051 WMI_VDEV_INSTALL_KEY_CMDID,
1052
1053
1054 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
1055 WMI_PEER_DELETE_CMDID,
1056 WMI_PEER_FLUSH_TIDS_CMDID,
1057 WMI_PEER_SET_PARAM_CMDID,
1058 WMI_PEER_ASSOC_CMDID,
1059 WMI_PEER_ADD_WDS_ENTRY_CMDID,
1060 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
1061 WMI_PEER_MCAST_GROUP_CMDID,
1062
1063
1064 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
1065 WMI_PDEV_SEND_BCN_CMDID,
1066 WMI_BCN_TMPL_CMDID,
1067 WMI_BCN_FILTER_RX_CMDID,
1068 WMI_PRB_REQ_FILTER_RX_CMDID,
1069 WMI_MGMT_TX_CMDID,
1070 WMI_PRB_TMPL_CMDID,
1071
1072
1073 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
1074 WMI_ADDBA_SEND_CMDID,
1075 WMI_ADDBA_STATUS_CMDID,
1076 WMI_DELBA_SEND_CMDID,
1077 WMI_ADDBA_SET_RESP_CMDID,
1078 WMI_SEND_SINGLEAMSDU_CMDID,
1079
1080
1081 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
1082 WMI_STA_POWERSAVE_PARAM_CMDID,
1083 WMI_STA_MIMO_PS_MODE_CMDID,
1084
1085
1086 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
1087 WMI_PDEV_DFS_DISABLE_CMDID,
1088
1089
1090 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
1091 WMI_ROAM_SCAN_RSSI_THRESHOLD,
1092 WMI_ROAM_SCAN_PERIOD,
1093 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1094 WMI_ROAM_AP_PROFILE,
1095
1096
1097 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
1098 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
1099 WMI_OFL_SCAN_PERIOD,
1100
1101
1102 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
1103 WMI_P2P_DEV_SET_DISCOVERABILITY,
1104 WMI_P2P_GO_SET_BEACON_IE,
1105 WMI_P2P_GO_SET_PROBE_RESP_IE,
1106 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
1107
1108
1109 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
1110 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
1111
1112
1113 WMI_PEER_RATE_RETRY_SCHED_CMDID =
1114 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
1115
1116
1117 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
1118 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1119 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1120 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1121 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1122
1123
1124 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
1125 WMI_PDEV_RESUME_CMDID,
1126
1127
1128 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
1129 WMI_RMV_BCN_FILTER_CMDID,
1130
1131
1132 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
1133 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1134 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1135 WMI_WOW_ENABLE_CMDID,
1136 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1137
1138
1139 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1140 WMI_RTT_TSF_CMDID,
1141
1142
1143 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1144 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1145
1146
1147 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1148
1149
1150 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1151
1152
1153 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1154
1155
1156 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1157
1158
1159 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1160 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1161
1162
1163 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1164
1165
1166 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1167 WMI_PEER_TID_DELBA_CMDID,
1168
1169
1170 WMI_STA_DTIM_PS_METHOD_CMDID,
1171
1172 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1173
1174
1175
1176
1177 WMI_STA_KEEPALIVE_CMD,
1178
1179
1180 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1181 WMI_PDEV_UTF_CMDID,
1182 WMI_DBGLOG_CFG_CMDID,
1183 WMI_PDEV_QVIT_CMDID,
1184 WMI_PDEV_FTM_INTG_CMDID,
1185 WMI_VDEV_SET_KEEPALIVE_CMDID,
1186 WMI_VDEV_GET_KEEPALIVE_CMDID,
1187 WMI_FORCE_FW_HANG_CMDID,
1188
1189
1190 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1191 WMI_GPIO_OUTPUT_CMDID,
1192};
1193
1194enum wmi_event_id {
1195 WMI_SERVICE_READY_EVENTID = 0x1,
1196 WMI_READY_EVENTID,
1197 WMI_SERVICE_AVAILABLE_EVENTID,
1198
1199
1200 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1201
1202
1203 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1204 WMI_CHAN_INFO_EVENTID,
1205 WMI_PHYERR_EVENTID,
1206
1207
1208 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1209 WMI_VDEV_STOPPED_EVENTID,
1210 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1211
1212
1213 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1214
1215
1216 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1217 WMI_HOST_SWBA_EVENTID,
1218 WMI_TBTTOFFSET_UPDATE_EVENTID,
1219
1220
1221 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1222 WMI_TX_ADDBA_COMPLETE_EVENTID,
1223
1224
1225 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1226 WMI_PROFILE_MATCH,
1227
1228
1229 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1230
1231
1232 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1233 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1234 WMI_RTT_ERROR_REPORT_EVENTID,
1235
1236
1237 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1238 WMI_GTK_REKEY_FAIL_EVENTID,
1239
1240
1241 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1242
1243
1244 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1245 WMI_PDEV_UTF_EVENTID,
1246 WMI_DEBUG_MESG_EVENTID,
1247 WMI_UPDATE_STATS_EVENTID,
1248 WMI_DEBUG_PRINT_EVENTID,
1249 WMI_DCS_INTERFERENCE_EVENTID,
1250 WMI_PDEV_QVIT_EVENTID,
1251 WMI_WLAN_PROFILE_DATA_EVENTID,
1252 WMI_PDEV_FTM_INTG_EVENTID,
1253 WMI_WLAN_FREQ_AVOID_EVENTID,
1254 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1255
1256
1257 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1258};
1259
1260
1261enum wmi_10x_cmd_id {
1262 WMI_10X_START_CMDID = 0x9000,
1263 WMI_10X_END_CMDID = 0x9FFF,
1264
1265
1266 WMI_10X_INIT_CMDID,
1267
1268
1269
1270 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1271 WMI_10X_STOP_SCAN_CMDID,
1272 WMI_10X_SCAN_CHAN_LIST_CMDID,
1273 WMI_10X_ECHO_CMDID,
1274
1275
1276 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1277 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1278 WMI_10X_PDEV_SET_PARAM_CMDID,
1279 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1280 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1281 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1282 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1283 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1284 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1285 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1286 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1287 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1288 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1289
1290
1291 WMI_10X_VDEV_CREATE_CMDID,
1292 WMI_10X_VDEV_DELETE_CMDID,
1293 WMI_10X_VDEV_START_REQUEST_CMDID,
1294 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1295 WMI_10X_VDEV_UP_CMDID,
1296 WMI_10X_VDEV_STOP_CMDID,
1297 WMI_10X_VDEV_DOWN_CMDID,
1298 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1299 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1300 WMI_10X_VDEV_SET_PARAM_CMDID,
1301 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1302
1303
1304 WMI_10X_PEER_CREATE_CMDID,
1305 WMI_10X_PEER_DELETE_CMDID,
1306 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1307 WMI_10X_PEER_SET_PARAM_CMDID,
1308 WMI_10X_PEER_ASSOC_CMDID,
1309 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1310 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1311 WMI_10X_PEER_MCAST_GROUP_CMDID,
1312
1313
1314
1315 WMI_10X_BCN_TX_CMDID,
1316 WMI_10X_BCN_PRB_TMPL_CMDID,
1317 WMI_10X_BCN_FILTER_RX_CMDID,
1318 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1319 WMI_10X_MGMT_TX_CMDID,
1320
1321
1322 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1323 WMI_10X_ADDBA_SEND_CMDID,
1324 WMI_10X_ADDBA_STATUS_CMDID,
1325 WMI_10X_DELBA_SEND_CMDID,
1326 WMI_10X_ADDBA_SET_RESP_CMDID,
1327 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1328
1329
1330 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1331 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1332 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1333
1334
1335 WMI_10X_DBGLOG_CFG_CMDID,
1336
1337
1338 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1339 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1340
1341
1342 WMI_10X_PDEV_QVIT_CMDID,
1343
1344
1345 WMI_10X_ROAM_SCAN_MODE,
1346 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1347 WMI_10X_ROAM_SCAN_PERIOD,
1348 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1349 WMI_10X_ROAM_AP_PROFILE,
1350 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1351 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1352 WMI_10X_OFL_SCAN_PERIOD,
1353
1354
1355 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1356 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1357 WMI_10X_P2P_GO_SET_BEACON_IE,
1358 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1359
1360
1361 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1362 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1363
1364
1365 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1366
1367
1368 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1369 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1370 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1371 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1372 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1373
1374
1375 WMI_10X_PDEV_SUSPEND_CMDID,
1376 WMI_10X_PDEV_RESUME_CMDID,
1377
1378
1379 WMI_10X_ADD_BCN_FILTER_CMDID,
1380 WMI_10X_RMV_BCN_FILTER_CMDID,
1381
1382
1383 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1384 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1385 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1386 WMI_10X_WOW_ENABLE_CMDID,
1387 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1388
1389
1390 WMI_10X_RTT_MEASREQ_CMDID,
1391 WMI_10X_RTT_TSF_CMDID,
1392
1393
1394 WMI_10X_PDEV_SEND_BCN_CMDID,
1395
1396
1397 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1398 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1399 WMI_10X_REQUEST_STATS_CMDID,
1400
1401
1402 WMI_10X_GPIO_CONFIG_CMDID,
1403 WMI_10X_GPIO_OUTPUT_CMDID,
1404
1405 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1406};
1407
1408enum wmi_10x_event_id {
1409 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1410 WMI_10X_READY_EVENTID,
1411 WMI_10X_START_EVENTID = 0x9000,
1412 WMI_10X_END_EVENTID = 0x9FFF,
1413
1414
1415 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1416 WMI_10X_ECHO_EVENTID,
1417 WMI_10X_DEBUG_MESG_EVENTID,
1418 WMI_10X_UPDATE_STATS_EVENTID,
1419
1420
1421 WMI_10X_INST_RSSI_STATS_EVENTID,
1422
1423
1424 WMI_10X_VDEV_START_RESP_EVENTID,
1425 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1426 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1427 WMI_10X_VDEV_STOPPED_EVENTID,
1428
1429
1430 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1431
1432
1433 WMI_10X_HOST_SWBA_EVENTID,
1434 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1435 WMI_10X_MGMT_RX_EVENTID,
1436
1437
1438 WMI_10X_CHAN_INFO_EVENTID,
1439
1440
1441 WMI_10X_PHYERR_EVENTID,
1442
1443
1444 WMI_10X_ROAM_EVENTID,
1445
1446
1447 WMI_10X_PROFILE_MATCH,
1448
1449
1450 WMI_10X_DEBUG_PRINT_EVENTID,
1451
1452 WMI_10X_PDEV_QVIT_EVENTID,
1453
1454 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1455
1456
1457 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1458 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1459 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1460
1461 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1462 WMI_10X_DCS_INTERFERENCE_EVENTID,
1463
1464
1465 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1466
1467 WMI_10X_GPIO_INPUT_EVENTID,
1468 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1469};
1470
1471enum wmi_10_2_cmd_id {
1472 WMI_10_2_START_CMDID = 0x9000,
1473 WMI_10_2_END_CMDID = 0x9FFF,
1474 WMI_10_2_INIT_CMDID,
1475 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1476 WMI_10_2_STOP_SCAN_CMDID,
1477 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1478 WMI_10_2_ECHO_CMDID,
1479 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1480 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1481 WMI_10_2_PDEV_SET_PARAM_CMDID,
1482 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1483 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1484 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1485 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1486 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1487 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1488 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1489 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1490 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1491 WMI_10_2_VDEV_CREATE_CMDID,
1492 WMI_10_2_VDEV_DELETE_CMDID,
1493 WMI_10_2_VDEV_START_REQUEST_CMDID,
1494 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1495 WMI_10_2_VDEV_UP_CMDID,
1496 WMI_10_2_VDEV_STOP_CMDID,
1497 WMI_10_2_VDEV_DOWN_CMDID,
1498 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1499 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1500 WMI_10_2_VDEV_SET_PARAM_CMDID,
1501 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1502 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1503 WMI_10_2_PEER_CREATE_CMDID,
1504 WMI_10_2_PEER_DELETE_CMDID,
1505 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1506 WMI_10_2_PEER_SET_PARAM_CMDID,
1507 WMI_10_2_PEER_ASSOC_CMDID,
1508 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1509 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1510 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1511 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1512 WMI_10_2_BCN_TX_CMDID,
1513 WMI_10_2_BCN_PRB_TMPL_CMDID,
1514 WMI_10_2_BCN_FILTER_RX_CMDID,
1515 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1516 WMI_10_2_MGMT_TX_CMDID,
1517 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1518 WMI_10_2_ADDBA_SEND_CMDID,
1519 WMI_10_2_ADDBA_STATUS_CMDID,
1520 WMI_10_2_DELBA_SEND_CMDID,
1521 WMI_10_2_ADDBA_SET_RESP_CMDID,
1522 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1523 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1524 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1525 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1526 WMI_10_2_DBGLOG_CFG_CMDID,
1527 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1528 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1529 WMI_10_2_PDEV_QVIT_CMDID,
1530 WMI_10_2_ROAM_SCAN_MODE,
1531 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1532 WMI_10_2_ROAM_SCAN_PERIOD,
1533 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1534 WMI_10_2_ROAM_AP_PROFILE,
1535 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1536 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1537 WMI_10_2_OFL_SCAN_PERIOD,
1538 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1539 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1540 WMI_10_2_P2P_GO_SET_BEACON_IE,
1541 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1542 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1543 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1544 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1545 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1546 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1547 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1548 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1549 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1550 WMI_10_2_PDEV_SUSPEND_CMDID,
1551 WMI_10_2_PDEV_RESUME_CMDID,
1552 WMI_10_2_ADD_BCN_FILTER_CMDID,
1553 WMI_10_2_RMV_BCN_FILTER_CMDID,
1554 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1555 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1556 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1557 WMI_10_2_WOW_ENABLE_CMDID,
1558 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1559 WMI_10_2_RTT_MEASREQ_CMDID,
1560 WMI_10_2_RTT_TSF_CMDID,
1561 WMI_10_2_RTT_KEEPALIVE_CMDID,
1562 WMI_10_2_PDEV_SEND_BCN_CMDID,
1563 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1564 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1565 WMI_10_2_REQUEST_STATS_CMDID,
1566 WMI_10_2_GPIO_CONFIG_CMDID,
1567 WMI_10_2_GPIO_OUTPUT_CMDID,
1568 WMI_10_2_VDEV_RATEMASK_CMDID,
1569 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1570 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1571 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1572 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1573 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1574 WMI_10_2_FORCE_FW_HANG_CMDID,
1575 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1576 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1577 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1578 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1579 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1580 WMI_10_2_PDEV_GET_INFO,
1581 WMI_10_2_VDEV_GET_INFO,
1582 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1583 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1584 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1585 WMI_10_2_MU_CAL_START_CMDID,
1586 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1587 WMI_10_2_SET_CCA_PARAMS,
1588 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1589 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1590};
1591
1592enum wmi_10_2_event_id {
1593 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1594 WMI_10_2_READY_EVENTID,
1595 WMI_10_2_DEBUG_MESG_EVENTID,
1596 WMI_10_2_START_EVENTID = 0x9000,
1597 WMI_10_2_END_EVENTID = 0x9FFF,
1598 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1599 WMI_10_2_ECHO_EVENTID,
1600 WMI_10_2_UPDATE_STATS_EVENTID,
1601 WMI_10_2_INST_RSSI_STATS_EVENTID,
1602 WMI_10_2_VDEV_START_RESP_EVENTID,
1603 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1604 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1605 WMI_10_2_VDEV_STOPPED_EVENTID,
1606 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1607 WMI_10_2_HOST_SWBA_EVENTID,
1608 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1609 WMI_10_2_MGMT_RX_EVENTID,
1610 WMI_10_2_CHAN_INFO_EVENTID,
1611 WMI_10_2_PHYERR_EVENTID,
1612 WMI_10_2_ROAM_EVENTID,
1613 WMI_10_2_PROFILE_MATCH,
1614 WMI_10_2_DEBUG_PRINT_EVENTID,
1615 WMI_10_2_PDEV_QVIT_EVENTID,
1616 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1617 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1618 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1619 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1620 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1621 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1622 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1623 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1624 WMI_10_2_GPIO_INPUT_EVENTID,
1625 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1626 WMI_10_2_GENERIC_BUFFER_EVENTID,
1627 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1628 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1629 WMI_10_2_WDS_PEER_EVENTID,
1630 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1631 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1632 WMI_10_2_MU_REPORT_EVENTID,
1633 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1634 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1635};
1636
1637enum wmi_10_4_cmd_id {
1638 WMI_10_4_START_CMDID = 0x9000,
1639 WMI_10_4_END_CMDID = 0x9FFF,
1640 WMI_10_4_INIT_CMDID,
1641 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1642 WMI_10_4_STOP_SCAN_CMDID,
1643 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1644 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1645 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1646 WMI_10_4_ECHO_CMDID,
1647 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1648 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1649 WMI_10_4_PDEV_SET_PARAM_CMDID,
1650 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1651 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1652 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1653 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1654 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1655 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1656 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1657 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1658 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1659 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1660 WMI_10_4_VDEV_CREATE_CMDID,
1661 WMI_10_4_VDEV_DELETE_CMDID,
1662 WMI_10_4_VDEV_START_REQUEST_CMDID,
1663 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1664 WMI_10_4_VDEV_UP_CMDID,
1665 WMI_10_4_VDEV_STOP_CMDID,
1666 WMI_10_4_VDEV_DOWN_CMDID,
1667 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1668 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1669 WMI_10_4_VDEV_SET_PARAM_CMDID,
1670 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1671 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1672 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1673 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1674 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1675 WMI_10_4_PEER_CREATE_CMDID,
1676 WMI_10_4_PEER_DELETE_CMDID,
1677 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1678 WMI_10_4_PEER_SET_PARAM_CMDID,
1679 WMI_10_4_PEER_ASSOC_CMDID,
1680 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1681 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1682 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1683 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1684 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1685 WMI_10_4_BCN_TX_CMDID,
1686 WMI_10_4_PDEV_SEND_BCN_CMDID,
1687 WMI_10_4_BCN_PRB_TMPL_CMDID,
1688 WMI_10_4_BCN_FILTER_RX_CMDID,
1689 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1690 WMI_10_4_MGMT_TX_CMDID,
1691 WMI_10_4_PRB_TMPL_CMDID,
1692 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1693 WMI_10_4_ADDBA_SEND_CMDID,
1694 WMI_10_4_ADDBA_STATUS_CMDID,
1695 WMI_10_4_DELBA_SEND_CMDID,
1696 WMI_10_4_ADDBA_SET_RESP_CMDID,
1697 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1698 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1699 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1700 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1701 WMI_10_4_DBGLOG_CFG_CMDID,
1702 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1703 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1704 WMI_10_4_PDEV_QVIT_CMDID,
1705 WMI_10_4_ROAM_SCAN_MODE,
1706 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1707 WMI_10_4_ROAM_SCAN_PERIOD,
1708 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1709 WMI_10_4_ROAM_AP_PROFILE,
1710 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1711 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1712 WMI_10_4_OFL_SCAN_PERIOD,
1713 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1714 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1715 WMI_10_4_P2P_GO_SET_BEACON_IE,
1716 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1717 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1718 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1719 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1720 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1721 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1722 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1723 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1724 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1725 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1726 WMI_10_4_PDEV_SUSPEND_CMDID,
1727 WMI_10_4_PDEV_RESUME_CMDID,
1728 WMI_10_4_ADD_BCN_FILTER_CMDID,
1729 WMI_10_4_RMV_BCN_FILTER_CMDID,
1730 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1731 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1732 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1733 WMI_10_4_WOW_ENABLE_CMDID,
1734 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1735 WMI_10_4_RTT_MEASREQ_CMDID,
1736 WMI_10_4_RTT_TSF_CMDID,
1737 WMI_10_4_RTT_KEEPALIVE_CMDID,
1738 WMI_10_4_OEM_REQ_CMDID,
1739 WMI_10_4_NAN_CMDID,
1740 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1741 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1742 WMI_10_4_REQUEST_STATS_CMDID,
1743 WMI_10_4_GPIO_CONFIG_CMDID,
1744 WMI_10_4_GPIO_OUTPUT_CMDID,
1745 WMI_10_4_VDEV_RATEMASK_CMDID,
1746 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1747 WMI_10_4_GTK_OFFLOAD_CMDID,
1748 WMI_10_4_QBOOST_CFG_CMDID,
1749 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1750 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1751 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1752 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1753 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1754 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1755 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1756 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1757 WMI_10_4_FORCE_FW_HANG_CMDID,
1758 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1759 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1760 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1761 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1762 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1763 WMI_10_4_PDEV_FIPS_CMDID,
1764 WMI_10_4_TT_SET_CONF_CMDID,
1765 WMI_10_4_FWTEST_CMDID,
1766 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1767 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1768 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1769 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1770 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1771 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1772 WMI_10_4_PDEV_GET_TPC_CMDID,
1773 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1774 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1775 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1776 WMI_10_4_PDEV_GET_INFO_CMDID,
1777 WMI_10_4_VDEV_GET_INFO_CMDID,
1778 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1779 WMI_10_4_MU_CAL_START_CMDID,
1780 WMI_10_4_SET_CCA_PARAMS_CMDID,
1781 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1782 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1783 WMI_10_4_VDEV_SET_IE_CMDID,
1784 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1785 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1786 WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1787 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1788 WMI_10_4_PEER_BWF_REQUEST_CMDID,
1789 WMI_10_4_BTCOEX_CFG_CMDID,
1790 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1791 WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1792 WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1793 WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1794 WMI_10_4_COEX_VERSION_CFG_CMID,
1795 WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1796 WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1797 WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1798 WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1799 WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1800 WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1801 WMI_10_4_GET_TSF_TIMER_CMDID,
1802 WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1803 WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1804 WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1805 WMI_10_4_TDLS_SET_STATE_CMDID,
1806 WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1807 WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
1808 WMI_10_4_PDEV_SEND_FD_CMDID,
1809 WMI_10_4_ENABLE_FILS_CMDID,
1810 WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
1811 WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
1812 WMI_10_4_RADAR_FOUND_CMDID,
1813 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1814};
1815
1816enum wmi_10_4_event_id {
1817 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1818 WMI_10_4_READY_EVENTID,
1819 WMI_10_4_DEBUG_MESG_EVENTID,
1820 WMI_10_4_START_EVENTID = 0x9000,
1821 WMI_10_4_END_EVENTID = 0x9FFF,
1822 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1823 WMI_10_4_ECHO_EVENTID,
1824 WMI_10_4_UPDATE_STATS_EVENTID,
1825 WMI_10_4_INST_RSSI_STATS_EVENTID,
1826 WMI_10_4_VDEV_START_RESP_EVENTID,
1827 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1828 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1829 WMI_10_4_VDEV_STOPPED_EVENTID,
1830 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1831 WMI_10_4_HOST_SWBA_EVENTID,
1832 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1833 WMI_10_4_MGMT_RX_EVENTID,
1834 WMI_10_4_CHAN_INFO_EVENTID,
1835 WMI_10_4_PHYERR_EVENTID,
1836 WMI_10_4_ROAM_EVENTID,
1837 WMI_10_4_PROFILE_MATCH,
1838 WMI_10_4_DEBUG_PRINT_EVENTID,
1839 WMI_10_4_PDEV_QVIT_EVENTID,
1840 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1841 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1842 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1843 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1844 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1845 WMI_10_4_OEM_CAPABILITY_EVENTID,
1846 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1847 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1848 WMI_10_4_NAN_EVENTID,
1849 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1850 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1851 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1852 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1853 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1854 WMI_10_4_CSA_HANDLING_EVENTID,
1855 WMI_10_4_GPIO_INPUT_EVENTID,
1856 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1857 WMI_10_4_GENERIC_BUFFER_EVENTID,
1858 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1859 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1860 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1861 WMI_10_4_WDS_PEER_EVENTID,
1862 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1863 WMI_10_4_PDEV_FIPS_EVENTID,
1864 WMI_10_4_TT_STATS_EVENTID,
1865 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1866 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1867 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1868 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1869 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1870 WMI_10_4_PDEV_TPC_EVENTID,
1871 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1872 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1873 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1874 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1875 WMI_10_4_MU_REPORT_EVENTID,
1876 WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1877 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1878 WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1879 WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1880 WMI_10_4_ATF_PEER_STATS_EVENTID,
1881 WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1882 WMI_10_4_NAC_RSSI_EVENTID,
1883 WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1884 WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1885 WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1886 WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1887 WMI_10_4_TDLS_PEER_EVENTID,
1888 WMI_10_4_HOST_SWFDA_EVENTID,
1889 WMI_10_4_ESP_ESTIMATE_EVENTID,
1890 WMI_10_4_DFS_STATUS_CHECK_EVENTID,
1891 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1892};
1893
1894enum wmi_phy_mode {
1895 MODE_11A = 0,
1896 MODE_11G = 1,
1897 MODE_11B = 2,
1898 MODE_11GONLY = 3,
1899 MODE_11NA_HT20 = 4,
1900 MODE_11NG_HT20 = 5,
1901 MODE_11NA_HT40 = 6,
1902 MODE_11NG_HT40 = 7,
1903 MODE_11AC_VHT20 = 8,
1904 MODE_11AC_VHT40 = 9,
1905 MODE_11AC_VHT80 = 10,
1906
1907 MODE_11AC_VHT20_2G = 11,
1908 MODE_11AC_VHT40_2G = 12,
1909 MODE_11AC_VHT80_2G = 13,
1910 MODE_11AC_VHT80_80 = 14,
1911 MODE_11AC_VHT160 = 15,
1912 MODE_UNKNOWN = 16,
1913 MODE_MAX = 16
1914};
1915
1916static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1917{
1918 switch (mode) {
1919 case MODE_11A:
1920 return "11a";
1921 case MODE_11G:
1922 return "11g";
1923 case MODE_11B:
1924 return "11b";
1925 case MODE_11GONLY:
1926 return "11gonly";
1927 case MODE_11NA_HT20:
1928 return "11na-ht20";
1929 case MODE_11NG_HT20:
1930 return "11ng-ht20";
1931 case MODE_11NA_HT40:
1932 return "11na-ht40";
1933 case MODE_11NG_HT40:
1934 return "11ng-ht40";
1935 case MODE_11AC_VHT20:
1936 return "11ac-vht20";
1937 case MODE_11AC_VHT40:
1938 return "11ac-vht40";
1939 case MODE_11AC_VHT80:
1940 return "11ac-vht80";
1941 case MODE_11AC_VHT160:
1942 return "11ac-vht160";
1943 case MODE_11AC_VHT80_80:
1944 return "11ac-vht80+80";
1945 case MODE_11AC_VHT20_2G:
1946 return "11ac-vht20-2g";
1947 case MODE_11AC_VHT40_2G:
1948 return "11ac-vht40-2g";
1949 case MODE_11AC_VHT80_2G:
1950 return "11ac-vht80-2g";
1951 case MODE_UNKNOWN:
1952
1953 break;
1954
1955
1956
1957
1958 };
1959
1960 return "<unknown>";
1961}
1962
1963#define WMI_CHAN_LIST_TAG 0x1
1964#define WMI_SSID_LIST_TAG 0x2
1965#define WMI_BSSID_LIST_TAG 0x3
1966#define WMI_IE_TAG 0x4
1967
1968struct wmi_channel {
1969 __le32 mhz;
1970 __le32 band_center_freq1;
1971 __le32 band_center_freq2;
1972 union {
1973 __le32 flags;
1974 struct {
1975 u8 mode;
1976 } __packed;
1977 } __packed;
1978 union {
1979 __le32 reginfo0;
1980 struct {
1981
1982 u8 min_power;
1983 u8 max_power;
1984 u8 reg_power;
1985 u8 reg_classid;
1986 } __packed;
1987 } __packed;
1988 union {
1989 __le32 reginfo1;
1990 struct {
1991 u8 antenna_max;
1992 u8 max_tx_power;
1993 } __packed;
1994 } __packed;
1995} __packed;
1996
1997struct wmi_channel_arg {
1998 u32 freq;
1999 u32 band_center_freq1;
2000 u32 band_center_freq2;
2001 bool passive;
2002 bool allow_ibss;
2003 bool allow_ht;
2004 bool allow_vht;
2005 bool ht40plus;
2006 bool chan_radar;
2007
2008 u32 min_power;
2009 u32 max_power;
2010 u32 max_reg_power;
2011 u32 max_antenna_gain;
2012 u32 reg_class_id;
2013 enum wmi_phy_mode mode;
2014};
2015
2016enum wmi_channel_change_cause {
2017 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
2018 WMI_CHANNEL_CHANGE_CAUSE_CSA,
2019};
2020
2021#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
2022#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
2023#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
2024#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
2025#define WMI_CHAN_FLAG_DFS (1 << 10)
2026#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
2027#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
2028
2029
2030#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2031
2032#define WMI_MAX_SPATIAL_STREAM 3
2033
2034
2035#define WMI_HT_CAP_ENABLED 0x0001
2036#define WMI_HT_CAP_HT20_SGI 0x0002
2037#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
2038#define WMI_HT_CAP_TX_STBC 0x0008
2039#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
2040#define WMI_HT_CAP_RX_STBC 0x0030
2041#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
2042#define WMI_HT_CAP_LDPC 0x0040
2043#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
2044#define WMI_HT_CAP_MPDU_DENSITY 0x0700
2045#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
2046#define WMI_HT_CAP_HT40_SGI 0x0800
2047
2048#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
2049 WMI_HT_CAP_HT20_SGI | \
2050 WMI_HT_CAP_HT40_SGI | \
2051 WMI_HT_CAP_TX_STBC | \
2052 WMI_HT_CAP_RX_STBC | \
2053 WMI_HT_CAP_LDPC)
2054
2055
2056
2057
2058
2059
2060
2061
2062#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
2063#define WMI_VHT_CAP_RX_LDPC 0x00000010
2064#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
2065#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
2066#define WMI_VHT_CAP_TX_STBC 0x00000080
2067#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
2068#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
2069#define WMI_VHT_CAP_SU_BFER 0x00000800
2070#define WMI_VHT_CAP_SU_BFEE 0x00001000
2071#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
2072#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
2073#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
2074#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
2075#define WMI_VHT_CAP_MU_BFER 0x00080000
2076#define WMI_VHT_CAP_MU_BFEE 0x00100000
2077#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
2078#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
2079#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
2080#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
2081
2082
2083#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
2084#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
2085#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
2086
2087#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
2088 WMI_VHT_CAP_RX_LDPC | \
2089 WMI_VHT_CAP_SGI_80MHZ | \
2090 WMI_VHT_CAP_TX_STBC | \
2091 WMI_VHT_CAP_RX_STBC_MASK | \
2092 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
2093 WMI_VHT_CAP_RX_FIXED_ANT | \
2094 WMI_VHT_CAP_TX_FIXED_ANT)
2095
2096
2097
2098
2099
2100#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
2101#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
2102#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
2103
2104enum {
2105 REGDMN_MODE_11A = 0x00001,
2106 REGDMN_MODE_TURBO = 0x00002,
2107 REGDMN_MODE_11B = 0x00004,
2108 REGDMN_MODE_PUREG = 0x00008,
2109 REGDMN_MODE_11G = 0x00008,
2110 REGDMN_MODE_108G = 0x00020,
2111 REGDMN_MODE_108A = 0x00040,
2112 REGDMN_MODE_XR = 0x00100,
2113 REGDMN_MODE_11A_HALF_RATE = 0x00200,
2114 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
2115 REGDMN_MODE_11NG_HT20 = 0x00800,
2116 REGDMN_MODE_11NA_HT20 = 0x01000,
2117 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
2118 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
2119 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
2120 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
2121 REGDMN_MODE_11AC_VHT20 = 0x20000,
2122 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
2123 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
2124 REGDMN_MODE_11AC_VHT80 = 0x100000,
2125 REGDMN_MODE_11AC_VHT160 = 0x200000,
2126 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
2127 REGDMN_MODE_ALL = 0xffffffff
2128};
2129
2130#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
2131#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
2132#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
2133
2134
2135#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
2136#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
2137#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
2138#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
2139#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
2140#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
2141
2142struct hal_reg_capabilities {
2143
2144 __le32 eeprom_rd;
2145
2146 __le32 eeprom_rd_ext;
2147
2148 __le32 regcap1;
2149
2150 __le32 regcap2;
2151
2152 __le32 wireless_modes;
2153 __le32 low_2ghz_chan;
2154 __le32 high_2ghz_chan;
2155 __le32 low_5ghz_chan;
2156 __le32 high_5ghz_chan;
2157} __packed;
2158
2159enum wlan_mode_capability {
2160 WHAL_WLAN_11A_CAPABILITY = 0x1,
2161 WHAL_WLAN_11G_CAPABILITY = 0x2,
2162 WHAL_WLAN_11AG_CAPABILITY = 0x3,
2163};
2164
2165
2166struct wlan_host_mem_req {
2167
2168 __le32 req_id;
2169
2170 __le32 unit_size;
2171
2172
2173
2174
2175 __le32 num_unit_info;
2176
2177
2178
2179
2180
2181
2182
2183 __le32 num_units;
2184} __packed;
2185
2186
2187
2188
2189
2190
2191struct wmi_service_ready_event {
2192 __le32 sw_version;
2193 __le32 sw_version_1;
2194 __le32 abi_version;
2195
2196 __le32 phy_capability;
2197
2198 __le32 max_frag_entry;
2199 __le32 wmi_service_bitmap[16];
2200 __le32 num_rf_chains;
2201
2202
2203
2204
2205 __le32 ht_cap_info;
2206 __le32 vht_cap_info;
2207 __le32 vht_supp_mcs;
2208 __le32 hw_min_tx_power;
2209 __le32 hw_max_tx_power;
2210 struct hal_reg_capabilities hal_reg_capabilities;
2211 __le32 sys_cap_info;
2212 __le32 min_pkt_size_enable;
2213
2214
2215
2216
2217 __le32 max_bcn_ie_size;
2218
2219
2220
2221
2222
2223
2224 __le32 num_mem_reqs;
2225 struct wlan_host_mem_req mem_reqs[0];
2226} __packed;
2227
2228
2229struct wmi_10x_service_ready_event {
2230 __le32 sw_version;
2231 __le32 abi_version;
2232
2233
2234 __le32 phy_capability;
2235
2236
2237 __le32 max_frag_entry;
2238 __le32 wmi_service_bitmap[16];
2239 __le32 num_rf_chains;
2240
2241
2242
2243
2244
2245 __le32 ht_cap_info;
2246 __le32 vht_cap_info;
2247 __le32 vht_supp_mcs;
2248 __le32 hw_min_tx_power;
2249 __le32 hw_max_tx_power;
2250
2251 struct hal_reg_capabilities hal_reg_capabilities;
2252
2253 __le32 sys_cap_info;
2254 __le32 min_pkt_size_enable;
2255
2256
2257
2258
2259
2260
2261
2262 __le32 num_mem_reqs;
2263
2264 struct wlan_host_mem_req mem_reqs[0];
2265} __packed;
2266
2267#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2268#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2269
2270struct wmi_ready_event {
2271 __le32 sw_version;
2272 __le32 abi_version;
2273 struct wmi_mac_addr mac_addr;
2274 __le32 status;
2275} __packed;
2276
2277struct wmi_resource_config {
2278
2279 __le32 num_vdevs;
2280
2281
2282 __le32 num_peers;
2283
2284
2285
2286
2287
2288
2289
2290
2291 __le32 num_offload_peers;
2292
2293
2294 __le32 num_offload_reorder_bufs;
2295
2296
2297 __le32 num_peer_keys;
2298
2299
2300 __le32 num_tids;
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312 __le32 ast_skid_limit;
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322 __le32 tx_chain_mask;
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334 __le32 rx_chain_mask;
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346 __le32 rx_timeout_pri_vi;
2347 __le32 rx_timeout_pri_vo;
2348 __le32 rx_timeout_pri_be;
2349 __le32 rx_timeout_pri_bk;
2350
2351
2352
2353
2354
2355
2356
2357
2358 __le32 rx_decap_mode;
2359
2360
2361 __le32 scan_max_pending_reqs;
2362
2363
2364 __le32 bmiss_offload_max_vdev;
2365
2366
2367 __le32 roam_offload_max_vdev;
2368
2369
2370 __le32 roam_offload_max_ap_profiles;
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384 __le32 num_mcast_groups;
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395 __le32 num_mcast_table_elems;
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415 __le32 mcast2ucast_mode;
2416
2417
2418
2419
2420
2421
2422
2423
2424 __le32 tx_dbg_log_size;
2425
2426
2427 __le32 num_wds_entries;
2428
2429
2430
2431
2432
2433 __le32 dma_burst_size;
2434
2435
2436
2437
2438
2439 __le32 mac_aggr_delim;
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450 __le32 rx_skip_defrag_timeout_dup_detection_check;
2451
2452
2453
2454
2455
2456
2457 __le32 vow_config;
2458
2459
2460 __le32 gtk_offload_max_vdev;
2461
2462
2463 __le32 num_msdu_desc;
2464
2465
2466
2467
2468
2469
2470
2471 __le32 max_frag_entries;
2472} __packed;
2473
2474struct wmi_resource_config_10x {
2475
2476 __le32 num_vdevs;
2477
2478
2479 __le32 num_peers;
2480
2481
2482 __le32 num_peer_keys;
2483
2484
2485 __le32 num_tids;
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497 __le32 ast_skid_limit;
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507 __le32 tx_chain_mask;
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519 __le32 rx_chain_mask;
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531 __le32 rx_timeout_pri_vi;
2532 __le32 rx_timeout_pri_vo;
2533 __le32 rx_timeout_pri_be;
2534 __le32 rx_timeout_pri_bk;
2535
2536
2537
2538
2539
2540
2541
2542
2543 __le32 rx_decap_mode;
2544
2545
2546 __le32 scan_max_pending_reqs;
2547
2548
2549 __le32 bmiss_offload_max_vdev;
2550
2551
2552 __le32 roam_offload_max_vdev;
2553
2554
2555 __le32 roam_offload_max_ap_profiles;
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569 __le32 num_mcast_groups;
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580 __le32 num_mcast_table_elems;
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600 __le32 mcast2ucast_mode;
2601
2602
2603
2604
2605
2606
2607
2608
2609 __le32 tx_dbg_log_size;
2610
2611
2612 __le32 num_wds_entries;
2613
2614
2615
2616
2617
2618 __le32 dma_burst_size;
2619
2620
2621
2622
2623
2624 __le32 mac_aggr_delim;
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635 __le32 rx_skip_defrag_timeout_dup_detection_check;
2636
2637
2638
2639
2640
2641
2642 __le32 vow_config;
2643
2644
2645 __le32 num_msdu_desc;
2646
2647
2648
2649
2650
2651
2652
2653 __le32 max_frag_entries;
2654} __packed;
2655
2656enum wmi_10_2_feature_mask {
2657 WMI_10_2_RX_BATCH_MODE = BIT(0),
2658 WMI_10_2_ATF_CONFIG = BIT(1),
2659 WMI_10_2_COEX_GPIO = BIT(3),
2660 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2661 WMI_10_2_PEER_STATS = BIT(7),
2662};
2663
2664struct wmi_resource_config_10_2 {
2665 struct wmi_resource_config_10x common;
2666 __le32 max_peer_ext_stats;
2667 __le32 smart_ant_cap;
2668 __le32 bk_min_free;
2669 __le32 be_min_free;
2670 __le32 vi_min_free;
2671 __le32 vo_min_free;
2672 __le32 feature_mask;
2673} __packed;
2674
2675#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2676#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2677#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2678
2679struct wmi_resource_config_10_4 {
2680
2681 __le32 num_vdevs;
2682
2683
2684 __le32 num_peers;
2685
2686
2687 __le32 num_active_peers;
2688
2689
2690
2691
2692
2693
2694
2695 __le32 num_offload_peers;
2696
2697
2698
2699
2700 __le32 num_offload_reorder_buffs;
2701
2702
2703 __le32 num_peer_keys;
2704
2705
2706 __le32 num_tids;
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716 __le32 ast_skid_limit;
2717
2718
2719
2720
2721
2722
2723
2724 __le32 tx_chain_mask;
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734 __le32 rx_chain_mask;
2735
2736
2737
2738
2739
2740
2741
2742
2743 __le32 rx_timeout_pri[4];
2744
2745
2746
2747
2748
2749
2750 __le32 rx_decap_mode;
2751
2752 __le32 scan_max_pending_req;
2753
2754 __le32 bmiss_offload_max_vdev;
2755
2756 __le32 roam_offload_max_vdev;
2757
2758 __le32 roam_offload_max_ap_profiles;
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769 __le32 num_mcast_groups;
2770
2771
2772
2773
2774
2775
2776
2777
2778 __le32 num_mcast_table_elems;
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795 __le32 mcast2ucast_mode;
2796
2797
2798
2799
2800
2801
2802 __le32 tx_dbg_log_size;
2803
2804
2805 __le32 num_wds_entries;
2806
2807
2808 __le32 dma_burst_size;
2809
2810
2811
2812
2813 __le32 mac_aggr_delim;
2814
2815
2816
2817
2818
2819
2820
2821
2822 __le32 rx_skip_defrag_timeout_dup_detection_check;
2823
2824
2825
2826
2827 __le32 vow_config;
2828
2829
2830 __le32 gtk_offload_max_vdev;
2831
2832
2833 __le32 num_msdu_desc;
2834
2835
2836
2837
2838
2839
2840 __le32 max_frag_entries;
2841
2842
2843
2844
2845
2846 __le32 max_peer_ext_stats;
2847
2848
2849
2850
2851
2852
2853 __le32 smart_ant_cap;
2854
2855
2856
2857
2858 __le32 bk_minfree;
2859 __le32 be_minfree;
2860 __le32 vi_minfree;
2861 __le32 vo_minfree;
2862
2863
2864
2865
2866
2867 __le32 rx_batchmode;
2868
2869
2870
2871
2872
2873 __le32 tt_support;
2874
2875
2876
2877
2878
2879 __le32 atf_config;
2880
2881
2882
2883
2884
2885 __le32 iphdr_pad_config;
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896 __le32 qwrap_config;
2897} __packed;
2898
2899enum wmi_coex_version {
2900 WMI_NO_COEX_VERSION_SUPPORT = 0,
2901
2902 WMI_COEX_VERSION_1 = 1,
2903
2904 WMI_COEX_VERSION_2 = 2,
2905
2906 WMI_COEX_VERSION_3 = 3,
2907
2908 WMI_COEX_VERSION_4 = 4,
2909};
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928enum wmi_10_4_feature_mask {
2929 WMI_10_4_LTEU_SUPPORT = BIT(0),
2930 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
2931 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
2932 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
2933 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
2934 WMI_10_4_PEER_STATS = BIT(5),
2935 WMI_10_4_VDEV_STATS = BIT(6),
2936 WMI_10_4_TDLS = BIT(7),
2937 WMI_10_4_TDLS_OFFCHAN = BIT(8),
2938 WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9),
2939 WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10),
2940 WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
2941 WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12),
2942
2943};
2944
2945struct wmi_ext_resource_config_10_4_cmd {
2946
2947 __le32 host_platform_config;
2948
2949 __le32 fw_feature_bitmap;
2950
2951 __le32 wlan_gpio_priority;
2952
2953 __le32 coex_version;
2954
2955 __le32 coex_gpio_pin1;
2956 __le32 coex_gpio_pin2;
2957 __le32 coex_gpio_pin3;
2958
2959 __le32 num_tdls_vdevs;
2960
2961 __le32 num_tdls_conn_table_entries;
2962
2963 __le32 max_tdls_concurrent_sleep_sta;
2964
2965 __le32 max_tdls_concurrent_buffer_sta;
2966};
2967
2968
2969struct host_memory_chunk {
2970
2971 __le32 req_id;
2972
2973 __le32 ptr;
2974
2975 __le32 size;
2976} __packed;
2977
2978struct wmi_host_mem_chunks {
2979 __le32 count;
2980
2981 struct host_memory_chunk items[1];
2982} __packed;
2983
2984struct wmi_init_cmd {
2985 struct wmi_resource_config resource_config;
2986 struct wmi_host_mem_chunks mem_chunks;
2987} __packed;
2988
2989
2990struct wmi_init_cmd_10x {
2991 struct wmi_resource_config_10x resource_config;
2992 struct wmi_host_mem_chunks mem_chunks;
2993} __packed;
2994
2995struct wmi_init_cmd_10_2 {
2996 struct wmi_resource_config_10_2 resource_config;
2997 struct wmi_host_mem_chunks mem_chunks;
2998} __packed;
2999
3000struct wmi_init_cmd_10_4 {
3001 struct wmi_resource_config_10_4 resource_config;
3002 struct wmi_host_mem_chunks mem_chunks;
3003} __packed;
3004
3005struct wmi_chan_list_entry {
3006 __le16 freq;
3007 u8 phy_mode;
3008 u8 reserved;
3009} __packed;
3010
3011
3012struct wmi_chan_list {
3013 __le32 tag;
3014 __le32 num_chan;
3015 struct wmi_chan_list_entry channel_list[0];
3016} __packed;
3017
3018struct wmi_bssid_list {
3019 __le32 tag;
3020 __le32 num_bssid;
3021 struct wmi_mac_addr bssid_list[0];
3022} __packed;
3023
3024struct wmi_ie_data {
3025 __le32 tag;
3026 __le32 ie_len;
3027 u8 ie_data[0];
3028} __packed;
3029
3030struct wmi_ssid {
3031 __le32 ssid_len;
3032 u8 ssid[32];
3033} __packed;
3034
3035struct wmi_ssid_list {
3036 __le32 tag;
3037 __le32 num_ssids;
3038 struct wmi_ssid ssids[0];
3039} __packed;
3040
3041
3042#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3043
3044
3045
3046#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3047
3048#define WLAN_SCAN_PARAMS_MAX_SSID 16
3049#define WLAN_SCAN_PARAMS_MAX_BSSID 4
3050#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3051
3052
3053
3054
3055#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3056
3057
3058enum wmi_scan_priority {
3059 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3060 WMI_SCAN_PRIORITY_LOW,
3061 WMI_SCAN_PRIORITY_MEDIUM,
3062 WMI_SCAN_PRIORITY_HIGH,
3063 WMI_SCAN_PRIORITY_VERY_HIGH,
3064 WMI_SCAN_PRIORITY_COUNT
3065};
3066
3067struct wmi_start_scan_common {
3068
3069 __le32 scan_id;
3070
3071 __le32 scan_req_id;
3072
3073 __le32 vdev_id;
3074
3075 __le32 scan_priority;
3076
3077 __le32 notify_scan_events;
3078
3079 __le32 dwell_time_active;
3080
3081 __le32 dwell_time_passive;
3082
3083
3084
3085
3086 __le32 min_rest_time;
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100 __le32 max_rest_time;
3101
3102
3103
3104
3105
3106
3107
3108 __le32 repeat_probe_time;
3109
3110 __le32 probe_spacing_time;
3111
3112
3113
3114
3115 __le32 idle_time;
3116
3117 __le32 max_scan_time;
3118
3119
3120
3121
3122 __le32 probe_delay;
3123
3124 __le32 scan_ctrl_flags;
3125} __packed;
3126
3127struct wmi_start_scan_tlvs {
3128
3129
3130
3131 u8 tlvs[0];
3132} __packed;
3133
3134struct wmi_start_scan_cmd {
3135 struct wmi_start_scan_common common;
3136 __le32 burst_duration_ms;
3137 struct wmi_start_scan_tlvs tlvs;
3138} __packed;
3139
3140
3141struct wmi_10x_start_scan_cmd {
3142 struct wmi_start_scan_common common;
3143 struct wmi_start_scan_tlvs tlvs;
3144} __packed;
3145
3146struct wmi_ssid_arg {
3147 int len;
3148 const u8 *ssid;
3149};
3150
3151struct wmi_bssid_arg {
3152 const u8 *bssid;
3153};
3154
3155struct wmi_start_scan_arg {
3156 u32 scan_id;
3157 u32 scan_req_id;
3158 u32 vdev_id;
3159 u32 scan_priority;
3160 u32 notify_scan_events;
3161 u32 dwell_time_active;
3162 u32 dwell_time_passive;
3163 u32 min_rest_time;
3164 u32 max_rest_time;
3165 u32 repeat_probe_time;
3166 u32 probe_spacing_time;
3167 u32 idle_time;
3168 u32 max_scan_time;
3169 u32 probe_delay;
3170 u32 scan_ctrl_flags;
3171 u32 burst_duration_ms;
3172
3173 u32 ie_len;
3174 u32 n_channels;
3175 u32 n_ssids;
3176 u32 n_bssids;
3177
3178 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3179 u16 channels[64];
3180 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3181 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3182 struct wmi_mac_addr mac_addr;
3183 struct wmi_mac_addr mac_mask;
3184};
3185
3186
3187
3188
3189#define WMI_SCAN_FLAG_PASSIVE 0x1
3190
3191#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3192
3193#define WMI_SCAN_ADD_CCK_RATES 0x4
3194
3195#define WMI_SCAN_ADD_OFDM_RATES 0x8
3196
3197#define WMI_SCAN_CHAN_STAT_EVENT 0x10
3198
3199#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3200
3201#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3202
3203
3204
3205#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3206
3207
3208
3209
3210
3211#define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000
3212
3213
3214#define WMI_SCAN_CLASS_MASK 0xFF000000
3215
3216enum wmi_stop_scan_type {
3217 WMI_SCAN_STOP_ONE = 0x00000000,
3218 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
3219 WMI_SCAN_STOP_ALL = 0x04000000,
3220};
3221
3222struct wmi_stop_scan_cmd {
3223 __le32 scan_req_id;
3224 __le32 scan_id;
3225 __le32 req_type;
3226 __le32 vdev_id;
3227} __packed;
3228
3229struct wmi_stop_scan_arg {
3230 u32 req_id;
3231 enum wmi_stop_scan_type req_type;
3232 union {
3233 u32 scan_id;
3234 u32 vdev_id;
3235 } u;
3236};
3237
3238struct wmi_scan_chan_list_cmd {
3239 __le32 num_scan_chans;
3240 struct wmi_channel chan_info[0];
3241} __packed;
3242
3243struct wmi_scan_chan_list_arg {
3244 u32 n_channels;
3245 struct wmi_channel_arg *channels;
3246};
3247
3248enum wmi_bss_filter {
3249 WMI_BSS_FILTER_NONE = 0,
3250 WMI_BSS_FILTER_ALL,
3251 WMI_BSS_FILTER_PROFILE,
3252 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3253 WMI_BSS_FILTER_CURRENT_BSS,
3254 WMI_BSS_FILTER_ALL_BUT_BSS,
3255 WMI_BSS_FILTER_PROBED_SSID,
3256 WMI_BSS_FILTER_LAST_BSS,
3257};
3258
3259enum wmi_scan_event_type {
3260 WMI_SCAN_EVENT_STARTED = BIT(0),
3261 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3262 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3263 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3264 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3265
3266 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3267 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3268 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3269 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3270 WMI_SCAN_EVENT_MAX = BIT(15),
3271};
3272
3273enum wmi_scan_completion_reason {
3274 WMI_SCAN_REASON_COMPLETED,
3275 WMI_SCAN_REASON_CANCELLED,
3276 WMI_SCAN_REASON_PREEMPTED,
3277 WMI_SCAN_REASON_TIMEDOUT,
3278 WMI_SCAN_REASON_INTERNAL_FAILURE,
3279 WMI_SCAN_REASON_MAX,
3280};
3281
3282struct wmi_scan_event {
3283 __le32 event_type;
3284 __le32 reason;
3285 __le32 channel_freq;
3286 __le32 scan_req_id;
3287 __le32 scan_id;
3288 __le32 vdev_id;
3289} __packed;
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299#define WMI_MGMT_RX_HDR_HEADROOM 52
3300
3301
3302
3303
3304
3305
3306
3307
3308struct wmi_mgmt_rx_hdr_v1 {
3309 __le32 channel;
3310 __le32 snr;
3311 __le32 rate;
3312 __le32 phy_mode;
3313 __le32 buf_len;
3314 __le32 status;
3315} __packed;
3316
3317struct wmi_mgmt_rx_hdr_v2 {
3318 struct wmi_mgmt_rx_hdr_v1 v1;
3319 __le32 rssi_ctl[4];
3320} __packed;
3321
3322struct wmi_mgmt_rx_event_v1 {
3323 struct wmi_mgmt_rx_hdr_v1 hdr;
3324 u8 buf[0];
3325} __packed;
3326
3327struct wmi_mgmt_rx_event_v2 {
3328 struct wmi_mgmt_rx_hdr_v2 hdr;
3329 u8 buf[0];
3330} __packed;
3331
3332struct wmi_10_4_mgmt_rx_hdr {
3333 __le32 channel;
3334 __le32 snr;
3335 u8 rssi_ctl[4];
3336 __le32 rate;
3337 __le32 phy_mode;
3338 __le32 buf_len;
3339 __le32 status;
3340} __packed;
3341
3342struct wmi_10_4_mgmt_rx_event {
3343 struct wmi_10_4_mgmt_rx_hdr hdr;
3344 u8 buf[0];
3345} __packed;
3346
3347struct wmi_mgmt_rx_ext_info {
3348 __le64 rx_mac_timestamp;
3349} __packed __aligned(4);
3350
3351#define WMI_RX_STATUS_OK 0x00
3352#define WMI_RX_STATUS_ERR_CRC 0x01
3353#define WMI_RX_STATUS_ERR_DECRYPT 0x08
3354#define WMI_RX_STATUS_ERR_MIC 0x10
3355#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3356
3357#define WMI_RX_STATUS_EXT_INFO 0x40
3358
3359#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3360#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3361#define PHY_ERROR_GEN_RADAR 0x05
3362
3363#define PHY_ERROR_10_4_RADAR_MASK 0x4
3364#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3365
3366enum phy_err_type {
3367 PHY_ERROR_UNKNOWN,
3368 PHY_ERROR_SPECTRAL_SCAN,
3369 PHY_ERROR_FALSE_RADAR_EXT,
3370 PHY_ERROR_RADAR
3371};
3372
3373struct wmi_phyerr {
3374 __le32 tsf_timestamp;
3375 __le16 freq1;
3376 __le16 freq2;
3377 u8 rssi_combined;
3378 u8 chan_width_mhz;
3379 u8 phy_err_code;
3380 u8 rsvd0;
3381 __le32 rssi_chains[4];
3382 __le16 nf_chains[4];
3383 __le32 buf_len;
3384 u8 buf[0];
3385} __packed;
3386
3387struct wmi_phyerr_event {
3388 __le32 num_phyerrs;
3389 __le32 tsf_l32;
3390 __le32 tsf_u32;
3391 struct wmi_phyerr phyerrs[0];
3392} __packed;
3393
3394struct wmi_10_4_phyerr_event {
3395 __le32 tsf_l32;
3396 __le32 tsf_u32;
3397 __le16 freq1;
3398 __le16 freq2;
3399 u8 rssi_combined;
3400 u8 chan_width_mhz;
3401 u8 phy_err_code;
3402 u8 rsvd0;
3403 __le32 rssi_chains[4];
3404 __le16 nf_chains[4];
3405 __le32 phy_err_mask[2];
3406 __le32 tsf_timestamp;
3407 __le32 buf_len;
3408 u8 buf[0];
3409} __packed;
3410
3411struct wmi_radar_found_info {
3412 __le32 pri_min;
3413 __le32 pri_max;
3414 __le32 width_min;
3415 __le32 width_max;
3416 __le32 sidx_min;
3417 __le32 sidx_max;
3418} __packed;
3419
3420enum wmi_radar_confirmation_status {
3421
3422 WMI_SW_RADAR_DETECTED = 0,
3423
3424 WMI_RADAR_DETECTION_FAIL = 1,
3425
3426
3427 WMI_HW_RADAR_DETECTED = 2,
3428};
3429
3430#define PHYERR_TLV_SIG 0xBB
3431#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3432#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3433#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3434
3435struct phyerr_radar_report {
3436 __le32 reg0;
3437 __le32 reg1;
3438} __packed;
3439
3440#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3441#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3442
3443#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3444#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3445
3446#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3447#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3448
3449#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3450#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3451
3452#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3453#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3454
3455#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3456#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3457
3458#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3459#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3460
3461#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3462#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3463
3464#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3465#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3466
3467#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3468#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3469
3470#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3471#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3472
3473struct phyerr_fft_report {
3474 __le32 reg0;
3475 __le32 reg1;
3476} __packed;
3477
3478#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3479#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3480
3481#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3482#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3483
3484#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3485#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3486
3487#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3488#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3489
3490#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3491#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3492
3493#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3494#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3495
3496#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3497#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3498
3499#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3500#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3501
3502struct phyerr_tlv {
3503 __le16 len;
3504 u8 tag;
3505 u8 sig;
3506} __packed;
3507
3508#define DFS_RSSI_POSSIBLY_FALSE 50
3509#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3510
3511struct wmi_mgmt_tx_hdr {
3512 __le32 vdev_id;
3513 struct wmi_mac_addr peer_macaddr;
3514 __le32 tx_rate;
3515 __le32 tx_power;
3516 __le32 buf_len;
3517} __packed;
3518
3519struct wmi_mgmt_tx_cmd {
3520 struct wmi_mgmt_tx_hdr hdr;
3521 u8 buf[0];
3522} __packed;
3523
3524struct wmi_echo_event {
3525 __le32 value;
3526} __packed;
3527
3528struct wmi_echo_cmd {
3529 __le32 value;
3530} __packed;
3531
3532struct wmi_pdev_set_regdomain_cmd {
3533 __le32 reg_domain;
3534 __le32 reg_domain_2G;
3535 __le32 reg_domain_5G;
3536 __le32 conformance_test_limit_2G;
3537 __le32 conformance_test_limit_5G;
3538} __packed;
3539
3540enum wmi_dfs_region {
3541
3542 WMI_UNINIT_DFS_DOMAIN = 0,
3543
3544
3545 WMI_FCC_DFS_DOMAIN = 1,
3546
3547
3548 WMI_ETSI_DFS_DOMAIN = 2,
3549
3550
3551 WMI_MKK4_DFS_DOMAIN = 3,
3552};
3553
3554struct wmi_pdev_set_regdomain_cmd_10x {
3555 __le32 reg_domain;
3556 __le32 reg_domain_2G;
3557 __le32 reg_domain_5G;
3558 __le32 conformance_test_limit_2G;
3559 __le32 conformance_test_limit_5G;
3560
3561
3562 __le32 dfs_domain;
3563} __packed;
3564
3565
3566struct wmi_pdev_set_quiet_cmd {
3567
3568 __le32 period;
3569
3570
3571 __le32 duration;
3572
3573
3574 __le32 next_start;
3575
3576
3577 __le32 enabled;
3578} __packed;
3579
3580
3581
3582
3583enum ath10k_protmode {
3584 ATH10K_PROT_NONE = 0,
3585 ATH10K_PROT_CTSONLY = 1,
3586 ATH10K_PROT_RTSCTS = 2,
3587};
3588
3589enum wmi_rtscts_profile {
3590 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3591 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3592 WMI_RTSCTS_ACROSS_SW_RETRIES
3593};
3594
3595#define WMI_RTSCTS_ENABLED 1
3596#define WMI_RTSCTS_SET_MASK 0x0f
3597#define WMI_RTSCTS_SET_LSB 0
3598
3599#define WMI_RTSCTS_PROFILE_MASK 0xf0
3600#define WMI_RTSCTS_PROFILE_LSB 4
3601
3602enum wmi_beacon_gen_mode {
3603 WMI_BEACON_STAGGERED_MODE = 0,
3604 WMI_BEACON_BURST_MODE = 1
3605};
3606
3607enum wmi_csa_event_ies_present_flag {
3608 WMI_CSA_IE_PRESENT = 0x00000001,
3609 WMI_XCSA_IE_PRESENT = 0x00000002,
3610 WMI_WBW_IE_PRESENT = 0x00000004,
3611 WMI_CSWARP_IE_PRESENT = 0x00000008,
3612};
3613
3614
3615struct wmi_csa_event {
3616 __le32 i_fc_dur;
3617
3618
3619 struct wmi_mac_addr i_addr1;
3620 struct wmi_mac_addr i_addr2;
3621 __le32 csa_ie[2];
3622 __le32 xcsa_ie[2];
3623 __le32 wb_ie[2];
3624 __le32 cswarp_ie;
3625 __le32 ies_present_flag;
3626} __packed;
3627
3628
3629#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3630#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3631#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3632
3633struct wmi_pdev_param_map {
3634 u32 tx_chain_mask;
3635 u32 rx_chain_mask;
3636 u32 txpower_limit2g;
3637 u32 txpower_limit5g;
3638 u32 txpower_scale;
3639 u32 beacon_gen_mode;
3640 u32 beacon_tx_mode;
3641 u32 resmgr_offchan_mode;
3642 u32 protection_mode;
3643 u32 dynamic_bw;
3644 u32 non_agg_sw_retry_th;
3645 u32 agg_sw_retry_th;
3646 u32 sta_kickout_th;
3647 u32 ac_aggrsize_scaling;
3648 u32 ltr_enable;
3649 u32 ltr_ac_latency_be;
3650 u32 ltr_ac_latency_bk;
3651 u32 ltr_ac_latency_vi;
3652 u32 ltr_ac_latency_vo;
3653 u32 ltr_ac_latency_timeout;
3654 u32 ltr_sleep_override;
3655 u32 ltr_rx_override;
3656 u32 ltr_tx_activity_timeout;
3657 u32 l1ss_enable;
3658 u32 dsleep_enable;
3659 u32 pcielp_txbuf_flush;
3660 u32 pcielp_txbuf_watermark;
3661 u32 pcielp_txbuf_tmo_en;
3662 u32 pcielp_txbuf_tmo_value;
3663 u32 pdev_stats_update_period;
3664 u32 vdev_stats_update_period;
3665 u32 peer_stats_update_period;
3666 u32 bcnflt_stats_update_period;
3667 u32 pmf_qos;
3668 u32 arp_ac_override;
3669 u32 dcs;
3670 u32 ani_enable;
3671 u32 ani_poll_period;
3672 u32 ani_listen_period;
3673 u32 ani_ofdm_level;
3674 u32 ani_cck_level;
3675 u32 dyntxchain;
3676 u32 proxy_sta;
3677 u32 idle_ps_config;
3678 u32 power_gating_sleep;
3679 u32 fast_channel_reset;
3680 u32 burst_dur;
3681 u32 burst_enable;
3682 u32 cal_period;
3683 u32 aggr_burst;
3684 u32 rx_decap_mode;
3685 u32 smart_antenna_default_antenna;
3686 u32 igmpmld_override;
3687 u32 igmpmld_tid;
3688 u32 antenna_gain;
3689 u32 rx_filter;
3690 u32 set_mcast_to_ucast_tid;
3691 u32 proxy_sta_mode;
3692 u32 set_mcast2ucast_mode;
3693 u32 set_mcast2ucast_buffer;
3694 u32 remove_mcast2ucast_buffer;
3695 u32 peer_sta_ps_statechg_enable;
3696 u32 igmpmld_ac_override;
3697 u32 block_interbss;
3698 u32 set_disable_reset_cmdid;
3699 u32 set_msdu_ttl_cmdid;
3700 u32 set_ppdu_duration_cmdid;
3701 u32 txbf_sound_period_cmdid;
3702 u32 set_promisc_mode_cmdid;
3703 u32 set_burst_mode_cmdid;
3704 u32 en_stats;
3705 u32 mu_group_policy;
3706 u32 noise_detection;
3707 u32 noise_threshold;
3708 u32 dpd_enable;
3709 u32 set_mcast_bcast_echo;
3710 u32 atf_strict_sch;
3711 u32 atf_sched_duration;
3712 u32 ant_plzn;
3713 u32 mgmt_retry_limit;
3714 u32 sensitivity_level;
3715 u32 signed_txpower_2g;
3716 u32 signed_txpower_5g;
3717 u32 enable_per_tid_amsdu;
3718 u32 enable_per_tid_ampdu;
3719 u32 cca_threshold;
3720 u32 rts_fixed_rate;
3721 u32 pdev_reset;
3722 u32 wapi_mbssid_offset;
3723 u32 arp_srcaddr;
3724 u32 arp_dstaddr;
3725 u32 enable_btcoex;
3726};
3727
3728#define WMI_PDEV_PARAM_UNSUPPORTED 0
3729
3730enum wmi_pdev_param {
3731
3732 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3733
3734 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3735
3736 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3737
3738 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3739
3740 WMI_PDEV_PARAM_TXPOWER_SCALE,
3741
3742 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3743
3744 WMI_PDEV_PARAM_BEACON_TX_MODE,
3745
3746
3747
3748
3749 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3750
3751
3752
3753
3754 WMI_PDEV_PARAM_PROTECTION_MODE,
3755
3756
3757
3758
3759
3760
3761 WMI_PDEV_PARAM_DYNAMIC_BW,
3762
3763 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3764
3765 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3766
3767 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3768
3769 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3770
3771 WMI_PDEV_PARAM_LTR_ENABLE,
3772
3773 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3774
3775 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3776
3777 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3778
3779 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3780
3781 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3782
3783 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3784
3785 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3786
3787 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3788
3789 WMI_PDEV_PARAM_L1SS_ENABLE,
3790
3791 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3792
3793 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3794
3795 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3796
3797 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3798
3799 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3800
3801 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3802
3803 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3804
3805 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3806
3807 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3808
3809 WMI_PDEV_PARAM_PMF_QOS,
3810
3811 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3812
3813 WMI_PDEV_PARAM_DCS,
3814
3815 WMI_PDEV_PARAM_ANI_ENABLE,
3816
3817 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3818
3819 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3820
3821 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3822
3823 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3824
3825 WMI_PDEV_PARAM_DYNTXCHAIN,
3826
3827 WMI_PDEV_PARAM_PROXY_STA,
3828
3829 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3830
3831 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3832};
3833
3834enum wmi_10x_pdev_param {
3835
3836 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3837
3838 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3839
3840 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3841
3842 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3843
3844 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3845
3846 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3847
3848 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3849
3850
3851
3852
3853 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3854
3855
3856
3857
3858 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3859
3860 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3861
3862 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3863
3864 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3865
3866 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3867
3868 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3869
3870 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3871
3872 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3873
3874 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3875
3876 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3877
3878 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3879
3880 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3881
3882 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3883
3884 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3885
3886 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3887
3888 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3889
3890 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3891
3892 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3893
3894 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3895
3896 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3897
3898 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3899
3900 WMI_10X_PDEV_PARAM_PMF_QOS,
3901
3902 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3903
3904 WMI_10X_PDEV_PARAM_DCS,
3905
3906 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3907
3908 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3909
3910 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3911
3912 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3913
3914 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3915
3916 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3917
3918 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3919
3920 WMI_10X_PDEV_PARAM_BURST_DUR,
3921
3922 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3923
3924
3925 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3926 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3927 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3928 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3929 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3930 WMI_10X_PDEV_PARAM_RX_FILTER,
3931 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3932 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
3933 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3934 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3935 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3936 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3937 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3938 WMI_10X_PDEV_PARAM_CAL_PERIOD,
3939 WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
3940 WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
3941 WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3942 WMI_10X_PDEV_PARAM_PDEV_RESET
3943};
3944
3945enum wmi_10_4_pdev_param {
3946 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3947 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
3948 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
3949 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
3950 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
3951 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
3952 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
3953 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3954 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
3955 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
3956 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3957 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
3958 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
3959 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3960 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
3961 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
3962 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
3963 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
3964 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
3965 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3966 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3967 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
3968 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3969 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
3970 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
3971 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3972 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3973 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3974 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3975 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3976 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3977 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3978 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3979 WMI_10_4_PDEV_PARAM_PMF_QOS,
3980 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
3981 WMI_10_4_PDEV_PARAM_DCS,
3982 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
3983 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
3984 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
3985 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
3986 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
3987 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
3988 WMI_10_4_PDEV_PARAM_PROXY_STA,
3989 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
3990 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
3991 WMI_10_4_PDEV_PARAM_AGGR_BURST,
3992 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
3993 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
3994 WMI_10_4_PDEV_PARAM_BURST_DUR,
3995 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
3996 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3997 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
3998 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
3999 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4000 WMI_10_4_PDEV_PARAM_RX_FILTER,
4001 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4002 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4003 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4004 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4005 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4006 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4007 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4008 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4009 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4010 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4011 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4012 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4013 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4014 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4015 WMI_10_4_PDEV_PARAM_EN_STATS,
4016 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4017 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4018 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4019 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4020 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4021 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4022 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4023 WMI_10_4_PDEV_PARAM_ANT_PLZN,
4024 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4025 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4026 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4027 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4028 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4029 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4030 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4031 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4032 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4033 WMI_10_4_PDEV_PARAM_PDEV_RESET,
4034 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4035 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4036 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
4037 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
4038 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
4039 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
4040 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
4041 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
4042 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
4043 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
4044 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
4045 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4046};
4047
4048struct wmi_pdev_set_param_cmd {
4049 __le32 param_id;
4050 __le32 param_value;
4051} __packed;
4052
4053
4054#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4055
4056struct wmi_pdev_get_tpc_config_cmd {
4057
4058 __le32 param;
4059} __packed;
4060
4061#define WMI_TPC_CONFIG_PARAM 1
4062#define WMI_TPC_FINAL_RATE_MAX 240
4063#define WMI_TPC_TX_N_CHAIN 4
4064#define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65)
4065#define WMI_TPC_PREAM_TABLE_MAX 10
4066#define WMI_TPC_FLAG 3
4067#define WMI_TPC_BUF_SIZE 10
4068#define WMI_TPC_BEAMFORMING 2
4069
4070enum wmi_tpc_table_type {
4071 WMI_TPC_TABLE_TYPE_CDD = 0,
4072 WMI_TPC_TABLE_TYPE_STBC = 1,
4073 WMI_TPC_TABLE_TYPE_TXBF = 2,
4074};
4075
4076enum wmi_tpc_config_event_flag {
4077 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
4078 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
4079 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
4080};
4081
4082struct wmi_pdev_tpc_config_event {
4083 __le32 reg_domain;
4084 __le32 chan_freq;
4085 __le32 phy_mode;
4086 __le32 twice_antenna_reduction;
4087 __le32 twice_max_rd_power;
4088 a_sle32 twice_antenna_gain;
4089 __le32 power_limit;
4090 __le32 rate_max;
4091 __le32 num_tx_chain;
4092 __le32 ctl;
4093 __le32 flags;
4094 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4095 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4096 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4097 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4098 u8 rates_array[WMI_TPC_RATE_MAX];
4099} __packed;
4100
4101
4102enum wmi_tp_scale {
4103 WMI_TP_SCALE_MAX = 0,
4104 WMI_TP_SCALE_50 = 1,
4105 WMI_TP_SCALE_25 = 2,
4106 WMI_TP_SCALE_12 = 3,
4107 WMI_TP_SCALE_MIN = 4,
4108 WMI_TP_SCALE_SIZE = 5,
4109};
4110
4111struct wmi_pdev_tpc_final_table_event {
4112 __le32 reg_domain;
4113 __le32 chan_freq;
4114 __le32 phy_mode;
4115 __le32 twice_antenna_reduction;
4116 __le32 twice_max_rd_power;
4117 a_sle32 twice_antenna_gain;
4118 __le32 power_limit;
4119 __le32 rate_max;
4120 __le32 num_tx_chain;
4121 __le32 ctl;
4122 __le32 flags;
4123 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4124 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4125 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4126 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4127 u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4128 u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4129 [WMI_TPC_TX_N_CHAIN];
4130} __packed;
4131
4132struct wmi_pdev_get_tpc_table_cmd {
4133 __le32 param;
4134} __packed;
4135
4136enum wmi_tpc_pream_2ghz {
4137 WMI_TPC_PREAM_2GHZ_CCK = 0,
4138 WMI_TPC_PREAM_2GHZ_OFDM,
4139 WMI_TPC_PREAM_2GHZ_HT20,
4140 WMI_TPC_PREAM_2GHZ_HT40,
4141 WMI_TPC_PREAM_2GHZ_VHT20,
4142 WMI_TPC_PREAM_2GHZ_VHT40,
4143 WMI_TPC_PREAM_2GHZ_VHT80,
4144};
4145
4146enum wmi_tpc_pream_5ghz {
4147 WMI_TPC_PREAM_5GHZ_OFDM = 1,
4148 WMI_TPC_PREAM_5GHZ_HT20,
4149 WMI_TPC_PREAM_5GHZ_HT40,
4150 WMI_TPC_PREAM_5GHZ_VHT20,
4151 WMI_TPC_PREAM_5GHZ_VHT40,
4152 WMI_TPC_PREAM_5GHZ_VHT80,
4153 WMI_TPC_PREAM_5GHZ_HTCUP,
4154};
4155
4156struct wmi_pdev_chanlist_update_event {
4157
4158 __le32 num_chan;
4159
4160 struct wmi_channel channel_list[1];
4161} __packed;
4162
4163#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
4164
4165struct wmi_debug_mesg_event {
4166
4167 char bufp[WMI_MAX_DEBUG_MESG];
4168} __packed;
4169
4170enum {
4171
4172 VDEV_SUBTYPE_P2PDEV = 0,
4173
4174 VDEV_SUBTYPE_P2PCLI,
4175
4176 VDEV_SUBTYPE_P2PGO,
4177
4178 VDEV_SUBTYPE_BT,
4179};
4180
4181struct wmi_pdev_set_channel_cmd {
4182
4183 struct wmi_channel chan;
4184} __packed;
4185
4186struct wmi_pdev_pktlog_enable_cmd {
4187 __le32 ev_bitmap;
4188} __packed;
4189
4190
4191#define WMI_DSCP_MAP_MAX (64)
4192struct wmi_pdev_set_dscp_tid_map_cmd {
4193
4194 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
4195} __packed;
4196
4197enum mcast_bcast_rate_id {
4198 WMI_SET_MCAST_RATE,
4199 WMI_SET_BCAST_RATE
4200};
4201
4202struct mcast_bcast_rate {
4203 enum mcast_bcast_rate_id rate_id;
4204 __le32 rate;
4205} __packed;
4206
4207struct wmi_wmm_params {
4208 __le32 cwmin;
4209 __le32 cwmax;
4210 __le32 aifs;
4211 __le32 txop;
4212 __le32 acm;
4213 __le32 no_ack;
4214} __packed;
4215
4216struct wmi_pdev_set_wmm_params {
4217 struct wmi_wmm_params ac_be;
4218 struct wmi_wmm_params ac_bk;
4219 struct wmi_wmm_params ac_vi;
4220 struct wmi_wmm_params ac_vo;
4221} __packed;
4222
4223struct wmi_wmm_params_arg {
4224 u32 cwmin;
4225 u32 cwmax;
4226 u32 aifs;
4227 u32 txop;
4228 u32 acm;
4229 u32 no_ack;
4230};
4231
4232struct wmi_wmm_params_all_arg {
4233 struct wmi_wmm_params_arg ac_be;
4234 struct wmi_wmm_params_arg ac_bk;
4235 struct wmi_wmm_params_arg ac_vi;
4236 struct wmi_wmm_params_arg ac_vo;
4237};
4238
4239struct wmi_pdev_stats_tx {
4240
4241 __le32 comp_queued;
4242
4243
4244 __le32 comp_delivered;
4245
4246
4247 __le32 msdu_enqued;
4248
4249
4250 __le32 mpdu_enqued;
4251
4252
4253 __le32 wmm_drop;
4254
4255
4256 __le32 local_enqued;
4257
4258
4259 __le32 local_freed;
4260
4261
4262 __le32 hw_queued;
4263
4264
4265 __le32 hw_reaped;
4266
4267
4268 __le32 underrun;
4269
4270
4271 __le32 tx_abort;
4272
4273
4274 __le32 mpdus_requed;
4275
4276
4277 __le32 tx_ko;
4278
4279
4280 __le32 data_rc;
4281
4282
4283 __le32 self_triggers;
4284
4285
4286 __le32 sw_retry_failure;
4287
4288
4289 __le32 illgl_rate_phy_err;
4290
4291
4292 __le32 pdev_cont_xretry;
4293
4294
4295 __le32 pdev_tx_timeout;
4296
4297
4298 __le32 pdev_resets;
4299
4300
4301 __le32 stateless_tid_alloc_failure;
4302
4303 __le32 phy_underrun;
4304
4305
4306 __le32 txop_ovf;
4307} __packed;
4308
4309struct wmi_10_4_pdev_stats_tx {
4310
4311 __le32 comp_queued;
4312
4313
4314 __le32 comp_delivered;
4315
4316
4317 __le32 msdu_enqued;
4318
4319
4320 __le32 mpdu_enqued;
4321
4322
4323 __le32 wmm_drop;
4324
4325
4326 __le32 local_enqued;
4327
4328
4329 __le32 local_freed;
4330
4331
4332 __le32 hw_queued;
4333
4334
4335 __le32 hw_reaped;
4336
4337
4338 __le32 underrun;
4339
4340
4341 __le32 hw_paused;
4342
4343
4344 __le32 tx_abort;
4345
4346
4347 __le32 mpdus_requed;
4348
4349
4350 __le32 tx_ko;
4351
4352
4353 __le32 data_rc;
4354
4355
4356 __le32 self_triggers;
4357
4358
4359 __le32 sw_retry_failure;
4360
4361
4362 __le32 illgl_rate_phy_err;
4363
4364
4365 __le32 pdev_cont_xretry;
4366
4367
4368 __le32 pdev_tx_timeout;
4369
4370
4371 __le32 pdev_resets;
4372
4373
4374 __le32 stateless_tid_alloc_failure;
4375
4376 __le32 phy_underrun;
4377
4378
4379 __le32 txop_ovf;
4380
4381
4382 __le32 seq_posted;
4383
4384
4385 __le32 seq_failed_queueing;
4386
4387
4388 __le32 seq_completed;
4389
4390
4391 __le32 seq_restarted;
4392
4393
4394 __le32 mu_seq_posted;
4395
4396
4397 __le32 mpdus_sw_flush;
4398
4399
4400 __le32 mpdus_hw_filter;
4401
4402
4403
4404
4405 __le32 mpdus_truncated;
4406
4407
4408 __le32 mpdus_ack_failed;
4409
4410
4411 __le32 mpdus_expired;
4412} __packed;
4413
4414struct wmi_pdev_stats_rx {
4415
4416 __le32 mid_ppdu_route_change;
4417
4418
4419 __le32 status_rcvd;
4420
4421
4422 __le32 r0_frags;
4423 __le32 r1_frags;
4424 __le32 r2_frags;
4425 __le32 r3_frags;
4426
4427
4428 __le32 htt_msdus;
4429 __le32 htt_mpdus;
4430
4431
4432 __le32 loc_msdus;
4433 __le32 loc_mpdus;
4434
4435
4436 __le32 oversize_amsdu;
4437
4438
4439 __le32 phy_errs;
4440
4441
4442 __le32 phy_err_drop;
4443
4444
4445 __le32 mpdu_errs;
4446} __packed;
4447
4448struct wmi_pdev_stats_peer {
4449
4450 __le32 dummy;
4451} __packed;
4452
4453enum wmi_stats_id {
4454 WMI_STAT_PEER = BIT(0),
4455 WMI_STAT_AP = BIT(1),
4456 WMI_STAT_PDEV = BIT(2),
4457 WMI_STAT_VDEV = BIT(3),
4458 WMI_STAT_BCNFLT = BIT(4),
4459 WMI_STAT_VDEV_RATE = BIT(5),
4460};
4461
4462enum wmi_10_4_stats_id {
4463 WMI_10_4_STAT_PEER = BIT(0),
4464 WMI_10_4_STAT_AP = BIT(1),
4465 WMI_10_4_STAT_INST = BIT(2),
4466 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4467 WMI_10_4_STAT_VDEV_EXTD = BIT(4),
4468};
4469
4470struct wlan_inst_rssi_args {
4471 __le16 cfg_retry_count;
4472 __le16 retry_count;
4473};
4474
4475struct wmi_request_stats_cmd {
4476 __le32 stats_id;
4477
4478 __le32 vdev_id;
4479
4480
4481 struct wmi_mac_addr peer_macaddr;
4482
4483
4484 struct wlan_inst_rssi_args inst_rssi_args;
4485} __packed;
4486
4487
4488enum {
4489
4490 WMI_PDEV_SUSPEND,
4491
4492
4493 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4494};
4495
4496struct wmi_pdev_suspend_cmd {
4497
4498 __le32 suspend_opt;
4499} __packed;
4500
4501struct wmi_stats_event {
4502 __le32 stats_id;
4503
4504
4505
4506
4507 __le32 num_pdev_stats;
4508
4509
4510
4511
4512 __le32 num_vdev_stats;
4513
4514
4515
4516
4517 __le32 num_peer_stats;
4518 __le32 num_bcnflt_stats;
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528 u8 data[0];
4529} __packed;
4530
4531struct wmi_10_2_stats_event {
4532 __le32 stats_id;
4533 __le32 num_pdev_stats;
4534 __le32 num_pdev_ext_stats;
4535 __le32 num_vdev_stats;
4536 __le32 num_peer_stats;
4537 __le32 num_bcnflt_stats;
4538 u8 data[0];
4539} __packed;
4540
4541
4542
4543
4544
4545struct wmi_pdev_stats_base {
4546 __le32 chan_nf;
4547 __le32 tx_frame_count;
4548 __le32 rx_frame_count;
4549 __le32 rx_clear_count;
4550 __le32 cycle_count;
4551 __le32 phy_err_count;
4552 __le32 chan_tx_pwr;
4553} __packed;
4554
4555struct wmi_pdev_stats {
4556 struct wmi_pdev_stats_base base;
4557 struct wmi_pdev_stats_tx tx;
4558 struct wmi_pdev_stats_rx rx;
4559 struct wmi_pdev_stats_peer peer;
4560} __packed;
4561
4562struct wmi_pdev_stats_extra {
4563 __le32 ack_rx_bad;
4564 __le32 rts_bad;
4565 __le32 rts_good;
4566 __le32 fcs_bad;
4567 __le32 no_beacons;
4568 __le32 mib_int_count;
4569} __packed;
4570
4571struct wmi_10x_pdev_stats {
4572 struct wmi_pdev_stats_base base;
4573 struct wmi_pdev_stats_tx tx;
4574 struct wmi_pdev_stats_rx rx;
4575 struct wmi_pdev_stats_peer peer;
4576 struct wmi_pdev_stats_extra extra;
4577} __packed;
4578
4579struct wmi_pdev_stats_mem {
4580 __le32 dram_free;
4581 __le32 iram_free;
4582} __packed;
4583
4584struct wmi_10_2_pdev_stats {
4585 struct wmi_pdev_stats_base base;
4586 struct wmi_pdev_stats_tx tx;
4587 __le32 mc_drop;
4588 struct wmi_pdev_stats_rx rx;
4589 __le32 pdev_rx_timeout;
4590 struct wmi_pdev_stats_mem mem;
4591 struct wmi_pdev_stats_peer peer;
4592 struct wmi_pdev_stats_extra extra;
4593} __packed;
4594
4595struct wmi_10_4_pdev_stats {
4596 struct wmi_pdev_stats_base base;
4597 struct wmi_10_4_pdev_stats_tx tx;
4598 struct wmi_pdev_stats_rx rx;
4599 __le32 rx_ovfl_errs;
4600 struct wmi_pdev_stats_mem mem;
4601 __le32 sram_free_size;
4602 struct wmi_pdev_stats_extra extra;
4603} __packed;
4604
4605
4606
4607
4608
4609#define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31)
4610#define WMI_VDEV_STATS_FTM_COUNT_LSB 0
4611#define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff
4612
4613struct wmi_vdev_stats {
4614 __le32 vdev_id;
4615} __packed;
4616
4617struct wmi_vdev_stats_extd {
4618 __le32 vdev_id;
4619 __le32 ppdu_aggr_cnt;
4620 __le32 ppdu_noack;
4621 __le32 mpdu_queued;
4622 __le32 ppdu_nonaggr_cnt;
4623 __le32 mpdu_sw_requeued;
4624 __le32 mpdu_suc_retry;
4625 __le32 mpdu_suc_multitry;
4626 __le32 mpdu_fail_retry;
4627 __le32 tx_ftm_suc;
4628 __le32 tx_ftm_suc_retry;
4629 __le32 tx_ftm_fail;
4630 __le32 rx_ftmr_cnt;
4631 __le32 rx_ftmr_dup_cnt;
4632 __le32 rx_iftmr_cnt;
4633 __le32 rx_iftmr_dup_cnt;
4634 __le32 reserved[6];
4635} __packed;
4636
4637
4638
4639
4640
4641struct wmi_peer_stats {
4642 struct wmi_mac_addr peer_macaddr;
4643 __le32 peer_rssi;
4644 __le32 peer_tx_rate;
4645} __packed;
4646
4647struct wmi_10x_peer_stats {
4648 struct wmi_peer_stats old;
4649 __le32 peer_rx_rate;
4650} __packed;
4651
4652struct wmi_10_2_peer_stats {
4653 struct wmi_peer_stats old;
4654 __le32 peer_rx_rate;
4655 __le32 current_per;
4656 __le32 retries;
4657 __le32 tx_rate_count;
4658 __le32 max_4ms_frame_len;
4659 __le32 total_sub_frames;
4660 __le32 tx_bytes;
4661 __le32 num_pkt_loss_overflow[4];
4662 __le32 num_pkt_loss_excess_retry[4];
4663} __packed;
4664
4665struct wmi_10_2_4_peer_stats {
4666 struct wmi_10_2_peer_stats common;
4667 __le32 peer_rssi_changed;
4668} __packed;
4669
4670struct wmi_10_2_4_ext_peer_stats {
4671 struct wmi_10_2_peer_stats common;
4672 __le32 peer_rssi_changed;
4673 __le32 rx_duration;
4674} __packed;
4675
4676struct wmi_10_4_peer_stats {
4677 struct wmi_mac_addr peer_macaddr;
4678 __le32 peer_rssi;
4679 __le32 peer_rssi_seq_num;
4680 __le32 peer_tx_rate;
4681 __le32 peer_rx_rate;
4682 __le32 current_per;
4683 __le32 retries;
4684 __le32 tx_rate_count;
4685 __le32 max_4ms_frame_len;
4686 __le32 total_sub_frames;
4687 __le32 tx_bytes;
4688 __le32 num_pkt_loss_overflow[4];
4689 __le32 num_pkt_loss_excess_retry[4];
4690 __le32 peer_rssi_changed;
4691} __packed;
4692
4693struct wmi_10_4_peer_extd_stats {
4694 struct wmi_mac_addr peer_macaddr;
4695 __le32 inactive_time;
4696 __le32 peer_chain_rssi;
4697 __le32 rx_duration;
4698 __le32 reserved[10];
4699} __packed;
4700
4701struct wmi_10_4_bss_bcn_stats {
4702 __le32 vdev_id;
4703 __le32 bss_bcns_dropped;
4704 __le32 bss_bcn_delivered;
4705} __packed;
4706
4707struct wmi_10_4_bss_bcn_filter_stats {
4708 __le32 bcns_dropped;
4709 __le32 bcns_delivered;
4710 __le32 active_filters;
4711 struct wmi_10_4_bss_bcn_stats bss_stats;
4712} __packed;
4713
4714struct wmi_10_2_pdev_ext_stats {
4715 __le32 rx_rssi_comb;
4716 __le32 rx_rssi[4];
4717 __le32 rx_mcs[10];
4718 __le32 tx_mcs[10];
4719 __le32 ack_rssi;
4720} __packed;
4721
4722struct wmi_vdev_create_cmd {
4723 __le32 vdev_id;
4724 __le32 vdev_type;
4725 __le32 vdev_subtype;
4726 struct wmi_mac_addr vdev_macaddr;
4727} __packed;
4728
4729enum wmi_vdev_type {
4730 WMI_VDEV_TYPE_AP = 1,
4731 WMI_VDEV_TYPE_STA = 2,
4732 WMI_VDEV_TYPE_IBSS = 3,
4733 WMI_VDEV_TYPE_MONITOR = 4,
4734};
4735
4736enum wmi_vdev_subtype {
4737 WMI_VDEV_SUBTYPE_NONE,
4738 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4739 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4740 WMI_VDEV_SUBTYPE_P2P_GO,
4741 WMI_VDEV_SUBTYPE_PROXY_STA,
4742 WMI_VDEV_SUBTYPE_MESH_11S,
4743 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4744};
4745
4746enum wmi_vdev_subtype_legacy {
4747 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4748 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4749 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4750 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4751 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4752};
4753
4754enum wmi_vdev_subtype_10_2_4 {
4755 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4756 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4757 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4758 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4759 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4760 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4761};
4762
4763enum wmi_vdev_subtype_10_4 {
4764 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4765 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4766 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4767 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4768 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4769 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4770 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4771};
4772
4773
4774
4775
4776
4777
4778
4779
4780#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4781
4782
4783
4784
4785
4786
4787
4788#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4789
4790struct wmi_p2p_noa_descriptor {
4791 __le32 type_count;
4792 __le32 duration;
4793 __le32 interval;
4794 __le32 start_time;
4795} __packed;
4796
4797struct wmi_vdev_start_request_cmd {
4798
4799 struct wmi_channel chan;
4800
4801 __le32 vdev_id;
4802
4803 __le32 requestor_id;
4804
4805 __le32 beacon_interval;
4806
4807 __le32 dtim_period;
4808
4809 __le32 flags;
4810
4811 struct wmi_ssid ssid;
4812
4813 __le32 bcn_tx_rate;
4814
4815 __le32 bcn_tx_power;
4816
4817 __le32 num_noa_descriptors;
4818
4819
4820
4821
4822 __le32 disable_hw_ack;
4823
4824 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4825} __packed;
4826
4827struct wmi_vdev_restart_request_cmd {
4828 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4829} __packed;
4830
4831struct wmi_vdev_start_request_arg {
4832 u32 vdev_id;
4833 struct wmi_channel_arg channel;
4834 u32 bcn_intval;
4835 u32 dtim_period;
4836 u8 *ssid;
4837 u32 ssid_len;
4838 u32 bcn_tx_rate;
4839 u32 bcn_tx_power;
4840 bool disable_hw_ack;
4841 bool hidden_ssid;
4842 bool pmf_enabled;
4843};
4844
4845struct wmi_vdev_delete_cmd {
4846
4847 __le32 vdev_id;
4848} __packed;
4849
4850struct wmi_vdev_up_cmd {
4851 __le32 vdev_id;
4852 __le32 vdev_assoc_id;
4853 struct wmi_mac_addr vdev_bssid;
4854} __packed;
4855
4856struct wmi_vdev_stop_cmd {
4857 __le32 vdev_id;
4858} __packed;
4859
4860struct wmi_vdev_down_cmd {
4861 __le32 vdev_id;
4862} __packed;
4863
4864struct wmi_vdev_standby_response_cmd {
4865
4866 __le32 vdev_id;
4867} __packed;
4868
4869struct wmi_vdev_resume_response_cmd {
4870
4871 __le32 vdev_id;
4872} __packed;
4873
4874struct wmi_vdev_set_param_cmd {
4875 __le32 vdev_id;
4876 __le32 param_id;
4877 __le32 param_value;
4878} __packed;
4879
4880#define WMI_MAX_KEY_INDEX 3
4881#define WMI_MAX_KEY_LEN 32
4882
4883#define WMI_KEY_PAIRWISE 0x00
4884#define WMI_KEY_GROUP 0x01
4885#define WMI_KEY_TX_USAGE 0x02
4886
4887struct wmi_key_seq_counter {
4888 __le32 key_seq_counter_l;
4889 __le32 key_seq_counter_h;
4890} __packed;
4891
4892#define WMI_CIPHER_NONE 0x0
4893#define WMI_CIPHER_WEP 0x1
4894#define WMI_CIPHER_TKIP 0x2
4895#define WMI_CIPHER_AES_OCB 0x3
4896#define WMI_CIPHER_AES_CCM 0x4
4897#define WMI_CIPHER_WAPI 0x5
4898#define WMI_CIPHER_CKIP 0x6
4899#define WMI_CIPHER_AES_CMAC 0x7
4900#define WMI_CIPHER_AES_GCM 0x8
4901
4902struct wmi_vdev_install_key_cmd {
4903 __le32 vdev_id;
4904 struct wmi_mac_addr peer_macaddr;
4905 __le32 key_idx;
4906 __le32 key_flags;
4907 __le32 key_cipher;
4908 struct wmi_key_seq_counter key_rsc_counter;
4909 struct wmi_key_seq_counter key_global_rsc_counter;
4910 struct wmi_key_seq_counter key_tsc_counter;
4911 u8 wpi_key_rsc_counter[16];
4912 u8 wpi_key_tsc_counter[16];
4913 __le32 key_len;
4914 __le32 key_txmic_len;
4915 __le32 key_rxmic_len;
4916
4917
4918 u8 key_data[0];
4919} __packed;
4920
4921struct wmi_vdev_install_key_arg {
4922 u32 vdev_id;
4923 const u8 *macaddr;
4924 u32 key_idx;
4925 u32 key_flags;
4926 u32 key_cipher;
4927 u32 key_len;
4928 u32 key_txmic_len;
4929 u32 key_rxmic_len;
4930 const void *key_data;
4931};
4932
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946enum wmi_rate_preamble {
4947 WMI_RATE_PREAMBLE_OFDM,
4948 WMI_RATE_PREAMBLE_CCK,
4949 WMI_RATE_PREAMBLE_HT,
4950 WMI_RATE_PREAMBLE_VHT,
4951};
4952
4953#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
4954#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
4955#define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
4956#define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
4957#define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
4958#define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
4959#define ATH10K_HW_RATECODE(rate, nss, preamble) \
4960 (((preamble) << 6) | ((nss) << 4) | (rate))
4961
4962#define VHT_MCS_NUM 10
4963#define VHT_BW_NUM 4
4964#define VHT_NSS_NUM 4
4965
4966
4967#define WMI_FIXED_RATE_NONE (0xff)
4968
4969struct wmi_vdev_param_map {
4970 u32 rts_threshold;
4971 u32 fragmentation_threshold;
4972 u32 beacon_interval;
4973 u32 listen_interval;
4974 u32 multicast_rate;
4975 u32 mgmt_tx_rate;
4976 u32 slot_time;
4977 u32 preamble;
4978 u32 swba_time;
4979 u32 wmi_vdev_stats_update_period;
4980 u32 wmi_vdev_pwrsave_ageout_time;
4981 u32 wmi_vdev_host_swba_interval;
4982 u32 dtim_period;
4983 u32 wmi_vdev_oc_scheduler_air_time_limit;
4984 u32 wds;
4985 u32 atim_window;
4986 u32 bmiss_count_max;
4987 u32 bmiss_first_bcnt;
4988 u32 bmiss_final_bcnt;
4989 u32 feature_wmm;
4990 u32 chwidth;
4991 u32 chextoffset;
4992 u32 disable_htprotection;
4993 u32 sta_quickkickout;
4994 u32 mgmt_rate;
4995 u32 protection_mode;
4996 u32 fixed_rate;
4997 u32 sgi;
4998 u32 ldpc;
4999 u32 tx_stbc;
5000 u32 rx_stbc;
5001 u32 intra_bss_fwd;
5002 u32 def_keyid;
5003 u32 nss;
5004 u32 bcast_data_rate;
5005 u32 mcast_data_rate;
5006 u32 mcast_indicate;
5007 u32 dhcp_indicate;
5008 u32 unknown_dest_indicate;
5009 u32 ap_keepalive_min_idle_inactive_time_secs;
5010 u32 ap_keepalive_max_idle_inactive_time_secs;
5011 u32 ap_keepalive_max_unresponsive_time_secs;
5012 u32 ap_enable_nawds;
5013 u32 mcast2ucast_set;
5014 u32 enable_rtscts;
5015 u32 txbf;
5016 u32 packet_powersave;
5017 u32 drop_unencry;
5018 u32 tx_encap_type;
5019 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
5020 u32 rc_num_retries;
5021 u32 cabq_maxdur;
5022 u32 mfptest_set;
5023 u32 rts_fixed_rate;
5024 u32 vht_sgimask;
5025 u32 vht80_ratemask;
5026 u32 early_rx_adjust_enable;
5027 u32 early_rx_tgt_bmiss_num;
5028 u32 early_rx_bmiss_sample_cycle;
5029 u32 early_rx_slop_step;
5030 u32 early_rx_init_slop;
5031 u32 early_rx_adjust_pause;
5032 u32 proxy_sta;
5033 u32 meru_vc;
5034 u32 rx_decap_type;
5035 u32 bw_nss_ratemask;
5036 u32 inc_tsf;
5037 u32 dec_tsf;
5038};
5039
5040#define WMI_VDEV_PARAM_UNSUPPORTED 0
5041
5042
5043enum wmi_vdev_param {
5044
5045 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5046
5047 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5048
5049 WMI_VDEV_PARAM_BEACON_INTERVAL,
5050
5051 WMI_VDEV_PARAM_LISTEN_INTERVAL,
5052
5053 WMI_VDEV_PARAM_MULTICAST_RATE,
5054
5055 WMI_VDEV_PARAM_MGMT_TX_RATE,
5056
5057 WMI_VDEV_PARAM_SLOT_TIME,
5058
5059 WMI_VDEV_PARAM_PREAMBLE,
5060
5061 WMI_VDEV_PARAM_SWBA_TIME,
5062
5063 WMI_VDEV_STATS_UPDATE_PERIOD,
5064
5065 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
5066
5067
5068
5069
5070 WMI_VDEV_HOST_SWBA_INTERVAL,
5071
5072 WMI_VDEV_PARAM_DTIM_PERIOD,
5073
5074
5075
5076
5077 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5078
5079 WMI_VDEV_PARAM_WDS,
5080
5081 WMI_VDEV_PARAM_ATIM_WINDOW,
5082
5083 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
5084
5085 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
5086
5087 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
5088
5089 WMI_VDEV_PARAM_FEATURE_WMM,
5090
5091 WMI_VDEV_PARAM_CHWIDTH,
5092
5093 WMI_VDEV_PARAM_CHEXTOFFSET,
5094
5095 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
5096
5097 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
5098
5099 WMI_VDEV_PARAM_MGMT_RATE,
5100
5101 WMI_VDEV_PARAM_PROTECTION_MODE,
5102
5103 WMI_VDEV_PARAM_FIXED_RATE,
5104
5105 WMI_VDEV_PARAM_SGI,
5106
5107 WMI_VDEV_PARAM_LDPC,
5108
5109 WMI_VDEV_PARAM_TX_STBC,
5110
5111 WMI_VDEV_PARAM_RX_STBC,
5112
5113 WMI_VDEV_PARAM_INTRA_BSS_FWD,
5114
5115 WMI_VDEV_PARAM_DEF_KEYID,
5116
5117 WMI_VDEV_PARAM_NSS,
5118
5119 WMI_VDEV_PARAM_BCAST_DATA_RATE,
5120
5121 WMI_VDEV_PARAM_MCAST_DATA_RATE,
5122
5123 WMI_VDEV_PARAM_MCAST_INDICATE,
5124
5125 WMI_VDEV_PARAM_DHCP_INDICATE,
5126
5127 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5128
5129
5130 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5131
5132
5133
5134
5135
5136
5137
5138
5139
5140
5141
5142 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5143
5144
5145
5146
5147
5148
5149
5150 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5151
5152
5153 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
5154
5155 WMI_VDEV_PARAM_ENABLE_RTSCTS,
5156
5157 WMI_VDEV_PARAM_TXBF,
5158
5159
5160 WMI_VDEV_PARAM_PACKET_POWERSAVE,
5161
5162
5163
5164
5165
5166 WMI_VDEV_PARAM_DROP_UNENCRY,
5167
5168
5169
5170
5171 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
5172};
5173
5174
5175enum wmi_10x_vdev_param {
5176
5177 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5178
5179 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5180
5181 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
5182
5183 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5184
5185 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
5186
5187 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
5188
5189 WMI_10X_VDEV_PARAM_SLOT_TIME,
5190
5191 WMI_10X_VDEV_PARAM_PREAMBLE,
5192
5193 WMI_10X_VDEV_PARAM_SWBA_TIME,
5194
5195 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
5196
5197 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
5198
5199
5200
5201
5202 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
5203
5204 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
5205
5206
5207
5208
5209 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5210
5211 WMI_10X_VDEV_PARAM_WDS,
5212
5213 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
5214
5215 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
5216
5217 WMI_10X_VDEV_PARAM_FEATURE_WMM,
5218
5219 WMI_10X_VDEV_PARAM_CHWIDTH,
5220
5221 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
5222
5223 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
5224
5225 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
5226
5227 WMI_10X_VDEV_PARAM_MGMT_RATE,
5228
5229 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
5230
5231 WMI_10X_VDEV_PARAM_FIXED_RATE,
5232
5233 WMI_10X_VDEV_PARAM_SGI,
5234
5235 WMI_10X_VDEV_PARAM_LDPC,
5236
5237 WMI_10X_VDEV_PARAM_TX_STBC,
5238
5239 WMI_10X_VDEV_PARAM_RX_STBC,
5240
5241 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
5242
5243 WMI_10X_VDEV_PARAM_DEF_KEYID,
5244
5245 WMI_10X_VDEV_PARAM_NSS,
5246
5247 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
5248
5249 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
5250
5251 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
5252
5253 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
5254
5255 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5256
5257
5258 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5259
5260
5261
5262
5263
5264
5265
5266
5267
5268
5269
5270 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5271
5272
5273
5274
5275
5276
5277
5278 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5279
5280
5281 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
5282
5283 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
5284
5285 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
5286
5287 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5288
5289
5290 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
5291 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
5292 WMI_10X_VDEV_PARAM_MFPTEST_SET,
5293 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
5294 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
5295 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
5296 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
5297};
5298
5299enum wmi_10_4_vdev_param {
5300 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5301 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5302 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
5303 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
5304 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
5305 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
5306 WMI_10_4_VDEV_PARAM_SLOT_TIME,
5307 WMI_10_4_VDEV_PARAM_PREAMBLE,
5308 WMI_10_4_VDEV_PARAM_SWBA_TIME,
5309 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
5310 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
5311 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
5312 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
5313 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5314 WMI_10_4_VDEV_PARAM_WDS,
5315 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
5316 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
5317 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
5318 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
5319 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
5320 WMI_10_4_VDEV_PARAM_CHWIDTH,
5321 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
5322 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
5323 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
5324 WMI_10_4_VDEV_PARAM_MGMT_RATE,
5325 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5326 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5327 WMI_10_4_VDEV_PARAM_SGI,
5328 WMI_10_4_VDEV_PARAM_LDPC,
5329 WMI_10_4_VDEV_PARAM_TX_STBC,
5330 WMI_10_4_VDEV_PARAM_RX_STBC,
5331 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5332 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5333 WMI_10_4_VDEV_PARAM_NSS,
5334 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5335 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5336 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5337 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5338 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5339 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5340 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5341 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5342 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5343 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5344 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5345 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5346 WMI_10_4_VDEV_PARAM_TXBF,
5347 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5348 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5349 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5350 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5351 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5352 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5353 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5354 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5355 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5356 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5357 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5358 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5359 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5360 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5361 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5362 WMI_10_4_VDEV_PARAM_PROXY_STA,
5363 WMI_10_4_VDEV_PARAM_MERU_VC,
5364 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5365 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5366 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5367 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5368 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5369 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5370 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5371 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5372 WMI_10_4_VDEV_PARAM_RX_FILTER,
5373 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5374 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5375 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5376 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5377};
5378
5379#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5380#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5381#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5382#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5383
5384#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5385#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
5386#define WMI_TXBF_CONF_IMPLICIT_BF BIT(7)
5387#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5388#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5389
5390
5391#define WMI_VDEV_SLOT_TIME_LONG 0x1
5392
5393#define WMI_VDEV_SLOT_TIME_SHORT 0x2
5394
5395#define WMI_VDEV_PREAMBLE_LONG 0x1
5396
5397#define WMI_VDEV_PREAMBLE_SHORT 0x2
5398
5399enum wmi_start_event_param {
5400 WMI_VDEV_RESP_START_EVENT = 0,
5401 WMI_VDEV_RESP_RESTART_EVENT,
5402};
5403
5404struct wmi_vdev_start_response_event {
5405 __le32 vdev_id;
5406 __le32 req_id;
5407 __le32 resp_type;
5408 __le32 status;
5409} __packed;
5410
5411struct wmi_vdev_standby_req_event {
5412
5413 __le32 vdev_id;
5414} __packed;
5415
5416struct wmi_vdev_resume_req_event {
5417
5418 __le32 vdev_id;
5419} __packed;
5420
5421struct wmi_vdev_stopped_event {
5422
5423 __le32 vdev_id;
5424} __packed;
5425
5426
5427
5428
5429
5430struct wmi_vdev_simple_event {
5431
5432 __le32 vdev_id;
5433} __packed;
5434
5435
5436
5437#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5438
5439
5440#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5441
5442
5443#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5444
5445
5446struct wmi_vdev_spectral_conf_cmd {
5447 __le32 vdev_id;
5448
5449
5450 __le32 scan_count;
5451 __le32 scan_period;
5452 __le32 scan_priority;
5453
5454
5455 __le32 scan_fft_size;
5456 __le32 scan_gc_ena;
5457 __le32 scan_restart_ena;
5458 __le32 scan_noise_floor_ref;
5459 __le32 scan_init_delay;
5460 __le32 scan_nb_tone_thr;
5461 __le32 scan_str_bin_thr;
5462 __le32 scan_wb_rpt_mode;
5463 __le32 scan_rssi_rpt_mode;
5464 __le32 scan_rssi_thr;
5465 __le32 scan_pwr_format;
5466
5467
5468
5469
5470
5471
5472
5473
5474
5475
5476
5477
5478 __le32 scan_rpt_mode;
5479 __le32 scan_bin_scale;
5480 __le32 scan_dbm_adj;
5481 __le32 scan_chn_mask;
5482} __packed;
5483
5484struct wmi_vdev_spectral_conf_arg {
5485 u32 vdev_id;
5486 u32 scan_count;
5487 u32 scan_period;
5488 u32 scan_priority;
5489 u32 scan_fft_size;
5490 u32 scan_gc_ena;
5491 u32 scan_restart_ena;
5492 u32 scan_noise_floor_ref;
5493 u32 scan_init_delay;
5494 u32 scan_nb_tone_thr;
5495 u32 scan_str_bin_thr;
5496 u32 scan_wb_rpt_mode;
5497 u32 scan_rssi_rpt_mode;
5498 u32 scan_rssi_thr;
5499 u32 scan_pwr_format;
5500 u32 scan_rpt_mode;
5501 u32 scan_bin_scale;
5502 u32 scan_dbm_adj;
5503 u32 scan_chn_mask;
5504};
5505
5506#define WMI_SPECTRAL_ENABLE_DEFAULT 0
5507#define WMI_SPECTRAL_COUNT_DEFAULT 0
5508#define WMI_SPECTRAL_PERIOD_DEFAULT 35
5509#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5510#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5511#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5512#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5513#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5514#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5515#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5516#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5517#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5518#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5519#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5520#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5521#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5522#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5523#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5524#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5525
5526struct wmi_vdev_spectral_enable_cmd {
5527 __le32 vdev_id;
5528 __le32 trigger_cmd;
5529 __le32 enable_cmd;
5530} __packed;
5531
5532#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5533#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5534#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5535#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5536
5537
5538struct wmi_bcn_tx_hdr {
5539 __le32 vdev_id;
5540 __le32 tx_rate;
5541 __le32 tx_power;
5542 __le32 bcn_len;
5543} __packed;
5544
5545struct wmi_bcn_tx_cmd {
5546 struct wmi_bcn_tx_hdr hdr;
5547 u8 *bcn[0];
5548} __packed;
5549
5550struct wmi_bcn_tx_arg {
5551 u32 vdev_id;
5552 u32 tx_rate;
5553 u32 tx_power;
5554 u32 bcn_len;
5555 const void *bcn;
5556};
5557
5558enum wmi_bcn_tx_ref_flags {
5559 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5560 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5561};
5562
5563
5564
5565
5566#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5567
5568struct wmi_bcn_tx_ref_cmd {
5569 __le32 vdev_id;
5570 __le32 data_len;
5571
5572 __le32 data_ptr;
5573
5574 __le32 msdu_id;
5575
5576 __le32 frame_control;
5577
5578 __le32 flags;
5579
5580 __le32 antenna_mask;
5581} __packed;
5582
5583
5584#define WMI_BCN_FILTER_ALL 0
5585#define WMI_BCN_FILTER_NONE 1
5586#define WMI_BCN_FILTER_RSSI 2
5587#define WMI_BCN_FILTER_BSSID 3
5588#define WMI_BCN_FILTER_SSID 4
5589
5590struct wmi_bcn_filter_rx_cmd {
5591
5592 __le32 bcn_filter_id;
5593
5594 __le32 bcn_filter;
5595
5596 __le32 bcn_filter_len;
5597
5598 u8 *bcn_filter_buf;
5599} __packed;
5600
5601
5602struct wmi_bcn_prb_info {
5603
5604 __le32 caps;
5605
5606 __le32 erp;
5607
5608
5609
5610
5611
5612
5613
5614
5615
5616} __packed;
5617
5618struct wmi_bcn_tmpl_cmd {
5619
5620 __le32 vdev_id;
5621
5622 __le32 tim_ie_offset;
5623
5624 struct wmi_bcn_prb_info bcn_prb_info;
5625
5626 __le32 buf_len;
5627
5628 u8 data[1];
5629} __packed;
5630
5631struct wmi_prb_tmpl_cmd {
5632
5633 __le32 vdev_id;
5634
5635 struct wmi_bcn_prb_info bcn_prb_info;
5636
5637 __le32 buf_len;
5638
5639 u8 data[1];
5640} __packed;
5641
5642enum wmi_sta_ps_mode {
5643
5644 WMI_STA_PS_MODE_DISABLED = 0,
5645
5646 WMI_STA_PS_MODE_ENABLED = 1,
5647};
5648
5649struct wmi_sta_powersave_mode_cmd {
5650
5651 __le32 vdev_id;
5652
5653
5654
5655
5656
5657 __le32 sta_ps_mode;
5658} __packed;
5659
5660enum wmi_csa_offload_en {
5661 WMI_CSA_OFFLOAD_DISABLE = 0,
5662 WMI_CSA_OFFLOAD_ENABLE = 1,
5663};
5664
5665struct wmi_csa_offload_enable_cmd {
5666 __le32 vdev_id;
5667 __le32 csa_offload_enable;
5668} __packed;
5669
5670struct wmi_csa_offload_chanswitch_cmd {
5671 __le32 vdev_id;
5672 struct wmi_channel chan;
5673} __packed;
5674
5675
5676
5677
5678
5679
5680
5681enum wmi_sta_ps_param_rx_wake_policy {
5682
5683
5684
5685
5686
5687
5688 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5689
5690
5691
5692
5693
5694
5695
5696
5697 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5698};
5699
5700
5701
5702
5703
5704
5705
5706
5707
5708enum wmi_sta_ps_param_tx_wake_threshold {
5709 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5710 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5711
5712
5713
5714
5715
5716};
5717
5718
5719
5720
5721
5722
5723
5724
5725
5726
5727enum wmi_sta_ps_param_pspoll_count {
5728 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5729
5730
5731
5732
5733
5734
5735
5736
5737
5738
5739 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5740};
5741
5742
5743
5744
5745
5746
5747
5748#define WMI_UAPSD_AC_TYPE_DELI 0
5749#define WMI_UAPSD_AC_TYPE_TRIG 1
5750
5751#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5752 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5753
5754enum wmi_sta_ps_param_uapsd {
5755 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5756 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5757 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5758 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5759 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5760 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5761 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5762 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5763};
5764
5765#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5766
5767struct wmi_sta_uapsd_auto_trig_param {
5768 __le32 wmm_ac;
5769 __le32 user_priority;
5770 __le32 service_interval;
5771 __le32 suspend_interval;
5772 __le32 delay_interval;
5773};
5774
5775struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5776 __le32 vdev_id;
5777 struct wmi_mac_addr peer_macaddr;
5778 __le32 num_ac;
5779};
5780
5781struct wmi_sta_uapsd_auto_trig_arg {
5782 u32 wmm_ac;
5783 u32 user_priority;
5784 u32 service_interval;
5785 u32 suspend_interval;
5786 u32 delay_interval;
5787};
5788
5789enum wmi_sta_powersave_param {
5790
5791
5792
5793
5794
5795 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5796
5797
5798
5799
5800
5801
5802 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5803
5804
5805
5806
5807
5808
5809
5810 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5811
5812
5813
5814
5815
5816
5817
5818
5819 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5820
5821
5822
5823
5824
5825
5826 WMI_STA_PS_PARAM_UAPSD = 4,
5827};
5828
5829struct wmi_sta_powersave_param_cmd {
5830 __le32 vdev_id;
5831 __le32 param_id;
5832 __le32 param_value;
5833} __packed;
5834
5835
5836#define WMI_STA_MIMO_PS_MODE_DISABLE
5837
5838#define WMI_STA_MIMO_PS_MODE_STATIC
5839
5840#define WMI_STA_MIMO_PS_MODE_DYNAMIC
5841
5842struct wmi_sta_mimo_ps_mode_cmd {
5843
5844 __le32 vdev_id;
5845
5846 __le32 mimo_pwrsave_mode;
5847} __packed;
5848
5849
5850enum wmi_ap_ps_param_uapsd {
5851 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5852 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5853 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5854 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5855 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5856 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5857 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5858 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5859};
5860
5861
5862enum wmi_ap_ps_peer_param_max_sp {
5863 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5864 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5865 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5866 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5867 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5868};
5869
5870
5871
5872
5873
5874enum wmi_ap_ps_peer_param {
5875
5876
5877
5878
5879
5880
5881
5882
5883
5884
5885
5886 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5887
5888
5889
5890
5891
5892
5893
5894
5895 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5896
5897
5898 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5899};
5900
5901struct wmi_ap_ps_peer_cmd {
5902
5903 __le32 vdev_id;
5904
5905
5906 struct wmi_mac_addr peer_macaddr;
5907
5908
5909 __le32 param_id;
5910
5911
5912 __le32 param_value;
5913} __packed;
5914
5915
5916#define WMI_TIM_BITMAP_ARRAY_SIZE 4
5917
5918struct wmi_tim_info {
5919 __le32 tim_len;
5920 __le32 tim_mcast;
5921 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
5922 __le32 tim_changed;
5923 __le32 tim_num_ps_pending;
5924} __packed;
5925
5926struct wmi_tim_info_arg {
5927 __le32 tim_len;
5928 __le32 tim_mcast;
5929 const __le32 *tim_bitmap;
5930 __le32 tim_changed;
5931 __le32 tim_num_ps_pending;
5932} __packed;
5933
5934
5935#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
5936#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
5937#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
5938#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
5939
5940struct wmi_p2p_noa_info {
5941
5942
5943
5944 u8 changed;
5945
5946 u8 index;
5947
5948
5949
5950 u8 ctwindow_oppps;
5951
5952 u8 num_descriptors;
5953
5954 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
5955} __packed;
5956
5957struct wmi_bcn_info {
5958 struct wmi_tim_info tim_info;
5959 struct wmi_p2p_noa_info p2p_noa_info;
5960} __packed;
5961
5962struct wmi_host_swba_event {
5963 __le32 vdev_map;
5964 struct wmi_bcn_info bcn_info[0];
5965} __packed;
5966
5967struct wmi_10_2_4_bcn_info {
5968 struct wmi_tim_info tim_info;
5969
5970} __packed;
5971
5972struct wmi_10_2_4_host_swba_event {
5973 __le32 vdev_map;
5974 struct wmi_10_2_4_bcn_info bcn_info[0];
5975} __packed;
5976
5977
5978#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
5979
5980struct wmi_10_4_tim_info {
5981 __le32 tim_len;
5982 __le32 tim_mcast;
5983 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
5984 __le32 tim_changed;
5985 __le32 tim_num_ps_pending;
5986} __packed;
5987
5988#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
5989
5990struct wmi_10_4_p2p_noa_info {
5991
5992
5993
5994 u8 changed;
5995
5996 u8 index;
5997
5998
5999
6000 u8 ctwindow_oppps;
6001
6002 u8 num_descriptors;
6003
6004 struct wmi_p2p_noa_descriptor
6005 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
6006} __packed;
6007
6008struct wmi_10_4_bcn_info {
6009 struct wmi_10_4_tim_info tim_info;
6010 struct wmi_10_4_p2p_noa_info p2p_noa_info;
6011} __packed;
6012
6013struct wmi_10_4_host_swba_event {
6014 __le32 vdev_map;
6015 struct wmi_10_4_bcn_info bcn_info[0];
6016} __packed;
6017
6018#define WMI_MAX_AP_VDEV 16
6019
6020struct wmi_tbtt_offset_event {
6021 __le32 vdev_map;
6022 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
6023} __packed;
6024
6025struct wmi_peer_create_cmd {
6026 __le32 vdev_id;
6027 struct wmi_mac_addr peer_macaddr;
6028 __le32 peer_type;
6029} __packed;
6030
6031enum wmi_peer_type {
6032 WMI_PEER_TYPE_DEFAULT = 0,
6033 WMI_PEER_TYPE_BSS = 1,
6034 WMI_PEER_TYPE_TDLS = 2,
6035};
6036
6037struct wmi_peer_delete_cmd {
6038 __le32 vdev_id;
6039 struct wmi_mac_addr peer_macaddr;
6040} __packed;
6041
6042struct wmi_peer_flush_tids_cmd {
6043 __le32 vdev_id;
6044 struct wmi_mac_addr peer_macaddr;
6045 __le32 peer_tid_bitmap;
6046} __packed;
6047
6048struct wmi_fixed_rate {
6049
6050
6051
6052
6053
6054
6055 __le32 rate_mode;
6056
6057
6058
6059
6060 __le32 rate_series;
6061
6062
6063
6064
6065
6066 __le32 rate_retries;
6067} __packed;
6068
6069struct wmi_peer_fixed_rate_cmd {
6070
6071 __le32 vdev_id;
6072
6073 struct wmi_mac_addr peer_macaddr;
6074
6075 struct wmi_fixed_rate peer_fixed_rate;
6076} __packed;
6077
6078#define WMI_MGMT_TID 17
6079
6080struct wmi_addba_clear_resp_cmd {
6081
6082 __le32 vdev_id;
6083
6084 struct wmi_mac_addr peer_macaddr;
6085} __packed;
6086
6087struct wmi_addba_send_cmd {
6088
6089 __le32 vdev_id;
6090
6091 struct wmi_mac_addr peer_macaddr;
6092
6093 __le32 tid;
6094
6095 __le32 buffersize;
6096} __packed;
6097
6098struct wmi_delba_send_cmd {
6099
6100 __le32 vdev_id;
6101
6102 struct wmi_mac_addr peer_macaddr;
6103
6104 __le32 tid;
6105
6106 __le32 initiator;
6107
6108 __le32 reasoncode;
6109} __packed;
6110
6111struct wmi_addba_setresponse_cmd {
6112
6113 __le32 vdev_id;
6114
6115 struct wmi_mac_addr peer_macaddr;
6116
6117 __le32 tid;
6118
6119 __le32 statuscode;
6120} __packed;
6121
6122struct wmi_send_singleamsdu_cmd {
6123
6124 __le32 vdev_id;
6125
6126 struct wmi_mac_addr peer_macaddr;
6127
6128 __le32 tid;
6129} __packed;
6130
6131enum wmi_peer_smps_state {
6132 WMI_PEER_SMPS_PS_NONE = 0x0,
6133 WMI_PEER_SMPS_STATIC = 0x1,
6134 WMI_PEER_SMPS_DYNAMIC = 0x2
6135};
6136
6137enum wmi_peer_chwidth {
6138 WMI_PEER_CHWIDTH_20MHZ = 0,
6139 WMI_PEER_CHWIDTH_40MHZ = 1,
6140 WMI_PEER_CHWIDTH_80MHZ = 2,
6141 WMI_PEER_CHWIDTH_160MHZ = 3,
6142};
6143
6144enum wmi_peer_param {
6145 WMI_PEER_SMPS_STATE = 0x1,
6146 WMI_PEER_AMPDU = 0x2,
6147 WMI_PEER_AUTHORIZE = 0x3,
6148 WMI_PEER_CHAN_WIDTH = 0x4,
6149 WMI_PEER_NSS = 0x5,
6150 WMI_PEER_USE_4ADDR = 0x6,
6151 WMI_PEER_DEBUG = 0xa,
6152 WMI_PEER_PHYMODE = 0xd,
6153 WMI_PEER_DUMMY_VAR = 0xff,
6154};
6155
6156struct wmi_peer_set_param_cmd {
6157 __le32 vdev_id;
6158 struct wmi_mac_addr peer_macaddr;
6159 __le32 param_id;
6160 __le32 param_value;
6161} __packed;
6162
6163#define MAX_SUPPORTED_RATES 128
6164
6165struct wmi_rate_set {
6166
6167 __le32 num_rates;
6168
6169
6170
6171
6172
6173 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
6174} __packed;
6175
6176struct wmi_rate_set_arg {
6177 unsigned int num_rates;
6178 u8 rates[MAX_SUPPORTED_RATES];
6179};
6180
6181
6182
6183
6184
6185
6186struct wmi_vht_rate_set {
6187 __le32 rx_max_rate;
6188 __le32 rx_mcs_set;
6189 __le32 tx_max_rate;
6190 __le32 tx_mcs_set;
6191} __packed;
6192
6193struct wmi_vht_rate_set_arg {
6194 u32 rx_max_rate;
6195 u32 rx_mcs_set;
6196 u32 tx_max_rate;
6197 u32 tx_mcs_set;
6198};
6199
6200struct wmi_peer_set_rates_cmd {
6201
6202 struct wmi_mac_addr peer_macaddr;
6203
6204 struct wmi_rate_set peer_legacy_rates;
6205
6206 struct wmi_rate_set peer_ht_rates;
6207} __packed;
6208
6209struct wmi_peer_set_q_empty_callback_cmd {
6210
6211 __le32 vdev_id;
6212
6213 struct wmi_mac_addr peer_macaddr;
6214 __le32 callback_enable;
6215} __packed;
6216
6217struct wmi_peer_flags_map {
6218 u32 auth;
6219 u32 qos;
6220 u32 need_ptk_4_way;
6221 u32 need_gtk_2_way;
6222 u32 apsd;
6223 u32 ht;
6224 u32 bw40;
6225 u32 stbc;
6226 u32 ldbc;
6227 u32 dyn_mimops;
6228 u32 static_mimops;
6229 u32 spatial_mux;
6230 u32 vht;
6231 u32 bw80;
6232 u32 vht_2g;
6233 u32 pmf;
6234 u32 bw160;
6235};
6236
6237enum wmi_peer_flags {
6238 WMI_PEER_AUTH = 0x00000001,
6239 WMI_PEER_QOS = 0x00000002,
6240 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
6241 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
6242 WMI_PEER_APSD = 0x00000800,
6243 WMI_PEER_HT = 0x00001000,
6244 WMI_PEER_40MHZ = 0x00002000,
6245 WMI_PEER_STBC = 0x00008000,
6246 WMI_PEER_LDPC = 0x00010000,
6247 WMI_PEER_DYN_MIMOPS = 0x00020000,
6248 WMI_PEER_STATIC_MIMOPS = 0x00040000,
6249 WMI_PEER_SPATIAL_MUX = 0x00200000,
6250 WMI_PEER_VHT = 0x02000000,
6251 WMI_PEER_80MHZ = 0x04000000,
6252 WMI_PEER_VHT_2G = 0x08000000,
6253 WMI_PEER_PMF = 0x10000000,
6254 WMI_PEER_160MHZ = 0x20000000
6255};
6256
6257enum wmi_10x_peer_flags {
6258 WMI_10X_PEER_AUTH = 0x00000001,
6259 WMI_10X_PEER_QOS = 0x00000002,
6260 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
6261 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
6262 WMI_10X_PEER_APSD = 0x00000800,
6263 WMI_10X_PEER_HT = 0x00001000,
6264 WMI_10X_PEER_40MHZ = 0x00002000,
6265 WMI_10X_PEER_STBC = 0x00008000,
6266 WMI_10X_PEER_LDPC = 0x00010000,
6267 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
6268 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
6269 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
6270 WMI_10X_PEER_VHT = 0x02000000,
6271 WMI_10X_PEER_80MHZ = 0x04000000,
6272 WMI_10X_PEER_160MHZ = 0x20000000
6273};
6274
6275enum wmi_10_2_peer_flags {
6276 WMI_10_2_PEER_AUTH = 0x00000001,
6277 WMI_10_2_PEER_QOS = 0x00000002,
6278 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
6279 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
6280 WMI_10_2_PEER_APSD = 0x00000800,
6281 WMI_10_2_PEER_HT = 0x00001000,
6282 WMI_10_2_PEER_40MHZ = 0x00002000,
6283 WMI_10_2_PEER_STBC = 0x00008000,
6284 WMI_10_2_PEER_LDPC = 0x00010000,
6285 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
6286 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
6287 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
6288 WMI_10_2_PEER_VHT = 0x02000000,
6289 WMI_10_2_PEER_80MHZ = 0x04000000,
6290 WMI_10_2_PEER_VHT_2G = 0x08000000,
6291 WMI_10_2_PEER_PMF = 0x10000000,
6292 WMI_10_2_PEER_160MHZ = 0x20000000
6293};
6294
6295
6296
6297
6298
6299
6300
6301
6302#define WMI_RC_DS_FLAG 0x01
6303#define WMI_RC_CW40_FLAG 0x02
6304#define WMI_RC_SGI_FLAG 0x04
6305#define WMI_RC_HT_FLAG 0x08
6306#define WMI_RC_RTSCTS_FLAG 0x10
6307#define WMI_RC_TX_STBC_FLAG 0x20
6308#define WMI_RC_RX_STBC_FLAG 0xC0
6309#define WMI_RC_RX_STBC_FLAG_S 6
6310#define WMI_RC_WEP_TKIP_FLAG 0x100
6311#define WMI_RC_TS_FLAG 0x200
6312#define WMI_RC_UAPSD_FLAG 0x400
6313
6314
6315#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
6316
6317struct wmi_common_peer_assoc_complete_cmd {
6318 struct wmi_mac_addr peer_macaddr;
6319 __le32 vdev_id;
6320 __le32 peer_new_assoc;
6321 __le32 peer_associd;
6322 __le32 peer_flags;
6323 __le32 peer_caps;
6324 __le32 peer_listen_intval;
6325 __le32 peer_ht_caps;
6326 __le32 peer_max_mpdu;
6327 __le32 peer_mpdu_density;
6328 __le32 peer_rate_caps;
6329 struct wmi_rate_set peer_legacy_rates;
6330 struct wmi_rate_set peer_ht_rates;
6331 __le32 peer_nss;
6332 __le32 peer_vht_caps;
6333 __le32 peer_phymode;
6334 struct wmi_vht_rate_set peer_vht_rates;
6335};
6336
6337struct wmi_main_peer_assoc_complete_cmd {
6338 struct wmi_common_peer_assoc_complete_cmd cmd;
6339
6340
6341
6342
6343 __le32 peer_ht_info[2];
6344} __packed;
6345
6346struct wmi_10_1_peer_assoc_complete_cmd {
6347 struct wmi_common_peer_assoc_complete_cmd cmd;
6348} __packed;
6349
6350#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6351#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6352#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6353#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6354
6355struct wmi_10_2_peer_assoc_complete_cmd {
6356 struct wmi_common_peer_assoc_complete_cmd cmd;
6357 __le32 info0;
6358} __packed;
6359
6360#define PEER_BW_RXNSS_OVERRIDE_OFFSET 31
6361
6362struct wmi_10_4_peer_assoc_complete_cmd {
6363 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6364 __le32 peer_bw_rxnss_override;
6365} __packed;
6366
6367struct wmi_peer_assoc_complete_arg {
6368 u8 addr[ETH_ALEN];
6369 u32 vdev_id;
6370 bool peer_reassoc;
6371 u16 peer_aid;
6372 u32 peer_flags;
6373 u16 peer_caps;
6374 u32 peer_listen_intval;
6375 u32 peer_ht_caps;
6376 u32 peer_max_mpdu;
6377 u32 peer_mpdu_density;
6378 u32 peer_rate_caps;
6379 struct wmi_rate_set_arg peer_legacy_rates;
6380 struct wmi_rate_set_arg peer_ht_rates;
6381 u32 peer_num_spatial_streams;
6382 u32 peer_vht_caps;
6383 enum wmi_phy_mode peer_phymode;
6384 struct wmi_vht_rate_set_arg peer_vht_rates;
6385 u32 peer_bw_rxnss_override;
6386};
6387
6388struct wmi_peer_add_wds_entry_cmd {
6389
6390 struct wmi_mac_addr peer_macaddr;
6391
6392 struct wmi_mac_addr wds_macaddr;
6393} __packed;
6394
6395struct wmi_peer_remove_wds_entry_cmd {
6396
6397 struct wmi_mac_addr wds_macaddr;
6398} __packed;
6399
6400struct wmi_peer_q_empty_callback_event {
6401
6402 struct wmi_mac_addr peer_macaddr;
6403} __packed;
6404
6405
6406
6407
6408struct wmi_chan_info_event {
6409 __le32 err_code;
6410 __le32 freq;
6411 __le32 cmd_flags;
6412 __le32 noise_floor;
6413 __le32 rx_clear_count;
6414 __le32 cycle_count;
6415} __packed;
6416
6417struct wmi_10_4_chan_info_event {
6418 __le32 err_code;
6419 __le32 freq;
6420 __le32 cmd_flags;
6421 __le32 noise_floor;
6422 __le32 rx_clear_count;
6423 __le32 cycle_count;
6424 __le32 chan_tx_pwr_range;
6425 __le32 chan_tx_pwr_tp;
6426 __le32 rx_frame_count;
6427} __packed;
6428
6429struct wmi_peer_sta_kickout_event {
6430 struct wmi_mac_addr peer_macaddr;
6431} __packed;
6432
6433#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6434#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6435
6436
6437#define BCN_FLT_MAX_SUPPORTED_IES 256
6438#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6439
6440struct bss_bcn_stats {
6441 __le32 vdev_id;
6442 __le32 bss_bcnsdropped;
6443 __le32 bss_bcnsdelivered;
6444} __packed;
6445
6446struct bcn_filter_stats {
6447 __le32 bcns_dropped;
6448 __le32 bcns_delivered;
6449 __le32 activefilters;
6450 struct bss_bcn_stats bss_stats;
6451} __packed;
6452
6453struct wmi_add_bcn_filter_cmd {
6454 u32 vdev_id;
6455 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6456} __packed;
6457
6458enum wmi_sta_keepalive_method {
6459 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6460 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6461};
6462
6463#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6464
6465
6466#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6467
6468
6469struct wmi_sta_keepalive_arp_resp {
6470 __be32 src_ip4_addr;
6471 __be32 dest_ip4_addr;
6472 struct wmi_mac_addr dest_mac_addr;
6473} __packed;
6474
6475struct wmi_sta_keepalive_cmd {
6476 __le32 vdev_id;
6477 __le32 enabled;
6478 __le32 method;
6479 __le32 interval;
6480 struct wmi_sta_keepalive_arp_resp arp_resp;
6481} __packed;
6482
6483struct wmi_sta_keepalive_arg {
6484 u32 vdev_id;
6485 u32 enabled;
6486 u32 method;
6487 u32 interval;
6488 __be32 src_ip4_addr;
6489 __be32 dest_ip4_addr;
6490 const u8 dest_mac_addr[ETH_ALEN];
6491};
6492
6493enum wmi_force_fw_hang_type {
6494 WMI_FORCE_FW_HANG_ASSERT = 1,
6495 WMI_FORCE_FW_HANG_NO_DETECT,
6496 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6497 WMI_FORCE_FW_HANG_EMPTY_POINT,
6498 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6499 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6500};
6501
6502#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6503
6504struct wmi_force_fw_hang_cmd {
6505 __le32 type;
6506 __le32 delay_ms;
6507} __packed;
6508
6509enum wmi_pdev_reset_mode_type {
6510 WMI_RST_MODE_TX_FLUSH = 1,
6511 WMI_RST_MODE_WARM_RESET,
6512 WMI_RST_MODE_COLD_RESET,
6513 WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6514 WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6515 WMI_RST_MODE_MAX,
6516};
6517
6518enum ath10k_dbglog_level {
6519 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6520 ATH10K_DBGLOG_LEVEL_INFO = 1,
6521 ATH10K_DBGLOG_LEVEL_WARN = 2,
6522 ATH10K_DBGLOG_LEVEL_ERR = 3,
6523};
6524
6525
6526#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6527#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6528
6529
6530#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6531#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6532
6533
6534#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6535#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6536
6537
6538#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6539#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6540
6541
6542
6543
6544
6545#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6546#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6547
6548
6549
6550
6551
6552struct wmi_dbglog_cfg_cmd {
6553
6554 __le32 module_enable;
6555
6556
6557 __le32 config_enable;
6558
6559
6560 __le32 module_valid;
6561
6562
6563 __le32 config_valid;
6564} __packed;
6565
6566struct wmi_10_4_dbglog_cfg_cmd {
6567
6568 __le64 module_enable;
6569
6570
6571 __le32 config_enable;
6572
6573
6574 __le64 module_valid;
6575
6576
6577 __le32 config_valid;
6578} __packed;
6579
6580enum wmi_roam_reason {
6581 WMI_ROAM_REASON_BETTER_AP = 1,
6582 WMI_ROAM_REASON_BEACON_MISS = 2,
6583 WMI_ROAM_REASON_LOW_RSSI = 3,
6584 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6585 WMI_ROAM_REASON_HO_FAILED = 5,
6586
6587
6588 WMI_ROAM_REASON_MAX,
6589};
6590
6591struct wmi_roam_ev {
6592 __le32 vdev_id;
6593 __le32 reason;
6594} __packed;
6595
6596#define ATH10K_FRAGMT_THRESHOLD_MIN 540
6597#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6598
6599#define WMI_MAX_EVENT 0x1000
6600
6601#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6602
6603
6604#define ATH10K_DEFAULT_ATIM 0
6605
6606#define WMI_MAX_MEM_REQS 16
6607
6608struct wmi_scan_ev_arg {
6609 __le32 event_type;
6610 __le32 reason;
6611 __le32 channel_freq;
6612 __le32 scan_req_id;
6613 __le32 scan_id;
6614 __le32 vdev_id;
6615};
6616
6617struct wmi_tlv_mgmt_tx_compl_ev_arg {
6618 __le32 desc_id;
6619 __le32 status;
6620 __le32 pdev_id;
6621};
6622
6623struct wmi_mgmt_rx_ev_arg {
6624 __le32 channel;
6625 __le32 snr;
6626 __le32 rate;
6627 __le32 phy_mode;
6628 __le32 buf_len;
6629 __le32 status;
6630 struct wmi_mgmt_rx_ext_info ext_info;
6631};
6632
6633struct wmi_ch_info_ev_arg {
6634 __le32 err_code;
6635 __le32 freq;
6636 __le32 cmd_flags;
6637 __le32 noise_floor;
6638 __le32 rx_clear_count;
6639 __le32 cycle_count;
6640 __le32 chan_tx_pwr_range;
6641 __le32 chan_tx_pwr_tp;
6642 __le32 rx_frame_count;
6643};
6644
6645struct wmi_vdev_start_ev_arg {
6646 __le32 vdev_id;
6647 __le32 req_id;
6648 __le32 resp_type;
6649 __le32 status;
6650};
6651
6652struct wmi_peer_kick_ev_arg {
6653 const u8 *mac_addr;
6654};
6655
6656struct wmi_swba_ev_arg {
6657 __le32 vdev_map;
6658 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6659 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6660};
6661
6662struct wmi_phyerr_ev_arg {
6663 u32 tsf_timestamp;
6664 u16 freq1;
6665 u16 freq2;
6666 u8 rssi_combined;
6667 u8 chan_width_mhz;
6668 u8 phy_err_code;
6669 u16 nf_chains[4];
6670 u32 buf_len;
6671 const u8 *buf;
6672 u8 hdr_len;
6673};
6674
6675struct wmi_phyerr_hdr_arg {
6676 u32 num_phyerrs;
6677 u32 tsf_l32;
6678 u32 tsf_u32;
6679 u32 buf_len;
6680 const void *phyerrs;
6681};
6682
6683struct wmi_dfs_status_ev_arg {
6684 u32 status;
6685};
6686
6687struct wmi_svc_rdy_ev_arg {
6688 __le32 min_tx_power;
6689 __le32 max_tx_power;
6690 __le32 ht_cap;
6691 __le32 vht_cap;
6692 __le32 sw_ver0;
6693 __le32 sw_ver1;
6694 __le32 fw_build;
6695 __le32 phy_capab;
6696 __le32 num_rf_chains;
6697 __le32 eeprom_rd;
6698 __le32 num_mem_reqs;
6699 __le32 low_5ghz_chan;
6700 __le32 high_5ghz_chan;
6701 const __le32 *service_map;
6702 size_t service_map_len;
6703 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6704};
6705
6706struct wmi_svc_avail_ev_arg {
6707 __le32 service_map_ext_len;
6708 const __le32 *service_map_ext;
6709};
6710
6711struct wmi_rdy_ev_arg {
6712 __le32 sw_version;
6713 __le32 abi_version;
6714 __le32 status;
6715 const u8 *mac_addr;
6716};
6717
6718struct wmi_roam_ev_arg {
6719 __le32 vdev_id;
6720 __le32 reason;
6721 __le32 rssi;
6722};
6723
6724struct wmi_echo_ev_arg {
6725 __le32 value;
6726};
6727
6728struct wmi_pdev_temperature_event {
6729
6730 __le32 temperature;
6731} __packed;
6732
6733struct wmi_pdev_bss_chan_info_event {
6734 __le32 freq;
6735 __le32 noise_floor;
6736 __le64 cycle_busy;
6737 __le64 cycle_total;
6738 __le64 cycle_tx;
6739 __le64 cycle_rx;
6740 __le64 cycle_rx_bss;
6741 __le32 reserved;
6742} __packed;
6743
6744
6745enum wmi_wow_wakeup_event {
6746 WOW_BMISS_EVENT = 0,
6747 WOW_BETTER_AP_EVENT,
6748 WOW_DEAUTH_RECVD_EVENT,
6749 WOW_MAGIC_PKT_RECVD_EVENT,
6750 WOW_GTK_ERR_EVENT,
6751 WOW_FOURWAY_HSHAKE_EVENT,
6752 WOW_EAPOL_RECVD_EVENT,
6753 WOW_NLO_DETECTED_EVENT,
6754 WOW_DISASSOC_RECVD_EVENT,
6755 WOW_PATTERN_MATCH_EVENT,
6756 WOW_CSA_IE_EVENT,
6757 WOW_PROBE_REQ_WPS_IE_EVENT,
6758 WOW_AUTH_REQ_EVENT,
6759 WOW_ASSOC_REQ_EVENT,
6760 WOW_HTT_EVENT,
6761 WOW_RA_MATCH_EVENT,
6762 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6763 WOW_IOAC_MAGIC_EVENT,
6764 WOW_IOAC_SHORT_EVENT,
6765 WOW_IOAC_EXTEND_EVENT,
6766 WOW_IOAC_TIMER_EVENT,
6767 WOW_DFS_PHYERR_RADAR_EVENT,
6768 WOW_BEACON_EVENT,
6769 WOW_CLIENT_KICKOUT_EVENT,
6770 WOW_EVENT_MAX,
6771};
6772
6773#define C2S(x) case x: return #x
6774
6775static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6776{
6777 switch (ev) {
6778 C2S(WOW_BMISS_EVENT);
6779 C2S(WOW_BETTER_AP_EVENT);
6780 C2S(WOW_DEAUTH_RECVD_EVENT);
6781 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6782 C2S(WOW_GTK_ERR_EVENT);
6783 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6784 C2S(WOW_EAPOL_RECVD_EVENT);
6785 C2S(WOW_NLO_DETECTED_EVENT);
6786 C2S(WOW_DISASSOC_RECVD_EVENT);
6787 C2S(WOW_PATTERN_MATCH_EVENT);
6788 C2S(WOW_CSA_IE_EVENT);
6789 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6790 C2S(WOW_AUTH_REQ_EVENT);
6791 C2S(WOW_ASSOC_REQ_EVENT);
6792 C2S(WOW_HTT_EVENT);
6793 C2S(WOW_RA_MATCH_EVENT);
6794 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6795 C2S(WOW_IOAC_MAGIC_EVENT);
6796 C2S(WOW_IOAC_SHORT_EVENT);
6797 C2S(WOW_IOAC_EXTEND_EVENT);
6798 C2S(WOW_IOAC_TIMER_EVENT);
6799 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6800 C2S(WOW_BEACON_EVENT);
6801 C2S(WOW_CLIENT_KICKOUT_EVENT);
6802 C2S(WOW_EVENT_MAX);
6803 default:
6804 return NULL;
6805 }
6806}
6807
6808enum wmi_wow_wake_reason {
6809 WOW_REASON_UNSPECIFIED = -1,
6810 WOW_REASON_NLOD = 0,
6811 WOW_REASON_AP_ASSOC_LOST,
6812 WOW_REASON_LOW_RSSI,
6813 WOW_REASON_DEAUTH_RECVD,
6814 WOW_REASON_DISASSOC_RECVD,
6815 WOW_REASON_GTK_HS_ERR,
6816 WOW_REASON_EAP_REQ,
6817 WOW_REASON_FOURWAY_HS_RECV,
6818 WOW_REASON_TIMER_INTR_RECV,
6819 WOW_REASON_PATTERN_MATCH_FOUND,
6820 WOW_REASON_RECV_MAGIC_PATTERN,
6821 WOW_REASON_P2P_DISC,
6822 WOW_REASON_WLAN_HB,
6823 WOW_REASON_CSA_EVENT,
6824 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6825 WOW_REASON_AUTH_REQ_RECV,
6826 WOW_REASON_ASSOC_REQ_RECV,
6827 WOW_REASON_HTT_EVENT,
6828 WOW_REASON_RA_MATCH,
6829 WOW_REASON_HOST_AUTO_SHUTDOWN,
6830 WOW_REASON_IOAC_MAGIC_EVENT,
6831 WOW_REASON_IOAC_SHORT_EVENT,
6832 WOW_REASON_IOAC_EXTEND_EVENT,
6833 WOW_REASON_IOAC_TIMER_EVENT,
6834 WOW_REASON_ROAM_HO,
6835 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6836 WOW_REASON_BEACON_RECV,
6837 WOW_REASON_CLIENT_KICKOUT_EVENT,
6838 WOW_REASON_DEBUG_TEST = 0xFF,
6839};
6840
6841static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6842{
6843 switch (reason) {
6844 C2S(WOW_REASON_UNSPECIFIED);
6845 C2S(WOW_REASON_NLOD);
6846 C2S(WOW_REASON_AP_ASSOC_LOST);
6847 C2S(WOW_REASON_LOW_RSSI);
6848 C2S(WOW_REASON_DEAUTH_RECVD);
6849 C2S(WOW_REASON_DISASSOC_RECVD);
6850 C2S(WOW_REASON_GTK_HS_ERR);
6851 C2S(WOW_REASON_EAP_REQ);
6852 C2S(WOW_REASON_FOURWAY_HS_RECV);
6853 C2S(WOW_REASON_TIMER_INTR_RECV);
6854 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
6855 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
6856 C2S(WOW_REASON_P2P_DISC);
6857 C2S(WOW_REASON_WLAN_HB);
6858 C2S(WOW_REASON_CSA_EVENT);
6859 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
6860 C2S(WOW_REASON_AUTH_REQ_RECV);
6861 C2S(WOW_REASON_ASSOC_REQ_RECV);
6862 C2S(WOW_REASON_HTT_EVENT);
6863 C2S(WOW_REASON_RA_MATCH);
6864 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
6865 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
6866 C2S(WOW_REASON_IOAC_SHORT_EVENT);
6867 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
6868 C2S(WOW_REASON_IOAC_TIMER_EVENT);
6869 C2S(WOW_REASON_ROAM_HO);
6870 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
6871 C2S(WOW_REASON_BEACON_RECV);
6872 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
6873 C2S(WOW_REASON_DEBUG_TEST);
6874 default:
6875 return NULL;
6876 }
6877}
6878
6879#undef C2S
6880
6881struct wmi_wow_ev_arg {
6882 u32 vdev_id;
6883 u32 flag;
6884 enum wmi_wow_wake_reason wake_reason;
6885 u32 data_len;
6886};
6887
6888#define WOW_MIN_PATTERN_SIZE 1
6889#define WOW_MAX_PATTERN_SIZE 148
6890#define WOW_MAX_PKT_OFFSET 128
6891#define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
6892 sizeof(struct rfc1042_hdr))
6893#define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
6894 offsetof(struct ieee80211_hdr_3addr, addr1))
6895
6896enum wmi_tdls_state {
6897 WMI_TDLS_DISABLE,
6898 WMI_TDLS_ENABLE_PASSIVE,
6899 WMI_TDLS_ENABLE_ACTIVE,
6900 WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
6901};
6902
6903enum wmi_tdls_peer_state {
6904 WMI_TDLS_PEER_STATE_PEERING,
6905 WMI_TDLS_PEER_STATE_CONNECTED,
6906 WMI_TDLS_PEER_STATE_TEARDOWN,
6907};
6908
6909struct wmi_tdls_peer_update_cmd_arg {
6910 u32 vdev_id;
6911 enum wmi_tdls_peer_state peer_state;
6912 u8 addr[ETH_ALEN];
6913};
6914
6915#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
6916
6917#define WMI_TDLS_PEER_SP_MASK 0x60
6918#define WMI_TDLS_PEER_SP_LSB 5
6919
6920enum wmi_tdls_options {
6921 WMI_TDLS_OFFCHAN_EN = BIT(0),
6922 WMI_TDLS_BUFFER_STA_EN = BIT(1),
6923 WMI_TDLS_SLEEP_STA_EN = BIT(2),
6924};
6925
6926enum {
6927 WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
6928 WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
6929 WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
6930 WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
6931};
6932
6933struct wmi_tdls_peer_capab_arg {
6934 u8 peer_uapsd_queues;
6935 u8 peer_max_sp;
6936 u32 buff_sta_support;
6937 u32 off_chan_support;
6938 u32 peer_curr_operclass;
6939 u32 self_curr_operclass;
6940 u32 peer_chan_len;
6941 u32 peer_operclass_len;
6942 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6943 u32 is_peer_responder;
6944 u32 pref_offchan_num;
6945 u32 pref_offchan_bw;
6946};
6947
6948struct wmi_10_4_tdls_set_state_cmd {
6949 __le32 vdev_id;
6950 __le32 state;
6951 __le32 notification_interval_ms;
6952 __le32 tx_discovery_threshold;
6953 __le32 tx_teardown_threshold;
6954 __le32 rssi_teardown_threshold;
6955 __le32 rssi_delta;
6956 __le32 tdls_options;
6957 __le32 tdls_peer_traffic_ind_window;
6958 __le32 tdls_peer_traffic_response_timeout_ms;
6959 __le32 tdls_puapsd_mask;
6960 __le32 tdls_puapsd_inactivity_time_ms;
6961 __le32 tdls_puapsd_rx_frame_threshold;
6962 __le32 teardown_notification_ms;
6963 __le32 tdls_peer_kickout_threshold;
6964} __packed;
6965
6966struct wmi_tdls_peer_capabilities {
6967 __le32 peer_qos;
6968 __le32 buff_sta_support;
6969 __le32 off_chan_support;
6970 __le32 peer_curr_operclass;
6971 __le32 self_curr_operclass;
6972 __le32 peer_chan_len;
6973 __le32 peer_operclass_len;
6974 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6975 __le32 is_peer_responder;
6976 __le32 pref_offchan_num;
6977 __le32 pref_offchan_bw;
6978 struct wmi_channel peer_chan_list[1];
6979} __packed;
6980
6981struct wmi_10_4_tdls_peer_update_cmd {
6982 __le32 vdev_id;
6983 struct wmi_mac_addr peer_macaddr;
6984 __le32 peer_state;
6985 __le32 reserved[4];
6986 struct wmi_tdls_peer_capabilities peer_capab;
6987} __packed;
6988
6989enum wmi_tdls_peer_reason {
6990 WMI_TDLS_TEARDOWN_REASON_TX,
6991 WMI_TDLS_TEARDOWN_REASON_RSSI,
6992 WMI_TDLS_TEARDOWN_REASON_SCAN,
6993 WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
6994 WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
6995 WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
6996 WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
6997 WMI_TDLS_ENTER_BUF_STA,
6998 WMI_TDLS_EXIT_BUF_STA,
6999 WMI_TDLS_ENTER_BT_BUSY_MODE,
7000 WMI_TDLS_EXIT_BT_BUSY_MODE,
7001 WMI_TDLS_SCAN_STARTED_EVENT,
7002 WMI_TDLS_SCAN_COMPLETED_EVENT,
7003};
7004
7005enum wmi_tdls_peer_notification {
7006 WMI_TDLS_SHOULD_DISCOVER,
7007 WMI_TDLS_SHOULD_TEARDOWN,
7008 WMI_TDLS_PEER_DISCONNECTED,
7009 WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7010};
7011
7012struct wmi_tdls_peer_event {
7013 struct wmi_mac_addr peer_macaddr;
7014
7015 __le32 peer_status;
7016
7017 __le32 peer_reason;
7018 __le32 vdev_id;
7019} __packed;
7020
7021enum wmi_txbf_conf {
7022 WMI_TXBF_CONF_UNSUPPORTED,
7023 WMI_TXBF_CONF_BEFORE_ASSOC,
7024 WMI_TXBF_CONF_AFTER_ASSOC,
7025};
7026
7027#define WMI_CCA_DETECT_LEVEL_AUTO 0
7028#define WMI_CCA_DETECT_MARGIN_AUTO 0
7029
7030struct wmi_pdev_set_adaptive_cca_params {
7031 __le32 enable;
7032 __le32 cca_detect_level;
7033 __le32 cca_detect_margin;
7034} __packed;
7035
7036enum wmi_host_platform_type {
7037 WMI_HOST_PLATFORM_HIGH_PERF,
7038 WMI_HOST_PLATFORM_LOW_PERF,
7039};
7040
7041enum wmi_bss_survey_req_type {
7042 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
7043 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
7044};
7045
7046struct wmi_pdev_chan_info_req_cmd {
7047 __le32 type;
7048 __le32 reserved;
7049} __packed;
7050
7051struct ath10k;
7052struct ath10k_vif;
7053struct ath10k_fw_stats_pdev;
7054struct ath10k_fw_stats_peer;
7055struct ath10k_fw_stats;
7056
7057int ath10k_wmi_attach(struct ath10k *ar);
7058void ath10k_wmi_detach(struct ath10k *ar);
7059void ath10k_wmi_free_host_mem(struct ath10k *ar);
7060int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
7061int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
7062
7063struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7064int ath10k_wmi_connect(struct ath10k *ar);
7065
7066struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7067int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7068int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7069 u32 cmd_id);
7070void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
7071
7072void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7073 struct ath10k_fw_stats_pdev *dst);
7074void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7075 struct ath10k_fw_stats_pdev *dst);
7076void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7077 struct ath10k_fw_stats_pdev *dst);
7078void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
7079 struct ath10k_fw_stats_pdev *dst);
7080void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
7081 struct ath10k_fw_stats_peer *dst);
7082void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
7083 struct wmi_host_mem_chunks *chunks);
7084void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
7085 const struct wmi_start_scan_arg *arg);
7086void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7087 const struct wmi_wmm_params_arg *arg);
7088void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
7089 const struct wmi_channel_arg *arg);
7090int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
7091
7092int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
7093int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7094int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7095void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
7096void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
7097int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
7098void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
7099void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
7100void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
7101void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
7102void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
7103void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
7104void ath10k_wmi_event_dfs(struct ath10k *ar,
7105 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
7106void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7107 struct wmi_phyerr_ev_arg *phyerr,
7108 u64 tsf);
7109void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
7110void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
7111void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
7112void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
7113void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
7114void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
7115void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
7116 struct sk_buff *skb);
7117void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
7118 struct sk_buff *skb);
7119void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
7120void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
7121void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
7122void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
7123void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
7124void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
7125 struct sk_buff *skb);
7126void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
7127void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
7128void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
7129void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
7130 struct sk_buff *skb);
7131void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
7132void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
7133void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
7134void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
7135int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7136void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7137int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7138 int left_len, struct wmi_phyerr_ev_arg *arg);
7139void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7140 struct ath10k_fw_stats *fw_stats,
7141 char *buf);
7142void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7143 struct ath10k_fw_stats *fw_stats,
7144 char *buf);
7145size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7146size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
7147void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7148 struct ath10k_fw_stats *fw_stats,
7149 char *buf);
7150int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7151 enum wmi_vdev_subtype subtype);
7152int ath10k_wmi_barrier(struct ath10k *ar);
7153void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7154 u32 num_tx_chain);
7155void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7156
7157#endif
7158
