1/* 2 * UFS Host driver for Synopsys Designware Core 3 * 4 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com) 5 * 6 * Authors: Joao Pinto <jpinto@synopsys.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13#ifndef _UFSHCI_DWC_H 14#define _UFSHCI_DWC_H 15 16/* DWC HC UFSHCI specific Registers */ 17enum dwc_specific_registers { 18 DWC_UFS_REG_HCLKDIV = 0xFC, 19}; 20 21/* Clock Divider Values: Hex equivalent of frequency in MHz */ 22enum clk_div_values { 23 DWC_UFS_REG_HCLKDIV_DIV_62_5 = 0x3e, 24 DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d, 25 DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8, 26}; 27 28/* Selector Index */ 29enum selector_index { 30 SELIND_LN0_TX = 0x00, 31 SELIND_LN1_TX = 0x01, 32 SELIND_LN0_RX = 0x04, 33 SELIND_LN1_RX = 0x05, 34}; 35 36#endif /* End of Header */ 37