linux/sound/soc/codecs/wm8960.c
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   1/*
   2 * wm8960.c  --  WM8960 ALSA SoC Audio driver
   3 *
   4 * Copyright 2007-11 Wolfson Microelectronics, plc
   5 *
   6 * Author: Liam Girdwood
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12
  13#include <linux/module.h>
  14#include <linux/moduleparam.h>
  15#include <linux/init.h>
  16#include <linux/delay.h>
  17#include <linux/pm.h>
  18#include <linux/clk.h>
  19#include <linux/i2c.h>
  20#include <linux/slab.h>
  21#include <sound/core.h>
  22#include <sound/pcm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/soc.h>
  25#include <sound/initval.h>
  26#include <sound/tlv.h>
  27#include <sound/wm8960.h>
  28
  29#include "wm8960.h"
  30
  31/* R25 - Power 1 */
  32#define WM8960_VMID_MASK 0x180
  33#define WM8960_VREF      0x40
  34
  35/* R26 - Power 2 */
  36#define WM8960_PWR2_LOUT1       0x40
  37#define WM8960_PWR2_ROUT1       0x20
  38#define WM8960_PWR2_OUT3        0x02
  39
  40/* R28 - Anti-pop 1 */
  41#define WM8960_POBCTRL   0x80
  42#define WM8960_BUFDCOPEN 0x10
  43#define WM8960_BUFIOEN   0x08
  44#define WM8960_SOFT_ST   0x04
  45#define WM8960_HPSTBY    0x01
  46
  47/* R29 - Anti-pop 2 */
  48#define WM8960_DISOP     0x40
  49#define WM8960_DRES_MASK 0x30
  50
  51static bool is_pll_freq_available(unsigned int source, unsigned int target);
  52static int wm8960_set_pll(struct snd_soc_component *component,
  53                unsigned int freq_in, unsigned int freq_out);
  54/*
  55 * wm8960 register cache
  56 * We can't read the WM8960 register space when we are
  57 * using 2 wire for device control, so we cache them instead.
  58 */
  59static const struct reg_default wm8960_reg_defaults[] = {
  60        {  0x0, 0x00a7 },
  61        {  0x1, 0x00a7 },
  62        {  0x2, 0x0000 },
  63        {  0x3, 0x0000 },
  64        {  0x4, 0x0000 },
  65        {  0x5, 0x0008 },
  66        {  0x6, 0x0000 },
  67        {  0x7, 0x000a },
  68        {  0x8, 0x01c0 },
  69        {  0x9, 0x0000 },
  70        {  0xa, 0x00ff },
  71        {  0xb, 0x00ff },
  72
  73        { 0x10, 0x0000 },
  74        { 0x11, 0x007b },
  75        { 0x12, 0x0100 },
  76        { 0x13, 0x0032 },
  77        { 0x14, 0x0000 },
  78        { 0x15, 0x00c3 },
  79        { 0x16, 0x00c3 },
  80        { 0x17, 0x01c0 },
  81        { 0x18, 0x0000 },
  82        { 0x19, 0x0000 },
  83        { 0x1a, 0x0000 },
  84        { 0x1b, 0x0000 },
  85        { 0x1c, 0x0000 },
  86        { 0x1d, 0x0000 },
  87
  88        { 0x20, 0x0100 },
  89        { 0x21, 0x0100 },
  90        { 0x22, 0x0050 },
  91
  92        { 0x25, 0x0050 },
  93        { 0x26, 0x0000 },
  94        { 0x27, 0x0000 },
  95        { 0x28, 0x0000 },
  96        { 0x29, 0x0000 },
  97        { 0x2a, 0x0040 },
  98        { 0x2b, 0x0000 },
  99        { 0x2c, 0x0000 },
 100        { 0x2d, 0x0050 },
 101        { 0x2e, 0x0050 },
 102        { 0x2f, 0x0000 },
 103        { 0x30, 0x0002 },
 104        { 0x31, 0x0037 },
 105
 106        { 0x33, 0x0080 },
 107        { 0x34, 0x0008 },
 108        { 0x35, 0x0031 },
 109        { 0x36, 0x0026 },
 110        { 0x37, 0x00e9 },
 111};
 112
 113static bool wm8960_volatile(struct device *dev, unsigned int reg)
 114{
 115        switch (reg) {
 116        case WM8960_RESET:
 117                return true;
 118        default:
 119                return false;
 120        }
 121}
 122
 123struct wm8960_priv {
 124        struct clk *mclk;
 125        struct regmap *regmap;
 126        int (*set_bias_level)(struct snd_soc_component *,
 127                              enum snd_soc_bias_level level);
 128        struct snd_soc_dapm_widget *lout1;
 129        struct snd_soc_dapm_widget *rout1;
 130        struct snd_soc_dapm_widget *out3;
 131        bool deemph;
 132        int lrclk;
 133        int bclk;
 134        int sysclk;
 135        int clk_id;
 136        int freq_in;
 137        bool is_stream_in_use[2];
 138        struct wm8960_data pdata;
 139};
 140
 141#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
 142
 143/* enumerated controls */
 144static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
 145        "Right Inverted", "Stereo Inversion"};
 146static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
 147static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
 148static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
 149static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
 150static const char *wm8960_adc_data_output_sel[] = {
 151        "Left Data = Left ADC;  Right Data = Right ADC",
 152        "Left Data = Left ADC;  Right Data = Left ADC",
 153        "Left Data = Right ADC; Right Data = Right ADC",
 154        "Left Data = Right ADC; Right Data = Left ADC",
 155};
 156static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
 157
 158static const struct soc_enum wm8960_enum[] = {
 159        SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
 160        SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
 161        SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
 162        SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
 163        SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
 164        SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
 165        SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
 166        SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
 167};
 168
 169static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
 170
 171static int wm8960_set_deemph(struct snd_soc_component *component)
 172{
 173        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 174        int val, i, best;
 175
 176        /* If we're using deemphasis select the nearest available sample
 177         * rate.
 178         */
 179        if (wm8960->deemph) {
 180                best = 1;
 181                for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
 182                        if (abs(deemph_settings[i] - wm8960->lrclk) <
 183                            abs(deemph_settings[best] - wm8960->lrclk))
 184                                best = i;
 185                }
 186
 187                val = best << 1;
 188        } else {
 189                val = 0;
 190        }
 191
 192        dev_dbg(component->dev, "Set deemphasis %d\n", val);
 193
 194        return snd_soc_component_update_bits(component, WM8960_DACCTL1,
 195                                   0x6, val);
 196}
 197
 198static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
 199                             struct snd_ctl_elem_value *ucontrol)
 200{
 201        struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 202        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 203
 204        ucontrol->value.integer.value[0] = wm8960->deemph;
 205        return 0;
 206}
 207
 208static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
 209                             struct snd_ctl_elem_value *ucontrol)
 210{
 211        struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 212        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 213        unsigned int deemph = ucontrol->value.integer.value[0];
 214
 215        if (deemph > 1)
 216                return -EINVAL;
 217
 218        wm8960->deemph = deemph;
 219
 220        return wm8960_set_deemph(component);
 221}
 222
 223static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
 224static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
 225static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
 226static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
 227static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
 228static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
 229static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
 230        0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
 231        2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
 232);
 233
 234static const struct snd_kcontrol_new wm8960_snd_controls[] = {
 235SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
 236                 0, 63, 0, inpga_tlv),
 237SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
 238        6, 1, 0),
 239SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
 240        7, 1, 1),
 241
 242SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
 243               WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
 244SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
 245               WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
 246SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
 247               WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
 248SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
 249               WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
 250SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
 251                WM8960_RINPATH, 4, 3, 0, micboost_tlv),
 252SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
 253                WM8960_LINPATH, 4, 3, 0, micboost_tlv),
 254
 255SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
 256                 0, 255, 0, dac_tlv),
 257
 258SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
 259                 0, 127, 0, out_tlv),
 260SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
 261        7, 1, 0),
 262
 263SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
 264                 0, 127, 0, out_tlv),
 265SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
 266        7, 1, 0),
 267SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
 268SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
 269
 270SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
 271SOC_ENUM("ADC Polarity", wm8960_enum[0]),
 272SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
 273
 274SOC_ENUM("DAC Polarity", wm8960_enum[1]),
 275SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
 276                    wm8960_get_deemph, wm8960_put_deemph),
 277
 278SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
 279SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
 280SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
 281SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
 282
 283SOC_ENUM("ALC Function", wm8960_enum[4]),
 284SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
 285SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
 286SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
 287SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
 288SOC_ENUM("ALC Mode", wm8960_enum[5]),
 289SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
 290SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
 291
 292SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
 293SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
 294
 295SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
 296        0, 255, 0, adc_tlv),
 297
 298SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
 299               WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
 300SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
 301               WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
 302SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
 303               WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
 304SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
 305               WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
 306
 307SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
 308SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
 309};
 310
 311static const struct snd_kcontrol_new wm8960_lin_boost[] = {
 312SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
 313SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
 314SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
 315};
 316
 317static const struct snd_kcontrol_new wm8960_lin[] = {
 318SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
 319};
 320
 321static const struct snd_kcontrol_new wm8960_rin_boost[] = {
 322SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
 323SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
 324SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
 325};
 326
 327static const struct snd_kcontrol_new wm8960_rin[] = {
 328SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
 329};
 330
 331static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
 332SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
 333SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
 334SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
 335};
 336
 337static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
 338SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
 339SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
 340SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
 341};
 342
 343static const struct snd_kcontrol_new wm8960_mono_out[] = {
 344SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
 345SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
 346};
 347
 348static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
 349SND_SOC_DAPM_INPUT("LINPUT1"),
 350SND_SOC_DAPM_INPUT("RINPUT1"),
 351SND_SOC_DAPM_INPUT("LINPUT2"),
 352SND_SOC_DAPM_INPUT("RINPUT2"),
 353SND_SOC_DAPM_INPUT("LINPUT3"),
 354SND_SOC_DAPM_INPUT("RINPUT3"),
 355
 356SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
 357
 358SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
 359                   wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
 360SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
 361                   wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
 362
 363SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
 364                   wm8960_lin, ARRAY_SIZE(wm8960_lin)),
 365SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
 366                   wm8960_rin, ARRAY_SIZE(wm8960_rin)),
 367
 368SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
 369SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
 370
 371SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
 372SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
 373
 374SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
 375        &wm8960_loutput_mixer[0],
 376        ARRAY_SIZE(wm8960_loutput_mixer)),
 377SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
 378        &wm8960_routput_mixer[0],
 379        ARRAY_SIZE(wm8960_routput_mixer)),
 380
 381SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
 382SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
 383
 384SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
 385SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
 386
 387SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
 388SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
 389
 390SND_SOC_DAPM_OUTPUT("SPK_LP"),
 391SND_SOC_DAPM_OUTPUT("SPK_LN"),
 392SND_SOC_DAPM_OUTPUT("HP_L"),
 393SND_SOC_DAPM_OUTPUT("HP_R"),
 394SND_SOC_DAPM_OUTPUT("SPK_RP"),
 395SND_SOC_DAPM_OUTPUT("SPK_RN"),
 396SND_SOC_DAPM_OUTPUT("OUT3"),
 397};
 398
 399static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
 400SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
 401        &wm8960_mono_out[0],
 402        ARRAY_SIZE(wm8960_mono_out)),
 403};
 404
 405/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
 406static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
 407SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
 408};
 409
 410static const struct snd_soc_dapm_route audio_paths[] = {
 411        { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
 412        { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
 413        { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
 414
 415        { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
 416        { "Left Input Mixer", "Boost Switch", "LINPUT1" },  /* Really Boost Switch */
 417        { "Left Input Mixer", NULL, "LINPUT2" },
 418        { "Left Input Mixer", NULL, "LINPUT3" },
 419
 420        { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
 421        { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
 422        { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
 423
 424        { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
 425        { "Right Input Mixer", "Boost Switch", "RINPUT1" },  /* Really Boost Switch */
 426        { "Right Input Mixer", NULL, "RINPUT2" },
 427        { "Right Input Mixer", NULL, "RINPUT3" },
 428
 429        { "Left ADC", NULL, "Left Input Mixer" },
 430        { "Right ADC", NULL, "Right Input Mixer" },
 431
 432        { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
 433        { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
 434        { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
 435
 436        { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
 437        { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
 438        { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
 439
 440        { "LOUT1 PGA", NULL, "Left Output Mixer" },
 441        { "ROUT1 PGA", NULL, "Right Output Mixer" },
 442
 443        { "HP_L", NULL, "LOUT1 PGA" },
 444        { "HP_R", NULL, "ROUT1 PGA" },
 445
 446        { "Left Speaker PGA", NULL, "Left Output Mixer" },
 447        { "Right Speaker PGA", NULL, "Right Output Mixer" },
 448
 449        { "Left Speaker Output", NULL, "Left Speaker PGA" },
 450        { "Right Speaker Output", NULL, "Right Speaker PGA" },
 451
 452        { "SPK_LN", NULL, "Left Speaker Output" },
 453        { "SPK_LP", NULL, "Left Speaker Output" },
 454        { "SPK_RN", NULL, "Right Speaker Output" },
 455        { "SPK_RP", NULL, "Right Speaker Output" },
 456};
 457
 458static const struct snd_soc_dapm_route audio_paths_out3[] = {
 459        { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
 460        { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
 461
 462        { "OUT3", NULL, "Mono Output Mixer", }
 463};
 464
 465static const struct snd_soc_dapm_route audio_paths_capless[] = {
 466        { "HP_L", NULL, "OUT3 VMID" },
 467        { "HP_R", NULL, "OUT3 VMID" },
 468
 469        { "OUT3 VMID", NULL, "Left Output Mixer" },
 470        { "OUT3 VMID", NULL, "Right Output Mixer" },
 471};
 472
 473static int wm8960_add_widgets(struct snd_soc_component *component)
 474{
 475        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 476        struct wm8960_data *pdata = &wm8960->pdata;
 477        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 478        struct snd_soc_dapm_widget *w;
 479
 480        snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
 481                                  ARRAY_SIZE(wm8960_dapm_widgets));
 482
 483        snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
 484
 485        /* In capless mode OUT3 is used to provide VMID for the
 486         * headphone outputs, otherwise it is used as a mono mixer.
 487         */
 488        if (pdata && pdata->capless) {
 489                snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
 490                                          ARRAY_SIZE(wm8960_dapm_widgets_capless));
 491
 492                snd_soc_dapm_add_routes(dapm, audio_paths_capless,
 493                                        ARRAY_SIZE(audio_paths_capless));
 494        } else {
 495                snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
 496                                          ARRAY_SIZE(wm8960_dapm_widgets_out3));
 497
 498                snd_soc_dapm_add_routes(dapm, audio_paths_out3,
 499                                        ARRAY_SIZE(audio_paths_out3));
 500        }
 501
 502        /* We need to power up the headphone output stage out of
 503         * sequence for capless mode.  To save scanning the widget
 504         * list each time to find the desired power state do so now
 505         * and save the result.
 506         */
 507        list_for_each_entry(w, &component->card->widgets, list) {
 508                if (w->dapm != dapm)
 509                        continue;
 510                if (strcmp(w->name, "LOUT1 PGA") == 0)
 511                        wm8960->lout1 = w;
 512                if (strcmp(w->name, "ROUT1 PGA") == 0)
 513                        wm8960->rout1 = w;
 514                if (strcmp(w->name, "OUT3 VMID") == 0)
 515                        wm8960->out3 = w;
 516        }
 517        
 518        return 0;
 519}
 520
 521static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
 522                unsigned int fmt)
 523{
 524        struct snd_soc_component *component = codec_dai->component;
 525        u16 iface = 0;
 526
 527        /* set master/slave audio interface */
 528        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 529        case SND_SOC_DAIFMT_CBM_CFM:
 530                iface |= 0x0040;
 531                break;
 532        case SND_SOC_DAIFMT_CBS_CFS:
 533                break;
 534        default:
 535                return -EINVAL;
 536        }
 537
 538        /* interface format */
 539        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 540        case SND_SOC_DAIFMT_I2S:
 541                iface |= 0x0002;
 542                break;
 543        case SND_SOC_DAIFMT_RIGHT_J:
 544                break;
 545        case SND_SOC_DAIFMT_LEFT_J:
 546                iface |= 0x0001;
 547                break;
 548        case SND_SOC_DAIFMT_DSP_A:
 549                iface |= 0x0003;
 550                break;
 551        case SND_SOC_DAIFMT_DSP_B:
 552                iface |= 0x0013;
 553                break;
 554        default:
 555                return -EINVAL;
 556        }
 557
 558        /* clock inversion */
 559        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 560        case SND_SOC_DAIFMT_NB_NF:
 561                break;
 562        case SND_SOC_DAIFMT_IB_IF:
 563                iface |= 0x0090;
 564                break;
 565        case SND_SOC_DAIFMT_IB_NF:
 566                iface |= 0x0080;
 567                break;
 568        case SND_SOC_DAIFMT_NB_IF:
 569                iface |= 0x0010;
 570                break;
 571        default:
 572                return -EINVAL;
 573        }
 574
 575        /* set iface */
 576        snd_soc_component_write(component, WM8960_IFACE1, iface);
 577        return 0;
 578}
 579
 580static struct {
 581        int rate;
 582        unsigned int val;
 583} alc_rates[] = {
 584        { 48000, 0 },
 585        { 44100, 0 },
 586        { 32000, 1 },
 587        { 22050, 2 },
 588        { 24000, 2 },
 589        { 16000, 3 },
 590        { 11025, 4 },
 591        { 12000, 4 },
 592        {  8000, 5 },
 593};
 594
 595/* -1 for reserved value */
 596static const int sysclk_divs[] = { 1, -1, 2, -1 };
 597
 598/* Multiply 256 for internal 256 div */
 599static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
 600
 601/* Multiply 10 to eliminate decimials */
 602static const int bclk_divs[] = {
 603        10, 15, 20, 30, 40, 55, 60, 80, 110,
 604        120, 160, 220, 240, 320, 320, 320
 605};
 606
 607/**
 608 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
 609 *      The sysclk must be chosen such that:
 610 *              - sysclk     = MCLK / sysclk_divs
 611 *              - lrclk      = sysclk / dac_divs
 612 *              - 10 * bclk  = sysclk / bclk_divs
 613 *
 614 *      If we cannot find an exact match for (sysclk, lrclk, bclk)
 615 *      triplet, we relax the bclk such that bclk is chosen as the
 616 *      closest available frequency greater than expected bclk.
 617 *
 618 * @wm8960_priv: wm8960 codec private data
 619 * @mclk: MCLK used to derive sysclk
 620 * @sysclk_idx: sysclk_divs index for found sysclk
 621 * @dac_idx: dac_divs index for found lrclk
 622 * @bclk_idx: bclk_divs index for found bclk
 623 *
 624 * Returns:
 625 *  -1, in case no sysclk frequency available found
 626 * >=0, in case we could derive bclk and lrclk from sysclk using
 627 *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
 628 */
 629static
 630int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
 631                            int *sysclk_idx, int *dac_idx, int *bclk_idx)
 632{
 633        int sysclk, bclk, lrclk;
 634        int i, j, k;
 635        int diff, closest = mclk;
 636
 637        /* marker for no match */
 638        *bclk_idx = -1;
 639
 640        bclk = wm8960->bclk;
 641        lrclk = wm8960->lrclk;
 642
 643        /* check if the sysclk frequency is available. */
 644        for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
 645                if (sysclk_divs[i] == -1)
 646                        continue;
 647                sysclk = mclk / sysclk_divs[i];
 648                for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
 649                        if (sysclk != dac_divs[j] * lrclk)
 650                                continue;
 651                        for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
 652                                diff = sysclk - bclk * bclk_divs[k] / 10;
 653                                if (diff == 0) {
 654                                        *sysclk_idx = i;
 655                                        *dac_idx = j;
 656                                        *bclk_idx = k;
 657                                        break;
 658                                }
 659                                if (diff > 0 && closest > diff) {
 660                                        *sysclk_idx = i;
 661                                        *dac_idx = j;
 662                                        *bclk_idx = k;
 663                                        closest = diff;
 664                                }
 665                        }
 666                        if (k != ARRAY_SIZE(bclk_divs))
 667                                break;
 668                }
 669                if (j != ARRAY_SIZE(dac_divs))
 670                        break;
 671        }
 672        return *bclk_idx;
 673}
 674
 675/**
 676 * wm8960_configure_pll - checks if there is a PLL out frequency available
 677 *      The PLL out frequency must be chosen such that:
 678 *              - sysclk      = lrclk * dac_divs
 679 *              - freq_out    = sysclk * sysclk_divs
 680 *              - 10 * sysclk = bclk * bclk_divs
 681 *
 682 *      If we cannot find an exact match for (sysclk, lrclk, bclk)
 683 *      triplet, we relax the bclk such that bclk is chosen as the
 684 *      closest available frequency greater than expected bclk.
 685 *
 686 * @component: component structure
 687 * @freq_in: input frequency used to derive freq out via PLL
 688 * @sysclk_idx: sysclk_divs index for found sysclk
 689 * @dac_idx: dac_divs index for found lrclk
 690 * @bclk_idx: bclk_divs index for found bclk
 691 *
 692 * Returns:
 693 * < 0, in case no PLL frequency out available was found
 694 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
 695 *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
 696 */
 697static
 698int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
 699                         int *sysclk_idx, int *dac_idx, int *bclk_idx)
 700{
 701        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 702        int sysclk, bclk, lrclk, freq_out;
 703        int diff, closest, best_freq_out;
 704        int i, j, k;
 705
 706        bclk = wm8960->bclk;
 707        lrclk = wm8960->lrclk;
 708        closest = freq_in;
 709
 710        best_freq_out = -EINVAL;
 711        *sysclk_idx = *dac_idx = *bclk_idx = -1;
 712
 713        for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
 714                if (sysclk_divs[i] == -1)
 715                        continue;
 716                for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
 717                        sysclk = lrclk * dac_divs[j];
 718                        freq_out = sysclk * sysclk_divs[i];
 719
 720                        for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
 721                                if (!is_pll_freq_available(freq_in, freq_out))
 722                                        continue;
 723
 724                                diff = sysclk - bclk * bclk_divs[k] / 10;
 725                                if (diff == 0) {
 726                                        *sysclk_idx = i;
 727                                        *dac_idx = j;
 728                                        *bclk_idx = k;
 729                                        return freq_out;
 730                                }
 731                                if (diff > 0 && closest > diff) {
 732                                        *sysclk_idx = i;
 733                                        *dac_idx = j;
 734                                        *bclk_idx = k;
 735                                        closest = diff;
 736                                        best_freq_out = freq_out;
 737                                }
 738                        }
 739                }
 740        }
 741
 742        return best_freq_out;
 743}
 744static int wm8960_configure_clocking(struct snd_soc_component *component)
 745{
 746        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 747        int freq_out, freq_in;
 748        u16 iface1 = snd_soc_component_read32(component, WM8960_IFACE1);
 749        int i, j, k;
 750        int ret;
 751
 752        if (!(iface1 & (1<<6))) {
 753                dev_dbg(component->dev,
 754                        "Codec is slave mode, no need to configure clock\n");
 755                return 0;
 756        }
 757
 758        if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
 759                dev_err(component->dev, "No MCLK configured\n");
 760                return -EINVAL;
 761        }
 762
 763        freq_in = wm8960->freq_in;
 764        /*
 765         * If it's sysclk auto mode, check if the MCLK can provide sysclk or
 766         * not. If MCLK can provide sysclk, using MCLK to provide sysclk
 767         * directly. Otherwise, auto select a available pll out frequency
 768         * and set PLL.
 769         */
 770        if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
 771                /* disable the PLL and using MCLK to provide sysclk */
 772                wm8960_set_pll(component, 0, 0);
 773                freq_out = freq_in;
 774        } else if (wm8960->sysclk) {
 775                freq_out = wm8960->sysclk;
 776        } else {
 777                dev_err(component->dev, "No SYSCLK configured\n");
 778                return -EINVAL;
 779        }
 780
 781        if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
 782                ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
 783                if (ret >= 0) {
 784                        goto configure_clock;
 785                } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
 786                        dev_err(component->dev, "failed to configure clock\n");
 787                        return -EINVAL;
 788                }
 789        }
 790
 791        freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
 792        if (freq_out < 0) {
 793                dev_err(component->dev, "failed to configure clock via PLL\n");
 794                return freq_out;
 795        }
 796        wm8960_set_pll(component, freq_in, freq_out);
 797
 798configure_clock:
 799        /* configure sysclk clock */
 800        snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
 801
 802        /* configure frame clock */
 803        snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
 804        snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
 805
 806        /* configure bit clock */
 807        snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
 808
 809        return 0;
 810}
 811
 812static int wm8960_hw_params(struct snd_pcm_substream *substream,
 813                            struct snd_pcm_hw_params *params,
 814                            struct snd_soc_dai *dai)
 815{
 816        struct snd_soc_component *component = dai->component;
 817        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 818        u16 iface = snd_soc_component_read32(component, WM8960_IFACE1) & 0xfff3;
 819        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 820        int i;
 821
 822        wm8960->bclk = snd_soc_params_to_bclk(params);
 823        if (params_channels(params) == 1)
 824                wm8960->bclk *= 2;
 825
 826        /* bit size */
 827        switch (params_width(params)) {
 828        case 16:
 829                break;
 830        case 20:
 831                iface |= 0x0004;
 832                break;
 833        case 24:
 834                iface |= 0x0008;
 835                break;
 836        case 32:
 837                /* right justify mode does not support 32 word length */
 838                if ((iface & 0x3) != 0) {
 839                        iface |= 0x000c;
 840                        break;
 841                }
 842                /* fall through */
 843        default:
 844                dev_err(component->dev, "unsupported width %d\n",
 845                        params_width(params));
 846                return -EINVAL;
 847        }
 848
 849        wm8960->lrclk = params_rate(params);
 850        /* Update filters for the new rate */
 851        if (tx) {
 852                wm8960_set_deemph(component);
 853        } else {
 854                for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
 855                        if (alc_rates[i].rate == params_rate(params))
 856                                snd_soc_component_update_bits(component,
 857                                                    WM8960_ADDCTL3, 0x7,
 858                                                    alc_rates[i].val);
 859        }
 860
 861        /* set iface */
 862        snd_soc_component_write(component, WM8960_IFACE1, iface);
 863
 864        wm8960->is_stream_in_use[tx] = true;
 865
 866        if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON &&
 867            !wm8960->is_stream_in_use[!tx])
 868                return wm8960_configure_clocking(component);
 869
 870        return 0;
 871}
 872
 873static int wm8960_hw_free(struct snd_pcm_substream *substream,
 874                struct snd_soc_dai *dai)
 875{
 876        struct snd_soc_component *component = dai->component;
 877        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 878        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 879
 880        wm8960->is_stream_in_use[tx] = false;
 881
 882        return 0;
 883}
 884
 885static int wm8960_mute(struct snd_soc_dai *dai, int mute)
 886{
 887        struct snd_soc_component *component = dai->component;
 888
 889        if (mute)
 890                snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
 891        else
 892                snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
 893        return 0;
 894}
 895
 896static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
 897                                      enum snd_soc_bias_level level)
 898{
 899        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 900        u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
 901        int ret;
 902
 903        switch (level) {
 904        case SND_SOC_BIAS_ON:
 905                break;
 906
 907        case SND_SOC_BIAS_PREPARE:
 908                switch (snd_soc_component_get_bias_level(component)) {
 909                case SND_SOC_BIAS_STANDBY:
 910                        if (!IS_ERR(wm8960->mclk)) {
 911                                ret = clk_prepare_enable(wm8960->mclk);
 912                                if (ret) {
 913                                        dev_err(component->dev,
 914                                                "Failed to enable MCLK: %d\n",
 915                                                ret);
 916                                        return ret;
 917                                }
 918                        }
 919
 920                        ret = wm8960_configure_clocking(component);
 921                        if (ret)
 922                                return ret;
 923
 924                        /* Set VMID to 2x50k */
 925                        snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
 926                        break;
 927
 928                case SND_SOC_BIAS_ON:
 929                        /*
 930                         * If it's sysclk auto mode, and the pll is enabled,
 931                         * disable the pll
 932                         */
 933                        if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
 934                                wm8960_set_pll(component, 0, 0);
 935
 936                        if (!IS_ERR(wm8960->mclk))
 937                                clk_disable_unprepare(wm8960->mclk);
 938                        break;
 939
 940                default:
 941                        break;
 942                }
 943
 944                break;
 945
 946        case SND_SOC_BIAS_STANDBY:
 947                if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
 948                        regcache_sync(wm8960->regmap);
 949
 950                        /* Enable anti-pop features */
 951                        snd_soc_component_write(component, WM8960_APOP1,
 952                                      WM8960_POBCTRL | WM8960_SOFT_ST |
 953                                      WM8960_BUFDCOPEN | WM8960_BUFIOEN);
 954
 955                        /* Enable & ramp VMID at 2x50k */
 956                        snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
 957                        msleep(100);
 958
 959                        /* Enable VREF */
 960                        snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
 961                                            WM8960_VREF);
 962
 963                        /* Disable anti-pop features */
 964                        snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
 965                }
 966
 967                /* Set VMID to 2x250k */
 968                snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
 969                break;
 970
 971        case SND_SOC_BIAS_OFF:
 972                /* Enable anti-pop features */
 973                snd_soc_component_write(component, WM8960_APOP1,
 974                             WM8960_POBCTRL | WM8960_SOFT_ST |
 975                             WM8960_BUFDCOPEN | WM8960_BUFIOEN);
 976
 977                /* Disable VMID and VREF, let them discharge */
 978                snd_soc_component_write(component, WM8960_POWER1, 0);
 979                msleep(600);
 980                break;
 981        }
 982
 983        return 0;
 984}
 985
 986static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
 987                                         enum snd_soc_bias_level level)
 988{
 989        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
 990        u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
 991        int reg, ret;
 992
 993        switch (level) {
 994        case SND_SOC_BIAS_ON:
 995                break;
 996
 997        case SND_SOC_BIAS_PREPARE:
 998                switch (snd_soc_component_get_bias_level(component)) {
 999                case SND_SOC_BIAS_STANDBY:
1000                        /* Enable anti pop mode */
1001                        snd_soc_component_update_bits(component, WM8960_APOP1,
1002                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1003                                            WM8960_BUFDCOPEN,
1004                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1005                                            WM8960_BUFDCOPEN);
1006
1007                        /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1008                        reg = 0;
1009                        if (wm8960->lout1 && wm8960->lout1->power)
1010                                reg |= WM8960_PWR2_LOUT1;
1011                        if (wm8960->rout1 && wm8960->rout1->power)
1012                                reg |= WM8960_PWR2_ROUT1;
1013                        if (wm8960->out3 && wm8960->out3->power)
1014                                reg |= WM8960_PWR2_OUT3;
1015                        snd_soc_component_update_bits(component, WM8960_POWER2,
1016                                            WM8960_PWR2_LOUT1 |
1017                                            WM8960_PWR2_ROUT1 |
1018                                            WM8960_PWR2_OUT3, reg);
1019
1020                        /* Enable VMID at 2*50k */
1021                        snd_soc_component_update_bits(component, WM8960_POWER1,
1022                                            WM8960_VMID_MASK, 0x80);
1023
1024                        /* Ramp */
1025                        msleep(100);
1026
1027                        /* Enable VREF */
1028                        snd_soc_component_update_bits(component, WM8960_POWER1,
1029                                            WM8960_VREF, WM8960_VREF);
1030
1031                        msleep(100);
1032
1033                        if (!IS_ERR(wm8960->mclk)) {
1034                                ret = clk_prepare_enable(wm8960->mclk);
1035                                if (ret) {
1036                                        dev_err(component->dev,
1037                                                "Failed to enable MCLK: %d\n",
1038                                                ret);
1039                                        return ret;
1040                                }
1041                        }
1042
1043                        ret = wm8960_configure_clocking(component);
1044                        if (ret)
1045                                return ret;
1046
1047                        break;
1048
1049                case SND_SOC_BIAS_ON:
1050                        /*
1051                         * If it's sysclk auto mode, and the pll is enabled,
1052                         * disable the pll
1053                         */
1054                        if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1055                                wm8960_set_pll(component, 0, 0);
1056
1057                        if (!IS_ERR(wm8960->mclk))
1058                                clk_disable_unprepare(wm8960->mclk);
1059
1060                        /* Enable anti-pop mode */
1061                        snd_soc_component_update_bits(component, WM8960_APOP1,
1062                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1063                                            WM8960_BUFDCOPEN,
1064                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1065                                            WM8960_BUFDCOPEN);
1066
1067                        /* Disable VMID and VREF */
1068                        snd_soc_component_update_bits(component, WM8960_POWER1,
1069                                            WM8960_VREF | WM8960_VMID_MASK, 0);
1070                        break;
1071
1072                case SND_SOC_BIAS_OFF:
1073                        regcache_sync(wm8960->regmap);
1074                        break;
1075                default:
1076                        break;
1077                }
1078                break;
1079
1080        case SND_SOC_BIAS_STANDBY:
1081                switch (snd_soc_component_get_bias_level(component)) {
1082                case SND_SOC_BIAS_PREPARE:
1083                        /* Disable HP discharge */
1084                        snd_soc_component_update_bits(component, WM8960_APOP2,
1085                                            WM8960_DISOP | WM8960_DRES_MASK,
1086                                            0);
1087
1088                        /* Disable anti-pop features */
1089                        snd_soc_component_update_bits(component, WM8960_APOP1,
1090                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1091                                            WM8960_BUFDCOPEN,
1092                                            WM8960_POBCTRL | WM8960_SOFT_ST |
1093                                            WM8960_BUFDCOPEN);
1094                        break;
1095
1096                default:
1097                        break;
1098                }
1099                break;
1100
1101        case SND_SOC_BIAS_OFF:
1102                break;
1103        }
1104
1105        return 0;
1106}
1107
1108/* PLL divisors */
1109struct _pll_div {
1110        u32 pre_div:1;
1111        u32 n:4;
1112        u32 k:24;
1113};
1114
1115static bool is_pll_freq_available(unsigned int source, unsigned int target)
1116{
1117        unsigned int Ndiv;
1118
1119        if (source == 0 || target == 0)
1120                return false;
1121
1122        /* Scale up target to PLL operating frequency */
1123        target *= 4;
1124        Ndiv = target / source;
1125
1126        if (Ndiv < 6) {
1127                source >>= 1;
1128                Ndiv = target / source;
1129        }
1130
1131        if ((Ndiv < 6) || (Ndiv > 12))
1132                return false;
1133
1134        return true;
1135}
1136
1137/* The size in bits of the pll divide multiplied by 10
1138 * to allow rounding later */
1139#define FIXED_PLL_SIZE ((1 << 24) * 10)
1140
1141static int pll_factors(unsigned int source, unsigned int target,
1142                       struct _pll_div *pll_div)
1143{
1144        unsigned long long Kpart;
1145        unsigned int K, Ndiv, Nmod;
1146
1147        pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1148
1149        /* Scale up target to PLL operating frequency */
1150        target *= 4;
1151
1152        Ndiv = target / source;
1153        if (Ndiv < 6) {
1154                source >>= 1;
1155                pll_div->pre_div = 1;
1156                Ndiv = target / source;
1157        } else
1158                pll_div->pre_div = 0;
1159
1160        if ((Ndiv < 6) || (Ndiv > 12)) {
1161                pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1162                return -EINVAL;
1163        }
1164
1165        pll_div->n = Ndiv;
1166        Nmod = target % source;
1167        Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1168
1169        do_div(Kpart, source);
1170
1171        K = Kpart & 0xFFFFFFFF;
1172
1173        /* Check if we need to round */
1174        if ((K % 10) >= 5)
1175                K += 5;
1176
1177        /* Move down to proper range now rounding is done */
1178        K /= 10;
1179
1180        pll_div->k = K;
1181
1182        pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1183                 pll_div->n, pll_div->k, pll_div->pre_div);
1184
1185        return 0;
1186}
1187
1188static int wm8960_set_pll(struct snd_soc_component *component,
1189                unsigned int freq_in, unsigned int freq_out)
1190{
1191        u16 reg;
1192        static struct _pll_div pll_div;
1193        int ret;
1194
1195        if (freq_in && freq_out) {
1196                ret = pll_factors(freq_in, freq_out, &pll_div);
1197                if (ret != 0)
1198                        return ret;
1199        }
1200
1201        /* Disable the PLL: even if we are changing the frequency the
1202         * PLL needs to be disabled while we do so. */
1203        snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1204        snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
1205
1206        if (!freq_in || !freq_out)
1207                return 0;
1208
1209        reg = snd_soc_component_read32(component, WM8960_PLL1) & ~0x3f;
1210        reg |= pll_div.pre_div << 4;
1211        reg |= pll_div.n;
1212
1213        if (pll_div.k) {
1214                reg |= 0x20;
1215
1216                snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1217                snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1218                snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
1219        }
1220        snd_soc_component_write(component, WM8960_PLL1, reg);
1221
1222        /* Turn it on */
1223        snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
1224        msleep(250);
1225        snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
1226
1227        return 0;
1228}
1229
1230static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1231                int source, unsigned int freq_in, unsigned int freq_out)
1232{
1233        struct snd_soc_component *component = codec_dai->component;
1234        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1235
1236        wm8960->freq_in = freq_in;
1237
1238        if (pll_id == WM8960_SYSCLK_AUTO)
1239                return 0;
1240
1241        return wm8960_set_pll(component, freq_in, freq_out);
1242}
1243
1244static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1245                int div_id, int div)
1246{
1247        struct snd_soc_component *component = codec_dai->component;
1248        u16 reg;
1249
1250        switch (div_id) {
1251        case WM8960_SYSCLKDIV:
1252                reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1f9;
1253                snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1254                break;
1255        case WM8960_DACDIV:
1256                reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1c7;
1257                snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1258                break;
1259        case WM8960_OPCLKDIV:
1260                reg = snd_soc_component_read32(component, WM8960_PLL1) & 0x03f;
1261                snd_soc_component_write(component, WM8960_PLL1, reg | div);
1262                break;
1263        case WM8960_DCLKDIV:
1264                reg = snd_soc_component_read32(component, WM8960_CLOCK2) & 0x03f;
1265                snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
1266                break;
1267        case WM8960_TOCLKSEL:
1268                reg = snd_soc_component_read32(component, WM8960_ADDCTL1) & 0x1fd;
1269                snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
1270                break;
1271        default:
1272                return -EINVAL;
1273        }
1274
1275        return 0;
1276}
1277
1278static int wm8960_set_bias_level(struct snd_soc_component *component,
1279                                 enum snd_soc_bias_level level)
1280{
1281        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1282
1283        return wm8960->set_bias_level(component, level);
1284}
1285
1286static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1287                                        unsigned int freq, int dir)
1288{
1289        struct snd_soc_component *component = dai->component;
1290        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1291
1292        switch (clk_id) {
1293        case WM8960_SYSCLK_MCLK:
1294                snd_soc_component_update_bits(component, WM8960_CLOCK1,
1295                                        0x1, WM8960_SYSCLK_MCLK);
1296                break;
1297        case WM8960_SYSCLK_PLL:
1298                snd_soc_component_update_bits(component, WM8960_CLOCK1,
1299                                        0x1, WM8960_SYSCLK_PLL);
1300                break;
1301        case WM8960_SYSCLK_AUTO:
1302                break;
1303        default:
1304                return -EINVAL;
1305        }
1306
1307        wm8960->sysclk = freq;
1308        wm8960->clk_id = clk_id;
1309
1310        return 0;
1311}
1312
1313#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1314
1315#define WM8960_FORMATS \
1316        (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1317        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1318
1319static const struct snd_soc_dai_ops wm8960_dai_ops = {
1320        .hw_params = wm8960_hw_params,
1321        .hw_free = wm8960_hw_free,
1322        .digital_mute = wm8960_mute,
1323        .set_fmt = wm8960_set_dai_fmt,
1324        .set_clkdiv = wm8960_set_dai_clkdiv,
1325        .set_pll = wm8960_set_dai_pll,
1326        .set_sysclk = wm8960_set_dai_sysclk,
1327};
1328
1329static struct snd_soc_dai_driver wm8960_dai = {
1330        .name = "wm8960-hifi",
1331        .playback = {
1332                .stream_name = "Playback",
1333                .channels_min = 1,
1334                .channels_max = 2,
1335                .rates = WM8960_RATES,
1336                .formats = WM8960_FORMATS,},
1337        .capture = {
1338                .stream_name = "Capture",
1339                .channels_min = 1,
1340                .channels_max = 2,
1341                .rates = WM8960_RATES,
1342                .formats = WM8960_FORMATS,},
1343        .ops = &wm8960_dai_ops,
1344        .symmetric_rates = 1,
1345};
1346
1347static int wm8960_probe(struct snd_soc_component *component)
1348{
1349        struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1350        struct wm8960_data *pdata = &wm8960->pdata;
1351
1352        if (pdata->capless)
1353                wm8960->set_bias_level = wm8960_set_bias_level_capless;
1354        else
1355                wm8960->set_bias_level = wm8960_set_bias_level_out3;
1356
1357        snd_soc_add_component_controls(component, wm8960_snd_controls,
1358                                     ARRAY_SIZE(wm8960_snd_controls));
1359        wm8960_add_widgets(component);
1360
1361        return 0;
1362}
1363
1364static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1365        .probe                  = wm8960_probe,
1366        .set_bias_level         = wm8960_set_bias_level,
1367        .suspend_bias_off       = 1,
1368        .idle_bias_on           = 1,
1369        .use_pmdown_time        = 1,
1370        .endianness             = 1,
1371        .non_legacy_dai_naming  = 1,
1372};
1373
1374static const struct regmap_config wm8960_regmap = {
1375        .reg_bits = 7,
1376        .val_bits = 9,
1377        .max_register = WM8960_PLL4,
1378
1379        .reg_defaults = wm8960_reg_defaults,
1380        .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1381        .cache_type = REGCACHE_RBTREE,
1382
1383        .volatile_reg = wm8960_volatile,
1384};
1385
1386static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1387                                struct wm8960_data *pdata)
1388{
1389        const struct device_node *np = i2c->dev.of_node;
1390
1391        if (of_property_read_bool(np, "wlf,capless"))
1392                pdata->capless = true;
1393
1394        if (of_property_read_bool(np, "wlf,shared-lrclk"))
1395                pdata->shared_lrclk = true;
1396}
1397
1398static int wm8960_i2c_probe(struct i2c_client *i2c,
1399                            const struct i2c_device_id *id)
1400{
1401        struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1402        struct wm8960_priv *wm8960;
1403        int ret;
1404
1405        wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1406                              GFP_KERNEL);
1407        if (wm8960 == NULL)
1408                return -ENOMEM;
1409
1410        wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1411        if (IS_ERR(wm8960->mclk)) {
1412                if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1413                        return -EPROBE_DEFER;
1414        }
1415
1416        wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1417        if (IS_ERR(wm8960->regmap))
1418                return PTR_ERR(wm8960->regmap);
1419
1420        if (pdata)
1421                memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1422        else if (i2c->dev.of_node)
1423                wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1424
1425        ret = wm8960_reset(wm8960->regmap);
1426        if (ret != 0) {
1427                dev_err(&i2c->dev, "Failed to issue reset\n");
1428                return ret;
1429        }
1430
1431        if (wm8960->pdata.shared_lrclk) {
1432                ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1433                                         0x4, 0x4);
1434                if (ret != 0) {
1435                        dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1436                                ret);
1437                        return ret;
1438                }
1439        }
1440
1441        /* Latch the update bits */
1442        regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1443        regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1444        regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1445        regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1446        regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1447        regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1448        regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1449        regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1450        regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1451        regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1452
1453        i2c_set_clientdata(i2c, wm8960);
1454
1455        ret = devm_snd_soc_register_component(&i2c->dev,
1456                        &soc_component_dev_wm8960, &wm8960_dai, 1);
1457
1458        return ret;
1459}
1460
1461static int wm8960_i2c_remove(struct i2c_client *client)
1462{
1463        return 0;
1464}
1465
1466static const struct i2c_device_id wm8960_i2c_id[] = {
1467        { "wm8960", 0 },
1468        { }
1469};
1470MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1471
1472static const struct of_device_id wm8960_of_match[] = {
1473       { .compatible = "wlf,wm8960", },
1474       { }
1475};
1476MODULE_DEVICE_TABLE(of, wm8960_of_match);
1477
1478static struct i2c_driver wm8960_i2c_driver = {
1479        .driver = {
1480                .name = "wm8960",
1481                .of_match_table = wm8960_of_match,
1482        },
1483        .probe =    wm8960_i2c_probe,
1484        .remove =   wm8960_i2c_remove,
1485        .id_table = wm8960_i2c_id,
1486};
1487
1488module_i2c_driver(wm8960_i2c_driver);
1489
1490MODULE_DESCRIPTION("ASoC WM8960 driver");
1491MODULE_AUTHOR("Liam Girdwood");
1492MODULE_LICENSE("GPL");
1493