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33#include <linux/compat.h>
34#include <linux/console.h>
35#include <linux/module.h>
36#include <linux/pm_runtime.h>
37#include <linux/vga_switcheroo.h>
38#include <linux/mmu_notifier.h>
39
40#include <drm/drm_crtc_helper.h>
41#include <drm/drm_drv.h>
42#include <drm/drm_fb_helper.h>
43#include <drm/drm_file.h>
44#include <drm/drm_gem.h>
45#include <drm/drm_ioctl.h>
46#include <drm/drm_pci.h>
47#include <drm/drm_pciids.h>
48#include <drm/drm_probe_helper.h>
49#include <drm/drm_vblank.h>
50#include <drm/radeon_drm.h>
51
52#include "radeon_drv.h"
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110#define KMS_DRIVER_MAJOR 2
111#define KMS_DRIVER_MINOR 50
112#define KMS_DRIVER_PATCHLEVEL 0
113int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
114void radeon_driver_unload_kms(struct drm_device *dev);
115void radeon_driver_lastclose_kms(struct drm_device *dev);
116int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
117void radeon_driver_postclose_kms(struct drm_device *dev,
118 struct drm_file *file_priv);
119int radeon_suspend_kms(struct drm_device *dev, bool suspend,
120 bool fbcon, bool freeze);
121int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
122u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
123int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
124void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
125void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
126int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
127void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
128irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
129void radeon_gem_object_free(struct drm_gem_object *obj);
130int radeon_gem_object_open(struct drm_gem_object *obj,
131 struct drm_file *file_priv);
132void radeon_gem_object_close(struct drm_gem_object *obj,
133 struct drm_file *file_priv);
134struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj,
135 int flags);
136extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
137 unsigned int flags, int *vpos, int *hpos,
138 ktime_t *stime, ktime_t *etime,
139 const struct drm_display_mode *mode);
140extern bool radeon_is_px(struct drm_device *dev);
141extern const struct drm_ioctl_desc radeon_ioctls_kms[];
142extern int radeon_max_kms_ioctl;
143int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
144int radeon_mode_dumb_mmap(struct drm_file *filp,
145 struct drm_device *dev,
146 uint32_t handle, uint64_t *offset_p);
147int radeon_mode_dumb_create(struct drm_file *file_priv,
148 struct drm_device *dev,
149 struct drm_mode_create_dumb *args);
150struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
151struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
152 struct dma_buf_attachment *,
153 struct sg_table *sg);
154int radeon_gem_prime_pin(struct drm_gem_object *obj);
155void radeon_gem_prime_unpin(struct drm_gem_object *obj);
156void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
157void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
158
159
160#if defined(CONFIG_VGA_SWITCHEROO)
161void radeon_register_atpx_handler(void);
162void radeon_unregister_atpx_handler(void);
163bool radeon_has_atpx_dgpu_power_cntl(void);
164bool radeon_is_atpx_hybrid(void);
165#else
166static inline void radeon_register_atpx_handler(void) {}
167static inline void radeon_unregister_atpx_handler(void) {}
168static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
169static inline bool radeon_is_atpx_hybrid(void) { return false; }
170#endif
171
172int radeon_no_wb;
173int radeon_modeset = -1;
174int radeon_dynclks = -1;
175int radeon_r4xx_atom = 0;
176#ifdef __powerpc__
177
178int radeon_agpmode = -1;
179#else
180int radeon_agpmode = 0;
181#endif
182int radeon_vram_limit = 0;
183int radeon_gart_size = -1;
184int radeon_benchmarking = 0;
185int radeon_testing = 0;
186int radeon_connector_table = 0;
187int radeon_tv = 1;
188int radeon_audio = -1;
189int radeon_disp_priority = 0;
190int radeon_hw_i2c = 0;
191int radeon_pcie_gen2 = -1;
192int radeon_msi = -1;
193int radeon_lockup_timeout = 10000;
194int radeon_fastfb = 0;
195int radeon_dpm = -1;
196int radeon_aspm = -1;
197int radeon_runtime_pm = -1;
198int radeon_hard_reset = 0;
199int radeon_vm_size = 8;
200int radeon_vm_block_size = -1;
201int radeon_deep_color = 0;
202int radeon_use_pflipirq = 2;
203int radeon_bapm = -1;
204int radeon_backlight = -1;
205int radeon_auxch = -1;
206int radeon_mst = 0;
207int radeon_uvd = 1;
208int radeon_vce = 1;
209
210MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
211module_param_named(no_wb, radeon_no_wb, int, 0444);
212
213MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
214module_param_named(modeset, radeon_modeset, int, 0400);
215
216MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
217module_param_named(dynclks, radeon_dynclks, int, 0444);
218
219MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
220module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
221
222MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
223module_param_named(vramlimit, radeon_vram_limit, int, 0600);
224
225MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
226module_param_named(agpmode, radeon_agpmode, int, 0444);
227
228MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
229module_param_named(gartsize, radeon_gart_size, int, 0600);
230
231MODULE_PARM_DESC(benchmark, "Run benchmark");
232module_param_named(benchmark, radeon_benchmarking, int, 0444);
233
234MODULE_PARM_DESC(test, "Run tests");
235module_param_named(test, radeon_testing, int, 0444);
236
237MODULE_PARM_DESC(connector_table, "Force connector table");
238module_param_named(connector_table, radeon_connector_table, int, 0444);
239
240MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
241module_param_named(tv, radeon_tv, int, 0444);
242
243MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
244module_param_named(audio, radeon_audio, int, 0444);
245
246MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
247module_param_named(disp_priority, radeon_disp_priority, int, 0444);
248
249MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
250module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
251
252MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
253module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
254
255MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
256module_param_named(msi, radeon_msi, int, 0444);
257
258MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
259module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
260
261MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
262module_param_named(fastfb, radeon_fastfb, int, 0444);
263
264MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
265module_param_named(dpm, radeon_dpm, int, 0444);
266
267MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
268module_param_named(aspm, radeon_aspm, int, 0444);
269
270MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
271module_param_named(runpm, radeon_runtime_pm, int, 0444);
272
273MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
274module_param_named(hard_reset, radeon_hard_reset, int, 0444);
275
276MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
277module_param_named(vm_size, radeon_vm_size, int, 0444);
278
279MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
280module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
281
282MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
283module_param_named(deep_color, radeon_deep_color, int, 0444);
284
285MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
286module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
287
288MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
289module_param_named(bapm, radeon_bapm, int, 0444);
290
291MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
292module_param_named(backlight, radeon_backlight, int, 0444);
293
294MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
295module_param_named(auxch, radeon_auxch, int, 0444);
296
297MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
298module_param_named(mst, radeon_mst, int, 0444);
299
300MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
301module_param_named(uvd, radeon_uvd, int, 0444);
302
303MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
304module_param_named(vce, radeon_vce, int, 0444);
305
306int radeon_si_support = 1;
307MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
308module_param_named(si_support, radeon_si_support, int, 0444);
309
310int radeon_cik_support = 1;
311MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
312module_param_named(cik_support, radeon_cik_support, int, 0444);
313
314static struct pci_device_id pciidlist[] = {
315 radeon_PCI_IDS
316};
317
318MODULE_DEVICE_TABLE(pci, pciidlist);
319
320static struct drm_driver kms_driver;
321
322bool radeon_device_is_virtual(void);
323
324static int radeon_pci_probe(struct pci_dev *pdev,
325 const struct pci_device_id *ent)
326{
327 unsigned long flags = 0;
328 int ret;
329
330 if (!ent)
331 return -ENODEV;
332
333 flags = ent->driver_data;
334
335 if (!radeon_si_support) {
336 switch (flags & RADEON_FAMILY_MASK) {
337 case CHIP_TAHITI:
338 case CHIP_PITCAIRN:
339 case CHIP_VERDE:
340 case CHIP_OLAND:
341 case CHIP_HAINAN:
342 dev_info(&pdev->dev,
343 "SI support disabled by module param\n");
344 return -ENODEV;
345 }
346 }
347 if (!radeon_cik_support) {
348 switch (flags & RADEON_FAMILY_MASK) {
349 case CHIP_KAVERI:
350 case CHIP_BONAIRE:
351 case CHIP_HAWAII:
352 case CHIP_KABINI:
353 case CHIP_MULLINS:
354 dev_info(&pdev->dev,
355 "CIK support disabled by module param\n");
356 return -ENODEV;
357 }
358 }
359
360 if (vga_switcheroo_client_probe_defer(pdev))
361 return -EPROBE_DEFER;
362
363
364 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "radeondrmfb");
365 if (ret)
366 return ret;
367
368 return drm_get_pci_dev(pdev, ent, &kms_driver);
369}
370
371static void
372radeon_pci_remove(struct pci_dev *pdev)
373{
374 struct drm_device *dev = pci_get_drvdata(pdev);
375
376 drm_put_dev(dev);
377}
378
379static void
380radeon_pci_shutdown(struct pci_dev *pdev)
381{
382#ifdef CONFIG_PPC64
383 struct drm_device *ddev = pci_get_drvdata(pdev);
384#endif
385
386
387
388
389 if (radeon_device_is_virtual())
390 radeon_pci_remove(pdev);
391
392#ifdef CONFIG_PPC64
393
394
395
396
397
398
399 radeon_suspend_kms(ddev, true, true, false);
400#endif
401}
402
403static int radeon_pmops_suspend(struct device *dev)
404{
405 struct drm_device *drm_dev = dev_get_drvdata(dev);
406 return radeon_suspend_kms(drm_dev, true, true, false);
407}
408
409static int radeon_pmops_resume(struct device *dev)
410{
411 struct drm_device *drm_dev = dev_get_drvdata(dev);
412
413
414 if (radeon_is_px(drm_dev)) {
415 pm_runtime_disable(dev);
416 pm_runtime_set_active(dev);
417 pm_runtime_enable(dev);
418 }
419
420 return radeon_resume_kms(drm_dev, true, true);
421}
422
423static int radeon_pmops_freeze(struct device *dev)
424{
425 struct drm_device *drm_dev = dev_get_drvdata(dev);
426 return radeon_suspend_kms(drm_dev, false, true, true);
427}
428
429static int radeon_pmops_thaw(struct device *dev)
430{
431 struct drm_device *drm_dev = dev_get_drvdata(dev);
432 return radeon_resume_kms(drm_dev, false, true);
433}
434
435static int radeon_pmops_runtime_suspend(struct device *dev)
436{
437 struct pci_dev *pdev = to_pci_dev(dev);
438 struct drm_device *drm_dev = pci_get_drvdata(pdev);
439 int ret;
440
441 if (!radeon_is_px(drm_dev)) {
442 pm_runtime_forbid(dev);
443 return -EBUSY;
444 }
445
446 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
447 drm_kms_helper_poll_disable(drm_dev);
448
449 ret = radeon_suspend_kms(drm_dev, false, false, false);
450 pci_save_state(pdev);
451 pci_disable_device(pdev);
452 pci_ignore_hotplug(pdev);
453 if (radeon_is_atpx_hybrid())
454 pci_set_power_state(pdev, PCI_D3cold);
455 else if (!radeon_has_atpx_dgpu_power_cntl())
456 pci_set_power_state(pdev, PCI_D3hot);
457 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
458
459 return 0;
460}
461
462static int radeon_pmops_runtime_resume(struct device *dev)
463{
464 struct pci_dev *pdev = to_pci_dev(dev);
465 struct drm_device *drm_dev = pci_get_drvdata(pdev);
466 int ret;
467
468 if (!radeon_is_px(drm_dev))
469 return -EINVAL;
470
471 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
472
473 if (radeon_is_atpx_hybrid() ||
474 !radeon_has_atpx_dgpu_power_cntl())
475 pci_set_power_state(pdev, PCI_D0);
476 pci_restore_state(pdev);
477 ret = pci_enable_device(pdev);
478 if (ret)
479 return ret;
480 pci_set_master(pdev);
481
482 ret = radeon_resume_kms(drm_dev, false, false);
483 drm_kms_helper_poll_enable(drm_dev);
484 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
485 return 0;
486}
487
488static int radeon_pmops_runtime_idle(struct device *dev)
489{
490 struct drm_device *drm_dev = dev_get_drvdata(dev);
491 struct drm_crtc *crtc;
492
493 if (!radeon_is_px(drm_dev)) {
494 pm_runtime_forbid(dev);
495 return -EBUSY;
496 }
497
498 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
499 if (crtc->enabled) {
500 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
501 return -EBUSY;
502 }
503 }
504
505 pm_runtime_mark_last_busy(dev);
506 pm_runtime_autosuspend(dev);
507
508 return 1;
509}
510
511long radeon_drm_ioctl(struct file *filp,
512 unsigned int cmd, unsigned long arg)
513{
514 struct drm_file *file_priv = filp->private_data;
515 struct drm_device *dev;
516 long ret;
517 dev = file_priv->minor->dev;
518 ret = pm_runtime_get_sync(dev->dev);
519 if (ret < 0)
520 return ret;
521
522 ret = drm_ioctl(filp, cmd, arg);
523
524 pm_runtime_mark_last_busy(dev->dev);
525 pm_runtime_put_autosuspend(dev->dev);
526 return ret;
527}
528
529#ifdef CONFIG_COMPAT
530static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
531{
532 unsigned int nr = DRM_IOCTL_NR(cmd);
533 int ret;
534
535 if (nr < DRM_COMMAND_BASE)
536 return drm_compat_ioctl(filp, cmd, arg);
537
538 ret = radeon_drm_ioctl(filp, cmd, arg);
539
540 return ret;
541}
542#endif
543
544static const struct dev_pm_ops radeon_pm_ops = {
545 .suspend = radeon_pmops_suspend,
546 .resume = radeon_pmops_resume,
547 .freeze = radeon_pmops_freeze,
548 .thaw = radeon_pmops_thaw,
549 .poweroff = radeon_pmops_freeze,
550 .restore = radeon_pmops_resume,
551 .runtime_suspend = radeon_pmops_runtime_suspend,
552 .runtime_resume = radeon_pmops_runtime_resume,
553 .runtime_idle = radeon_pmops_runtime_idle,
554};
555
556static const struct file_operations radeon_driver_kms_fops = {
557 .owner = THIS_MODULE,
558 .open = drm_open,
559 .release = drm_release,
560 .unlocked_ioctl = radeon_drm_ioctl,
561 .mmap = radeon_mmap,
562 .poll = drm_poll,
563 .read = drm_read,
564#ifdef CONFIG_COMPAT
565 .compat_ioctl = radeon_kms_compat_ioctl,
566#endif
567};
568
569static bool
570radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
571 bool in_vblank_irq, int *vpos, int *hpos,
572 ktime_t *stime, ktime_t *etime,
573 const struct drm_display_mode *mode)
574{
575 return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
576 stime, etime, mode);
577}
578
579static struct drm_driver kms_driver = {
580 .driver_features =
581 DRIVER_USE_AGP | DRIVER_GEM | DRIVER_RENDER,
582 .load = radeon_driver_load_kms,
583 .open = radeon_driver_open_kms,
584 .postclose = radeon_driver_postclose_kms,
585 .lastclose = radeon_driver_lastclose_kms,
586 .unload = radeon_driver_unload_kms,
587 .get_vblank_counter = radeon_get_vblank_counter_kms,
588 .enable_vblank = radeon_enable_vblank_kms,
589 .disable_vblank = radeon_disable_vblank_kms,
590 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
591 .get_scanout_position = radeon_get_crtc_scanout_position,
592 .irq_preinstall = radeon_driver_irq_preinstall_kms,
593 .irq_postinstall = radeon_driver_irq_postinstall_kms,
594 .irq_uninstall = radeon_driver_irq_uninstall_kms,
595 .irq_handler = radeon_driver_irq_handler_kms,
596 .ioctls = radeon_ioctls_kms,
597 .gem_free_object_unlocked = radeon_gem_object_free,
598 .gem_open_object = radeon_gem_object_open,
599 .gem_close_object = radeon_gem_object_close,
600 .dumb_create = radeon_mode_dumb_create,
601 .dumb_map_offset = radeon_mode_dumb_mmap,
602 .fops = &radeon_driver_kms_fops,
603
604 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
605 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
606 .gem_prime_export = radeon_gem_prime_export,
607 .gem_prime_pin = radeon_gem_prime_pin,
608 .gem_prime_unpin = radeon_gem_prime_unpin,
609 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
610 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
611 .gem_prime_vmap = radeon_gem_prime_vmap,
612 .gem_prime_vunmap = radeon_gem_prime_vunmap,
613
614 .name = DRIVER_NAME,
615 .desc = DRIVER_DESC,
616 .date = DRIVER_DATE,
617 .major = KMS_DRIVER_MAJOR,
618 .minor = KMS_DRIVER_MINOR,
619 .patchlevel = KMS_DRIVER_PATCHLEVEL,
620};
621
622static struct drm_driver *driver;
623static struct pci_driver *pdriver;
624
625static struct pci_driver radeon_kms_pci_driver = {
626 .name = DRIVER_NAME,
627 .id_table = pciidlist,
628 .probe = radeon_pci_probe,
629 .remove = radeon_pci_remove,
630 .shutdown = radeon_pci_shutdown,
631 .driver.pm = &radeon_pm_ops,
632};
633
634static int __init radeon_init(void)
635{
636 if (vgacon_text_force() && radeon_modeset == -1) {
637 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
638 radeon_modeset = 0;
639 }
640
641 if (radeon_modeset == -1)
642 radeon_modeset = 1;
643
644 if (radeon_modeset == 1) {
645 DRM_INFO("radeon kernel modesetting enabled.\n");
646 driver = &kms_driver;
647 pdriver = &radeon_kms_pci_driver;
648 driver->driver_features |= DRIVER_MODESET;
649 driver->num_ioctls = radeon_max_kms_ioctl;
650 radeon_register_atpx_handler();
651
652 } else {
653 DRM_ERROR("No UMS support in radeon module!\n");
654 return -EINVAL;
655 }
656
657 return pci_register_driver(pdriver);
658}
659
660static void __exit radeon_exit(void)
661{
662 pci_unregister_driver(pdriver);
663 radeon_unregister_atpx_handler();
664 mmu_notifier_synchronize();
665}
666
667module_init(radeon_init);
668module_exit(radeon_exit);
669
670MODULE_AUTHOR(DRIVER_AUTHOR);
671MODULE_DESCRIPTION(DRIVER_DESC);
672MODULE_LICENSE("GPL and additional rights");
673
