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8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/delay.h>
12#include <linux/firmware.h>
13#include <linux/i2c.h>
14#include <asm/div64.h>
15
16#include <media/dvb_frontend.h>
17#include "tda18271c2dd.h"
18
19
20#define MAX_XFER_SIZE 64
21
22struct SStandardParam {
23 s32 m_IFFrequency;
24 u32 m_BandWidth;
25 u8 m_EP3_4_0;
26 u8 m_EB22;
27};
28
29struct SMap {
30 u32 m_Frequency;
31 u8 m_Param;
32};
33
34struct SMapI {
35 u32 m_Frequency;
36 s32 m_Param;
37};
38
39struct SMap2 {
40 u32 m_Frequency;
41 u8 m_Param1;
42 u8 m_Param2;
43};
44
45struct SRFBandMap {
46 u32 m_RF_max;
47 u32 m_RF1_Default;
48 u32 m_RF2_Default;
49 u32 m_RF3_Default;
50};
51
52enum ERegister {
53 ID = 0,
54 TM,
55 PL,
56 EP1, EP2, EP3, EP4, EP5,
57 CPD, CD1, CD2, CD3,
58 MPD, MD1, MD2, MD3,
59 EB1, EB2, EB3, EB4, EB5, EB6, EB7, EB8, EB9, EB10,
60 EB11, EB12, EB13, EB14, EB15, EB16, EB17, EB18, EB19, EB20,
61 EB21, EB22, EB23,
62 NUM_REGS
63};
64
65struct tda_state {
66 struct i2c_adapter *i2c;
67 u8 adr;
68
69 u32 m_Frequency;
70 u32 IF;
71
72 u8 m_IFLevelAnalog;
73 u8 m_IFLevelDigital;
74 u8 m_IFLevelDVBC;
75 u8 m_IFLevelDVBT;
76
77 u8 m_EP4;
78 u8 m_EP3_Standby;
79
80 bool m_bMaster;
81
82 s32 m_SettlingTime;
83
84 u8 m_Regs[NUM_REGS];
85
86
87 u32 m_RF1[7];
88 s32 m_RF_A1[7];
89 s32 m_RF_B1[7];
90 u32 m_RF2[7];
91 s32 m_RF_A2[7];
92 s32 m_RF_B2[7];
93 u32 m_RF3[7];
94
95 u8 m_TMValue_RFCal;
96
97 bool m_bFMInput;
98
99};
100
101static int PowerScan(struct tda_state *state,
102 u8 RFBand, u32 RF_in,
103 u32 *pRF_Out, bool *pbcal);
104
105static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len)
106{
107 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
108 .buf = data, .len = len} };
109 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
110}
111
112static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
113{
114 struct i2c_msg msg = {.addr = adr, .flags = 0,
115 .buf = data, .len = len};
116
117 if (i2c_transfer(adap, &msg, 1) != 1) {
118 printk(KERN_ERR "tda18271c2dd: i2c write error at addr %i\n", adr);
119 return -1;
120 }
121 return 0;
122}
123
124static int WriteRegs(struct tda_state *state,
125 u8 SubAddr, u8 *Regs, u16 nRegs)
126{
127 u8 data[MAX_XFER_SIZE];
128
129 if (1 + nRegs > sizeof(data)) {
130 printk(KERN_WARNING
131 "%s: i2c wr: len=%d is too big!\n",
132 KBUILD_MODNAME, nRegs);
133 return -EINVAL;
134 }
135
136 data[0] = SubAddr;
137 memcpy(data + 1, Regs, nRegs);
138 return i2c_write(state->i2c, state->adr, data, nRegs + 1);
139}
140
141static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg)
142{
143 u8 msg[2] = {SubAddr, Reg};
144
145 return i2c_write(state->i2c, state->adr, msg, 2);
146}
147
148static int Read(struct tda_state *state, u8 * Regs)
149{
150 return i2c_readn(state->i2c, state->adr, Regs, 16);
151}
152
153static int ReadExtented(struct tda_state *state, u8 * Regs)
154{
155 return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS);
156}
157
158static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo)
159{
160 return WriteRegs(state, RegFrom,
161 &state->m_Regs[RegFrom], RegTo-RegFrom+1);
162}
163static int UpdateReg(struct tda_state *state, u8 Reg)
164{
165 return WriteReg(state, Reg, state->m_Regs[Reg]);
166}
167
168#include "tda18271c2dd_maps.h"
169
170static void reset(struct tda_state *state)
171{
172 u32 ulIFLevelAnalog = 0;
173 u32 ulIFLevelDigital = 2;
174 u32 ulIFLevelDVBC = 7;
175 u32 ulIFLevelDVBT = 6;
176 u32 ulXTOut = 0;
177 u32 ulStandbyMode = 0x06;
178 u32 ulSlave = 0;
179 u32 ulFMInput = 0;
180 u32 ulSettlingTime = 100;
181
182 state->m_Frequency = 0;
183 state->m_SettlingTime = 100;
184 state->m_IFLevelAnalog = (ulIFLevelAnalog & 0x07) << 2;
185 state->m_IFLevelDigital = (ulIFLevelDigital & 0x07) << 2;
186 state->m_IFLevelDVBC = (ulIFLevelDVBC & 0x07) << 2;
187 state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2;
188
189 state->m_EP4 = 0x20;
190 if (ulXTOut != 0)
191 state->m_EP4 |= 0x40;
192
193 state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F;
194 state->m_bMaster = (ulSlave == 0);
195
196 state->m_SettlingTime = ulSettlingTime;
197
198 state->m_bFMInput = (ulFMInput == 2);
199}
200
201static bool SearchMap1(struct SMap Map[],
202 u32 Frequency, u8 *pParam)
203{
204 int i = 0;
205
206 while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency))
207 i += 1;
208 if (Map[i].m_Frequency == 0)
209 return false;
210 *pParam = Map[i].m_Param;
211 return true;
212}
213
214static bool SearchMap2(struct SMapI Map[],
215 u32 Frequency, s32 *pParam)
216{
217 int i = 0;
218
219 while ((Map[i].m_Frequency != 0) &&
220 (Frequency > Map[i].m_Frequency))
221 i += 1;
222 if (Map[i].m_Frequency == 0)
223 return false;
224 *pParam = Map[i].m_Param;
225 return true;
226}
227
228static bool SearchMap3(struct SMap2 Map[], u32 Frequency,
229 u8 *pParam1, u8 *pParam2)
230{
231 int i = 0;
232
233 while ((Map[i].m_Frequency != 0) &&
234 (Frequency > Map[i].m_Frequency))
235 i += 1;
236 if (Map[i].m_Frequency == 0)
237 return false;
238 *pParam1 = Map[i].m_Param1;
239 *pParam2 = Map[i].m_Param2;
240 return true;
241}
242
243static bool SearchMap4(struct SRFBandMap Map[],
244 u32 Frequency, u8 *pRFBand)
245{
246 int i = 0;
247
248 while (i < 7 && (Frequency > Map[i].m_RF_max))
249 i += 1;
250 if (i == 7)
251 return false;
252 *pRFBand = i;
253 return true;
254}
255
256static int ThermometerRead(struct tda_state *state, u8 *pTM_Value)
257{
258 int status = 0;
259
260 do {
261 u8 Regs[16];
262 state->m_Regs[TM] |= 0x10;
263 status = UpdateReg(state, TM);
264 if (status < 0)
265 break;
266 status = Read(state, Regs);
267 if (status < 0)
268 break;
269 if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) ||
270 ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) {
271 state->m_Regs[TM] ^= 0x20;
272 status = UpdateReg(state, TM);
273 if (status < 0)
274 break;
275 msleep(10);
276 status = Read(state, Regs);
277 if (status < 0)
278 break;
279 }
280 *pTM_Value = (Regs[TM] & 0x20)
281 ? m_Thermometer_Map_2[Regs[TM] & 0x0F]
282 : m_Thermometer_Map_1[Regs[TM] & 0x0F] ;
283 state->m_Regs[TM] &= ~0x10;
284 status = UpdateReg(state, TM);
285 if (status < 0)
286 break;
287 state->m_Regs[EP4] &= ~0x03;
288 status = UpdateReg(state, EP4);
289 if (status < 0)
290 break;
291 } while (0);
292
293 return status;
294}
295
296static int StandBy(struct tda_state *state)
297{
298 int status = 0;
299 do {
300 state->m_Regs[EB12] &= ~0x20;
301 status = UpdateReg(state, EB12);
302 if (status < 0)
303 break;
304 state->m_Regs[EB18] &= ~0x83;
305 status = UpdateReg(state, EB18);
306 if (status < 0)
307 break;
308 state->m_Regs[EB21] |= 0x03;
309 state->m_Regs[EP3] = state->m_EP3_Standby;
310 status = UpdateReg(state, EP3);
311 if (status < 0)
312 break;
313 state->m_Regs[EB23] &= ~0x06;
314 status = UpdateRegs(state, EB21, EB23);
315 if (status < 0)
316 break;
317 } while (0);
318 return status;
319}
320
321static int CalcMainPLL(struct tda_state *state, u32 freq)
322{
323
324 u8 PostDiv;
325 u8 Div;
326 u64 OscFreq;
327 u32 MainDiv;
328
329 if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div))
330 return -EINVAL;
331
332 OscFreq = (u64) freq * (u64) Div;
333 OscFreq *= (u64) 16384;
334 do_div(OscFreq, (u64)16000000);
335 MainDiv = OscFreq;
336
337 state->m_Regs[MPD] = PostDiv & 0x77;
338 state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F);
339 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF);
340 state->m_Regs[MD3] = (MainDiv & 0xFF);
341
342 return UpdateRegs(state, MPD, MD3);
343}
344
345static int CalcCalPLL(struct tda_state *state, u32 freq)
346{
347 u8 PostDiv;
348 u8 Div;
349 u64 OscFreq;
350 u32 CalDiv;
351
352 if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div))
353 return -EINVAL;
354
355 OscFreq = (u64)freq * (u64)Div;
356
357 OscFreq *= (u64)16384;
358 do_div(OscFreq, (u64)16000000);
359 CalDiv = OscFreq;
360
361 state->m_Regs[CPD] = PostDiv;
362 state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF);
363 state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF);
364 state->m_Regs[CD3] = (CalDiv & 0xFF);
365
366 return UpdateRegs(state, CPD, CD3);
367}
368
369static int CalibrateRF(struct tda_state *state,
370 u8 RFBand, u32 freq, s32 *pCprog)
371{
372 int status = 0;
373 u8 Regs[NUM_REGS];
374 do {
375 u8 BP_Filter = 0;
376 u8 GainTaper = 0;
377 u8 RFC_K = 0;
378 u8 RFC_M = 0;
379
380 state->m_Regs[EP4] &= ~0x03;
381 status = UpdateReg(state, EP4);
382 if (status < 0)
383 break;
384 state->m_Regs[EB18] |= 0x03;
385 status = UpdateReg(state, EB18);
386 if (status < 0)
387 break;
388
389
390
391 if (state->m_Regs[ID] != 0x83)
392 state->m_Regs[EP3] |= 0x40;
393
394 if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) &&
395 SearchMap1(m_GainTaper_Map, freq, &GainTaper) &&
396 SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M)))
397 return -EINVAL;
398
399 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter;
400 state->m_Regs[EP2] = (RFBand << 5) | GainTaper;
401
402 state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2);
403
404 status = UpdateRegs(state, EP1, EP3);
405 if (status < 0)
406 break;
407 status = UpdateReg(state, EB13);
408 if (status < 0)
409 break;
410
411 state->m_Regs[EB4] |= 0x20;
412 status = UpdateReg(state, EB4);
413 if (status < 0)
414 break;
415
416 state->m_Regs[EB7] |= 0x20;
417 status = UpdateReg(state, EB7);
418 if (status < 0)
419 break;
420
421 state->m_Regs[EB14] = 0;
422 status = UpdateReg(state, EB14);
423 if (status < 0)
424 break;
425
426 state->m_Regs[EB20] &= ~0x20;
427 status = UpdateReg(state, EB20);
428 if (status < 0)
429 break;
430
431 state->m_Regs[EP4] |= 0x03;
432 status = UpdateRegs(state, EP4, EP5);
433 if (status < 0)
434 break;
435
436 status = CalcCalPLL(state, freq);
437 if (status < 0)
438 break;
439 status = CalcMainPLL(state, freq + 1000000);
440 if (status < 0)
441 break;
442
443 msleep(5);
444 status = UpdateReg(state, EP2);
445 if (status < 0)
446 break;
447 status = UpdateReg(state, EP1);
448 if (status < 0)
449 break;
450 status = UpdateReg(state, EP2);
451 if (status < 0)
452 break;
453 status = UpdateReg(state, EP1);
454 if (status < 0)
455 break;
456
457 state->m_Regs[EB4] &= ~0x20;
458 status = UpdateReg(state, EB4);
459 if (status < 0)
460 break;
461
462 state->m_Regs[EB7] &= ~0x20;
463 status = UpdateReg(state, EB7);
464 if (status < 0)
465 break;
466 msleep(10);
467
468 state->m_Regs[EB20] |= 0x20;
469 status = UpdateReg(state, EB20);
470 if (status < 0)
471 break;
472 msleep(60);
473
474 state->m_Regs[EP4] &= ~0x03;
475 state->m_Regs[EP3] &= ~0x40;
476 state->m_Regs[EB18] &= ~0x03;
477 status = UpdateReg(state, EB18);
478 if (status < 0)
479 break;
480 status = UpdateRegs(state, EP3, EP4);
481 if (status < 0)
482 break;
483 status = UpdateReg(state, EP1);
484 if (status < 0)
485 break;
486
487 status = ReadExtented(state, Regs);
488 if (status < 0)
489 break;
490
491 *pCprog = Regs[EB14];
492
493 } while (0);
494 return status;
495}
496
497static int RFTrackingFiltersInit(struct tda_state *state,
498 u8 RFBand)
499{
500 int status = 0;
501
502 u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default;
503 u32 RF2 = m_RF_Band_Map[RFBand].m_RF2_Default;
504 u32 RF3 = m_RF_Band_Map[RFBand].m_RF3_Default;
505 bool bcal = false;
506
507 s32 Cprog_cal1 = 0;
508 s32 Cprog_table1 = 0;
509 s32 Cprog_cal2 = 0;
510 s32 Cprog_table2 = 0;
511 s32 Cprog_cal3 = 0;
512 s32 Cprog_table3 = 0;
513
514 state->m_RF_A1[RFBand] = 0;
515 state->m_RF_B1[RFBand] = 0;
516 state->m_RF_A2[RFBand] = 0;
517 state->m_RF_B2[RFBand] = 0;
518
519 do {
520 status = PowerScan(state, RFBand, RF1, &RF1, &bcal);
521 if (status < 0)
522 break;
523 if (bcal) {
524 status = CalibrateRF(state, RFBand, RF1, &Cprog_cal1);
525 if (status < 0)
526 break;
527 }
528 SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1);
529 if (!bcal)
530 Cprog_cal1 = Cprog_table1;
531 state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1;
532
533
534 if (RF2 == 0)
535 break;
536
537 status = PowerScan(state, RFBand, RF2, &RF2, &bcal);
538 if (status < 0)
539 break;
540 if (bcal) {
541 status = CalibrateRF(state, RFBand, RF2, &Cprog_cal2);
542 if (status < 0)
543 break;
544 }
545 SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2);
546 if (!bcal)
547 Cprog_cal2 = Cprog_table2;
548
549 state->m_RF_A1[RFBand] =
550 (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) /
551 ((s32)(RF2) - (s32)(RF1));
552
553 if (RF3 == 0)
554 break;
555
556 status = PowerScan(state, RFBand, RF3, &RF3, &bcal);
557 if (status < 0)
558 break;
559 if (bcal) {
560 status = CalibrateRF(state, RFBand, RF3, &Cprog_cal3);
561 if (status < 0)
562 break;
563 }
564 SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3);
565 if (!bcal)
566 Cprog_cal3 = Cprog_table3;
567 state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2));
568 state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2;
569
570 } while (0);
571
572 state->m_RF1[RFBand] = RF1;
573 state->m_RF2[RFBand] = RF2;
574 state->m_RF3[RFBand] = RF3;
575
576#if 0
577 printk(KERN_ERR "tda18271c2dd: %s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__,
578 RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2,
579 state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3);
580#endif
581
582 return status;
583}
584
585static int PowerScan(struct tda_state *state,
586 u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal)
587{
588 int status = 0;
589 do {
590 u8 Gain_Taper = 0;
591 s32 RFC_Cprog = 0;
592 u8 CID_Target = 0;
593 u8 CountLimit = 0;
594 u32 freq_MainPLL;
595 u8 Regs[NUM_REGS];
596 u8 CID_Gain;
597 s32 Count = 0;
598 int sign = 1;
599 bool wait = false;
600
601 if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) &&
602 SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) &&
603 SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) {
604
605 printk(KERN_ERR "tda18271c2dd: %s Search map failed\n", __func__);
606 return -EINVAL;
607 }
608
609 state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper;
610 state->m_Regs[EB14] = (RFC_Cprog);
611 status = UpdateReg(state, EP2);
612 if (status < 0)
613 break;
614 status = UpdateReg(state, EB14);
615 if (status < 0)
616 break;
617
618 freq_MainPLL = RF_in + 1000000;
619 status = CalcMainPLL(state, freq_MainPLL);
620 if (status < 0)
621 break;
622 msleep(5);
623 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1;
624 status = UpdateReg(state, EP4);
625 if (status < 0)
626 break;
627 status = UpdateReg(state, EP2);
628 if (status < 0)
629 break;
630 status = ReadExtented(state, Regs);
631 if (status < 0)
632 break;
633 CID_Gain = Regs[EB10] & 0x3F;
634 state->m_Regs[ID] = Regs[ID];
635
636 *pRF_Out = RF_in;
637
638 while (CID_Gain < CID_Target) {
639 freq_MainPLL = RF_in + sign * Count + 1000000;
640 status = CalcMainPLL(state, freq_MainPLL);
641 if (status < 0)
642 break;
643 msleep(wait ? 5 : 1);
644 wait = false;
645 status = UpdateReg(state, EP2);
646 if (status < 0)
647 break;
648 status = ReadExtented(state, Regs);
649 if (status < 0)
650 break;
651 CID_Gain = Regs[EB10] & 0x3F;
652 Count += 200000;
653
654 if (Count < CountLimit * 100000)
655 continue;
656 if (sign < 0)
657 break;
658
659 sign = -sign;
660 Count = 200000;
661 wait = true;
662 }
663 if (status < 0)
664 break;
665 if (CID_Gain >= CID_Target) {
666 *pbcal = true;
667 *pRF_Out = freq_MainPLL - 1000000;
668 } else
669 *pbcal = false;
670 } while (0);
671
672 return status;
673}
674
675static int PowerScanInit(struct tda_state *state)
676{
677 int status = 0;
678 do {
679 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12;
680 state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F);
681 status = UpdateRegs(state, EP3, EP4);
682 if (status < 0)
683 break;
684 state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03);
685 status = UpdateReg(state, EB18);
686 if (status < 0)
687 break;
688 state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03);
689 state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06);
690 status = UpdateRegs(state, EB21, EB23);
691 if (status < 0)
692 break;
693 } while (0);
694 return status;
695}
696
697static int CalcRFFilterCurve(struct tda_state *state)
698{
699 int status = 0;
700 do {
701 msleep(200);
702 status = PowerScanInit(state);
703 if (status < 0)
704 break;
705 status = RFTrackingFiltersInit(state, 0);
706 if (status < 0)
707 break;
708 status = RFTrackingFiltersInit(state, 1);
709 if (status < 0)
710 break;
711 status = RFTrackingFiltersInit(state, 2);
712 if (status < 0)
713 break;
714 status = RFTrackingFiltersInit(state, 3);
715 if (status < 0)
716 break;
717 status = RFTrackingFiltersInit(state, 4);
718 if (status < 0)
719 break;
720 status = RFTrackingFiltersInit(state, 5);
721 if (status < 0)
722 break;
723 status = RFTrackingFiltersInit(state, 6);
724 if (status < 0)
725 break;
726 status = ThermometerRead(state, &state->m_TMValue_RFCal);
727 if (status < 0)
728 break;
729 } while (0);
730
731 return status;
732}
733
734static int FixedContentsI2CUpdate(struct tda_state *state)
735{
736 static u8 InitRegs[] = {
737 0x08, 0x80, 0xC6,
738 0xDF, 0x16, 0x60, 0x80,
739 0x80, 0x00, 0x00, 0x00,
740 0x00, 0x00, 0x00, 0x00,
741 0xFC, 0x01, 0x84, 0x41,
742 0x01, 0x84, 0x40, 0x07,
743 0x00, 0x00, 0x96, 0x3F,
744 0xC1, 0x00, 0x8F, 0x00,
745 0x00, 0x8C, 0x00, 0x20,
746 0xB3, 0x48, 0xB0,
747 };
748 int status = 0;
749 memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1);
750 do {
751 status = UpdateRegs(state, TM, EB23);
752 if (status < 0)
753 break;
754
755
756 state->m_Regs[EB17] = 0x00;
757 status = UpdateReg(state, EB17);
758 if (status < 0)
759 break;
760 state->m_Regs[EB17] = 0x03;
761 status = UpdateReg(state, EB17);
762 if (status < 0)
763 break;
764 state->m_Regs[EB17] = 0x43;
765 status = UpdateReg(state, EB17);
766 if (status < 0)
767 break;
768 state->m_Regs[EB17] = 0x4C;
769 status = UpdateReg(state, EB17);
770 if (status < 0)
771 break;
772
773
774 state->m_Regs[EP3] = 0x1F;
775 state->m_Regs[EP4] = 0x66;
776 state->m_Regs[EP5] = 0x81;
777 state->m_Regs[CPD] = 0xCC;
778 state->m_Regs[CD1] = 0x6C;
779 state->m_Regs[CD2] = 0x00;
780 state->m_Regs[CD3] = 0x00;
781 state->m_Regs[MPD] = 0xC5;
782 state->m_Regs[MD1] = 0x77;
783 state->m_Regs[MD2] = 0x08;
784 state->m_Regs[MD3] = 0x00;
785 status = UpdateRegs(state, EP2, MD3);
786 if (status < 0)
787 break;
788
789#if 0
790 state->m_Regs[EB4] = 0x61;
791 status = UpdateReg(state, EB4);
792 if (status < 0)
793 break;
794 msleep(1);
795 state->m_Regs[EB4] = 0x41;
796 status = UpdateReg(state, EB4);
797 if (status < 0)
798 break;
799#endif
800
801 msleep(5);
802 status = UpdateReg(state, EP1);
803 if (status < 0)
804 break;
805 msleep(5);
806
807 state->m_Regs[EP5] = 0x85;
808 state->m_Regs[CPD] = 0xCB;
809 state->m_Regs[CD1] = 0x66;
810 state->m_Regs[CD2] = 0x70;
811 status = UpdateRegs(state, EP3, CD3);
812 if (status < 0)
813 break;
814 msleep(5);
815 status = UpdateReg(state, EP2);
816 if (status < 0)
817 break;
818 msleep(30);
819
820
821 state->m_Regs[EP5] = 0x82;
822 state->m_Regs[CPD] = 0xA8;
823 state->m_Regs[CD2] = 0x00;
824 state->m_Regs[MPD] = 0xA1;
825 state->m_Regs[MD1] = 0x73;
826 state->m_Regs[MD2] = 0x1A;
827 status = UpdateRegs(state, EP3, MD3);
828 if (status < 0)
829 break;
830
831 msleep(5);
832 status = UpdateReg(state, EP1);
833 if (status < 0)
834 break;
835 msleep(5);
836
837 state->m_Regs[EP5] = 0x86;
838 state->m_Regs[CPD] = 0xA8;
839 state->m_Regs[CD1] = 0x66;
840 state->m_Regs[CD2] = 0xA0;
841 status = UpdateRegs(state, EP3, CD3);
842 if (status < 0)
843 break;
844 msleep(5);
845 status = UpdateReg(state, EP2);
846 if (status < 0)
847 break;
848 msleep(30);
849
850
851 state->m_Regs[EP5] = 0x83;
852 state->m_Regs[CPD] = 0x98;
853 state->m_Regs[CD1] = 0x65;
854 state->m_Regs[CD2] = 0x00;
855 state->m_Regs[MPD] = 0x91;
856 state->m_Regs[MD1] = 0x71;
857 state->m_Regs[MD2] = 0xCD;
858 status = UpdateRegs(state, EP3, MD3);
859 if (status < 0)
860 break;
861 msleep(5);
862 status = UpdateReg(state, EP1);
863 if (status < 0)
864 break;
865 msleep(5);
866 state->m_Regs[EP5] = 0x87;
867 state->m_Regs[CD1] = 0x65;
868 state->m_Regs[CD2] = 0x50;
869 status = UpdateRegs(state, EP3, CD3);
870 if (status < 0)
871 break;
872 msleep(5);
873 status = UpdateReg(state, EP2);
874 if (status < 0)
875 break;
876 msleep(30);
877
878
879 state->m_Regs[EP4] = 0x64;
880 status = UpdateReg(state, EP4);
881 if (status < 0)
882 break;
883 status = UpdateReg(state, EP1);
884 if (status < 0)
885 break;
886
887 } while (0);
888 return status;
889}
890
891static int InitCal(struct tda_state *state)
892{
893 int status = 0;
894
895 do {
896 status = FixedContentsI2CUpdate(state);
897 if (status < 0)
898 break;
899 status = CalcRFFilterCurve(state);
900 if (status < 0)
901 break;
902 status = StandBy(state);
903 if (status < 0)
904 break;
905
906 } while (0);
907 return status;
908};
909
910static int RFTrackingFiltersCorrection(struct tda_state *state,
911 u32 Frequency)
912{
913 int status = 0;
914 s32 Cprog_table;
915 u8 RFBand;
916 u8 dCoverdT;
917
918 if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) ||
919 !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) ||
920 !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT))
921
922 return -EINVAL;
923
924 do {
925 u8 TMValue_Current;
926 u32 RF1 = state->m_RF1[RFBand];
927 u32 RF2 = state->m_RF1[RFBand];
928 u32 RF3 = state->m_RF1[RFBand];
929 s32 RF_A1 = state->m_RF_A1[RFBand];
930 s32 RF_B1 = state->m_RF_B1[RFBand];
931 s32 RF_A2 = state->m_RF_A2[RFBand];
932 s32 RF_B2 = state->m_RF_B2[RFBand];
933 s32 Capprox = 0;
934 int TComp;
935
936 state->m_Regs[EP3] &= ~0xE0;
937 status = UpdateReg(state, EP3);
938 if (status < 0)
939 break;
940
941 status = ThermometerRead(state, &TMValue_Current);
942 if (status < 0)
943 break;
944
945 if (RF3 == 0 || Frequency < RF2)
946 Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table;
947 else
948 Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table;
949
950 TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000;
951
952 Capprox += TComp;
953
954 if (Capprox < 0)
955 Capprox = 0;
956 else if (Capprox > 255)
957 Capprox = 255;
958
959
960
961
962 state->m_Regs[EB14] = Capprox;
963
964 status = UpdateReg(state, EB14);
965 if (status < 0)
966 break;
967
968 } while (0);
969 return status;
970}
971
972static int ChannelConfiguration(struct tda_state *state,
973 u32 Frequency, int Standard)
974{
975
976 s32 IntermediateFrequency = m_StandardTable[Standard].m_IFFrequency;
977 int status = 0;
978
979 u8 BP_Filter = 0;
980 u8 RF_Band = 0;
981 u8 GainTaper = 0;
982 u8 IR_Meas = 0;
983
984 state->IF = IntermediateFrequency;
985
986
987
988 if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) &&
989 SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) &&
990 SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) &&
991 SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) {
992
993 printk(KERN_ERR "tda18271c2dd: %s SearchMap failed\n", __func__);
994 return -EINVAL;
995 }
996
997 do {
998 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0;
999 state->m_Regs[EP3] &= ~0x04;
1000
1001
1002 state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog);
1003
1004 if (Standard <= HF_AnalogMax)
1005 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog;
1006 else if (Standard <= HF_ATSC)
1007 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT;
1008 else if (Standard <= HF_DVBC)
1009 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC;
1010 else
1011 state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital;
1012
1013 if ((Standard == HF_FM_Radio) && state->m_bFMInput)
1014 state->m_Regs[EP4] |= 0x80;
1015
1016 state->m_Regs[MPD] &= ~0x80;
1017 if (Standard > HF_AnalogMax)
1018 state->m_Regs[MPD] |= 0x80;
1019
1020 state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22;
1021
1022
1023 if (Standard == HF_FM_Radio)
1024 state->m_Regs[EB23] |= 0x06;
1025 else
1026 state->m_Regs[EB23] &= ~0x06;
1027
1028 status = UpdateRegs(state, EB22, EB23);
1029 if (status < 0)
1030 break;
1031
1032 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter;
1033 state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas;
1034 state->m_Regs[EP2] = (RF_Band << 5) | GainTaper;
1035
1036 state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) |
1037 (state->m_bMaster ? 0x04 : 0x00);
1038
1039
1040 status = UpdateReg(state, EB1);
1041 if (status < 0)
1042 break;
1043
1044 if (state->m_bMaster) {
1045 status = CalcMainPLL(state, Frequency + IntermediateFrequency);
1046 if (status < 0)
1047 break;
1048 status = UpdateRegs(state, TM, EP5);
1049 if (status < 0)
1050 break;
1051 state->m_Regs[EB4] |= 0x20;
1052 status = UpdateReg(state, EB4);
1053 if (status < 0)
1054 break;
1055 msleep(1);
1056 state->m_Regs[EB4] &= ~0x20;
1057 status = UpdateReg(state, EB4);
1058 if (status < 0)
1059 break;
1060 } else {
1061 u8 PostDiv = 0;
1062 u8 Div;
1063 status = CalcCalPLL(state, Frequency + IntermediateFrequency);
1064 if (status < 0)
1065 break;
1066
1067 SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div);
1068 state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77);
1069 status = UpdateReg(state, MPD);
1070 if (status < 0)
1071 break;
1072 status = UpdateRegs(state, TM, EP5);
1073 if (status < 0)
1074 break;
1075
1076 state->m_Regs[EB7] |= 0x20;
1077 status = UpdateReg(state, EB7);
1078 if (status < 0)
1079 break;
1080 msleep(1);
1081 state->m_Regs[EB7] &= ~0x20;
1082 status = UpdateReg(state, EB7);
1083 if (status < 0)
1084 break;
1085 }
1086 msleep(20);
1087 if (Standard != HF_FM_Radio)
1088 state->m_Regs[EP3] |= 0x04;
1089 status = UpdateReg(state, EP3);
1090 if (status < 0)
1091 break;
1092
1093 } while (0);
1094 return status;
1095}
1096
1097static int sleep(struct dvb_frontend *fe)
1098{
1099 struct tda_state *state = fe->tuner_priv;
1100
1101 StandBy(state);
1102 return 0;
1103}
1104
1105static int init(struct dvb_frontend *fe)
1106{
1107 return 0;
1108}
1109
1110static void release(struct dvb_frontend *fe)
1111{
1112 kfree(fe->tuner_priv);
1113 fe->tuner_priv = NULL;
1114}
1115
1116
1117static int set_params(struct dvb_frontend *fe)
1118{
1119 struct tda_state *state = fe->tuner_priv;
1120 int status = 0;
1121 int Standard;
1122 u32 bw = fe->dtv_property_cache.bandwidth_hz;
1123 u32 delsys = fe->dtv_property_cache.delivery_system;
1124
1125 state->m_Frequency = fe->dtv_property_cache.frequency;
1126
1127 switch (delsys) {
1128 case SYS_DVBT:
1129 case SYS_DVBT2:
1130 switch (bw) {
1131 case 6000000:
1132 Standard = HF_DVBT_6MHZ;
1133 break;
1134 case 7000000:
1135 Standard = HF_DVBT_7MHZ;
1136 break;
1137 case 8000000:
1138 Standard = HF_DVBT_8MHZ;
1139 break;
1140 default:
1141 return -EINVAL;
1142 }
1143 break;
1144 case SYS_DVBC_ANNEX_A:
1145 case SYS_DVBC_ANNEX_C:
1146 if (bw <= 6000000)
1147 Standard = HF_DVBC_6MHZ;
1148 else if (bw <= 7000000)
1149 Standard = HF_DVBC_7MHZ;
1150 else
1151 Standard = HF_DVBC_8MHZ;
1152 break;
1153 default:
1154 return -EINVAL;
1155 }
1156 do {
1157 status = RFTrackingFiltersCorrection(state, state->m_Frequency);
1158 if (status < 0)
1159 break;
1160 status = ChannelConfiguration(state, state->m_Frequency,
1161 Standard);
1162 if (status < 0)
1163 break;
1164
1165 msleep(state->m_SettlingTime);
1166 } while (0);
1167 return status;
1168}
1169
1170#if 0
1171static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc)
1172{
1173 if (IFAgc < 500) {
1174
1175 *pSignalStrength = IFAgc * 100;
1176 } else {
1177
1178 *pSignalStrength = 50000 + (IFAgc - 500) * 30;
1179 }
1180
1181 return 0;
1182}
1183#endif
1184
1185static int get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1186{
1187 struct tda_state *state = fe->tuner_priv;
1188
1189 *frequency = state->IF;
1190 return 0;
1191}
1192
1193static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1194{
1195
1196
1197 return 0;
1198}
1199
1200
1201static const struct dvb_tuner_ops tuner_ops = {
1202 .info = {
1203 .name = "NXP TDA18271C2D",
1204 .frequency_min_hz = 47125 * kHz,
1205 .frequency_max_hz = 865 * MHz,
1206 .frequency_step_hz = 62500
1207 },
1208 .init = init,
1209 .sleep = sleep,
1210 .set_params = set_params,
1211 .release = release,
1212 .get_if_frequency = get_if_frequency,
1213 .get_bandwidth = get_bandwidth,
1214};
1215
1216struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe,
1217 struct i2c_adapter *i2c, u8 adr)
1218{
1219 struct tda_state *state;
1220
1221 state = kzalloc(sizeof(struct tda_state), GFP_KERNEL);
1222 if (!state)
1223 return NULL;
1224
1225 fe->tuner_priv = state;
1226 state->adr = adr;
1227 state->i2c = i2c;
1228 memcpy(&fe->ops.tuner_ops, &tuner_ops, sizeof(struct dvb_tuner_ops));
1229 reset(state);
1230 InitCal(state);
1231
1232 return fe;
1233}
1234EXPORT_SYMBOL_GPL(tda18271c2dd_attach);
1235
1236MODULE_DESCRIPTION("TDA18271C2 driver");
1237MODULE_AUTHOR("DD");
1238MODULE_LICENSE("GPL");
1239
