1
2
3
4
5
6
7#ifndef HINIC_HW_QP_H
8#define HINIC_HW_QP_H
9
10#include <linux/kernel.h>
11#include <linux/types.h>
12#include <linux/sizes.h>
13#include <linux/pci.h>
14#include <linux/skbuff.h>
15
16#include "hinic_common.h"
17#include "hinic_hw_if.h"
18#include "hinic_hw_wqe.h"
19#include "hinic_hw_wq.h"
20#include "hinic_hw_qp_ctxt.h"
21
22#define HINIC_SQ_DB_INFO_PI_HI_SHIFT 0
23#define HINIC_SQ_DB_INFO_QID_SHIFT 8
24#define HINIC_SQ_DB_INFO_PATH_SHIFT 23
25#define HINIC_SQ_DB_INFO_COS_SHIFT 24
26#define HINIC_SQ_DB_INFO_TYPE_SHIFT 27
27
28#define HINIC_SQ_DB_INFO_PI_HI_MASK 0xFF
29#define HINIC_SQ_DB_INFO_QID_MASK 0x3FF
30#define HINIC_SQ_DB_INFO_PATH_MASK 0x1
31#define HINIC_SQ_DB_INFO_COS_MASK 0x7
32#define HINIC_SQ_DB_INFO_TYPE_MASK 0x1F
33
34#define HINIC_SQ_DB_INFO_SET(val, member) \
35 (((u32)(val) & HINIC_SQ_DB_INFO_##member##_MASK) \
36 << HINIC_SQ_DB_INFO_##member##_SHIFT)
37
38#define HINIC_SQ_WQEBB_SIZE 64
39#define HINIC_RQ_WQEBB_SIZE 32
40
41#define HINIC_SQ_PAGE_SIZE SZ_4K
42#define HINIC_RQ_PAGE_SIZE SZ_4K
43
44#define HINIC_SQ_DEPTH SZ_4K
45#define HINIC_RQ_DEPTH SZ_4K
46
47
48#define HINIC_RX_BUF_SZ 2048
49#define HINIC_RX_BUF_SZ_IDX HINIC_RX_BUF_SZ_2048_IDX
50
51#define HINIC_MIN_TX_WQE_SIZE(wq) \
52 ALIGN(HINIC_SQ_WQE_SIZE(1), (wq)->wqebb_size)
53
54#define HINIC_MIN_TX_NUM_WQEBBS(sq) \
55 (HINIC_MIN_TX_WQE_SIZE((sq)->wq) / (sq)->wq->wqebb_size)
56
57enum hinic_rx_buf_sz_idx {
58 HINIC_RX_BUF_SZ_32_IDX,
59 HINIC_RX_BUF_SZ_64_IDX,
60 HINIC_RX_BUF_SZ_96_IDX,
61 HINIC_RX_BUF_SZ_128_IDX,
62 HINIC_RX_BUF_SZ_192_IDX,
63 HINIC_RX_BUF_SZ_256_IDX,
64 HINIC_RX_BUF_SZ_384_IDX,
65 HINIC_RX_BUF_SZ_512_IDX,
66 HINIC_RX_BUF_SZ_768_IDX,
67 HINIC_RX_BUF_SZ_1024_IDX,
68 HINIC_RX_BUF_SZ_1536_IDX,
69 HINIC_RX_BUF_SZ_2048_IDX,
70 HINIC_RX_BUF_SZ_3072_IDX,
71 HINIC_RX_BUF_SZ_4096_IDX,
72 HINIC_RX_BUF_SZ_8192_IDX,
73 HINIC_RX_BUF_SZ_16384_IDX,
74};
75
76struct hinic_sq {
77 struct hinic_hwif *hwif;
78
79 struct hinic_wq *wq;
80
81 u32 irq;
82 u16 msix_entry;
83
84 void *hw_ci_addr;
85 dma_addr_t hw_ci_dma_addr;
86
87 void __iomem *db_base;
88
89 struct sk_buff **saved_skb;
90};
91
92struct hinic_rq {
93 struct hinic_hwif *hwif;
94
95 struct hinic_wq *wq;
96
97 u32 irq;
98 u16 msix_entry;
99
100 size_t buf_sz;
101
102 struct sk_buff **saved_skb;
103
104 struct hinic_rq_cqe **cqe;
105 dma_addr_t *cqe_dma;
106
107 u16 *pi_virt_addr;
108 dma_addr_t pi_dma_addr;
109};
110
111struct hinic_qp {
112 struct hinic_sq sq;
113 struct hinic_rq rq;
114
115 u16 q_id;
116};
117
118void hinic_qp_prepare_header(struct hinic_qp_ctxt_header *qp_ctxt_hdr,
119 enum hinic_qp_ctxt_type ctxt_type,
120 u16 num_queues, u16 max_queues);
121
122void hinic_sq_prepare_ctxt(struct hinic_sq_ctxt *sq_ctxt,
123 struct hinic_sq *sq, u16 global_qid);
124
125void hinic_rq_prepare_ctxt(struct hinic_rq_ctxt *rq_ctxt,
126 struct hinic_rq *rq, u16 global_qid);
127
128int hinic_init_sq(struct hinic_sq *sq, struct hinic_hwif *hwif,
129 struct hinic_wq *wq, struct msix_entry *entry, void *ci_addr,
130 dma_addr_t ci_dma_addr, void __iomem *db_base);
131
132void hinic_clean_sq(struct hinic_sq *sq);
133
134int hinic_init_rq(struct hinic_rq *rq, struct hinic_hwif *hwif,
135 struct hinic_wq *wq, struct msix_entry *entry);
136
137void hinic_clean_rq(struct hinic_rq *rq);
138
139int hinic_get_sq_free_wqebbs(struct hinic_sq *sq);
140
141int hinic_get_rq_free_wqebbs(struct hinic_rq *rq);
142
143void hinic_task_set_l2hdr(struct hinic_sq_task *task, u32 len);
144
145void hinic_task_set_outter_l3(struct hinic_sq_task *task,
146 enum hinic_l3_offload_type l3_type,
147 u32 network_len);
148
149void hinic_task_set_inner_l3(struct hinic_sq_task *task,
150 enum hinic_l3_offload_type l3_type,
151 u32 network_len);
152
153void hinic_task_set_tunnel_l4(struct hinic_sq_task *task,
154 enum hinic_l4_tunnel_type l4_type,
155 u32 tunnel_len);
156
157void hinic_set_cs_inner_l4(struct hinic_sq_task *task,
158 u32 *queue_info,
159 enum hinic_l4_offload_type l4_offload,
160 u32 l4_len, u32 offset);
161
162void hinic_set_tso_inner_l4(struct hinic_sq_task *task,
163 u32 *queue_info,
164 enum hinic_l4_offload_type l4_offload,
165 u32 l4_len,
166 u32 offset, u32 ip_ident, u32 mss);
167
168void hinic_sq_prepare_wqe(struct hinic_sq *sq, u16 prod_idx,
169 struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
170 int nr_sges);
171
172void hinic_sq_write_db(struct hinic_sq *sq, u16 prod_idx, unsigned int wqe_size,
173 unsigned int cos);
174
175struct hinic_sq_wqe *hinic_sq_get_wqe(struct hinic_sq *sq,
176 unsigned int wqe_size, u16 *prod_idx);
177
178void hinic_sq_return_wqe(struct hinic_sq *sq, unsigned int wqe_size);
179
180void hinic_sq_write_wqe(struct hinic_sq *sq, u16 prod_idx,
181 struct hinic_sq_wqe *wqe, struct sk_buff *skb,
182 unsigned int wqe_size);
183
184struct hinic_sq_wqe *hinic_sq_read_wqe(struct hinic_sq *sq,
185 struct sk_buff **skb,
186 unsigned int wqe_size, u16 *cons_idx);
187
188struct hinic_sq_wqe *hinic_sq_read_wqebb(struct hinic_sq *sq,
189 struct sk_buff **skb,
190 unsigned int *wqe_size, u16 *cons_idx);
191
192void hinic_sq_put_wqe(struct hinic_sq *sq, unsigned int wqe_size);
193
194void hinic_sq_get_sges(struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
195 int nr_sges);
196
197struct hinic_rq_wqe *hinic_rq_get_wqe(struct hinic_rq *rq,
198 unsigned int wqe_size, u16 *prod_idx);
199
200void hinic_rq_write_wqe(struct hinic_rq *rq, u16 prod_idx,
201 struct hinic_rq_wqe *wqe, struct sk_buff *skb);
202
203struct hinic_rq_wqe *hinic_rq_read_wqe(struct hinic_rq *rq,
204 unsigned int wqe_size,
205 struct sk_buff **skb, u16 *cons_idx);
206
207struct hinic_rq_wqe *hinic_rq_read_next_wqe(struct hinic_rq *rq,
208 unsigned int wqe_size,
209 struct sk_buff **skb,
210 u16 *cons_idx);
211
212void hinic_rq_put_wqe(struct hinic_rq *rq, u16 cons_idx,
213 unsigned int wqe_size);
214
215void hinic_rq_get_sge(struct hinic_rq *rq, struct hinic_rq_wqe *wqe,
216 u16 cons_idx, struct hinic_sge *sge);
217
218void hinic_rq_prepare_wqe(struct hinic_rq *rq, u16 prod_idx,
219 struct hinic_rq_wqe *wqe, struct hinic_sge *sge);
220
221void hinic_rq_update(struct hinic_rq *rq, u16 prod_idx);
222
223#endif
224
