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5#include <linux/export.h>
6#include <linux/phy.h>
7#include <linux/of.h>
8
9const char *phy_speed_to_str(int speed)
10{
11 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 69,
12 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
13 "If a speed or mode has been added please update phy_speed_to_str "
14 "and the PHY settings array.\n");
15
16 switch (speed) {
17 case SPEED_10:
18 return "10Mbps";
19 case SPEED_100:
20 return "100Mbps";
21 case SPEED_1000:
22 return "1Gbps";
23 case SPEED_2500:
24 return "2.5Gbps";
25 case SPEED_5000:
26 return "5Gbps";
27 case SPEED_10000:
28 return "10Gbps";
29 case SPEED_14000:
30 return "14Gbps";
31 case SPEED_20000:
32 return "20Gbps";
33 case SPEED_25000:
34 return "25Gbps";
35 case SPEED_40000:
36 return "40Gbps";
37 case SPEED_50000:
38 return "50Gbps";
39 case SPEED_56000:
40 return "56Gbps";
41 case SPEED_100000:
42 return "100Gbps";
43 case SPEED_200000:
44 return "200Gbps";
45 case SPEED_UNKNOWN:
46 return "Unknown";
47 default:
48 return "Unsupported (update phy-core.c)";
49 }
50}
51EXPORT_SYMBOL_GPL(phy_speed_to_str);
52
53const char *phy_duplex_to_str(unsigned int duplex)
54{
55 if (duplex == DUPLEX_HALF)
56 return "Half";
57 if (duplex == DUPLEX_FULL)
58 return "Full";
59 if (duplex == DUPLEX_UNKNOWN)
60 return "Unknown";
61 return "Unsupported (update phy-core.c)";
62}
63EXPORT_SYMBOL_GPL(phy_duplex_to_str);
64
65
66
67
68
69#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
70 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
71
72static const struct phy_setting settings[] = {
73
74 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
75 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
76 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
77 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
78 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
79
80 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
81 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
82 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
83 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
84 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
85 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
86 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
87 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
88 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
89
90 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
91 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
92 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
93 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
94
95 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
96 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
97 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
98 PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
99 PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
100 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
101 PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
102 PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
103
104 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
105 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
106 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
107 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
108
109 PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
110 PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
111 PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
112
113 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
114 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
115
116 PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
117 PHY_SETTING( 10000, FULL, 10000baseER_Full ),
118 PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
119 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
120 PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
121 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
122 PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
123 PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
124 PHY_SETTING( 10000, FULL, 10000baseT_Full ),
125
126 PHY_SETTING( 5000, FULL, 5000baseT_Full ),
127
128 PHY_SETTING( 2500, FULL, 2500baseT_Full ),
129 PHY_SETTING( 2500, FULL, 2500baseX_Full ),
130
131 PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
132 PHY_SETTING( 1000, FULL, 1000baseT_Full ),
133 PHY_SETTING( 1000, HALF, 1000baseT_Half ),
134 PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
135 PHY_SETTING( 1000, FULL, 1000baseX_Full ),
136
137 PHY_SETTING( 100, FULL, 100baseT_Full ),
138 PHY_SETTING( 100, FULL, 100baseT1_Full ),
139 PHY_SETTING( 100, HALF, 100baseT_Half ),
140
141 PHY_SETTING( 10, FULL, 10baseT_Full ),
142 PHY_SETTING( 10, HALF, 10baseT_Half ),
143};
144#undef PHY_SETTING
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163const struct phy_setting *
164phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
165{
166 const struct phy_setting *p, *match = NULL, *last = NULL;
167 int i;
168
169 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
170 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
171 test_bit(p->bit, mask)) {
172 last = p;
173 if (p->speed == speed && p->duplex == duplex) {
174
175 match = p;
176 break;
177 } else if (!exact) {
178 if (!match && p->speed <= speed)
179
180 match = p;
181
182 if (p->speed < speed)
183 break;
184 }
185 }
186 }
187
188 if (!match && !exact)
189 match = last;
190
191 return match;
192}
193EXPORT_SYMBOL_GPL(phy_lookup_setting);
194
195size_t phy_speeds(unsigned int *speeds, size_t size,
196 unsigned long *mask)
197{
198 size_t count;
199 int i;
200
201 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
202 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
203 test_bit(settings[i].bit, mask) &&
204 (count == 0 || speeds[count - 1] != settings[i].speed))
205 speeds[count++] = settings[i].speed;
206
207 return count;
208}
209
210static int __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
211{
212 const struct phy_setting *p;
213 int i;
214
215 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
216 if (p->speed > max_speed)
217 linkmode_clear_bit(p->bit, addr);
218 else
219 break;
220 }
221
222 return 0;
223}
224
225static int __set_phy_supported(struct phy_device *phydev, u32 max_speed)
226{
227 return __set_linkmode_max_speed(max_speed, phydev->supported);
228}
229
230int phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
231{
232 int err;
233
234 err = __set_phy_supported(phydev, max_speed);
235 if (err)
236 return err;
237
238 phy_advertise_supported(phydev);
239
240 return 0;
241}
242EXPORT_SYMBOL(phy_set_max_speed);
243
244void of_set_phy_supported(struct phy_device *phydev)
245{
246 struct device_node *node = phydev->mdio.dev.of_node;
247 u32 max_speed;
248
249 if (!IS_ENABLED(CONFIG_OF_MDIO))
250 return;
251
252 if (!node)
253 return;
254
255 if (!of_property_read_u32(node, "max-speed", &max_speed))
256 __set_phy_supported(phydev, max_speed);
257}
258
259void of_set_phy_eee_broken(struct phy_device *phydev)
260{
261 struct device_node *node = phydev->mdio.dev.of_node;
262 u32 broken = 0;
263
264 if (!IS_ENABLED(CONFIG_OF_MDIO))
265 return;
266
267 if (!node)
268 return;
269
270 if (of_property_read_bool(node, "eee-broken-100tx"))
271 broken |= MDIO_EEE_100TX;
272 if (of_property_read_bool(node, "eee-broken-1000t"))
273 broken |= MDIO_EEE_1000T;
274 if (of_property_read_bool(node, "eee-broken-10gt"))
275 broken |= MDIO_EEE_10GT;
276 if (of_property_read_bool(node, "eee-broken-1000kx"))
277 broken |= MDIO_EEE_1000KX;
278 if (of_property_read_bool(node, "eee-broken-10gkx4"))
279 broken |= MDIO_EEE_10GKX4;
280 if (of_property_read_bool(node, "eee-broken-10gkr"))
281 broken |= MDIO_EEE_10GKR;
282
283 phydev->eee_broken_modes = broken;
284}
285
286void phy_resolve_aneg_pause(struct phy_device *phydev)
287{
288 if (phydev->duplex == DUPLEX_FULL) {
289 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
290 phydev->lp_advertising);
291 phydev->asym_pause = linkmode_test_bit(
292 ETHTOOL_LINK_MODE_Asym_Pause_BIT,
293 phydev->lp_advertising);
294 }
295}
296EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
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305
306void phy_resolve_aneg_linkmode(struct phy_device *phydev)
307{
308 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
309 int i;
310
311 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
312
313 for (i = 0; i < ARRAY_SIZE(settings); i++)
314 if (test_bit(settings[i].bit, common)) {
315 phydev->speed = settings[i].speed;
316 phydev->duplex = settings[i].duplex;
317 break;
318 }
319
320 phy_resolve_aneg_pause(phydev);
321}
322EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
323
324static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
325{
326 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
327 int i = ARRAY_SIZE(settings);
328
329 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
330
331 while (--i >= 0) {
332 if (test_bit(settings[i].bit, common)) {
333 if (fdx_only && settings[i].duplex != DUPLEX_FULL)
334 continue;
335 return settings[i].speed;
336 }
337 }
338
339 return SPEED_UNKNOWN;
340}
341
342int phy_speed_down_core(struct phy_device *phydev)
343{
344 int min_common_speed = phy_resolve_min_speed(phydev, true);
345
346 if (min_common_speed == SPEED_UNKNOWN)
347 return -EINVAL;
348
349 return __set_linkmode_max_speed(min_common_speed, phydev->advertising);
350}
351
352static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
353 u16 regnum)
354{
355
356 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
357
358
359 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
360
361
362 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
363 devad | MII_MMD_CTRL_NOINCR);
364}
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375int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
376{
377 int val;
378
379 if (regnum > (u16)~0 || devad > 32)
380 return -EINVAL;
381
382 if (phydev->drv->read_mmd) {
383 val = phydev->drv->read_mmd(phydev, devad, regnum);
384 } else if (phydev->is_c45) {
385 u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
386
387 val = __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr);
388 } else {
389 struct mii_bus *bus = phydev->mdio.bus;
390 int phy_addr = phydev->mdio.addr;
391
392 mmd_phy_indirect(bus, phy_addr, devad, regnum);
393
394
395 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
396 }
397 return val;
398}
399EXPORT_SYMBOL(__phy_read_mmd);
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410int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
411{
412 int ret;
413
414 mutex_lock(&phydev->mdio.bus->mdio_lock);
415 ret = __phy_read_mmd(phydev, devad, regnum);
416 mutex_unlock(&phydev->mdio.bus->mdio_lock);
417
418 return ret;
419}
420EXPORT_SYMBOL(phy_read_mmd);
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431
432int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
433{
434 int ret;
435
436 if (regnum > (u16)~0 || devad > 32)
437 return -EINVAL;
438
439 if (phydev->drv->write_mmd) {
440 ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
441 } else if (phydev->is_c45) {
442 u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
443
444 ret = __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr,
445 addr, val);
446 } else {
447 struct mii_bus *bus = phydev->mdio.bus;
448 int phy_addr = phydev->mdio.addr;
449
450 mmd_phy_indirect(bus, phy_addr, devad, regnum);
451
452
453 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
454
455 ret = 0;
456 }
457 return ret;
458}
459EXPORT_SYMBOL(__phy_write_mmd);
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470
471int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
472{
473 int ret;
474
475 mutex_lock(&phydev->mdio.bus->mdio_lock);
476 ret = __phy_write_mmd(phydev, devad, regnum, val);
477 mutex_unlock(&phydev->mdio.bus->mdio_lock);
478
479 return ret;
480}
481EXPORT_SYMBOL(phy_write_mmd);
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495int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
496 u16 set)
497{
498 int new, ret;
499
500 ret = __phy_read(phydev, regnum);
501 if (ret < 0)
502 return ret;
503
504 new = (ret & ~mask) | set;
505 if (new == ret)
506 return 0;
507
508 ret = __phy_write(phydev, regnum, new);
509
510 return ret < 0 ? ret : 1;
511}
512EXPORT_SYMBOL_GPL(__phy_modify_changed);
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527int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
528{
529 int ret;
530
531 mutex_lock(&phydev->mdio.bus->mdio_lock);
532 ret = __phy_modify_changed(phydev, regnum, mask, set);
533 mutex_unlock(&phydev->mdio.bus->mdio_lock);
534
535 return ret;
536}
537EXPORT_SYMBOL_GPL(phy_modify_changed);
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550int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
551{
552 int ret;
553
554 ret = __phy_modify_changed(phydev, regnum, mask, set);
555
556 return ret < 0 ? ret : 0;
557}
558EXPORT_SYMBOL_GPL(__phy_modify);
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571int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
572{
573 int ret;
574
575 mutex_lock(&phydev->mdio.bus->mdio_lock);
576 ret = __phy_modify(phydev, regnum, mask, set);
577 mutex_unlock(&phydev->mdio.bus->mdio_lock);
578
579 return ret;
580}
581EXPORT_SYMBOL_GPL(phy_modify);
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596int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
597 u16 mask, u16 set)
598{
599 int new, ret;
600
601 ret = __phy_read_mmd(phydev, devad, regnum);
602 if (ret < 0)
603 return ret;
604
605 new = (ret & ~mask) | set;
606 if (new == ret)
607 return 0;
608
609 ret = __phy_write_mmd(phydev, devad, regnum, new);
610
611 return ret < 0 ? ret : 1;
612}
613EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
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629int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
630 u16 mask, u16 set)
631{
632 int ret;
633
634 mutex_lock(&phydev->mdio.bus->mdio_lock);
635 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
636 mutex_unlock(&phydev->mdio.bus->mdio_lock);
637
638 return ret;
639}
640EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
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654int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
655 u16 mask, u16 set)
656{
657 int ret;
658
659 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
660
661 return ret < 0 ? ret : 0;
662}
663EXPORT_SYMBOL_GPL(__phy_modify_mmd);
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677int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
678 u16 mask, u16 set)
679{
680 int ret;
681
682 mutex_lock(&phydev->mdio.bus->mdio_lock);
683 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
684 mutex_unlock(&phydev->mdio.bus->mdio_lock);
685
686 return ret;
687}
688EXPORT_SYMBOL_GPL(phy_modify_mmd);
689
690static int __phy_read_page(struct phy_device *phydev)
691{
692 return phydev->drv->read_page(phydev);
693}
694
695static int __phy_write_page(struct phy_device *phydev, int page)
696{
697 return phydev->drv->write_page(phydev, page);
698}
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708int phy_save_page(struct phy_device *phydev)
709{
710 mutex_lock(&phydev->mdio.bus->mdio_lock);
711 return __phy_read_page(phydev);
712}
713EXPORT_SYMBOL_GPL(phy_save_page);
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726int phy_select_page(struct phy_device *phydev, int page)
727{
728 int ret, oldpage;
729
730 oldpage = ret = phy_save_page(phydev);
731 if (ret < 0)
732 return ret;
733
734 if (oldpage != page) {
735 ret = __phy_write_page(phydev, page);
736 if (ret < 0)
737 return ret;
738 }
739
740 return oldpage;
741}
742EXPORT_SYMBOL_GPL(phy_select_page);
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760int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
761{
762 int r;
763
764 if (oldpage >= 0) {
765 r = __phy_write_page(phydev, oldpage);
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770 if (ret >= 0 && r < 0)
771 ret = r;
772 } else {
773
774 ret = oldpage;
775 }
776
777 mutex_unlock(&phydev->mdio.bus->mdio_lock);
778
779 return ret;
780}
781EXPORT_SYMBOL_GPL(phy_restore_page);
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791int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
792{
793 int ret = 0, oldpage;
794
795 oldpage = phy_select_page(phydev, page);
796 if (oldpage >= 0)
797 ret = __phy_read(phydev, regnum);
798
799 return phy_restore_page(phydev, oldpage, ret);
800}
801EXPORT_SYMBOL(phy_read_paged);
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812int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
813{
814 int ret = 0, oldpage;
815
816 oldpage = phy_select_page(phydev, page);
817 if (oldpage >= 0)
818 ret = __phy_write(phydev, regnum, val);
819
820 return phy_restore_page(phydev, oldpage, ret);
821}
822EXPORT_SYMBOL(phy_write_paged);
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834int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
835 u16 mask, u16 set)
836{
837 int ret = 0, oldpage;
838
839 oldpage = phy_select_page(phydev, page);
840 if (oldpage >= 0)
841 ret = __phy_modify_changed(phydev, regnum, mask, set);
842
843 return phy_restore_page(phydev, oldpage, ret);
844}
845EXPORT_SYMBOL(phy_modify_paged_changed);
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857int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
858 u16 mask, u16 set)
859{
860 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
861
862 return ret < 0 ? ret : 0;
863}
864EXPORT_SYMBOL(phy_modify_paged);
865