linux/include/sound/hdaudio.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * HD-audio core stuff
   4 */
   5
   6#ifndef __SOUND_HDAUDIO_H
   7#define __SOUND_HDAUDIO_H
   8
   9#include <linux/device.h>
  10#include <linux/interrupt.h>
  11#include <linux/pm_runtime.h>
  12#include <linux/timecounter.h>
  13#include <sound/core.h>
  14#include <sound/pcm.h>
  15#include <sound/memalloc.h>
  16#include <sound/hda_verbs.h>
  17#include <drm/i915_component.h>
  18
  19/* codec node id */
  20typedef u16 hda_nid_t;
  21
  22struct hdac_bus;
  23struct hdac_stream;
  24struct hdac_device;
  25struct hdac_driver;
  26struct hdac_widget_tree;
  27struct hda_device_id;
  28
  29/*
  30 * exported bus type
  31 */
  32extern struct bus_type snd_hda_bus_type;
  33
  34/*
  35 * generic arrays
  36 */
  37struct snd_array {
  38        unsigned int used;
  39        unsigned int alloced;
  40        unsigned int elem_size;
  41        unsigned int alloc_align;
  42        void *list;
  43};
  44
  45/*
  46 * HD-audio codec base device
  47 */
  48struct hdac_device {
  49        struct device dev;
  50        int type;
  51        struct hdac_bus *bus;
  52        unsigned int addr;              /* codec address */
  53        struct list_head list;          /* list point for bus codec_list */
  54
  55        hda_nid_t afg;                  /* AFG node id */
  56        hda_nid_t mfg;                  /* MFG node id */
  57
  58        /* ids */
  59        unsigned int vendor_id;
  60        unsigned int subsystem_id;
  61        unsigned int revision_id;
  62        unsigned int afg_function_id;
  63        unsigned int mfg_function_id;
  64        unsigned int afg_unsol:1;
  65        unsigned int mfg_unsol:1;
  66
  67        unsigned int power_caps;        /* FG power caps */
  68
  69        const char *vendor_name;        /* codec vendor name */
  70        const char *chip_name;          /* codec chip name */
  71
  72        /* verb exec op override */
  73        int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
  74                         unsigned int flags, unsigned int *res);
  75
  76        /* widgets */
  77        unsigned int num_nodes;
  78        hda_nid_t start_nid, end_nid;
  79
  80        /* misc flags */
  81        atomic_t in_pm;         /* suspend/resume being performed */
  82
  83        /* sysfs */
  84        struct mutex widget_lock;
  85        struct hdac_widget_tree *widgets;
  86
  87        /* regmap */
  88        struct regmap *regmap;
  89        struct snd_array vendor_verbs;
  90        bool lazy_cache:1;      /* don't wake up for writes */
  91        bool caps_overwriting:1; /* caps overwrite being in process */
  92        bool cache_coef:1;      /* cache COEF read/write too */
  93};
  94
  95/* device/driver type used for matching */
  96enum {
  97        HDA_DEV_CORE,
  98        HDA_DEV_LEGACY,
  99        HDA_DEV_ASOC,
 100};
 101
 102enum {
 103        SND_SKL_PCI_BIND_AUTO,  /* automatic selection based on pci class */
 104        SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */
 105        SND_SKL_PCI_BIND_ASOC   /* bind only with ASoC driver */
 106};
 107
 108/* direction */
 109enum {
 110        HDA_INPUT, HDA_OUTPUT
 111};
 112
 113#define dev_to_hdac_dev(_dev)   container_of(_dev, struct hdac_device, dev)
 114
 115int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
 116                         const char *name, unsigned int addr);
 117void snd_hdac_device_exit(struct hdac_device *dev);
 118int snd_hdac_device_register(struct hdac_device *codec);
 119void snd_hdac_device_unregister(struct hdac_device *codec);
 120int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
 121int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
 122
 123int snd_hdac_refresh_widgets(struct hdac_device *codec);
 124
 125int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
 126                  unsigned int verb, unsigned int parm, unsigned int *res);
 127int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
 128                        unsigned int *res);
 129int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
 130                                int parm);
 131int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
 132                           unsigned int parm, unsigned int val);
 133int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
 134                             hda_nid_t *conn_list, int max_conns);
 135int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
 136                           hda_nid_t *start_id);
 137unsigned int snd_hdac_calc_stream_format(unsigned int rate,
 138                                         unsigned int channels,
 139                                         snd_pcm_format_t format,
 140                                         unsigned int maxbps,
 141                                         unsigned short spdif_ctls);
 142int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
 143                                u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
 144bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
 145                                  unsigned int format);
 146
 147int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
 148                        int flags, unsigned int verb, unsigned int parm);
 149int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
 150                        int flags, unsigned int verb, unsigned int parm);
 151bool snd_hdac_check_power_state(struct hdac_device *hdac,
 152                hda_nid_t nid, unsigned int target_state);
 153unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac,
 154                      hda_nid_t nid, unsigned int target_state);
 155/**
 156 * snd_hdac_read_parm - read a codec parameter
 157 * @codec: the codec object
 158 * @nid: NID to read a parameter
 159 * @parm: parameter to read
 160 *
 161 * Returns -1 for error.  If you need to distinguish the error more
 162 * strictly, use _snd_hdac_read_parm() directly.
 163 */
 164static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
 165                                     int parm)
 166{
 167        unsigned int val;
 168
 169        return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
 170}
 171
 172#ifdef CONFIG_PM
 173int snd_hdac_power_up(struct hdac_device *codec);
 174int snd_hdac_power_down(struct hdac_device *codec);
 175int snd_hdac_power_up_pm(struct hdac_device *codec);
 176int snd_hdac_power_down_pm(struct hdac_device *codec);
 177int snd_hdac_keep_power_up(struct hdac_device *codec);
 178
 179/* call this at entering into suspend/resume callbacks in codec driver */
 180static inline void snd_hdac_enter_pm(struct hdac_device *codec)
 181{
 182        atomic_inc(&codec->in_pm);
 183}
 184
 185/* call this at leaving from suspend/resume callbacks in codec driver */
 186static inline void snd_hdac_leave_pm(struct hdac_device *codec)
 187{
 188        atomic_dec(&codec->in_pm);
 189}
 190
 191static inline bool snd_hdac_is_in_pm(struct hdac_device *codec)
 192{
 193        return atomic_read(&codec->in_pm);
 194}
 195
 196static inline bool snd_hdac_is_power_on(struct hdac_device *codec)
 197{
 198        return !pm_runtime_suspended(&codec->dev);
 199}
 200#else
 201static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
 202static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
 203static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
 204static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
 205static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
 206static inline void snd_hdac_enter_pm(struct hdac_device *codec) {}
 207static inline void snd_hdac_leave_pm(struct hdac_device *codec) {}
 208static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return 0; }
 209static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return 1; }
 210#endif
 211
 212/*
 213 * HD-audio codec base driver
 214 */
 215struct hdac_driver {
 216        struct device_driver driver;
 217        int type;
 218        const struct hda_device_id *id_table;
 219        int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
 220        void (*unsol_event)(struct hdac_device *dev, unsigned int event);
 221
 222        /* fields used by ext bus APIs */
 223        int (*probe)(struct hdac_device *dev);
 224        int (*remove)(struct hdac_device *dev);
 225        void (*shutdown)(struct hdac_device *dev);
 226};
 227
 228#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
 229
 230const struct hda_device_id *
 231hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
 232
 233/*
 234 * Bus verb operators
 235 */
 236struct hdac_bus_ops {
 237        /* send a single command */
 238        int (*command)(struct hdac_bus *bus, unsigned int cmd);
 239        /* get a response from the last command */
 240        int (*get_response)(struct hdac_bus *bus, unsigned int addr,
 241                            unsigned int *res);
 242};
 243
 244/*
 245 * ops used for ASoC HDA codec drivers
 246 */
 247struct hdac_ext_bus_ops {
 248        int (*hdev_attach)(struct hdac_device *hdev);
 249        int (*hdev_detach)(struct hdac_device *hdev);
 250};
 251
 252#define HDA_UNSOL_QUEUE_SIZE    64
 253#define HDA_MAX_CODECS          8       /* limit by controller side */
 254
 255/*
 256 * CORB/RIRB
 257 *
 258 * Each CORB entry is 4byte, RIRB is 8byte
 259 */
 260struct hdac_rb {
 261        __le32 *buf;            /* virtual address of CORB/RIRB buffer */
 262        dma_addr_t addr;        /* physical address of CORB/RIRB buffer */
 263        unsigned short rp, wp;  /* RIRB read/write pointers */
 264        int cmds[HDA_MAX_CODECS];       /* number of pending requests */
 265        u32 res[HDA_MAX_CODECS];        /* last read value */
 266};
 267
 268/*
 269 * HD-audio bus base driver
 270 *
 271 * @ppcap: pp capabilities pointer
 272 * @spbcap: SPIB capabilities pointer
 273 * @mlcap: MultiLink capabilities pointer
 274 * @gtscap: gts capabilities pointer
 275 * @drsmcap: dma resume capabilities pointer
 276 * @num_streams: streams supported
 277 * @idx: HDA link index
 278 * @hlink_list: link list of HDA links
 279 * @lock: lock for link and display power mgmt
 280 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
 281 */
 282struct hdac_bus {
 283        struct device *dev;
 284        const struct hdac_bus_ops *ops;
 285        const struct hdac_ext_bus_ops *ext_ops;
 286
 287        /* h/w resources */
 288        unsigned long addr;
 289        void __iomem *remap_addr;
 290        int irq;
 291
 292        void __iomem *ppcap;
 293        void __iomem *spbcap;
 294        void __iomem *mlcap;
 295        void __iomem *gtscap;
 296        void __iomem *drsmcap;
 297
 298        /* codec linked list */
 299        struct list_head codec_list;
 300        unsigned int num_codecs;
 301
 302        /* link caddr -> codec */
 303        struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
 304
 305        /* unsolicited event queue */
 306        u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
 307        unsigned int unsol_rp, unsol_wp;
 308        struct work_struct unsol_work;
 309
 310        /* bit flags of detected codecs */
 311        unsigned long codec_mask;
 312
 313        /* bit flags of powered codecs */
 314        unsigned long codec_powered;
 315
 316        /* CORB/RIRB */
 317        struct hdac_rb corb;
 318        struct hdac_rb rirb;
 319        unsigned int last_cmd[HDA_MAX_CODECS];  /* last sent command */
 320
 321        /* CORB/RIRB and position buffers */
 322        struct snd_dma_buffer rb;
 323        struct snd_dma_buffer posbuf;
 324        int dma_type;                   /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
 325
 326        /* hdac_stream linked list */
 327        struct list_head stream_list;
 328
 329        /* operation state */
 330        bool chip_init:1;               /* h/w initialized */
 331
 332        /* behavior flags */
 333        bool sync_write:1;              /* sync after verb write */
 334        bool use_posbuf:1;              /* use position buffer */
 335        bool snoop:1;                   /* enable snooping */
 336        bool align_bdle_4k:1;           /* BDLE align 4K boundary */
 337        bool reverse_assign:1;          /* assign devices in reverse order */
 338        bool corbrp_self_clear:1;       /* CORBRP clears itself after reset */
 339        bool polling_mode:1;
 340
 341        int poll_count;
 342
 343        int bdl_pos_adj;                /* BDL position adjustment */
 344
 345        /* locks */
 346        spinlock_t reg_lock;
 347        struct mutex cmd_mutex;
 348        struct mutex lock;
 349
 350        /* DRM component interface */
 351        struct drm_audio_component *audio_component;
 352        long display_power_status;
 353        unsigned long display_power_active;
 354
 355        /* parameters required for enhanced capabilities */
 356        int num_streams;
 357        int idx;
 358
 359        /* link management */
 360        struct list_head hlink_list;
 361        bool cmd_dma_state;
 362};
 363
 364int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
 365                      const struct hdac_bus_ops *ops);
 366void snd_hdac_bus_exit(struct hdac_bus *bus);
 367int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
 368                           unsigned int cmd, unsigned int *res);
 369int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
 370                                    unsigned int cmd, unsigned int *res);
 371void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
 372
 373static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
 374{
 375        set_bit(codec->addr, &codec->bus->codec_powered);
 376}
 377
 378static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
 379{
 380        clear_bit(codec->addr, &codec->bus->codec_powered);
 381}
 382
 383int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
 384int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
 385                              unsigned int *res);
 386int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
 387
 388bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
 389void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
 390void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
 391void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
 392void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
 393void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
 394int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
 395
 396void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
 397int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
 398                                    void (*ack)(struct hdac_bus *,
 399                                                struct hdac_stream *));
 400
 401int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
 402void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
 403
 404#ifdef CONFIG_SND_HDA_ALIGNED_MMIO
 405unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
 406void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
 407                            unsigned int mask);
 408#define snd_hdac_reg_writeb(v, addr)    snd_hdac_aligned_write(v, addr, 0xff)
 409#define snd_hdac_reg_writew(v, addr)    snd_hdac_aligned_write(v, addr, 0xffff)
 410#define snd_hdac_reg_readb(addr)        snd_hdac_aligned_read(addr, 0xff)
 411#define snd_hdac_reg_readw(addr)        snd_hdac_aligned_read(addr, 0xffff)
 412#else /* CONFIG_SND_HDA_ALIGNED_MMIO */
 413#define snd_hdac_reg_writeb(val, addr)  writeb(val, addr)
 414#define snd_hdac_reg_writew(val, addr)  writew(val, addr)
 415#define snd_hdac_reg_readb(addr)        readb(addr)
 416#define snd_hdac_reg_readw(addr)        readw(addr)
 417#endif /* CONFIG_SND_HDA_ALIGNED_MMIO */
 418#define snd_hdac_reg_writel(val, addr)  writel(val, addr)
 419#define snd_hdac_reg_readl(addr)        readl(addr)
 420
 421/*
 422 * macros for easy use
 423 */
 424#define _snd_hdac_chip_writeb(chip, reg, value) \
 425        snd_hdac_reg_writeb(value, (chip)->remap_addr + (reg))
 426#define _snd_hdac_chip_readb(chip, reg) \
 427        snd_hdac_reg_readb((chip)->remap_addr + (reg))
 428#define _snd_hdac_chip_writew(chip, reg, value) \
 429        snd_hdac_reg_writew(value, (chip)->remap_addr + (reg))
 430#define _snd_hdac_chip_readw(chip, reg) \
 431        snd_hdac_reg_readw((chip)->remap_addr + (reg))
 432#define _snd_hdac_chip_writel(chip, reg, value) \
 433        snd_hdac_reg_writel(value, (chip)->remap_addr + (reg))
 434#define _snd_hdac_chip_readl(chip, reg) \
 435        snd_hdac_reg_readl((chip)->remap_addr + (reg))
 436
 437/* read/write a register, pass without AZX_REG_ prefix */
 438#define snd_hdac_chip_writel(chip, reg, value) \
 439        _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
 440#define snd_hdac_chip_writew(chip, reg, value) \
 441        _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
 442#define snd_hdac_chip_writeb(chip, reg, value) \
 443        _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
 444#define snd_hdac_chip_readl(chip, reg) \
 445        _snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
 446#define snd_hdac_chip_readw(chip, reg) \
 447        _snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
 448#define snd_hdac_chip_readb(chip, reg) \
 449        _snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
 450
 451/* update a register, pass without AZX_REG_ prefix */
 452#define snd_hdac_chip_updatel(chip, reg, mask, val) \
 453        snd_hdac_chip_writel(chip, reg, \
 454                             (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
 455#define snd_hdac_chip_updatew(chip, reg, mask, val) \
 456        snd_hdac_chip_writew(chip, reg, \
 457                             (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
 458#define snd_hdac_chip_updateb(chip, reg, mask, val) \
 459        snd_hdac_chip_writeb(chip, reg, \
 460                             (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
 461
 462/*
 463 * HD-audio stream
 464 */
 465struct hdac_stream {
 466        struct hdac_bus *bus;
 467        struct snd_dma_buffer bdl; /* BDL buffer */
 468        __le32 *posbuf;         /* position buffer pointer */
 469        int direction;          /* playback / capture (SNDRV_PCM_STREAM_*) */
 470
 471        unsigned int bufsize;   /* size of the play buffer in bytes */
 472        unsigned int period_bytes; /* size of the period in bytes */
 473        unsigned int frags;     /* number for period in the play buffer */
 474        unsigned int fifo_size; /* FIFO size */
 475
 476        void __iomem *sd_addr;  /* stream descriptor pointer */
 477
 478        u32 sd_int_sta_mask;    /* stream int status mask */
 479
 480        /* pcm support */
 481        struct snd_pcm_substream *substream;    /* assigned substream,
 482                                                 * set in PCM open
 483                                                 */
 484        unsigned int format_val;        /* format value to be set in the
 485                                         * controller and the codec
 486                                         */
 487        unsigned char stream_tag;       /* assigned stream */
 488        unsigned char index;            /* stream index */
 489        int assigned_key;               /* last device# key assigned to */
 490
 491        bool opened:1;
 492        bool running:1;
 493        bool prepared:1;
 494        bool no_period_wakeup:1;
 495        bool locked:1;
 496
 497        /* timestamp */
 498        unsigned long start_wallclk;    /* start + minimum wallclk */
 499        unsigned long period_wallclk;   /* wallclk for period */
 500        struct timecounter  tc;
 501        struct cyclecounter cc;
 502        int delay_negative_threshold;
 503
 504        struct list_head list;
 505#ifdef CONFIG_SND_HDA_DSP_LOADER
 506        /* DSP access mutex */
 507        struct mutex dsp_mutex;
 508#endif
 509};
 510
 511void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
 512                          int idx, int direction, int tag);
 513struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
 514                                           struct snd_pcm_substream *substream);
 515void snd_hdac_stream_release(struct hdac_stream *azx_dev);
 516struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
 517                                        int dir, int stream_tag);
 518
 519int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
 520void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
 521int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
 522int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
 523                                unsigned int format_val);
 524void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
 525void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
 526void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
 527void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
 528void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
 529                                  unsigned int streams, unsigned int reg);
 530void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
 531                          unsigned int streams);
 532void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
 533                                      unsigned int streams);
 534int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
 535                                struct snd_pcm_substream *substream);
 536
 537/*
 538 * macros for easy use
 539 */
 540/* read/write a register, pass without AZX_REG_ prefix */
 541#define snd_hdac_stream_writel(dev, reg, value) \
 542        snd_hdac_reg_writel(value, (dev)->sd_addr + AZX_REG_ ## reg)
 543#define snd_hdac_stream_writew(dev, reg, value) \
 544        snd_hdac_reg_writew(value, (dev)->sd_addr + AZX_REG_ ## reg)
 545#define snd_hdac_stream_writeb(dev, reg, value) \
 546        snd_hdac_reg_writeb(value, (dev)->sd_addr + AZX_REG_ ## reg)
 547#define snd_hdac_stream_readl(dev, reg) \
 548        snd_hdac_reg_readl((dev)->sd_addr + AZX_REG_ ## reg)
 549#define snd_hdac_stream_readw(dev, reg) \
 550        snd_hdac_reg_readw((dev)->sd_addr + AZX_REG_ ## reg)
 551#define snd_hdac_stream_readb(dev, reg) \
 552        snd_hdac_reg_readb((dev)->sd_addr + AZX_REG_ ## reg)
 553
 554/* update a register, pass without AZX_REG_ prefix */
 555#define snd_hdac_stream_updatel(dev, reg, mask, val) \
 556        snd_hdac_stream_writel(dev, reg, \
 557                               (snd_hdac_stream_readl(dev, reg) & \
 558                                ~(mask)) | (val))
 559#define snd_hdac_stream_updatew(dev, reg, mask, val) \
 560        snd_hdac_stream_writew(dev, reg, \
 561                               (snd_hdac_stream_readw(dev, reg) & \
 562                                ~(mask)) | (val))
 563#define snd_hdac_stream_updateb(dev, reg, mask, val) \
 564        snd_hdac_stream_writeb(dev, reg, \
 565                               (snd_hdac_stream_readb(dev, reg) & \
 566                                ~(mask)) | (val))
 567
 568#ifdef CONFIG_SND_HDA_DSP_LOADER
 569/* DSP lock helpers */
 570#define snd_hdac_dsp_lock_init(dev)     mutex_init(&(dev)->dsp_mutex)
 571#define snd_hdac_dsp_lock(dev)          mutex_lock(&(dev)->dsp_mutex)
 572#define snd_hdac_dsp_unlock(dev)        mutex_unlock(&(dev)->dsp_mutex)
 573#define snd_hdac_stream_is_locked(dev)  ((dev)->locked)
 574/* DSP loader helpers */
 575int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
 576                         unsigned int byte_size, struct snd_dma_buffer *bufp);
 577void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
 578void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
 579                          struct snd_dma_buffer *dmab);
 580#else /* CONFIG_SND_HDA_DSP_LOADER */
 581#define snd_hdac_dsp_lock_init(dev)     do {} while (0)
 582#define snd_hdac_dsp_lock(dev)          do {} while (0)
 583#define snd_hdac_dsp_unlock(dev)        do {} while (0)
 584#define snd_hdac_stream_is_locked(dev)  0
 585
 586static inline int
 587snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
 588                     unsigned int byte_size, struct snd_dma_buffer *bufp)
 589{
 590        return 0;
 591}
 592
 593static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
 594{
 595}
 596
 597static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
 598                                        struct snd_dma_buffer *dmab)
 599{
 600}
 601#endif /* CONFIG_SND_HDA_DSP_LOADER */
 602
 603
 604/*
 605 * generic array helpers
 606 */
 607void *snd_array_new(struct snd_array *array);
 608void snd_array_free(struct snd_array *array);
 609static inline void snd_array_init(struct snd_array *array, unsigned int size,
 610                                  unsigned int align)
 611{
 612        array->elem_size = size;
 613        array->alloc_align = align;
 614}
 615
 616static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
 617{
 618        return array->list + idx * array->elem_size;
 619}
 620
 621static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
 622{
 623        return (unsigned long)(ptr - array->list) / array->elem_size;
 624}
 625
 626/* a helper macro to iterate for each snd_array element */
 627#define snd_array_for_each(array, idx, ptr) \
 628        for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \
 629             (ptr) = snd_array_elem(array, ++(idx)))
 630
 631#endif /* __SOUND_HDAUDIO_H */
 632