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11#include <linux/atomic.h>
12#include <linux/err.h>
13#include <linux/cpu.h>
14#include <linux/cpumask.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18#include <linux/smp.h>
19#include <asm/cdmm.h>
20#include <asm/hazards.h>
21#include <asm/mipsregs.h>
22
23
24#define CDMM_ACSR_DEVTYPE_SHIFT 24
25#define CDMM_ACSR_DEVTYPE (255ul << CDMM_ACSR_DEVTYPE_SHIFT)
26#define CDMM_ACSR_DEVSIZE_SHIFT 16
27#define CDMM_ACSR_DEVSIZE (31ul << CDMM_ACSR_DEVSIZE_SHIFT)
28#define CDMM_ACSR_DEVREV_SHIFT 12
29#define CDMM_ACSR_DEVREV (15ul << CDMM_ACSR_DEVREV_SHIFT)
30#define CDMM_ACSR_UW (1ul << 3)
31#define CDMM_ACSR_UR (1ul << 2)
32#define CDMM_ACSR_SW (1ul << 1)
33#define CDMM_ACSR_SR (1ul << 0)
34
35
36#define CDMM_DRB_SIZE 64
37
38#define to_mips_cdmm_driver(d) container_of(d, struct mips_cdmm_driver, drv)
39
40
41static phys_addr_t mips_cdmm_default_base;
42
43
44
45static const struct mips_cdmm_device_id *
46mips_cdmm_lookup(const struct mips_cdmm_device_id *table,
47 struct mips_cdmm_device *dev)
48{
49 int ret = 0;
50
51 for (; table->type; ++table) {
52 ret = (dev->type == table->type);
53 if (ret)
54 break;
55 }
56
57 return ret ? table : NULL;
58}
59
60static int mips_cdmm_match(struct device *dev, struct device_driver *drv)
61{
62 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
63 struct mips_cdmm_driver *cdrv = to_mips_cdmm_driver(drv);
64
65 return mips_cdmm_lookup(cdrv->id_table, cdev) != NULL;
66}
67
68static int mips_cdmm_uevent(struct device *dev, struct kobj_uevent_env *env)
69{
70 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
71 int retval = 0;
72
73 retval = add_uevent_var(env, "CDMM_CPU=%u", cdev->cpu);
74 if (retval)
75 return retval;
76
77 retval = add_uevent_var(env, "CDMM_TYPE=0x%02x", cdev->type);
78 if (retval)
79 return retval;
80
81 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev);
82 if (retval)
83 return retval;
84
85 retval = add_uevent_var(env, "MODALIAS=mipscdmm:t%02X", cdev->type);
86 return retval;
87}
88
89
90
91#define CDMM_ATTR(name, fmt, arg...) \
92static ssize_t name##_show(struct device *_dev, \
93 struct device_attribute *attr, char *buf) \
94{ \
95 struct mips_cdmm_device *dev = to_mips_cdmm_device(_dev); \
96 return sprintf(buf, fmt, arg); \
97} \
98static DEVICE_ATTR_RO(name);
99
100CDMM_ATTR(cpu, "%u\n", dev->cpu);
101CDMM_ATTR(type, "0x%02x\n", dev->type);
102CDMM_ATTR(revision, "%u\n", dev->rev);
103CDMM_ATTR(modalias, "mipscdmm:t%02X\n", dev->type);
104CDMM_ATTR(resource, "\t%016llx\t%016llx\t%016lx\n",
105 (unsigned long long)dev->res.start,
106 (unsigned long long)dev->res.end,
107 dev->res.flags);
108
109static struct attribute *mips_cdmm_dev_attrs[] = {
110 &dev_attr_cpu.attr,
111 &dev_attr_type.attr,
112 &dev_attr_revision.attr,
113 &dev_attr_modalias.attr,
114 &dev_attr_resource.attr,
115 NULL,
116};
117ATTRIBUTE_GROUPS(mips_cdmm_dev);
118
119struct bus_type mips_cdmm_bustype = {
120 .name = "cdmm",
121 .dev_groups = mips_cdmm_dev_groups,
122 .match = mips_cdmm_match,
123 .uevent = mips_cdmm_uevent,
124};
125EXPORT_SYMBOL_GPL(mips_cdmm_bustype);
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142struct mips_cdmm_work_dev {
143 void *fn;
144 struct mips_cdmm_device *dev;
145};
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154static long mips_cdmm_void_work(void *data)
155{
156 struct mips_cdmm_work_dev *work = data;
157 void (*fn)(struct mips_cdmm_device *) = work->fn;
158
159 fn(work->dev);
160 return 0;
161}
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169
170static long mips_cdmm_int_work(void *data)
171{
172 struct mips_cdmm_work_dev *work = data;
173 int (*fn)(struct mips_cdmm_device *) = work->fn;
174
175 return fn(work->dev);
176}
177
178#define _BUILD_RET_void
179#define _BUILD_RET_int return
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189
190#define BUILD_PERCPU_HELPER(_ret, _name) \
191static _ret mips_cdmm_##_name(struct device *dev) \
192{ \
193 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev); \
194 struct mips_cdmm_driver *cdrv = to_mips_cdmm_driver(dev->driver); \
195 struct mips_cdmm_work_dev work = { \
196 .fn = cdrv->_name, \
197 .dev = cdev, \
198 }; \
199 \
200 _BUILD_RET_##_ret work_on_cpu(cdev->cpu, \
201 mips_cdmm_##_ret##_work, &work); \
202}
203
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205BUILD_PERCPU_HELPER(int, probe)
206BUILD_PERCPU_HELPER(int, remove)
207BUILD_PERCPU_HELPER(void, shutdown)
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221int mips_cdmm_driver_register(struct mips_cdmm_driver *drv)
222{
223 drv->drv.bus = &mips_cdmm_bustype;
224
225 if (drv->probe)
226 drv->drv.probe = mips_cdmm_probe;
227 if (drv->remove)
228 drv->drv.remove = mips_cdmm_remove;
229 if (drv->shutdown)
230 drv->drv.shutdown = mips_cdmm_shutdown;
231
232 return driver_register(&drv->drv);
233}
234EXPORT_SYMBOL_GPL(mips_cdmm_driver_register);
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242void mips_cdmm_driver_unregister(struct mips_cdmm_driver *drv)
243{
244 driver_unregister(&drv->drv);
245}
246EXPORT_SYMBOL_GPL(mips_cdmm_driver_unregister);
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262struct mips_cdmm_bus {
263 phys_addr_t phys;
264 void __iomem *regs;
265 unsigned int drbs;
266 unsigned int drbs_reserved;
267 bool discovered;
268 bool offline;
269};
270
271static struct mips_cdmm_bus mips_cdmm_boot_bus;
272static DEFINE_PER_CPU(struct mips_cdmm_bus *, mips_cdmm_buses);
273static atomic_t mips_cdmm_next_id = ATOMIC_INIT(-1);
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287static struct mips_cdmm_bus *mips_cdmm_get_bus(void)
288{
289 struct mips_cdmm_bus *bus, **bus_p;
290 unsigned long flags;
291 unsigned int cpu;
292
293 if (!cpu_has_cdmm)
294 return ERR_PTR(-ENODEV);
295
296 cpu = smp_processor_id();
297
298 if (cpu == 0)
299 return &mips_cdmm_boot_bus;
300
301
302 bus_p = per_cpu_ptr(&mips_cdmm_buses, cpu);
303 local_irq_save(flags);
304 bus = *bus_p;
305
306 if (unlikely(!bus)) {
307 bus = kzalloc(sizeof(*bus), GFP_ATOMIC);
308 if (unlikely(!bus))
309 bus = ERR_PTR(-ENOMEM);
310 else
311 *bus_p = bus;
312 }
313 local_irq_restore(flags);
314 return bus;
315}
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323static phys_addr_t mips_cdmm_cur_base(void)
324{
325 unsigned long cdmmbase = read_c0_cdmmbase();
326
327 if (!(cdmmbase & MIPS_CDMMBASE_EN))
328 return 0;
329
330 return (cdmmbase >> MIPS_CDMMBASE_ADDR_SHIFT)
331 << MIPS_CDMMBASE_ADDR_START;
332}
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341phys_addr_t __weak mips_cdmm_phys_base(void)
342{
343 return 0;
344}
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356static int mips_cdmm_setup(struct mips_cdmm_bus *bus)
357{
358 unsigned long cdmmbase, flags;
359 int ret = 0;
360
361 if (IS_ERR(bus))
362 return PTR_ERR(bus);
363
364 local_irq_save(flags);
365
366 if (bus->offline) {
367
368 if (bus->phys == mips_cdmm_cur_base())
369 goto out;
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374 bus->offline = false;
375 } else if (bus->phys > 1) {
376 goto out;
377 }
378
379
380 if (!bus->phys)
381 bus->phys = mips_cdmm_cur_base();
382
383 if (!bus->phys)
384 bus->phys = mips_cdmm_phys_base();
385
386 if (!bus->phys)
387 bus->phys = mips_cdmm_default_base;
388
389 if (!bus->phys) {
390 bus->phys = 1;
391
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395
396 pr_err("cdmm%u: Failed to choose a physical base\n",
397 smp_processor_id());
398 }
399
400 if (bus->phys == 1) {
401 ret = -ENOMEM;
402 goto out;
403 }
404
405 mips_cdmm_default_base = bus->phys;
406
407 pr_debug("cdmm%u: Enabling CDMM region at %pa\n",
408 smp_processor_id(), &bus->phys);
409
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411 cdmmbase = read_c0_cdmmbase();
412 cdmmbase &= (1ul << MIPS_CDMMBASE_ADDR_SHIFT) - 1;
413 cdmmbase |= (bus->phys >> MIPS_CDMMBASE_ADDR_START)
414 << MIPS_CDMMBASE_ADDR_SHIFT;
415 cdmmbase |= MIPS_CDMMBASE_EN;
416 write_c0_cdmmbase(cdmmbase);
417 tlbw_use_hazard();
418
419 bus->regs = (void __iomem *)CKSEG1ADDR(bus->phys);
420 bus->drbs = 1 + ((cdmmbase & MIPS_CDMMBASE_SIZE) >>
421 MIPS_CDMMBASE_SIZE_SHIFT);
422 bus->drbs_reserved = !!(cdmmbase & MIPS_CDMMBASE_CI);
423
424out:
425 local_irq_restore(flags);
426 return ret;
427}
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446void __iomem *mips_cdmm_early_probe(unsigned int dev_type)
447{
448 struct mips_cdmm_bus *bus;
449 void __iomem *cdmm;
450 u32 acsr;
451 unsigned int drb, type, size;
452 int err;
453
454 if (WARN_ON(!dev_type))
455 return IOMEM_ERR_PTR(-ENODEV);
456
457 bus = mips_cdmm_get_bus();
458 err = mips_cdmm_setup(bus);
459 if (err)
460 return IOMEM_ERR_PTR(err);
461
462
463 drb = bus->drbs_reserved;
464 cdmm = bus->regs;
465
466
467 for (; drb < bus->drbs; drb += size + 1) {
468 acsr = __raw_readl(cdmm + drb * CDMM_DRB_SIZE);
469 type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
470 if (type == dev_type)
471 return cdmm + drb * CDMM_DRB_SIZE;
472 size = (acsr & CDMM_ACSR_DEVSIZE) >> CDMM_ACSR_DEVSIZE_SHIFT;
473 }
474
475 return IOMEM_ERR_PTR(-ENODEV);
476}
477EXPORT_SYMBOL_GPL(mips_cdmm_early_probe);
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486static void mips_cdmm_release(struct device *dev)
487{
488 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev);
489
490 kfree(cdev);
491}
492
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496
497static void mips_cdmm_bus_discover(struct mips_cdmm_bus *bus)
498{
499 void __iomem *cdmm;
500 u32 acsr;
501 unsigned int drb, type, size, rev;
502 struct mips_cdmm_device *dev;
503 unsigned int cpu = smp_processor_id();
504 int ret = 0;
505 int id = 0;
506
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508 drb = bus->drbs_reserved;
509 cdmm = bus->regs;
510
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512 bus->discovered = true;
513 pr_info("cdmm%u discovery (%u blocks)\n", cpu, bus->drbs);
514 for (; drb < bus->drbs; drb += size + 1) {
515 acsr = __raw_readl(cdmm + drb * CDMM_DRB_SIZE);
516 type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
517 size = (acsr & CDMM_ACSR_DEVSIZE) >> CDMM_ACSR_DEVSIZE_SHIFT;
518 rev = (acsr & CDMM_ACSR_DEVREV) >> CDMM_ACSR_DEVREV_SHIFT;
519
520 if (!type)
521 continue;
522
523 pr_info("cdmm%u-%u: @%u (%#x..%#x), type 0x%02x, rev %u\n",
524 cpu, id, drb, drb * CDMM_DRB_SIZE,
525 (drb + size + 1) * CDMM_DRB_SIZE - 1,
526 type, rev);
527
528 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
529 if (!dev)
530 break;
531
532 dev->cpu = cpu;
533 dev->res.start = bus->phys + drb * CDMM_DRB_SIZE;
534 dev->res.end = bus->phys +
535 (drb + size + 1) * CDMM_DRB_SIZE - 1;
536 dev->res.flags = IORESOURCE_MEM;
537 dev->type = type;
538 dev->rev = rev;
539 dev->dev.parent = get_cpu_device(cpu);
540 dev->dev.bus = &mips_cdmm_bustype;
541 dev->dev.id = atomic_inc_return(&mips_cdmm_next_id);
542 dev->dev.release = mips_cdmm_release;
543
544 dev_set_name(&dev->dev, "cdmm%u-%u", cpu, id);
545 ++id;
546 ret = device_register(&dev->dev);
547 if (ret) {
548 put_device(&dev->dev);
549 kfree(dev);
550 }
551 }
552}
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578#define BUILD_PERDEV_HELPER(_name) \
579static int mips_cdmm_##_name##_helper(struct device *dev, void *data) \
580{ \
581 struct mips_cdmm_device *cdev = to_mips_cdmm_device(dev); \
582 struct mips_cdmm_driver *cdrv; \
583 unsigned int cpu = *(unsigned int *)data; \
584 \
585 if (cdev->cpu != cpu || !dev->driver) \
586 return 0; \
587 \
588 cdrv = to_mips_cdmm_driver(dev->driver); \
589 if (!cdrv->_name) \
590 return 0; \
591 return cdrv->_name(cdev); \
592}
593
594
595BUILD_PERDEV_HELPER(cpu_down)
596BUILD_PERDEV_HELPER(cpu_up)
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606static int mips_cdmm_cpu_down_prep(unsigned int cpu)
607{
608 struct mips_cdmm_bus *bus;
609 long ret;
610
611
612 ret = bus_for_each_dev(&mips_cdmm_bustype, NULL, &cpu,
613 mips_cdmm_cpu_down_helper);
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619 bus = mips_cdmm_get_bus();
620 if (!IS_ERR(bus))
621 bus->offline = true;
622
623 return ret;
624}
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638static int mips_cdmm_cpu_online(unsigned int cpu)
639{
640 struct mips_cdmm_bus *bus;
641 long ret;
642
643 bus = mips_cdmm_get_bus();
644 ret = mips_cdmm_setup(bus);
645 if (ret)
646 return ret;
647
648
649 bus->offline = false;
650
651 if (!bus->discovered)
652 mips_cdmm_bus_discover(bus);
653 else
654
655 ret = bus_for_each_dev(&mips_cdmm_bustype, NULL, &cpu,
656 mips_cdmm_cpu_up_helper);
657
658 return ret;
659}
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666
667static int __init mips_cdmm_init(void)
668{
669 int ret;
670
671
672 ret = bus_register(&mips_cdmm_bustype);
673 if (ret)
674 return ret;
675
676
677 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "bus/cdmm:online",
678 mips_cdmm_cpu_online, mips_cdmm_cpu_down_prep);
679 if (ret < 0)
680 pr_warn("cdmm: Failed to register CPU notifier\n");
681
682 return ret;
683}
684subsys_initcall(mips_cdmm_init);
685