LXR linux/drivers/clk/actions/owl-gate.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2//
   3// OWL gate clock driver
   4//
   5// Copyright (c) 2014 Actions Semi Inc.
   6// Author: David Liu <liuwei@actions-semi.com>
   7//
   8// Copyright (c) 2018 Linaro Ltd.
   9// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  10
  11#ifndef _OWL_GATE_H_
  12#define _OWL_GATE_H_
  13
  14#include "owl-common.h"
  15
  16struct owl_gate_hw {
  17        u32                     reg;
  18        u8                      bit_idx;
  19        u8                      gate_flags;
  20};
  21
  22struct owl_gate {
  23        struct owl_gate_hw      gate_hw;
  24        struct owl_clk_common   common;
  25};
  26
  27#define OWL_GATE_HW(_reg, _bit_idx, _gate_flags)        \
  28        {                                               \
  29                .reg            = _reg,                 \
  30                .bit_idx        = _bit_idx,             \
  31                .gate_flags     = _gate_flags,          \
  32        }
  33
  34#define OWL_GATE(_struct, _name, _parent, _reg,                         \
  35                _bit_idx, _gate_flags, _flags)                          \
  36        struct owl_gate _struct = {                                     \
  37                .gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags),    \
  38                .common = {                                             \
  39                        .regmap         = NULL,                         \
  40                        .hw.init        = CLK_HW_INIT(_name,            \
  41                                                      _parent,          \
  42                                                      &owl_gate_ops,    \
  43                                                      _flags),          \
  44                }                                                       \
  45        }                                                               \
  46
  47#define OWL_GATE_NO_PARENT(_struct, _name, _reg,                        \
  48                _bit_idx, _gate_flags, _flags)                          \
  49        struct owl_gate _struct = {                                     \
  50                .gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags),    \
  51                .common = {                                             \
  52                        .regmap         = NULL,                         \
  53                        .hw.init        = CLK_HW_INIT_NO_PARENT(_name,  \
  54                                                      &owl_gate_ops,    \
  55                                                      _flags),          \
  56                },                                                      \
  57        }                                                               \
  58
  59static inline struct owl_gate *hw_to_owl_gate(const struct clk_hw *hw)
  60{
  61        struct owl_clk_common *common = hw_to_owl_clk_common(hw);
  62
  63        return container_of(common, struct owl_gate, common);
  64}
  65
  66void owl_gate_set(const struct owl_clk_common *common,
  67                 const struct owl_gate_hw *gate_hw, bool enable);
  68int owl_gate_clk_is_enabled(const struct owl_clk_common *common,
  69                   const struct owl_gate_hw *gate_hw);
  70
  71extern const struct clk_ops owl_gate_ops;
  72
  73#endif /* _OWL_GATE_H_ */
  74