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23#ifndef __AMDGPU_GEM_H__
24#define __AMDGPU_GEM_H__
25
26#include <drm/amdgpu_drm.h>
27#include <drm/drm_gem.h>
28
29
30
31
32
33#define AMDGPU_GEM_DOMAIN_MAX 0x3
34#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base)
35
36void amdgpu_gem_object_free(struct drm_gem_object *obj);
37int amdgpu_gem_object_open(struct drm_gem_object *obj,
38 struct drm_file *file_priv);
39void amdgpu_gem_object_close(struct drm_gem_object *obj,
40 struct drm_file *file_priv);
41unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
42
43
44
45
46void amdgpu_gem_force_release(struct amdgpu_device *adev);
47int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
48 int alignment, u32 initial_domain,
49 u64 flags, enum ttm_bo_type type,
50 struct dma_resv *resv,
51 struct drm_gem_object **obj);
52
53int amdgpu_mode_dumb_create(struct drm_file *file_priv,
54 struct drm_device *dev,
55 struct drm_mode_create_dumb *args);
56int amdgpu_mode_dumb_mmap(struct drm_file *filp,
57 struct drm_device *dev,
58 uint32_t handle, uint64_t *offset_p);
59
60int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
61 struct drm_file *filp);
62int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
63 struct drm_file *filp);
64int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
65 struct drm_file *filp);
66int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
67 struct drm_file *filp);
68int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
69 struct drm_file *filp);
70int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
71 struct drm_file *filp);
72int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
73 struct drm_file *filp);
74
75int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
76 struct drm_file *filp);
77
78#endif
79