LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigv100.c

   1/*
   2 * Copyright 2018 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include "hdmi.h"
  23
  24void
  25gv100_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
  26                u8 rekey, u8 *avi, u8 avi_size, u8 *vendor, u8 vendor_size)
  27{
  28        struct nvkm_device *device = ior->disp->engine.subdev.device;
  29        const u32 ctrl = 0x40000000 * enable |
  30                         max_ac_packet << 16 |
  31                         rekey;
  32        const u32 hoff = head * 0x800;
  33        const u32 hdmi = head * 0x400;
  34        struct packed_hdmi_infoframe avi_infoframe;
  35        struct packed_hdmi_infoframe vendor_infoframe;
  36
  37        pack_hdmi_infoframe(&avi_infoframe, avi, avi_size);
  38        pack_hdmi_infoframe(&vendor_infoframe, vendor, vendor_size);
  39
  40        if (!(ctrl & 0x40000000)) {
  41                nvkm_mask(device, 0x6165c0 + hoff, 0x40000000, 0x00000000);
  42                nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000000);
  43                nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
  44                nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000);
  45                return;
  46        }
  47
  48        /* AVI InfoFrame (AVI). */
  49        nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000);
  50        if (avi_size) {
  51                nvkm_wr32(device, 0x6f0008 + hdmi, avi_infoframe.header);
  52                nvkm_wr32(device, 0x6f000c + hdmi, avi_infoframe.subpack0_low);
  53                nvkm_wr32(device, 0x6f0010 + hdmi, avi_infoframe.subpack0_high);
  54                nvkm_wr32(device, 0x6f0014 + hdmi, avi_infoframe.subpack1_low);
  55                nvkm_wr32(device, 0x6f0018 + hdmi, avi_infoframe.subpack1_high);
  56                nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000001);
  57        }
  58
  59        /* Vendor-specific InfoFrame (VSI). */
  60        nvkm_mask(device, 0x6f0100 + hdmi, 0x00010001, 0x00000000);
  61        if (vendor_size) {
  62                nvkm_wr32(device, 0x6f0108 + hdmi, vendor_infoframe.header);
  63                nvkm_wr32(device, 0x6f010c + hdmi, vendor_infoframe.subpack0_low);
  64                nvkm_wr32(device, 0x6f0110 + hdmi, vendor_infoframe.subpack0_high);
  65                nvkm_wr32(device, 0x6f0110 + hdmi, 0x00000000);
  66                nvkm_wr32(device, 0x6f0114 + hdmi, 0x00000000);
  67                nvkm_wr32(device, 0x6f0118 + hdmi, 0x00000000);
  68                nvkm_wr32(device, 0x6f011c + hdmi, 0x00000000);
  69                nvkm_wr32(device, 0x6f0120 + hdmi, 0x00000000);
  70                nvkm_wr32(device, 0x6f0124 + hdmi, 0x00000000);
  71                nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000001);
  72        }
  73
  74
  75        /* General Control (GCP). */
  76        nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
  77        nvkm_wr32(device, 0x6f00cc + hdmi, 0x00000010);
  78        nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001);
  79
  80        /* Audio Clock Regeneration (ACR). */
  81        nvkm_wr32(device, 0x6f0080 + hdmi, 0x82000000);
  82
  83        /* NV_PDISP_SF_HDMI_CTRL. */
  84        nvkm_mask(device, 0x6165c0 + hoff, 0x401f007f, ctrl);
  85}
  86