linux/drivers/hwmon/it87.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   4 *           monitoring.
   5 *
   6 *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   7 *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   8 *  addition to an Environment Controller (Enhanced Hardware Monitor and
   9 *  Fan Controller)
  10 *
  11 *  This driver supports only the Environment Controller in the IT8705F and
  12 *  similar parts.  The other devices are supported by different drivers.
  13 *
  14 *  Supports: IT8603E  Super I/O chip w/LPC interface
  15 *            IT8620E  Super I/O chip w/LPC interface
  16 *            IT8622E  Super I/O chip w/LPC interface
  17 *            IT8623E  Super I/O chip w/LPC interface
  18 *            IT8628E  Super I/O chip w/LPC interface
  19 *            IT8705F  Super I/O chip w/LPC interface
  20 *            IT8712F  Super I/O chip w/LPC interface
  21 *            IT8716F  Super I/O chip w/LPC interface
  22 *            IT8718F  Super I/O chip w/LPC interface
  23 *            IT8720F  Super I/O chip w/LPC interface
  24 *            IT8721F  Super I/O chip w/LPC interface
  25 *            IT8726F  Super I/O chip w/LPC interface
  26 *            IT8728F  Super I/O chip w/LPC interface
  27 *            IT8732F  Super I/O chip w/LPC interface
  28 *            IT8758E  Super I/O chip w/LPC interface
  29 *            IT8771E  Super I/O chip w/LPC interface
  30 *            IT8772E  Super I/O chip w/LPC interface
  31 *            IT8781F  Super I/O chip w/LPC interface
  32 *            IT8782F  Super I/O chip w/LPC interface
  33 *            IT8783E/F Super I/O chip w/LPC interface
  34 *            IT8786E  Super I/O chip w/LPC interface
  35 *            IT8790E  Super I/O chip w/LPC interface
  36 *            IT8792E  Super I/O chip w/LPC interface
  37 *            Sis950   A clone of the IT8705F
  38 *
  39 *  Copyright (C) 2001 Chris Gauthron
  40 *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  41 */
  42
  43#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44
  45#include <linux/bitops.h>
  46#include <linux/module.h>
  47#include <linux/init.h>
  48#include <linux/slab.h>
  49#include <linux/jiffies.h>
  50#include <linux/platform_device.h>
  51#include <linux/hwmon.h>
  52#include <linux/hwmon-sysfs.h>
  53#include <linux/hwmon-vid.h>
  54#include <linux/err.h>
  55#include <linux/mutex.h>
  56#include <linux/sysfs.h>
  57#include <linux/string.h>
  58#include <linux/dmi.h>
  59#include <linux/acpi.h>
  60#include <linux/io.h>
  61
  62#define DRVNAME "it87"
  63
  64enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  65             it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  66             it8792, it8603, it8620, it8622, it8628 };
  67
  68static unsigned short force_id;
  69module_param(force_id, ushort, 0);
  70MODULE_PARM_DESC(force_id, "Override the detected device ID");
  71
  72static struct platform_device *it87_pdev[2];
  73
  74#define REG_2E  0x2e    /* The register to read/write */
  75#define REG_4E  0x4e    /* Secondary register to read/write */
  76
  77#define DEV     0x07    /* Register: Logical device select */
  78#define PME     0x04    /* The device with the fan registers in it */
  79
  80/* The device with the IT8718F/IT8720F VID value in it */
  81#define GPIO    0x07
  82
  83#define DEVID   0x20    /* Register: Device ID */
  84#define DEVREV  0x22    /* Register: Device Revision */
  85
  86static inline int superio_inb(int ioreg, int reg)
  87{
  88        outb(reg, ioreg);
  89        return inb(ioreg + 1);
  90}
  91
  92static inline void superio_outb(int ioreg, int reg, int val)
  93{
  94        outb(reg, ioreg);
  95        outb(val, ioreg + 1);
  96}
  97
  98static int superio_inw(int ioreg, int reg)
  99{
 100        int val;
 101
 102        outb(reg++, ioreg);
 103        val = inb(ioreg + 1) << 8;
 104        outb(reg, ioreg);
 105        val |= inb(ioreg + 1);
 106        return val;
 107}
 108
 109static inline void superio_select(int ioreg, int ldn)
 110{
 111        outb(DEV, ioreg);
 112        outb(ldn, ioreg + 1);
 113}
 114
 115static inline int superio_enter(int ioreg)
 116{
 117        /*
 118         * Try to reserve ioreg and ioreg + 1 for exclusive access.
 119         */
 120        if (!request_muxed_region(ioreg, 2, DRVNAME))
 121                return -EBUSY;
 122
 123        outb(0x87, ioreg);
 124        outb(0x01, ioreg);
 125        outb(0x55, ioreg);
 126        outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 127        return 0;
 128}
 129
 130static inline void superio_exit(int ioreg)
 131{
 132        outb(0x02, ioreg);
 133        outb(0x02, ioreg + 1);
 134        release_region(ioreg, 2);
 135}
 136
 137/* Logical device 4 registers */
 138#define IT8712F_DEVID 0x8712
 139#define IT8705F_DEVID 0x8705
 140#define IT8716F_DEVID 0x8716
 141#define IT8718F_DEVID 0x8718
 142#define IT8720F_DEVID 0x8720
 143#define IT8721F_DEVID 0x8721
 144#define IT8726F_DEVID 0x8726
 145#define IT8728F_DEVID 0x8728
 146#define IT8732F_DEVID 0x8732
 147#define IT8792E_DEVID 0x8733
 148#define IT8771E_DEVID 0x8771
 149#define IT8772E_DEVID 0x8772
 150#define IT8781F_DEVID 0x8781
 151#define IT8782F_DEVID 0x8782
 152#define IT8783E_DEVID 0x8783
 153#define IT8786E_DEVID 0x8786
 154#define IT8790E_DEVID 0x8790
 155#define IT8603E_DEVID 0x8603
 156#define IT8620E_DEVID 0x8620
 157#define IT8622E_DEVID 0x8622
 158#define IT8623E_DEVID 0x8623
 159#define IT8628E_DEVID 0x8628
 160#define IT87_ACT_REG  0x30
 161#define IT87_BASE_REG 0x60
 162
 163/* Logical device 7 registers (IT8712F and later) */
 164#define IT87_SIO_GPIO1_REG      0x25
 165#define IT87_SIO_GPIO2_REG      0x26
 166#define IT87_SIO_GPIO3_REG      0x27
 167#define IT87_SIO_GPIO4_REG      0x28
 168#define IT87_SIO_GPIO5_REG      0x29
 169#define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 170#define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 171#define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 172#define IT87_SIO_VID_REG        0xfc    /* VID value */
 173#define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 174
 175/* Update battery voltage after every reading if true */
 176static bool update_vbat;
 177
 178/* Not all BIOSes properly configure the PWM registers */
 179static bool fix_pwm_polarity;
 180
 181/* Many IT87 constants specified below */
 182
 183/* Length of ISA address segment */
 184#define IT87_EXTENT 8
 185
 186/* Length of ISA address segment for Environmental Controller */
 187#define IT87_EC_EXTENT 2
 188
 189/* Offset of EC registers from ISA base address */
 190#define IT87_EC_OFFSET 5
 191
 192/* Where are the ISA address/data registers relative to the EC base address */
 193#define IT87_ADDR_REG_OFFSET 0
 194#define IT87_DATA_REG_OFFSET 1
 195
 196/*----- The IT87 registers -----*/
 197
 198#define IT87_REG_CONFIG        0x00
 199
 200#define IT87_REG_ALARM1        0x01
 201#define IT87_REG_ALARM2        0x02
 202#define IT87_REG_ALARM3        0x03
 203
 204/*
 205 * The IT8718F and IT8720F have the VID value in a different register, in
 206 * Super-I/O configuration space.
 207 */
 208#define IT87_REG_VID           0x0a
 209/*
 210 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 211 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 212 * mode.
 213 */
 214#define IT87_REG_FAN_DIV       0x0b
 215#define IT87_REG_FAN_16BIT     0x0c
 216
 217/*
 218 * Monitors:
 219 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 220 * - up to 6 temp (1 to 6)
 221 * - up to 6 fan (1 to 6)
 222 */
 223
 224static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 225static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 226static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 227static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 228static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 229
 230#define IT87_REG_FAN_MAIN_CTRL 0x13
 231#define IT87_REG_FAN_CTL       0x14
 232static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 233static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 234
 235static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 236                                    0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 237
 238#define IT87_REG_TEMP(nr)      (0x29 + (nr))
 239
 240#define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 241#define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 242#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 243#define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 244
 245#define IT87_REG_VIN_ENABLE    0x50
 246#define IT87_REG_TEMP_ENABLE   0x51
 247#define IT87_REG_TEMP_EXTRA    0x55
 248#define IT87_REG_BEEP_ENABLE   0x5c
 249
 250#define IT87_REG_CHIPID        0x58
 251
 252static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 253
 254#define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 255#define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 256
 257#define IT87_REG_TEMP456_ENABLE 0x77
 258
 259#define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 260#define NUM_VIN_LIMIT           8
 261#define NUM_TEMP                6
 262#define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 263#define NUM_TEMP_LIMIT          3
 264#define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 265#define NUM_FAN_DIV             3
 266#define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 267#define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 268
 269struct it87_devices {
 270        const char *name;
 271        const char * const suffix;
 272        u32 features;
 273        u8 peci_mask;
 274        u8 old_peci_mask;
 275};
 276
 277#define FEAT_12MV_ADC           BIT(0)
 278#define FEAT_NEWER_AUTOPWM      BIT(1)
 279#define FEAT_OLD_AUTOPWM        BIT(2)
 280#define FEAT_16BIT_FANS         BIT(3)
 281#define FEAT_TEMP_OFFSET        BIT(4)
 282#define FEAT_TEMP_PECI          BIT(5)
 283#define FEAT_TEMP_OLD_PECI      BIT(6)
 284#define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 285#define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 286#define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 287#define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 288#define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 289#define FEAT_10_9MV_ADC         BIT(12)
 290#define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 291#define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 292#define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 293#define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 294#define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 295#define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 296
 297static const struct it87_devices it87_devices[] = {
 298        [it87] = {
 299                .name = "it87",
 300                .suffix = "F",
 301                .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 302        },
 303        [it8712] = {
 304                .name = "it8712",
 305                .suffix = "F",
 306                .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 307                                                /* may need to overwrite */
 308        },
 309        [it8716] = {
 310                .name = "it8716",
 311                .suffix = "F",
 312                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 313                  | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 314        },
 315        [it8718] = {
 316                .name = "it8718",
 317                .suffix = "F",
 318                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 319                  | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 320                  | FEAT_PWM_FREQ2,
 321                .old_peci_mask = 0x4,
 322        },
 323        [it8720] = {
 324                .name = "it8720",
 325                .suffix = "F",
 326                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 327                  | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 328                  | FEAT_PWM_FREQ2,
 329                .old_peci_mask = 0x4,
 330        },
 331        [it8721] = {
 332                .name = "it8721",
 333                .suffix = "F",
 334                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 335                  | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 336                  | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 337                  | FEAT_PWM_FREQ2,
 338                .peci_mask = 0x05,
 339                .old_peci_mask = 0x02,  /* Actually reports PCH */
 340        },
 341        [it8728] = {
 342                .name = "it8728",
 343                .suffix = "F",
 344                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 345                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 346                  | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 347                .peci_mask = 0x07,
 348        },
 349        [it8732] = {
 350                .name = "it8732",
 351                .suffix = "F",
 352                .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 353                  | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 354                  | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 355                .peci_mask = 0x07,
 356                .old_peci_mask = 0x02,  /* Actually reports PCH */
 357        },
 358        [it8771] = {
 359                .name = "it8771",
 360                .suffix = "E",
 361                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 362                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 363                  | FEAT_PWM_FREQ2,
 364                                /* PECI: guesswork */
 365                                /* 12mV ADC (OHM) */
 366                                /* 16 bit fans (OHM) */
 367                                /* three fans, always 16 bit (guesswork) */
 368                .peci_mask = 0x07,
 369        },
 370        [it8772] = {
 371                .name = "it8772",
 372                .suffix = "E",
 373                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 374                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 375                  | FEAT_PWM_FREQ2,
 376                                /* PECI (coreboot) */
 377                                /* 12mV ADC (HWSensors4, OHM) */
 378                                /* 16 bit fans (HWSensors4, OHM) */
 379                                /* three fans, always 16 bit (datasheet) */
 380                .peci_mask = 0x07,
 381        },
 382        [it8781] = {
 383                .name = "it8781",
 384                .suffix = "F",
 385                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 386                  | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 387                .old_peci_mask = 0x4,
 388        },
 389        [it8782] = {
 390                .name = "it8782",
 391                .suffix = "F",
 392                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 393                  | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 394                .old_peci_mask = 0x4,
 395        },
 396        [it8783] = {
 397                .name = "it8783",
 398                .suffix = "E/F",
 399                .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 400                  | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 401                .old_peci_mask = 0x4,
 402        },
 403        [it8786] = {
 404                .name = "it8786",
 405                .suffix = "E",
 406                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 407                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 408                  | FEAT_PWM_FREQ2,
 409                .peci_mask = 0x07,
 410        },
 411        [it8790] = {
 412                .name = "it8790",
 413                .suffix = "E",
 414                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 415                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 416                  | FEAT_PWM_FREQ2,
 417                .peci_mask = 0x07,
 418        },
 419        [it8792] = {
 420                .name = "it8792",
 421                .suffix = "E",
 422                .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 423                  | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 424                  | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 425                .peci_mask = 0x07,
 426                .old_peci_mask = 0x02,  /* Actually reports PCH */
 427        },
 428        [it8603] = {
 429                .name = "it8603",
 430                .suffix = "E",
 431                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 432                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 433                  | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 434                .peci_mask = 0x07,
 435        },
 436        [it8620] = {
 437                .name = "it8620",
 438                .suffix = "E",
 439                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 440                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 441                  | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 442                  | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 443                .peci_mask = 0x07,
 444        },
 445        [it8622] = {
 446                .name = "it8622",
 447                .suffix = "E",
 448                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 449                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 450                  | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 451                  | FEAT_AVCC3 | FEAT_VIN3_5V,
 452                .peci_mask = 0x07,
 453        },
 454        [it8628] = {
 455                .name = "it8628",
 456                .suffix = "E",
 457                .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 458                  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 459                  | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 460                  | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 461                .peci_mask = 0x07,
 462        },
 463};
 464
 465#define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 466#define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 467#define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 468#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 469#define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 470#define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 471#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 472                                 ((data)->peci_mask & BIT(nr)))
 473#define has_temp_old_peci(data, nr) \
 474                                (((data)->features & FEAT_TEMP_OLD_PECI) && \
 475                                 ((data)->old_peci_mask & BIT(nr)))
 476#define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 477#define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 478                                                     FEAT_SIX_FANS))
 479#define has_vid(data)           ((data)->features & FEAT_VID)
 480#define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 481#define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 482#define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 483#define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 484                                                     | FEAT_SIX_PWM))
 485#define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 486#define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 487#define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 488#define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 489
 490struct it87_sio_data {
 491        int sioaddr;
 492        enum chips type;
 493        /* Values read from Super-I/O config space */
 494        u8 revision;
 495        u8 vid_value;
 496        u8 beep_pin;
 497        u8 internal;    /* Internal sensors can be labeled */
 498        bool need_in7_reroute;
 499        /* Features skipped based on config or DMI */
 500        u16 skip_in;
 501        u8 skip_vid;
 502        u8 skip_fan;
 503        u8 skip_pwm;
 504        u8 skip_temp;
 505};
 506
 507/*
 508 * For each registered chip, we need to keep some data in memory.
 509 * The structure is dynamically allocated.
 510 */
 511struct it87_data {
 512        const struct attribute_group *groups[7];
 513        int sioaddr;
 514        enum chips type;
 515        u32 features;
 516        u8 peci_mask;
 517        u8 old_peci_mask;
 518
 519        unsigned short addr;
 520        const char *name;
 521        struct mutex update_lock;
 522        char valid;             /* !=0 if following fields are valid */
 523        unsigned long last_updated;     /* In jiffies */
 524
 525        u16 in_scaled;          /* Internal voltage sensors are scaled */
 526        u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 527        u16 has_in;             /* Bitfield, voltage sensors enabled */
 528        u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 529        bool need_in7_reroute;
 530        u8 has_fan;             /* Bitfield, fans enabled */
 531        u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 532        u8 has_temp;            /* Bitfield, temp sensors enabled */
 533        s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 534        u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 535        u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 536        u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 537        bool has_vid;           /* True if VID supported */
 538        u8 vid;                 /* Register encoding, combined */
 539        u8 vrm;
 540        u32 alarms;             /* Register encoding, combined */
 541        bool has_beep;          /* true if beep supported */
 542        u8 beeps;               /* Register encoding */
 543        u8 fan_main_ctrl;       /* Register value */
 544        u8 fan_ctl;             /* Register value */
 545
 546        /*
 547         * The following 3 arrays correspond to the same registers up to
 548         * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 549         * 7, and we want to preserve settings on mode changes, so we have
 550         * to track all values separately.
 551         * Starting with the IT8721F, the manual PWM duty cycles are stored
 552         * in separate registers (8-bit values), so the separate tracking
 553         * is no longer needed, but it is still done to keep the driver
 554         * simple.
 555         */
 556        u8 has_pwm;             /* Bitfield, pwm control enabled */
 557        u8 pwm_ctrl[NUM_PWM];   /* Register value */
 558        u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 559        u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 560
 561        /* Automatic fan speed control registers */
 562        u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 563        s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 564};
 565
 566static int adc_lsb(const struct it87_data *data, int nr)
 567{
 568        int lsb;
 569
 570        if (has_12mv_adc(data))
 571                lsb = 120;
 572        else if (has_10_9mv_adc(data))
 573                lsb = 109;
 574        else
 575                lsb = 160;
 576        if (data->in_scaled & BIT(nr))
 577                lsb <<= 1;
 578        return lsb;
 579}
 580
 581static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 582{
 583        val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 584        return clamp_val(val, 0, 255);
 585}
 586
 587static int in_from_reg(const struct it87_data *data, int nr, int val)
 588{
 589        return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 590}
 591
 592static inline u8 FAN_TO_REG(long rpm, int div)
 593{
 594        if (rpm == 0)
 595                return 255;
 596        rpm = clamp_val(rpm, 1, 1000000);
 597        return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 598}
 599
 600static inline u16 FAN16_TO_REG(long rpm)
 601{
 602        if (rpm == 0)
 603                return 0xffff;
 604        return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 605}
 606
 607#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 608                                1350000 / ((val) * (div)))
 609/* The divider is fixed to 2 in 16-bit mode */
 610#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 611                             1350000 / ((val) * 2))
 612
 613#define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 614                                    ((val) + 500) / 1000), -128, 127))
 615#define TEMP_FROM_REG(val) ((val) * 1000)
 616
 617static u8 pwm_to_reg(const struct it87_data *data, long val)
 618{
 619        if (has_newer_autopwm(data))
 620                return val;
 621        else
 622                return val >> 1;
 623}
 624
 625static int pwm_from_reg(const struct it87_data *data, u8 reg)
 626{
 627        if (has_newer_autopwm(data))
 628                return reg;
 629        else
 630                return (reg & 0x7f) << 1;
 631}
 632
 633static int DIV_TO_REG(int val)
 634{
 635        int answer = 0;
 636
 637        while (answer < 7 && (val >>= 1))
 638                answer++;
 639        return answer;
 640}
 641
 642#define DIV_FROM_REG(val) BIT(val)
 643
 644/*
 645 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 646 * depending on the chip type, to calculate the actual PWM frequency.
 647 *
 648 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 649 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 650 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 651 * sometimes just one. It is unknown if this is a datasheet error or real,
 652 * so this is ignored for now.
 653 */
 654static const unsigned int pwm_freq[8] = {
 655        48000000,
 656        24000000,
 657        12000000,
 658        8000000,
 659        6000000,
 660        3000000,
 661        1500000,
 662        750000,
 663};
 664
 665/*
 666 * Must be called with data->update_lock held, except during initialization.
 667 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 668 * would slow down the IT87 access and should not be necessary.
 669 */
 670static int it87_read_value(struct it87_data *data, u8 reg)
 671{
 672        outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 673        return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 674}
 675
 676/*
 677 * Must be called with data->update_lock held, except during initialization.
 678 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 679 * would slow down the IT87 access and should not be necessary.
 680 */
 681static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 682{
 683        outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 684        outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 685}
 686
 687static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 688{
 689        data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 690        if (has_newer_autopwm(data)) {
 691                data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 692                data->pwm_duty[nr] = it87_read_value(data,
 693                                                     IT87_REG_PWM_DUTY[nr]);
 694        } else {
 695                if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 696                        data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 697                else                            /* Manual mode */
 698                        data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 699        }
 700
 701        if (has_old_autopwm(data)) {
 702                int i;
 703
 704                for (i = 0; i < 5 ; i++)
 705                        data->auto_temp[nr][i] = it87_read_value(data,
 706                                                IT87_REG_AUTO_TEMP(nr, i));
 707                for (i = 0; i < 3 ; i++)
 708                        data->auto_pwm[nr][i] = it87_read_value(data,
 709                                                IT87_REG_AUTO_PWM(nr, i));
 710        } else if (has_newer_autopwm(data)) {
 711                int i;
 712
 713                /*
 714                 * 0: temperature hysteresis (base + 5)
 715                 * 1: fan off temperature (base + 0)
 716                 * 2: fan start temperature (base + 1)
 717                 * 3: fan max temperature (base + 2)
 718                 */
 719                data->auto_temp[nr][0] =
 720                        it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 721
 722                for (i = 0; i < 3 ; i++)
 723                        data->auto_temp[nr][i + 1] =
 724                                it87_read_value(data,
 725                                                IT87_REG_AUTO_TEMP(nr, i));
 726                /*
 727                 * 0: start pwm value (base + 3)
 728                 * 1: pwm slope (base + 4, 1/8th pwm)
 729                 */
 730                data->auto_pwm[nr][0] =
 731                        it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 732                data->auto_pwm[nr][1] =
 733                        it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 734        }
 735}
 736
 737static struct it87_data *it87_update_device(struct device *dev)
 738{
 739        struct it87_data *data = dev_get_drvdata(dev);
 740        int i;
 741
 742        mutex_lock(&data->update_lock);
 743
 744        if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 745            !data->valid) {
 746                if (update_vbat) {
 747                        /*
 748                         * Cleared after each update, so reenable.  Value
 749                         * returned by this read will be previous value
 750                         */
 751                        it87_write_value(data, IT87_REG_CONFIG,
 752                                it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 753                }
 754                for (i = 0; i < NUM_VIN; i++) {
 755                        if (!(data->has_in & BIT(i)))
 756                                continue;
 757
 758                        data->in[i][0] =
 759                                it87_read_value(data, IT87_REG_VIN[i]);
 760
 761                        /* VBAT and AVCC don't have limit registers */
 762                        if (i >= NUM_VIN_LIMIT)
 763                                continue;
 764
 765                        data->in[i][1] =
 766                                it87_read_value(data, IT87_REG_VIN_MIN(i));
 767                        data->in[i][2] =
 768                                it87_read_value(data, IT87_REG_VIN_MAX(i));
 769                }
 770
 771                for (i = 0; i < NUM_FAN; i++) {
 772                        /* Skip disabled fans */
 773                        if (!(data->has_fan & BIT(i)))
 774                                continue;
 775
 776                        data->fan[i][1] =
 777                                it87_read_value(data, IT87_REG_FAN_MIN[i]);
 778                        data->fan[i][0] = it87_read_value(data,
 779                                       IT87_REG_FAN[i]);
 780                        /* Add high byte if in 16-bit mode */
 781                        if (has_16bit_fans(data)) {
 782                                data->fan[i][0] |= it87_read_value(data,
 783                                                IT87_REG_FANX[i]) << 8;
 784                                data->fan[i][1] |= it87_read_value(data,
 785                                                IT87_REG_FANX_MIN[i]) << 8;
 786                        }
 787                }
 788                for (i = 0; i < NUM_TEMP; i++) {
 789                        if (!(data->has_temp & BIT(i)))
 790                                continue;
 791                        data->temp[i][0] =
 792                                it87_read_value(data, IT87_REG_TEMP(i));
 793
 794                        if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 795                                data->temp[i][3] =
 796                                  it87_read_value(data,
 797                                                  IT87_REG_TEMP_OFFSET[i]);
 798
 799                        if (i >= NUM_TEMP_LIMIT)
 800                                continue;
 801
 802                        data->temp[i][1] =
 803                                it87_read_value(data, IT87_REG_TEMP_LOW(i));
 804                        data->temp[i][2] =
 805                                it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 806                }
 807
 808                /* Newer chips don't have clock dividers */
 809                if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 810                        i = it87_read_value(data, IT87_REG_FAN_DIV);
 811                        data->fan_div[0] = i & 0x07;
 812                        data->fan_div[1] = (i >> 3) & 0x07;
 813                        data->fan_div[2] = (i & 0x40) ? 3 : 1;
 814                }
 815
 816                data->alarms =
 817                        it87_read_value(data, IT87_REG_ALARM1) |
 818                        (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 819                        (it87_read_value(data, IT87_REG_ALARM3) << 16);
 820                data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 821
 822                data->fan_main_ctrl = it87_read_value(data,
 823                                IT87_REG_FAN_MAIN_CTRL);
 824                data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 825                for (i = 0; i < NUM_PWM; i++) {
 826                        if (!(data->has_pwm & BIT(i)))
 827                                continue;
 828                        it87_update_pwm_ctrl(data, i);
 829                }
 830
 831                data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 832                data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 833                /*
 834                 * The IT8705F does not have VID capability.
 835                 * The IT8718F and later don't use IT87_REG_VID for the
 836                 * same purpose.
 837                 */
 838                if (data->type == it8712 || data->type == it8716) {
 839                        data->vid = it87_read_value(data, IT87_REG_VID);
 840                        /*
 841                         * The older IT8712F revisions had only 5 VID pins,
 842                         * but we assume it is always safe to read 6 bits.
 843                         */
 844                        data->vid &= 0x3f;
 845                }
 846                data->last_updated = jiffies;
 847                data->valid = 1;
 848        }
 849
 850        mutex_unlock(&data->update_lock);
 851
 852        return data;
 853}
 854
 855static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 856                       char *buf)
 857{
 858        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 859        struct it87_data *data = it87_update_device(dev);
 860        int index = sattr->index;
 861        int nr = sattr->nr;
 862
 863        return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 864}
 865
 866static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 867                      const char *buf, size_t count)
 868{
 869        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 870        struct it87_data *data = dev_get_drvdata(dev);
 871        int index = sattr->index;
 872        int nr = sattr->nr;
 873        unsigned long val;
 874
 875        if (kstrtoul(buf, 10, &val) < 0)
 876                return -EINVAL;
 877
 878        mutex_lock(&data->update_lock);
 879        data->in[nr][index] = in_to_reg(data, nr, val);
 880        it87_write_value(data,
 881                         index == 1 ? IT87_REG_VIN_MIN(nr)
 882                                    : IT87_REG_VIN_MAX(nr),
 883                         data->in[nr][index]);
 884        mutex_unlock(&data->update_lock);
 885        return count;
 886}
 887
 888static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 889static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 890                            0, 1);
 891static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 892                            0, 2);
 893
 894static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 895static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 896                            1, 1);
 897static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 898                            1, 2);
 899
 900static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 901static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 902                            2, 1);
 903static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 904                            2, 2);
 905
 906static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 907static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 908                            3, 1);
 909static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 910                            3, 2);
 911
 912static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 913static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 914                            4, 1);
 915static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 916                            4, 2);
 917
 918static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 919static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 920                            5, 1);
 921static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 922                            5, 2);
 923
 924static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 925static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 926                            6, 1);
 927static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 928                            6, 2);
 929
 930static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 931static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 932                            7, 1);
 933static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 934                            7, 2);
 935
 936static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 937static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 938static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 939static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 940static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 941
 942/* Up to 6 temperatures */
 943static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 944                         char *buf)
 945{
 946        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 947        int nr = sattr->nr;
 948        int index = sattr->index;
 949        struct it87_data *data = it87_update_device(dev);
 950
 951        return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 952}
 953
 954static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 955                        const char *buf, size_t count)
 956{
 957        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 958        int nr = sattr->nr;
 959        int index = sattr->index;
 960        struct it87_data *data = dev_get_drvdata(dev);
 961        long val;
 962        u8 reg, regval;
 963
 964        if (kstrtol(buf, 10, &val) < 0)
 965                return -EINVAL;
 966
 967        mutex_lock(&data->update_lock);
 968
 969        switch (index) {
 970        default:
 971        case 1:
 972                reg = IT87_REG_TEMP_LOW(nr);
 973                break;
 974        case 2:
 975                reg = IT87_REG_TEMP_HIGH(nr);
 976                break;
 977        case 3:
 978                regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 979                if (!(regval & 0x80)) {
 980                        regval |= 0x80;
 981                        it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 982                }
 983                data->valid = 0;
 984                reg = IT87_REG_TEMP_OFFSET[nr];
 985                break;
 986        }
 987
 988        data->temp[nr][index] = TEMP_TO_REG(val);
 989        it87_write_value(data, reg, data->temp[nr][index]);
 990        mutex_unlock(&data->update_lock);
 991        return count;
 992}
 993
 994static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 995static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 996                            0, 1);
 997static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 998                            0, 2);
 999static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1000                            set_temp, 0, 3);
1001static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1002static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1003                            1, 1);
1004static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1005                            1, 2);
1006static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1007                            set_temp, 1, 3);
1008static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1009static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1010                            2, 1);
1011static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012                            2, 2);
1013static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1014                            set_temp, 2, 3);
1015static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1016static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1017static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1018
1019static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1020                              char *buf)
1021{
1022        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1023        int nr = sensor_attr->index;
1024        struct it87_data *data = it87_update_device(dev);
1025        u8 reg = data->sensor;      /* In case value is updated while used */
1026        u8 extra = data->extra;
1027
1028        if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1029            (has_temp_old_peci(data, nr) && (extra & 0x80)))
1030                return sprintf(buf, "6\n");  /* Intel PECI */
1031        if (reg & (1 << nr))
1032                return sprintf(buf, "3\n");  /* thermal diode */
1033        if (reg & (8 << nr))
1034                return sprintf(buf, "4\n");  /* thermistor */
1035        return sprintf(buf, "0\n");      /* disabled */
1036}
1037
1038static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1039                             const char *buf, size_t count)
1040{
1041        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1042        int nr = sensor_attr->index;
1043
1044        struct it87_data *data = dev_get_drvdata(dev);
1045        long val;
1046        u8 reg, extra;
1047
1048        if (kstrtol(buf, 10, &val) < 0)
1049                return -EINVAL;
1050
1051        reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1052        reg &= ~(1 << nr);
1053        reg &= ~(8 << nr);
1054        if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1055                reg &= 0x3f;
1056        extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1057        if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1058                extra &= 0x7f;
1059        if (val == 2) { /* backwards compatibility */
1060                dev_warn(dev,
1061                         "Sensor type 2 is deprecated, please use 4 instead\n");
1062                val = 4;
1063        }
1064        /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1065        if (val == 3)
1066                reg |= 1 << nr;
1067        else if (val == 4)
1068                reg |= 8 << nr;
1069        else if (has_temp_peci(data, nr) && val == 6)
1070                reg |= (nr + 1) << 6;
1071        else if (has_temp_old_peci(data, nr) && val == 6)
1072                extra |= 0x80;
1073        else if (val != 0)
1074                return -EINVAL;
1075
1076        mutex_lock(&data->update_lock);
1077        data->sensor = reg;
1078        data->extra = extra;
1079        it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1080        if (has_temp_old_peci(data, nr))
1081                it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1082        data->valid = 0;        /* Force cache refresh */
1083        mutex_unlock(&data->update_lock);
1084        return count;
1085}
1086
1087static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1088                          set_temp_type, 0);
1089static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1090                          set_temp_type, 1);
1091static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1092                          set_temp_type, 2);
1093
1094/* 6 Fans */
1095
1096static int pwm_mode(const struct it87_data *data, int nr)
1097{
1098        if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1099                return 0;                               /* Full speed */
1100        if (data->pwm_ctrl[nr] & 0x80)
1101                return 2;                               /* Automatic mode */
1102        if ((data->type == it8603 || nr >= 3) &&
1103            data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1104                return 0;                       /* Full speed */
1105
1106        return 1;                               /* Manual mode */
1107}
1108
1109static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1110                        char *buf)
1111{
1112        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1113        int nr = sattr->nr;
1114        int index = sattr->index;
1115        int speed;
1116        struct it87_data *data = it87_update_device(dev);
1117
1118        speed = has_16bit_fans(data) ?
1119                FAN16_FROM_REG(data->fan[nr][index]) :
1120                FAN_FROM_REG(data->fan[nr][index],
1121                             DIV_FROM_REG(data->fan_div[nr]));
1122        return sprintf(buf, "%d\n", speed);
1123}
1124
1125static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1126                            char *buf)
1127{
1128        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1129        struct it87_data *data = it87_update_device(dev);
1130        int nr = sensor_attr->index;
1131
1132        return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1133}
1134
1135static ssize_t show_pwm_enable(struct device *dev,
1136                               struct device_attribute *attr, char *buf)
1137{
1138        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1139        struct it87_data *data = it87_update_device(dev);
1140        int nr = sensor_attr->index;
1141
1142        return sprintf(buf, "%d\n", pwm_mode(data, nr));
1143}
1144
1145static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1146                        char *buf)
1147{
1148        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1149        struct it87_data *data = it87_update_device(dev);
1150        int nr = sensor_attr->index;
1151
1152        return sprintf(buf, "%d\n",
1153                       pwm_from_reg(data, data->pwm_duty[nr]));
1154}
1155
1156static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1157                             char *buf)
1158{
1159        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1160        struct it87_data *data = it87_update_device(dev);
1161        int nr = sensor_attr->index;
1162        unsigned int freq;
1163        int index;
1164
1165        if (has_pwm_freq2(data) && nr == 1)
1166                index = (data->extra >> 4) & 0x07;
1167        else
1168                index = (data->fan_ctl >> 4) & 0x07;
1169
1170        freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1171
1172        return sprintf(buf, "%u\n", freq);
1173}
1174
1175static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1176                       const char *buf, size_t count)
1177{
1178        struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1179        int nr = sattr->nr;
1180        int index = sattr->index;
1181
1182        struct it87_data *data = dev_get_drvdata(dev);
1183        long val;
1184        u8 reg;
1185
1186        if (kstrtol(buf, 10, &val) < 0)
1187                return -EINVAL;
1188
1189        mutex_lock(&data->update_lock);
1190
1191        if (has_16bit_fans(data)) {
1192                data->fan[nr][index] = FAN16_TO_REG(val);
1193                it87_write_value(data, IT87_REG_FAN_MIN[nr],
1194                                 data->fan[nr][index] & 0xff);
1195                it87_write_value(data, IT87_REG_FANX_MIN[nr],
1196                                 data->fan[nr][index] >> 8);
1197        } else {
1198                reg = it87_read_value(data, IT87_REG_FAN_DIV);
1199                switch (nr) {
1200                case 0:
1201                        data->fan_div[nr] = reg & 0x07;
1202                        break;
1203                case 1:
1204                        data->fan_div[nr] = (reg >> 3) & 0x07;
1205                        break;
1206                case 2:
1207                        data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1208                        break;
1209                }
1210                data->fan[nr][index] =
1211                  FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1212                it87_write_value(data, IT87_REG_FAN_MIN[nr],
1213                                 data->fan[nr][index]);
1214        }
1215
1216        mutex_unlock(&data->update_lock);
1217        return count;
1218}
1219
1220static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1221                           const char *buf, size_t count)
1222{
1223        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1224        struct it87_data *data = dev_get_drvdata(dev);
1225        int nr = sensor_attr->index;
1226        unsigned long val;
1227        int min;
1228        u8 old;
1229
1230        if (kstrtoul(buf, 10, &val) < 0)
1231                return -EINVAL;
1232
1233        mutex_lock(&data->update_lock);
1234        old = it87_read_value(data, IT87_REG_FAN_DIV);
1235
1236        /* Save fan min limit */
1237        min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1238
1239        switch (nr) {
1240        case 0:
1241        case 1:
1242                data->fan_div[nr] = DIV_TO_REG(val);
1243                break;
1244        case 2:
1245                if (val < 8)
1246                        data->fan_div[nr] = 1;
1247                else
1248                        data->fan_div[nr] = 3;
1249        }
1250        val = old & 0x80;
1251        val |= (data->fan_div[0] & 0x07);
1252        val |= (data->fan_div[1] & 0x07) << 3;
1253        if (data->fan_div[2] == 3)
1254                val |= 0x1 << 6;
1255        it87_write_value(data, IT87_REG_FAN_DIV, val);
1256
1257        /* Restore fan min limit */
1258        data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1259        it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1260
1261        mutex_unlock(&data->update_lock);
1262        return count;
1263}
1264
1265/* Returns 0 if OK, -EINVAL otherwise */
1266static int check_trip_points(struct device *dev, int nr)
1267{
1268        const struct it87_data *data = dev_get_drvdata(dev);
1269        int i, err = 0;
1270
1271        if (has_old_autopwm(data)) {
1272                for (i = 0; i < 3; i++) {
1273                        if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1274                                err = -EINVAL;
1275                }
1276                for (i = 0; i < 2; i++) {
1277                        if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1278                                err = -EINVAL;
1279                }
1280        } else if (has_newer_autopwm(data)) {
1281                for (i = 1; i < 3; i++) {
1282                        if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1283                                err = -EINVAL;
1284                }
1285        }
1286
1287        if (err) {
1288                dev_err(dev,
1289                        "Inconsistent trip points, not switching to automatic mode\n");
1290                dev_err(dev, "Adjust the trip points and try again\n");
1291        }
1292        return err;
1293}
1294
1295static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1296                              const char *buf, size_t count)
1297{
1298        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1299        struct it87_data *data = dev_get_drvdata(dev);
1300        int nr = sensor_attr->index;
1301        long val;
1302
1303        if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1304                return -EINVAL;
1305
1306        /* Check trip points before switching to automatic mode */
1307        if (val == 2) {
1308                if (check_trip_points(dev, nr) < 0)
1309                        return -EINVAL;
1310        }
1311
1312        mutex_lock(&data->update_lock);
1313
1314        if (val == 0) {
1315                if (nr < 3 && data->type != it8603) {
1316                        int tmp;
1317                        /* make sure the fan is on when in on/off mode */
1318                        tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1319                        it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1320                        /* set on/off mode */
1321                        data->fan_main_ctrl &= ~BIT(nr);
1322                        it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1323                                         data->fan_main_ctrl);
1324                } else {
1325                        u8 ctrl;
1326
1327                        /* No on/off mode, set maximum pwm value */
1328                        data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1329                        it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1330                                         data->pwm_duty[nr]);
1331                        /* and set manual mode */
1332                        if (has_newer_autopwm(data)) {
1333                                ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1334                                        data->pwm_temp_map[nr];
1335                        } else {
1336                                ctrl = data->pwm_duty[nr];
1337                        }
1338                        data->pwm_ctrl[nr] = ctrl;
1339                        it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1340                }
1341        } else {
1342                u8 ctrl;
1343
1344                if (has_newer_autopwm(data)) {
1345                        ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1346                                data->pwm_temp_map[nr];
1347                        if (val != 1)
1348                                ctrl |= 0x80;
1349                } else {
1350                        ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1351                }
1352                data->pwm_ctrl[nr] = ctrl;
1353                it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1354
1355                if (data->type != it8603 && nr < 3) {
1356                        /* set SmartGuardian mode */
1357                        data->fan_main_ctrl |= BIT(nr);
1358                        it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1359                                         data->fan_main_ctrl);
1360                }
1361        }
1362
1363        mutex_unlock(&data->update_lock);
1364        return count;
1365}
1366
1367static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1368                       const char *buf, size_t count)
1369{
1370        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1371        struct it87_data *data = dev_get_drvdata(dev);
1372        int nr = sensor_attr->index;
1373        long val;
1374
1375        if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1376                return -EINVAL;
1377
1378        mutex_lock(&data->update_lock);
1379        it87_update_pwm_ctrl(data, nr);
1380        if (has_newer_autopwm(data)) {
1381                /*
1382                 * If we are in automatic mode, the PWM duty cycle register
1383                 * is read-only so we can't write the value.
1384                 */
1385                if (data->pwm_ctrl[nr] & 0x80) {
1386                        mutex_unlock(&data->update_lock);
1387                        return -EBUSY;
1388                }
1389                data->pwm_duty[nr] = pwm_to_reg(data, val);
1390                it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1391                                 data->pwm_duty[nr]);
1392        } else {
1393                data->pwm_duty[nr] = pwm_to_reg(data, val);
1394                /*
1395                 * If we are in manual mode, write the duty cycle immediately;
1396                 * otherwise, just store it for later use.
1397                 */
1398                if (!(data->pwm_ctrl[nr] & 0x80)) {
1399                        data->pwm_ctrl[nr] = data->pwm_duty[nr];
1400                        it87_write_value(data, IT87_REG_PWM[nr],
1401                                         data->pwm_ctrl[nr]);
1402                }
1403        }
1404        mutex_unlock(&data->update_lock);
1405        return count;
1406}
1407
1408static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1409                            const char *buf, size_t count)
1410{
1411        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1412        struct it87_data *data = dev_get_drvdata(dev);
1413        int nr = sensor_attr->index;
1414        unsigned long val;
1415        int i;
1416
1417        if (kstrtoul(buf, 10, &val) < 0)
1418                return -EINVAL;
1419
1420        val = clamp_val(val, 0, 1000000);
1421        val *= has_newer_autopwm(data) ? 256 : 128;
1422
1423        /* Search for the nearest available frequency */
1424        for (i = 0; i < 7; i++) {
1425                if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1426                        break;
1427        }
1428
1429        mutex_lock(&data->update_lock);
1430        if (nr == 0) {
1431                data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1432                data->fan_ctl |= i << 4;
1433                it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1434        } else {
1435                data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1436                data->extra |= i << 4;
1437                it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1438        }
1439        mutex_unlock(&data->update_lock);
1440
1441        return count;
1442}
1443
1444static ssize_t show_pwm_temp_map(struct device *dev,
1445                                 struct device_attribute *attr, char *buf)
1446{
1447        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1448        struct it87_data *data = it87_update_device(dev);
1449        int nr = sensor_attr->index;
1450        int map;
1451
1452        map = data->pwm_temp_map[nr];
1453        if (map >= 3)
1454                map = 0;        /* Should never happen */
1455        if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1456                map += 3;
1457
1458        return sprintf(buf, "%d\n", (int)BIT(map));
1459}
1460
1461static ssize_t set_pwm_temp_map(struct device *dev,
1462                                struct device_attribute *attr, const char *buf,
1463                                size_t count)
1464{
1465        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1466        struct it87_data *data = dev_get_drvdata(dev);
1467        int nr = sensor_attr->index;
1468        long val;
1469        u8 reg;
1470
1471        if (kstrtol(buf, 10, &val) < 0)
1472                return -EINVAL;
1473
1474        if (nr >= 3)
1475                val -= 3;
1476
1477        switch (val) {
1478        case BIT(0):
1479                reg = 0x00;
1480                break;
1481        case BIT(1):
1482                reg = 0x01;
1483                break;
1484        case BIT(2):
1485                reg = 0x02;
1486                break;
1487        default:
1488                return -EINVAL;
1489        }
1490
1491        mutex_lock(&data->update_lock);
1492        it87_update_pwm_ctrl(data, nr);
1493        data->pwm_temp_map[nr] = reg;
1494        /*
1495         * If we are in automatic mode, write the temp mapping immediately;
1496         * otherwise, just store it for later use.
1497         */
1498        if (data->pwm_ctrl[nr] & 0x80) {
1499                data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1500                                                data->pwm_temp_map[nr];
1501                it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1502        }
1503        mutex_unlock(&data->update_lock);
1504        return count;
1505}
1506
1507static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1508                             char *buf)
1509{
1510        struct it87_data *data = it87_update_device(dev);
1511        struct sensor_device_attribute_2 *sensor_attr =
1512                        to_sensor_dev_attr_2(attr);
1513        int nr = sensor_attr->nr;
1514        int point = sensor_attr->index;
1515
1516        return sprintf(buf, "%d\n",
1517                       pwm_from_reg(data, data->auto_pwm[nr][point]));
1518}
1519
1520static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1521                            const char *buf, size_t count)
1522{
1523        struct it87_data *data = dev_get_drvdata(dev);
1524        struct sensor_device_attribute_2 *sensor_attr =
1525                        to_sensor_dev_attr_2(attr);
1526        int nr = sensor_attr->nr;
1527        int point = sensor_attr->index;
1528        int regaddr;
1529        long val;
1530
1531        if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1532                return -EINVAL;
1533
1534        mutex_lock(&data->update_lock);
1535        data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1536        if (has_newer_autopwm(data))
1537                regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1538        else
1539                regaddr = IT87_REG_AUTO_PWM(nr, point);
1540        it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1541        mutex_unlock(&data->update_lock);
1542        return count;
1543}
1544
1545static ssize_t show_auto_pwm_slope(struct device *dev,
1546                                   struct device_attribute *attr, char *buf)
1547{
1548        struct it87_data *data = it87_update_device(dev);
1549        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1550        int nr = sensor_attr->index;
1551
1552        return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1553}
1554
1555static ssize_t set_auto_pwm_slope(struct device *dev,
1556                                  struct device_attribute *attr,
1557                                  const char *buf, size_t count)
1558{
1559        struct it87_data *data = dev_get_drvdata(dev);
1560        struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1561        int nr = sensor_attr->index;
1562        unsigned long val;
1563
1564        if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1565                return -EINVAL;
1566
1567        mutex_lock(&data->update_lock);
1568        data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1569        it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1570                         data->auto_pwm[nr][1]);
1571        mutex_unlock(&data->update_lock);
1572        return count;
1573}
1574
1575static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1576                              char *buf)
1577{
1578        struct it87_data *data = it87_update_device(dev);
1579        struct sensor_device_attribute_2 *sensor_attr =
1580                        to_sensor_dev_attr_2(attr);
1581        int nr = sensor_attr->nr;
1582        int point = sensor_attr->index;
1583        int reg;
1584
1585        if (has_old_autopwm(data) || point)
1586                reg = data->auto_temp[nr][point];
1587        else
1588                reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1589
1590        return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1591}
1592
1593static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1594                             const char *buf, size_t count)
1595{
1596        struct it87_data *data = dev_get_drvdata(dev);
1597        struct sensor_device_attribute_2 *sensor_attr =
1598                        to_sensor_dev_attr_2(attr);
1599        int nr = sensor_attr->nr;
1600        int point = sensor_attr->index;
1601        long val;
1602        int reg;
1603
1604        if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1605                return -EINVAL;
1606
1607        mutex_lock(&data->update_lock);
1608        if (has_newer_autopwm(data) && !point) {
1609                reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1610                reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1611                data->auto_temp[nr][0] = reg;
1612                it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1613        } else {
1614                reg = TEMP_TO_REG(val);
1615                data->auto_temp[nr][point] = reg;
1616                if (has_newer_autopwm(data))
1617                        point--;
1618                it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1619        }
1620        mutex_unlock(&data->update_lock);
1621        return count;
1622}
1623
1624static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1625static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1626                            0, 1);
1627static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1628                          set_fan_div, 0);
1629
1630static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1631static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1632                            1, 1);
1633static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1634                          set_fan_div, 1);
1635
1636static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1637static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1638                            2, 1);
1639static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1640                          set_fan_div, 2);
1641
1642static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1643static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1644                            3, 1);
1645
1646static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1647static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1648                            4, 1);
1649
1650static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1651static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1652                            5, 1);
1653
1654static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1655                          show_pwm_enable, set_pwm_enable, 0);
1656static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1657static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1658                          set_pwm_freq, 0);
1659static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1660                          show_pwm_temp_map, set_pwm_temp_map, 0);
1661static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1662                            show_auto_pwm, set_auto_pwm, 0, 0);
1663static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1664                            show_auto_pwm, set_auto_pwm, 0, 1);
1665static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1666                            show_auto_pwm, set_auto_pwm, 0, 2);
1667static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1668                            show_auto_pwm, NULL, 0, 3);
1669static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1670                            show_auto_temp, set_auto_temp, 0, 1);
1671static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1672                            show_auto_temp, set_auto_temp, 0, 0);
1673static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1674                            show_auto_temp, set_auto_temp, 0, 2);
1675static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1676                            show_auto_temp, set_auto_temp, 0, 3);
1677static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1678                            show_auto_temp, set_auto_temp, 0, 4);
1679static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1680                            show_auto_pwm, set_auto_pwm, 0, 0);
1681static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1682                          show_auto_pwm_slope, set_auto_pwm_slope, 0);
1683
1684static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1685                          show_pwm_enable, set_pwm_enable, 1);
1686static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1687static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1688static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1689                          show_pwm_temp_map, set_pwm_temp_map, 1);
1690static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1691                            show_auto_pwm, set_auto_pwm, 1, 0);
1692static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1693                            show_auto_pwm, set_auto_pwm, 1, 1);
1694static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1695                            show_auto_pwm, set_auto_pwm, 1, 2);
1696static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1697                            show_auto_pwm, NULL, 1, 3);
1698static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1699                            show_auto_temp, set_auto_temp, 1, 1);
1700static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1701                            show_auto_temp, set_auto_temp, 1, 0);
1702static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1703                            show_auto_temp, set_auto_temp, 1, 2);
1704static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1705                            show_auto_temp, set_auto_temp, 1, 3);
1706static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1707                            show_auto_temp, set_auto_temp, 1, 4);
1708static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1709                            show_auto_pwm, set_auto_pwm, 1, 0);
1710static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1711                          show_auto_pwm_slope, set_auto_pwm_slope, 1);
1712
1713static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1714                          show_pwm_enable, set_pwm_enable, 2);
1715static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1716static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1717static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1718                          show_pwm_temp_map, set_pwm_temp_map, 2);
1719static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1720                            show_auto_pwm, set_auto_pwm, 2, 0);
1721static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1722                            show_auto_pwm, set_auto_pwm, 2, 1);
1723static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1724                            show_auto_pwm, set_auto_pwm, 2, 2);
1725static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1726                            show_auto_pwm, NULL, 2, 3);
1727static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1728                            show_auto_temp, set_auto_temp, 2, 1);
1729static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1730                            show_auto_temp, set_auto_temp, 2, 0);
1731static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1732                            show_auto_temp, set_auto_temp, 2, 2);
1733static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1734                            show_auto_temp, set_auto_temp, 2, 3);
1735static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1736                            show_auto_temp, set_auto_temp, 2, 4);
1737static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1738                            show_auto_pwm, set_auto_pwm, 2, 0);
1739static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1740                          show_auto_pwm_slope, set_auto_pwm_slope, 2);
1741
1742static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1743                          show_pwm_enable, set_pwm_enable, 3);
1744static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1745static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1746static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1747                          show_pwm_temp_map, set_pwm_temp_map, 3);
1748static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1749                            show_auto_temp, set_auto_temp, 2, 1);
1750static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1751                            show_auto_temp, set_auto_temp, 2, 0);
1752static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1753                            show_auto_temp, set_auto_temp, 2, 2);
1754static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1755                            show_auto_temp, set_auto_temp, 2, 3);
1756static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1757                            show_auto_pwm, set_auto_pwm, 3, 0);
1758static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1759                          show_auto_pwm_slope, set_auto_pwm_slope, 3);
1760
1761static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1762                          show_pwm_enable, set_pwm_enable, 4);
1763static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1764static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1765static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1766                          show_pwm_temp_map, set_pwm_temp_map, 4);
1767static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1768                            show_auto_temp, set_auto_temp, 2, 1);
1769static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1770                            show_auto_temp, set_auto_temp, 2, 0);
1771static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1772                            show_auto_temp, set_auto_temp, 2, 2);
1773static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1774                            show_auto_temp, set_auto_temp, 2, 3);
1775static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1776                            show_auto_pwm, set_auto_pwm, 4, 0);
1777static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1778                          show_auto_pwm_slope, set_auto_pwm_slope, 4);
1779
1780static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1781                          show_pwm_enable, set_pwm_enable, 5);
1782static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1783static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1784static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1785                          show_pwm_temp_map, set_pwm_temp_map, 5);
1786static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1787                            show_auto_temp, set_auto_temp, 2, 1);
1788static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1789                            show_auto_temp, set_auto_temp, 2, 0);
1790static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1791                            show_auto_temp, set_auto_temp, 2, 2);
1792static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1793                            show_auto_temp, set_auto_temp, 2, 3);
1794static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1795                            show_auto_pwm, set_auto_pwm, 5, 0);
1796static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1797                          show_auto_pwm_slope, set_auto_pwm_slope, 5);
1798
1799/* Alarms */
1800static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1801                           char *buf)
1802{
1803        struct it87_data *data = it87_update_device(dev);
1804
1805        return sprintf(buf, "%u\n", data->alarms);
1806}
1807static DEVICE_ATTR_RO(alarms);
1808
1809static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1810                          char *buf)
1811{
1812        struct it87_data *data = it87_update_device(dev);
1813        int bitnr = to_sensor_dev_attr(attr)->index;
1814
1815        return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1816}
1817
1818static ssize_t clear_intrusion(struct device *dev,
1819                               struct device_attribute *attr, const char *buf,
1820                               size_t count)
1821{
1822        struct it87_data *data = dev_get_drvdata(dev);
1823        int config;
1824        long val;
1825
1826        if (kstrtol(buf, 10, &val) < 0 || val != 0)
1827                return -EINVAL;
1828
1829        mutex_lock(&data->update_lock);
1830        config = it87_read_value(data, IT87_REG_CONFIG);
1831        if (config < 0) {
1832                count = config;
1833        } else {
1834                config |= BIT(5);
1835                it87_write_value(data, IT87_REG_CONFIG, config);
1836                /* Invalidate cache to force re-read */
1837                data->valid = 0;
1838        }
1839        mutex_unlock(&data->update_lock);
1840
1841        return count;
1842}
1843
1844static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1845static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1846static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1847static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1848static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1849static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1850static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1851static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1852static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1853static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1854static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1855static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1856static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1857static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1858static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1859static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1860static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1861static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1862                          show_alarm, clear_intrusion, 4);
1863
1864static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1865                         char *buf)
1866{
1867        struct it87_data *data = it87_update_device(dev);
1868        int bitnr = to_sensor_dev_attr(attr)->index;
1869
1870        return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1871}
1872
1873static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1874                        const char *buf, size_t count)
1875{
1876        int bitnr = to_sensor_dev_attr(attr)->index;
1877        struct it87_data *data = dev_get_drvdata(dev);
1878        long val;
1879
1880        if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1881                return -EINVAL;
1882
1883        mutex_lock(&data->update_lock);
1884        data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1885        if (val)
1886                data->beeps |= BIT(bitnr);
1887        else
1888                data->beeps &= ~BIT(bitnr);
1889        it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1890        mutex_unlock(&data->update_lock);
1891        return count;
1892}
1893
1894static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1895                          show_beep, set_beep, 1);
1896static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1897static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1898static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1899static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1900static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1901static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1902static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1903/* fanX_beep writability is set later */
1904static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1905static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1906static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1907static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1908static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1909static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1910static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1911                          show_beep, set_beep, 2);
1912static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1913static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1914
1915static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1916                        char *buf)
1917{
1918        struct it87_data *data = dev_get_drvdata(dev);
1919
1920        return sprintf(buf, "%u\n", data->vrm);
1921}
1922
1923static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1924                         const char *buf, size_t count)
1925{
1926        struct it87_data *data = dev_get_drvdata(dev);
1927        unsigned long val;
1928
1929        if (kstrtoul(buf, 10, &val) < 0)
1930                return -EINVAL;
1931
1932        data->vrm = val;
1933
1934        return count;
1935}
1936static DEVICE_ATTR_RW(vrm);
1937
1938static ssize_t cpu0_vid_show(struct device *dev,
1939                             struct device_attribute *attr, char *buf)
1940{
1941        struct it87_data *data = it87_update_device(dev);
1942
1943        return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1944}
1945static DEVICE_ATTR_RO(cpu0_vid);
1946
1947static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1948                          char *buf)
1949{
1950        static const char * const labels[] = {
1951                "+5V",
1952                "5VSB",
1953                "Vbat",
1954                "AVCC",
1955        };
1956        static const char * const labels_it8721[] = {
1957                "+3.3V",
1958                "3VSB",
1959                "Vbat",
1960                "+3.3V",
1961        };
1962        struct it87_data *data = dev_get_drvdata(dev);
1963        int nr = to_sensor_dev_attr(attr)->index;
1964        const char *label;
1965
1966        if (has_vin3_5v(data) && nr == 0)
1967                label = labels[0];
1968        else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1969                label = labels_it8721[nr];
1970        else
1971                label = labels[nr];
1972
1973        return sprintf(buf, "%s\n", label);
1974}
1975static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1976static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1977static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1978/* AVCC3 */
1979static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1980
1981static umode_t it87_in_is_visible(struct kobject *kobj,
1982                                  struct attribute *attr, int index)
1983{
1984        struct device *dev = container_of(kobj, struct device, kobj);
1985        struct it87_data *data = dev_get_drvdata(dev);
1986        int i = index / 5;      /* voltage index */
1987        int a = index % 5;      /* attribute index */
1988
1989        if (index >= 40) {      /* in8 and higher only have input attributes */
1990                i = index - 40 + 8;
1991                a = 0;
1992        }
1993
1994        if (!(data->has_in & BIT(i)))
1995                return 0;
1996
1997        if (a == 4 && !data->has_beep)
1998                return 0;
1999
2000        return attr->mode;
2001}
2002
2003static struct attribute *it87_attributes_in[] = {
2004        &sensor_dev_attr_in0_input.dev_attr.attr,
2005        &sensor_dev_attr_in0_min.dev_attr.attr,
2006        &sensor_dev_attr_in0_max.dev_attr.attr,
2007        &sensor_dev_attr_in0_alarm.dev_attr.attr,
2008        &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2009
2010        &sensor_dev_attr_in1_input.dev_attr.attr,
2011        &sensor_dev_attr_in1_min.dev_attr.attr,
2012        &sensor_dev_attr_in1_max.dev_attr.attr,
2013        &sensor_dev_attr_in1_alarm.dev_attr.attr,
2014        &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2015
2016        &sensor_dev_attr_in2_input.dev_attr.attr,
2017        &sensor_dev_attr_in2_min.dev_attr.attr,
2018        &sensor_dev_attr_in2_max.dev_attr.attr,
2019        &sensor_dev_attr_in2_alarm.dev_attr.attr,
2020        &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2021
2022        &sensor_dev_attr_in3_input.dev_attr.attr,
2023        &sensor_dev_attr_in3_min.dev_attr.attr,
2024        &sensor_dev_attr_in3_max.dev_attr.attr,
2025        &sensor_dev_attr_in3_alarm.dev_attr.attr,
2026        &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2027
2028        &sensor_dev_attr_in4_input.dev_attr.attr,
2029        &sensor_dev_attr_in4_min.dev_attr.attr,
2030        &sensor_dev_attr_in4_max.dev_attr.attr,
2031        &sensor_dev_attr_in4_alarm.dev_attr.attr,
2032        &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2033
2034        &sensor_dev_attr_in5_input.dev_attr.attr,
2035        &sensor_dev_attr_in5_min.dev_attr.attr,
2036        &sensor_dev_attr_in5_max.dev_attr.attr,
2037        &sensor_dev_attr_in5_alarm.dev_attr.attr,
2038        &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2039
2040        &sensor_dev_attr_in6_input.dev_attr.attr,
2041        &sensor_dev_attr_in6_min.dev_attr.attr,
2042        &sensor_dev_attr_in6_max.dev_attr.attr,
2043        &sensor_dev_attr_in6_alarm.dev_attr.attr,
2044        &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2045
2046        &sensor_dev_attr_in7_input.dev_attr.attr,
2047        &sensor_dev_attr_in7_min.dev_attr.attr,
2048        &sensor_dev_attr_in7_max.dev_attr.attr,
2049        &sensor_dev_attr_in7_alarm.dev_attr.attr,
2050        &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2051
2052        &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2053        &sensor_dev_attr_in9_input.dev_attr.attr,
2054        &sensor_dev_attr_in10_input.dev_attr.attr,
2055        &sensor_dev_attr_in11_input.dev_attr.attr,
2056        &sensor_dev_attr_in12_input.dev_attr.attr,
2057        NULL
2058};
2059
2060static const struct attribute_group it87_group_in = {
2061        .attrs = it87_attributes_in,
2062        .is_visible = it87_in_is_visible,
2063};
2064
2065static umode_t it87_temp_is_visible(struct kobject *kobj,
2066                                    struct attribute *attr, int index)
2067{
2068        struct device *dev = container_of(kobj, struct device, kobj);
2069        struct it87_data *data = dev_get_drvdata(dev);
2070        int i = index / 7;      /* temperature index */
2071        int a = index % 7;      /* attribute index */
2072
2073        if (index >= 21) {
2074                i = index - 21 + 3;
2075                a = 0;
2076        }
2077
2078        if (!(data->has_temp & BIT(i)))
2079                return 0;
2080
2081        if (a == 5 && !has_temp_offset(data))
2082                return 0;
2083
2084        if (a == 6 && !data->has_beep)
2085                return 0;
2086
2087        return attr->mode;
2088}
2089
2090static struct attribute *it87_attributes_temp[] = {
2091        &sensor_dev_attr_temp1_input.dev_attr.attr,
2092        &sensor_dev_attr_temp1_max.dev_attr.attr,
2093        &sensor_dev_attr_temp1_min.dev_attr.attr,
2094        &sensor_dev_attr_temp1_type.dev_attr.attr,
2095        &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2096        &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2097        &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2098
2099        &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2100        &sensor_dev_attr_temp2_max.dev_attr.attr,
2101        &sensor_dev_attr_temp2_min.dev_attr.attr,
2102        &sensor_dev_attr_temp2_type.dev_attr.attr,
2103        &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2104        &sensor_dev_attr_temp2_offset.dev_attr.attr,
2105        &sensor_dev_attr_temp2_beep.dev_attr.attr,
2106
2107        &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2108        &sensor_dev_attr_temp3_max.dev_attr.attr,
2109        &sensor_dev_attr_temp3_min.dev_attr.attr,
2110        &sensor_dev_attr_temp3_type.dev_attr.attr,
2111        &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2112        &sensor_dev_attr_temp3_offset.dev_attr.attr,
2113        &sensor_dev_attr_temp3_beep.dev_attr.attr,
2114
2115        &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2116        &sensor_dev_attr_temp5_input.dev_attr.attr,
2117        &sensor_dev_attr_temp6_input.dev_attr.attr,
2118        NULL
2119};
2120
2121static const struct attribute_group it87_group_temp = {
2122        .attrs = it87_attributes_temp,
2123        .is_visible = it87_temp_is_visible,
2124};
2125
2126static umode_t it87_is_visible(struct kobject *kobj,
2127                               struct attribute *attr, int index)
2128{
2129        struct device *dev = container_of(kobj, struct device, kobj);
2130        struct it87_data *data = dev_get_drvdata(dev);
2131
2132        if ((index == 2 || index == 3) && !data->has_vid)
2133                return 0;
2134
2135        if (index > 3 && !(data->in_internal & BIT(index - 4)))
2136                return 0;
2137
2138        return attr->mode;
2139}
2140
2141static struct attribute *it87_attributes[] = {
2142        &dev_attr_alarms.attr,
2143        &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2144        &dev_attr_vrm.attr,                             /* 2 */
2145        &dev_attr_cpu0_vid.attr,                        /* 3 */
2146        &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2147        &sensor_dev_attr_in7_label.dev_attr.attr,
2148        &sensor_dev_attr_in8_label.dev_attr.attr,
2149        &sensor_dev_attr_in9_label.dev_attr.attr,
2150        NULL
2151};
2152
2153static const struct attribute_group it87_group = {
2154        .attrs = it87_attributes,
2155        .is_visible = it87_is_visible,
2156};
2157
2158static umode_t it87_fan_is_visible(struct kobject *kobj,
2159                                   struct attribute *attr, int index)
2160{
2161        struct device *dev = container_of(kobj, struct device, kobj);
2162        struct it87_data *data = dev_get_drvdata(dev);
2163        int i = index / 5;      /* fan index */
2164        int a = index % 5;      /* attribute index */
2165
2166        if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2167                i = (index - 15) / 4 + 3;
2168                a = (index - 15) % 4;
2169        }
2170
2171        if (!(data->has_fan & BIT(i)))
2172                return 0;
2173
2174        if (a == 3) {                           /* beep */
2175                if (!data->has_beep)
2176                        return 0;
2177                /* first fan beep attribute is writable */
2178                if (i == __ffs(data->has_fan))
2179                        return attr->mode | S_IWUSR;
2180        }
2181
2182        if (a == 4 && has_16bit_fans(data))     /* divisor */
2183                return 0;
2184
2185        return attr->mode;
2186}
2187
2188static struct attribute *it87_attributes_fan[] = {
2189        &sensor_dev_attr_fan1_input.dev_attr.attr,
2190        &sensor_dev_attr_fan1_min.dev_attr.attr,
2191        &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2192        &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2193        &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2194
2195        &sensor_dev_attr_fan2_input.dev_attr.attr,
2196        &sensor_dev_attr_fan2_min.dev_attr.attr,
2197        &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2198        &sensor_dev_attr_fan2_beep.dev_attr.attr,
2199        &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2200
2201        &sensor_dev_attr_fan3_input.dev_attr.attr,
2202        &sensor_dev_attr_fan3_min.dev_attr.attr,
2203        &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2204        &sensor_dev_attr_fan3_beep.dev_attr.attr,
2205        &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2206
2207        &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2208        &sensor_dev_attr_fan4_min.dev_attr.attr,
2209        &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2210        &sensor_dev_attr_fan4_beep.dev_attr.attr,
2211
2212        &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2213        &sensor_dev_attr_fan5_min.dev_attr.attr,
2214        &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2215        &sensor_dev_attr_fan5_beep.dev_attr.attr,
2216
2217        &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2218        &sensor_dev_attr_fan6_min.dev_attr.attr,
2219        &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2220        &sensor_dev_attr_fan6_beep.dev_attr.attr,
2221        NULL
2222};
2223
2224static const struct attribute_group it87_group_fan = {
2225        .attrs = it87_attributes_fan,
2226        .is_visible = it87_fan_is_visible,
2227};
2228
2229static umode_t it87_pwm_is_visible(struct kobject *kobj,
2230                                   struct attribute *attr, int index)
2231{
2232        struct device *dev = container_of(kobj, struct device, kobj);
2233        struct it87_data *data = dev_get_drvdata(dev);
2234        int i = index / 4;      /* pwm index */
2235        int a = index % 4;      /* attribute index */
2236
2237        if (!(data->has_pwm & BIT(i)))
2238                return 0;
2239
2240        /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2241        if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2242                return attr->mode | S_IWUSR;
2243
2244        /* pwm2_freq is writable if there are two pwm frequency selects */
2245        if (has_pwm_freq2(data) && i == 1 && a == 2)
2246                return attr->mode | S_IWUSR;
2247
2248        return attr->mode;
2249}
2250
2251static struct attribute *it87_attributes_pwm[] = {
2252        &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2253        &sensor_dev_attr_pwm1.dev_attr.attr,
2254        &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2255        &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2256
2257        &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2258        &sensor_dev_attr_pwm2.dev_attr.attr,
2259        &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2260        &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2261
2262        &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2263        &sensor_dev_attr_pwm3.dev_attr.attr,
2264        &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2265        &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2266
2267        &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2268        &sensor_dev_attr_pwm4.dev_attr.attr,
2269        &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2270        &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2271
2272        &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2273        &sensor_dev_attr_pwm5.dev_attr.attr,
2274        &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2275        &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2276
2277        &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2278        &sensor_dev_attr_pwm6.dev_attr.attr,
2279        &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2280        &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2281
2282        NULL
2283};
2284
2285static const struct attribute_group it87_group_pwm = {
2286        .attrs = it87_attributes_pwm,
2287        .is_visible = it87_pwm_is_visible,
2288};
2289
2290static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2291                                        struct attribute *attr, int index)
2292{
2293        struct device *dev = container_of(kobj, struct device, kobj);
2294        struct it87_data *data = dev_get_drvdata(dev);
2295        int i = index / 11;     /* pwm index */
2296        int a = index % 11;     /* attribute index */
2297
2298        if (index >= 33) {      /* pwm 4..6 */
2299                i = (index - 33) / 6 + 3;
2300                a = (index - 33) % 6 + 4;
2301        }
2302
2303        if (!(data->has_pwm & BIT(i)))
2304                return 0;
2305
2306        if (has_newer_autopwm(data)) {
2307                if (a < 4)      /* no auto point pwm */
2308                        return 0;
2309                if (a == 8)     /* no auto_point4 */
2310                        return 0;
2311        }
2312        if (has_old_autopwm(data)) {
2313                if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2314                        return 0;
2315        }
2316
2317        return attr->mode;
2318}
2319
2320static struct attribute *it87_attributes_auto_pwm[] = {
2321        &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2322        &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2323        &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2324        &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2325        &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2326        &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2327        &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2328        &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2329        &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2330        &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2331        &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2332
2333        &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2334        &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2335        &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2336        &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2337        &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2338        &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2339        &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2340        &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2341        &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2342        &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2343        &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2344
2345        &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2346        &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2347        &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2348        &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2349        &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2350        &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2351        &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2352        &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2353        &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2354        &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2355        &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2356
2357        &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2358        &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2359        &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2360        &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2361        &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2362        &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2363
2364        &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2365        &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2366        &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2367        &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2368        &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2369        &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2370
2371        &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2372        &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2373        &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2374        &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2375        &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2376        &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2377
2378        NULL,
2379};
2380
2381static const struct attribute_group it87_group_auto_pwm = {
2382        .attrs = it87_attributes_auto_pwm,
2383        .is_visible = it87_auto_pwm_is_visible,
2384};
2385
2386/* SuperIO detection - will change isa_address if a chip is found */
2387static int __init it87_find(int sioaddr, unsigned short *address,
2388                            struct it87_sio_data *sio_data)
2389{
2390        int err;
2391        u16 chip_type;
2392        const char *board_vendor, *board_name;
2393        const struct it87_devices *config;
2394
2395        err = superio_enter(sioaddr);
2396        if (err)
2397                return err;
2398
2399        err = -ENODEV;
2400        chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2401
2402        switch (chip_type) {
2403        case IT8705F_DEVID:
2404                sio_data->type = it87;
2405                break;
2406        case IT8712F_DEVID:
2407                sio_data->type = it8712;
2408                break;
2409        case IT8716F_DEVID:
2410        case IT8726F_DEVID:
2411                sio_data->type = it8716;
2412                break;
2413        case IT8718F_DEVID:
2414                sio_data->type = it8718;
2415                break;
2416        case IT8720F_DEVID:
2417                sio_data->type = it8720;
2418                break;
2419        case IT8721F_DEVID:
2420                sio_data->type = it8721;
2421                break;
2422        case IT8728F_DEVID:
2423                sio_data->type = it8728;
2424                break;
2425        case IT8732F_DEVID:
2426                sio_data->type = it8732;
2427                break;
2428        case IT8792E_DEVID:
2429                sio_data->type = it8792;
2430                break;
2431        case IT8771E_DEVID:
2432                sio_data->type = it8771;
2433                break;
2434        case IT8772E_DEVID:
2435                sio_data->type = it8772;
2436                break;
2437        case IT8781F_DEVID:
2438                sio_data->type = it8781;
2439                break;
2440        case IT8782F_DEVID:
2441                sio_data->type = it8782;
2442                break;
2443        case IT8783E_DEVID:
2444                sio_data->type = it8783;
2445                break;
2446        case IT8786E_DEVID:
2447                sio_data->type = it8786;
2448                break;
2449        case IT8790E_DEVID:
2450                sio_data->type = it8790;
2451                break;
2452        case IT8603E_DEVID:
2453        case IT8623E_DEVID:
2454                sio_data->type = it8603;
2455                break;
2456        case IT8620E_DEVID:
2457                sio_data->type = it8620;
2458                break;
2459        case IT8622E_DEVID:
2460                sio_data->type = it8622;
2461                break;
2462        case IT8628E_DEVID:
2463                sio_data->type = it8628;
2464                break;
2465        case 0xffff:    /* No device at all */
2466                goto exit;
2467        default:
2468                pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2469                goto exit;
2470        }
2471
2472        superio_select(sioaddr, PME);
2473        if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2474                pr_info("Device not activated, skipping\n");
2475                goto exit;
2476        }
2477
2478        *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2479        if (*address == 0) {
2480                pr_info("Base address not set, skipping\n");
2481                goto exit;
2482        }
2483
2484        err = 0;
2485        sio_data->sioaddr = sioaddr;
2486        sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2487        pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2488                it87_devices[sio_data->type].suffix,
2489                *address, sio_data->revision);
2490
2491        config = &it87_devices[sio_data->type];
2492
2493        /* in7 (VSB or VCCH5V) is always internal on some chips */
2494        if (has_in7_internal(config))
2495                sio_data->internal |= BIT(1);
2496
2497        /* in8 (Vbat) is always internal */
2498        sio_data->internal |= BIT(2);
2499
2500        /* in9 (AVCC3), always internal if supported */
2501        if (has_avcc3(config))
2502                sio_data->internal |= BIT(3); /* in9 is AVCC */
2503        else
2504                sio_data->skip_in |= BIT(9);
2505
2506        if (!has_five_pwm(config))
2507                sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2508        else if (!has_six_pwm(config))
2509                sio_data->skip_pwm |= BIT(5);
2510
2511        if (!has_vid(config))
2512                sio_data->skip_vid = 1;
2513
2514        /* Read GPIO config and VID value from LDN 7 (GPIO) */
2515        if (sio_data->type == it87) {
2516                /* The IT8705F has a different LD number for GPIO */
2517                superio_select(sioaddr, 5);
2518                sio_data->beep_pin = superio_inb(sioaddr,
2519                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2520        } else if (sio_data->type == it8783) {
2521                int reg25, reg27, reg2a, reg2c, regef;
2522
2523                superio_select(sioaddr, GPIO);
2524
2525                reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2526                reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2527                reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2528                reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2529                regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2530
2531                /* Check if fan3 is there or not */
2532                if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2533                        sio_data->skip_fan |= BIT(2);
2534                if ((reg25 & BIT(4)) ||
2535                    (!(reg2a & BIT(1)) && (regef & BIT(0))))
2536                        sio_data->skip_pwm |= BIT(2);
2537
2538                /* Check if fan2 is there or not */
2539                if (reg27 & BIT(7))
2540                        sio_data->skip_fan |= BIT(1);
2541                if (reg27 & BIT(3))
2542                        sio_data->skip_pwm |= BIT(1);
2543
2544                /* VIN5 */
2545                if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2546                        sio_data->skip_in |= BIT(5); /* No VIN5 */
2547
2548                /* VIN6 */
2549                if (reg27 & BIT(1))
2550                        sio_data->skip_in |= BIT(6); /* No VIN6 */
2551
2552                /*
2553                 * VIN7
2554                 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2555                 */
2556                if (reg27 & BIT(2)) {
2557                        /*
2558                         * The data sheet is a bit unclear regarding the
2559                         * internal voltage divider for VCCH5V. It says
2560                         * "This bit enables and switches VIN7 (pin 91) to the
2561                         * internal voltage divider for VCCH5V".
2562                         * This is different to other chips, where the internal
2563                         * voltage divider would connect VIN7 to an internal
2564                         * voltage source. Maybe that is the case here as well.
2565                         *
2566                         * Since we don't know for sure, re-route it if that is
2567                         * not the case, and ask the user to report if the
2568                         * resulting voltage is sane.
2569                         */
2570                        if (!(reg2c & BIT(1))) {
2571                                reg2c |= BIT(1);
2572                                superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2573                                             reg2c);
2574                                sio_data->need_in7_reroute = true;
2575                                pr_notice("Routing internal VCCH5V to in7.\n");
2576                        }
2577                        pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2578                        pr_notice("Please report if it displays a reasonable voltage.\n");
2579                }
2580
2581                if (reg2c & BIT(0))
2582                        sio_data->internal |= BIT(0);
2583                if (reg2c & BIT(1))
2584                        sio_data->internal |= BIT(1);
2585
2586                sio_data->beep_pin = superio_inb(sioaddr,
2587                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2588        } else if (sio_data->type == it8603) {
2589                int reg27, reg29;
2590
2591                superio_select(sioaddr, GPIO);
2592
2593                reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2594
2595                /* Check if fan3 is there or not */
2596                if (reg27 & BIT(6))
2597                        sio_data->skip_pwm |= BIT(2);
2598                if (reg27 & BIT(7))
2599                        sio_data->skip_fan |= BIT(2);
2600
2601                /* Check if fan2 is there or not */
2602                reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2603                if (reg29 & BIT(1))
2604                        sio_data->skip_pwm |= BIT(1);
2605                if (reg29 & BIT(2))
2606                        sio_data->skip_fan |= BIT(1);
2607
2608                sio_data->skip_in |= BIT(5); /* No VIN5 */
2609                sio_data->skip_in |= BIT(6); /* No VIN6 */
2610
2611                sio_data->beep_pin = superio_inb(sioaddr,
2612                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2613        } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2614                int reg;
2615
2616                superio_select(sioaddr, GPIO);
2617
2618                /* Check for pwm5 */
2619                reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2620                if (reg & BIT(6))
2621                        sio_data->skip_pwm |= BIT(4);
2622
2623                /* Check for fan4, fan5 */
2624                reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2625                if (!(reg & BIT(5)))
2626                        sio_data->skip_fan |= BIT(3);
2627                if (!(reg & BIT(4)))
2628                        sio_data->skip_fan |= BIT(4);
2629
2630                /* Check for pwm3, fan3 */
2631                reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2632                if (reg & BIT(6))
2633                        sio_data->skip_pwm |= BIT(2);
2634                if (reg & BIT(7))
2635                        sio_data->skip_fan |= BIT(2);
2636
2637                /* Check for pwm4 */
2638                reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2639                if (reg & BIT(2))
2640                        sio_data->skip_pwm |= BIT(3);
2641
2642                /* Check for pwm2, fan2 */
2643                reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2644                if (reg & BIT(1))
2645                        sio_data->skip_pwm |= BIT(1);
2646                if (reg & BIT(2))
2647                        sio_data->skip_fan |= BIT(1);
2648                /* Check for pwm6, fan6 */
2649                if (!(reg & BIT(7))) {
2650                        sio_data->skip_pwm |= BIT(5);
2651                        sio_data->skip_fan |= BIT(5);
2652                }
2653
2654                /* Check if AVCC is on VIN3 */
2655                reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2656                if (reg & BIT(0))
2657                        sio_data->internal |= BIT(0);
2658                else
2659                        sio_data->skip_in |= BIT(9);
2660
2661                sio_data->beep_pin = superio_inb(sioaddr,
2662                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2663        } else if (sio_data->type == it8622) {
2664                int reg;
2665
2666                superio_select(sioaddr, GPIO);
2667
2668                /* Check for pwm4, fan4 */
2669                reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2670                if (reg & BIT(6))
2671                        sio_data->skip_fan |= BIT(3);
2672                if (reg & BIT(5))
2673                        sio_data->skip_pwm |= BIT(3);
2674
2675                /* Check for pwm3, fan3, pwm5, fan5 */
2676                reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2677                if (reg & BIT(6))
2678                        sio_data->skip_pwm |= BIT(2);
2679                if (reg & BIT(7))
2680                        sio_data->skip_fan |= BIT(2);
2681                if (reg & BIT(3))
2682                        sio_data->skip_pwm |= BIT(4);
2683                if (reg & BIT(1))
2684                        sio_data->skip_fan |= BIT(4);
2685
2686                /* Check for pwm2, fan2 */
2687                reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2688                if (reg & BIT(1))
2689                        sio_data->skip_pwm |= BIT(1);
2690                if (reg & BIT(2))
2691                        sio_data->skip_fan |= BIT(1);
2692
2693                /* Check for AVCC */
2694                reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2695                if (!(reg & BIT(0)))
2696                        sio_data->skip_in |= BIT(9);
2697
2698                sio_data->beep_pin = superio_inb(sioaddr,
2699                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2700        } else {
2701                int reg;
2702                bool uart6;
2703
2704                superio_select(sioaddr, GPIO);
2705
2706                /* Check for fan4, fan5 */
2707                if (has_five_fans(config)) {
2708                        reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2709                        switch (sio_data->type) {
2710                        case it8718:
2711                                if (reg & BIT(5))
2712                                        sio_data->skip_fan |= BIT(3);
2713                                if (reg & BIT(4))
2714                                        sio_data->skip_fan |= BIT(4);
2715                                break;
2716                        case it8720:
2717                        case it8721:
2718                        case it8728:
2719                                if (!(reg & BIT(5)))
2720                                        sio_data->skip_fan |= BIT(3);
2721                                if (!(reg & BIT(4)))
2722                                        sio_data->skip_fan |= BIT(4);
2723                                break;
2724                        default:
2725                                break;
2726                        }
2727                }
2728
2729                reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2730                if (!sio_data->skip_vid) {
2731                        /* We need at least 4 VID pins */
2732                        if (reg & 0x0f) {
2733                                pr_info("VID is disabled (pins used for GPIO)\n");
2734                                sio_data->skip_vid = 1;
2735                        }
2736                }
2737
2738                /* Check if fan3 is there or not */
2739                if (reg & BIT(6))
2740                        sio_data->skip_pwm |= BIT(2);
2741                if (reg & BIT(7))
2742                        sio_data->skip_fan |= BIT(2);
2743
2744                /* Check if fan2 is there or not */
2745                reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2746                if (reg & BIT(1))
2747                        sio_data->skip_pwm |= BIT(1);
2748                if (reg & BIT(2))
2749                        sio_data->skip_fan |= BIT(1);
2750
2751                if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2752                    !(sio_data->skip_vid))
2753                        sio_data->vid_value = superio_inb(sioaddr,
2754                                                          IT87_SIO_VID_REG);
2755
2756                reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2757
2758                uart6 = sio_data->type == it8782 && (reg & BIT(2));
2759
2760                /*
2761                 * The IT8720F has no VIN7 pin, so VCCH5V should always be
2762                 * routed internally to VIN7 with an internal divider.
2763                 * Curiously, there still is a configuration bit to control
2764                 * this, which means it can be set incorrectly. And even
2765                 * more curiously, many boards out there are improperly
2766                 * configured, even though the IT8720F datasheet claims
2767                 * that the internal routing of VCCH5V to VIN7 is the default
2768                 * setting. So we force the internal routing in this case.
2769                 *
2770                 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2771                 * If UART6 is enabled, re-route VIN7 to the internal divider
2772                 * if that is not already the case.
2773                 */
2774                if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2775                        reg |= BIT(1);
2776                        superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2777                        sio_data->need_in7_reroute = true;
2778                        pr_notice("Routing internal VCCH5V to in7\n");
2779                }
2780                if (reg & BIT(0))
2781                        sio_data->internal |= BIT(0);
2782                if (reg & BIT(1))
2783                        sio_data->internal |= BIT(1);
2784
2785                /*
2786                 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2787                 * While VIN7 can be routed to the internal voltage divider,
2788                 * VIN5 and VIN6 are not available if UART6 is enabled.
2789                 *
2790                 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2791                 * is the temperature source. Since we can not read the
2792                 * temperature source here, skip_temp is preliminary.
2793                 */
2794                if (uart6) {
2795                        sio_data->skip_in |= BIT(5) | BIT(6);
2796                        sio_data->skip_temp |= BIT(2);
2797                }
2798
2799                sio_data->beep_pin = superio_inb(sioaddr,
2800                                                 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2801        }
2802        if (sio_data->beep_pin)
2803                pr_info("Beeping is supported\n");
2804
2805        /* Disable specific features based on DMI strings */
2806        board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2807        board_name = dmi_get_system_info(DMI_BOARD_NAME);
2808        if (board_vendor && board_name) {
2809                if (strcmp(board_vendor, "nVIDIA") == 0 &&
2810                    strcmp(board_name, "FN68PT") == 0) {
2811                        /*
2812                         * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2813                         * connected to a fan, but to something else. One user
2814                         * has reported instant system power-off when changing
2815                         * the PWM2 duty cycle, so we disable it.
2816                         * I use the board name string as the trigger in case
2817                         * the same board is ever used in other systems.
2818                         */
2819                        pr_info("Disabling pwm2 due to hardware constraints\n");
2820                        sio_data->skip_pwm = BIT(1);
2821                }
2822        }
2823
2824exit:
2825        superio_exit(sioaddr);
2826        return err;
2827}
2828
2829/*
2830 * Some chips seem to have default value 0xff for all limit
2831 * registers. For low voltage limits it makes no sense and triggers
2832 * alarms, so change to 0 instead. For high temperature limits, it
2833 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2834 * but is still confusing, so change to 127 degrees C.
2835 */
2836static void it87_check_limit_regs(struct it87_data *data)
2837{
2838        int i, reg;
2839
2840        for (i = 0; i < NUM_VIN_LIMIT; i++) {
2841                reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
2842                if (reg == 0xff)
2843                        it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2844        }
2845        for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2846                reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2847                if (reg == 0xff)
2848                        it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2849        }
2850}
2851
2852/* Check if voltage monitors are reset manually or by some reason */
2853static void it87_check_voltage_monitors_reset(struct it87_data *data)
2854{
2855        int reg;
2856
2857        reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
2858        if ((reg & 0xff) == 0) {
2859                /* Enable all voltage monitors */
2860                it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2861        }
2862}
2863
2864/* Check if tachometers are reset manually or by some reason */
2865static void it87_check_tachometers_reset(struct platform_device *pdev)
2866{
2867        struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2868        struct it87_data *data = platform_get_drvdata(pdev);
2869        u8 mask, fan_main_ctrl;
2870
2871        mask = 0x70 & ~(sio_data->skip_fan << 4);
2872        fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2873        if ((fan_main_ctrl & mask) == 0) {
2874                /* Enable all fan tachometers */
2875                fan_main_ctrl |= mask;
2876                it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2877                                 fan_main_ctrl);
2878        }
2879}
2880
2881/* Set tachometers to 16-bit mode if needed */
2882static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
2883{
2884        struct it87_data *data = platform_get_drvdata(pdev);
2885        int reg;
2886
2887        if (!has_fan16_config(data))
2888                return;
2889
2890        reg = it87_read_value(data, IT87_REG_FAN_16BIT);
2891        if (~reg & 0x07 & data->has_fan) {
2892                dev_dbg(&pdev->dev,
2893                        "Setting fan1-3 to 16-bit mode\n");
2894                it87_write_value(data, IT87_REG_FAN_16BIT,
2895                                 reg | 0x07);
2896        }
2897}
2898
2899static void it87_start_monitoring(struct it87_data *data)
2900{
2901        it87_write_value(data, IT87_REG_CONFIG,
2902                         (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2903                         | (update_vbat ? 0x41 : 0x01));
2904}
2905
2906/* Called when we have found a new IT87. */
2907static void it87_init_device(struct platform_device *pdev)
2908{
2909        struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2910        struct it87_data *data = platform_get_drvdata(pdev);
2911        int tmp, i;
2912
2913        /*
2914         * For each PWM channel:
2915         * - If it is in automatic mode, setting to manual mode should set
2916         *   the fan to full speed by default.
2917         * - If it is in manual mode, we need a mapping to temperature
2918         *   channels to use when later setting to automatic mode later.
2919         *   Use a 1:1 mapping by default (we are clueless.)
2920         * In both cases, the value can (and should) be changed by the user
2921         * prior to switching to a different mode.
2922         * Note that this is no longer needed for the IT8721F and later, as
2923         * these have separate registers for the temperature mapping and the
2924         * manual duty cycle.
2925         */
2926        for (i = 0; i < NUM_AUTO_PWM; i++) {
2927                data->pwm_temp_map[i] = i;
2928                data->pwm_duty[i] = 0x7f;       /* Full speed */
2929                data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2930        }
2931
2932        it87_check_limit_regs(data);
2933
2934        /*
2935         * Temperature channels are not forcibly enabled, as they can be
2936         * set to two different sensor types and we can't guess which one
2937         * is correct for a given system. These channels can be enabled at
2938         * run-time through the temp{1-3}_type sysfs accessors if needed.
2939         */
2940
2941        it87_check_voltage_monitors_reset(data);
2942
2943        it87_check_tachometers_reset(pdev);
2944
2945        data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2946        data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2947
2948        it87_check_tachometers_16bit_mode(pdev);
2949
2950        /* Check for additional fans */
2951        if (has_five_fans(data)) {
2952                tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2953
2954                if (tmp & BIT(4))
2955                        data->has_fan |= BIT(3); /* fan4 enabled */
2956                if (tmp & BIT(5))
2957                        data->has_fan |= BIT(4); /* fan5 enabled */
2958                if (has_six_fans(data) && (tmp & BIT(2)))
2959                        data->has_fan |= BIT(5); /* fan6 enabled */
2960        }
2961
2962        /* Fan input pins may be used for alternative functions */
2963        data->has_fan &= ~sio_data->skip_fan;
2964
2965        /* Check if pwm5, pwm6 are enabled */
2966        if (has_six_pwm(data)) {
2967                /* The following code may be IT8620E specific */
2968                tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2969                if ((tmp & 0xc0) == 0xc0)
2970                        sio_data->skip_pwm |= BIT(4);
2971                if (!(tmp & BIT(3)))
2972                        sio_data->skip_pwm |= BIT(5);
2973        }
2974
2975        it87_start_monitoring(data);
2976}
2977
2978/* Return 1 if and only if the PWM interface is safe to use */
2979static int it87_check_pwm(struct device *dev)
2980{
2981        struct it87_data *data = dev_get_drvdata(dev);
2982        /*
2983         * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2984         * and polarity set to active low is sign that this is the case so we
2985         * disable pwm control to protect the user.
2986         */
2987        int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2988
2989        if ((tmp & 0x87) == 0) {
2990                if (fix_pwm_polarity) {
2991                        /*
2992                         * The user asks us to attempt a chip reconfiguration.
2993                         * This means switching to active high polarity and
2994                         * inverting all fan speed values.
2995                         */
2996                        int i;
2997                        u8 pwm[3];
2998
2999                        for (i = 0; i < ARRAY_SIZE(pwm); i++)
3000                                pwm[i] = it87_read_value(data,
3001                                                         IT87_REG_PWM[i]);
3002
3003                        /*
3004                         * If any fan is in automatic pwm mode, the polarity
3005                         * might be correct, as suspicious as it seems, so we
3006                         * better don't change anything (but still disable the
3007                         * PWM interface).
3008                         */
3009                        if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3010                                dev_info(dev,
3011                                         "Reconfiguring PWM to active high polarity\n");
3012                                it87_write_value(data, IT87_REG_FAN_CTL,
3013                                                 tmp | 0x87);
3014                                for (i = 0; i < 3; i++)
3015                                        it87_write_value(data,
3016                                                         IT87_REG_PWM[i],
3017                                                         0x7f & ~pwm[i]);
3018                                return 1;
3019                        }
3020
3021                        dev_info(dev,
3022                                 "PWM configuration is too broken to be fixed\n");
3023                }
3024
3025                return 0;
3026        } else if (fix_pwm_polarity) {
3027                dev_info(dev,
3028                         "PWM configuration looks sane, won't touch\n");
3029        }
3030
3031        return 1;
3032}
3033
3034static int it87_probe(struct platform_device *pdev)
3035{
3036        struct it87_data *data;
3037        struct resource *res;
3038        struct device *dev = &pdev->dev;
3039        struct it87_sio_data *sio_data = dev_get_platdata(dev);
3040        int enable_pwm_interface;
3041        struct device *hwmon_dev;
3042
3043        res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3044        if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3045                                 DRVNAME)) {
3046                dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3047                        (unsigned long)res->start,
3048                        (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3049                return -EBUSY;
3050        }
3051
3052        data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3053        if (!data)
3054                return -ENOMEM;
3055
3056        data->addr = res->start;
3057        data->sioaddr = sio_data->sioaddr;
3058        data->type = sio_data->type;
3059        data->features = it87_devices[sio_data->type].features;
3060        data->peci_mask = it87_devices[sio_data->type].peci_mask;
3061        data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3062        /*
3063         * IT8705F Datasheet 0.4.1, 3h == Version G.
3064         * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3065         * These are the first revisions with 16-bit tachometer support.
3066         */
3067        switch (data->type) {
3068        case it87:
3069                if (sio_data->revision >= 0x03) {
3070                        data->features &= ~FEAT_OLD_AUTOPWM;
3071                        data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3072                }
3073                break;
3074        case it8712:
3075                if (sio_data->revision >= 0x08) {
3076                        data->features &= ~FEAT_OLD_AUTOPWM;
3077                        data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3078                                          FEAT_FIVE_FANS;
3079                }
3080                break;
3081        default:
3082                break;
3083        }
3084
3085        /* Now, we do the remaining detection. */
3086        if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3087            it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3088                return -ENODEV;
3089
3090        platform_set_drvdata(pdev, data);
3091
3092        mutex_init(&data->update_lock);
3093
3094        /* Check PWM configuration */
3095        enable_pwm_interface = it87_check_pwm(dev);
3096        if (!enable_pwm_interface)
3097                dev_info(dev,
3098                         "Detected broken BIOS defaults, disabling PWM interface\n");
3099
3100        /* Starting with IT8721F, we handle scaling of internal voltages */
3101        if (has_12mv_adc(data)) {
3102                if (sio_data->internal & BIT(0))
3103                        data->in_scaled |= BIT(3);      /* in3 is AVCC */
3104                if (sio_data->internal & BIT(1))
3105                        data->in_scaled |= BIT(7);      /* in7 is VSB */
3106                if (sio_data->internal & BIT(2))
3107                        data->in_scaled |= BIT(8);      /* in8 is Vbat */
3108                if (sio_data->internal & BIT(3))
3109                        data->in_scaled |= BIT(9);      /* in9 is AVCC */
3110        } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3111                   sio_data->type == it8783) {
3112                if (sio_data->internal & BIT(0))
3113                        data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3114                if (sio_data->internal & BIT(1))
3115                        data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3116        }
3117
3118        data->has_temp = 0x07;
3119        if (sio_data->skip_temp & BIT(2)) {
3120                if (sio_data->type == it8782 &&
3121                    !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3122                        data->has_temp &= ~BIT(2);
3123        }
3124
3125        data->in_internal = sio_data->internal;
3126        data->need_in7_reroute = sio_data->need_in7_reroute;
3127        data->has_in = 0x3ff & ~sio_data->skip_in;
3128
3129        if (has_six_temp(data)) {
3130                u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3131
3132                /* Check for additional temperature sensors */
3133                if ((reg & 0x03) >= 0x02)
3134                        data->has_temp |= BIT(3);
3135                if (((reg >> 2) & 0x03) >= 0x02)
3136                        data->has_temp |= BIT(4);
3137                if (((reg >> 4) & 0x03) >= 0x02)
3138                        data->has_temp |= BIT(5);
3139
3140                /* Check for additional voltage sensors */
3141                if ((reg & 0x03) == 0x01)
3142                        data->has_in |= BIT(10);
3143                if (((reg >> 2) & 0x03) == 0x01)
3144                        data->has_in |= BIT(11);
3145                if (((reg >> 4) & 0x03) == 0x01)
3146                        data->has_in |= BIT(12);
3147        }
3148
3149        data->has_beep = !!sio_data->beep_pin;
3150
3151        /* Initialize the IT87 chip */
3152        it87_init_device(pdev);
3153
3154        if (!sio_data->skip_vid) {
3155                data->has_vid = true;
3156                data->vrm = vid_which_vrm();
3157                /* VID reading from Super-I/O config space if available */
3158                data->vid = sio_data->vid_value;
3159        }
3160
3161        /* Prepare for sysfs hooks */
3162        data->groups[0] = &it87_group;
3163        data->groups[1] = &it87_group_in;
3164        data->groups[2] = &it87_group_temp;
3165        data->groups[3] = &it87_group_fan;
3166
3167        if (enable_pwm_interface) {
3168                data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3169                data->has_pwm &= ~sio_data->skip_pwm;
3170
3171                data->groups[4] = &it87_group_pwm;
3172                if (has_old_autopwm(data) || has_newer_autopwm(data))
3173                        data->groups[5] = &it87_group_auto_pwm;
3174        }
3175
3176        hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3177                                        it87_devices[sio_data->type].name,
3178                                        data, data->groups);
3179        return PTR_ERR_OR_ZERO(hwmon_dev);
3180}
3181
3182static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
3183{
3184        struct it87_data *data = dev_get_drvdata(&pdev->dev);
3185        int err;
3186        int reg2c;
3187
3188        if (!data->need_in7_reroute)
3189                return;
3190
3191        err = superio_enter(data->sioaddr);
3192        if (err) {
3193                dev_warn(&pdev->dev,
3194                         "Unable to enter Super I/O to reroute in7 (%d)",
3195                         err);
3196                return;
3197        }
3198
3199        superio_select(data->sioaddr, GPIO);
3200
3201        reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3202        if (!(reg2c & BIT(1))) {
3203                dev_dbg(&pdev->dev,
3204                        "Routing internal VCCH5V to in7 again");
3205
3206                reg2c |= BIT(1);
3207                superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3208                             reg2c);
3209        }
3210
3211        superio_exit(data->sioaddr);
3212}
3213
3214static int __maybe_unused it87_resume(struct device *dev)
3215{
3216        struct platform_device *pdev = to_platform_device(dev);
3217        struct it87_data *data = dev_get_drvdata(dev);
3218
3219        it87_resume_sio(pdev);
3220
3221        mutex_lock(&data->update_lock);
3222
3223        it87_check_pwm(dev);
3224        it87_check_limit_regs(data);
3225        it87_check_voltage_monitors_reset(data);
3226        it87_check_tachometers_reset(pdev);
3227        it87_check_tachometers_16bit_mode(pdev);
3228
3229        it87_start_monitoring(data);
3230
3231        /* force update */
3232        data->valid = 0;
3233
3234        mutex_unlock(&data->update_lock);
3235
3236        it87_update_device(dev);
3237
3238        return 0;
3239}
3240
3241static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3242
3243static struct platform_driver it87_driver = {
3244        .driver = {
3245                .name   = DRVNAME,
3246                .pm     = &it87_dev_pm_ops,
3247        },
3248        .probe  = it87_probe,
3249};
3250
3251static int __init it87_device_add(int index, unsigned short address,
3252                                  const struct it87_sio_data *sio_data)
3253{
3254        struct platform_device *pdev;
3255        struct resource res = {
3256                .start  = address + IT87_EC_OFFSET,
3257                .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3258                .name   = DRVNAME,
3259                .flags  = IORESOURCE_IO,
3260        };
3261        int err;
3262
3263        err = acpi_check_resource_conflict(&res);
3264        if (err)
3265                return err;
3266
3267        pdev = platform_device_alloc(DRVNAME, address);
3268        if (!pdev)
3269                return -ENOMEM;
3270
3271        err = platform_device_add_resources(pdev, &res, 1);
3272        if (err) {
3273                pr_err("Device resource addition failed (%d)\n", err);
3274                goto exit_device_put;
3275        }
3276
3277        err = platform_device_add_data(pdev, sio_data,
3278                                       sizeof(struct it87_sio_data));
3279        if (err) {
3280                pr_err("Platform data allocation failed\n");
3281                goto exit_device_put;
3282        }
3283
3284        err = platform_device_add(pdev);
3285        if (err) {
3286                pr_err("Device addition failed (%d)\n", err);
3287                goto exit_device_put;
3288        }
3289
3290        it87_pdev[index] = pdev;
3291        return 0;
3292
3293exit_device_put:
3294        platform_device_put(pdev);
3295        return err;
3296}
3297
3298static int __init sm_it87_init(void)
3299{
3300        int sioaddr[2] = { REG_2E, REG_4E };
3301        struct it87_sio_data sio_data;
3302        unsigned short isa_address[2];
3303        bool found = false;
3304        int i, err;
3305
3306        err = platform_driver_register(&it87_driver);
3307        if (err)
3308                return err;
3309
3310        for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3311                memset(&sio_data, 0, sizeof(struct it87_sio_data));
3312                isa_address[i] = 0;
3313                err = it87_find(sioaddr[i], &isa_address[i], &sio_data);
3314                if (err || isa_address[i] == 0)
3315                        continue;
3316                /*
3317                 * Don't register second chip if its ISA address matches
3318                 * the first chip's ISA address.
3319                 */
3320                if (i && isa_address[i] == isa_address[0])
3321                        break;
3322
3323                err = it87_device_add(i, isa_address[i], &sio_data);
3324                if (err)
3325                        goto exit_dev_unregister;
3326
3327                found = true;
3328
3329                /*
3330                 * IT8705F may respond on both SIO addresses.
3331                 * Stop probing after finding one.
3332                 */
3333                if (sio_data.type == it87)
3334                        break;
3335        }
3336
3337        if (!found) {
3338                err = -ENODEV;
3339                goto exit_unregister;
3340        }
3341        return 0;
3342
3343exit_dev_unregister:
3344        /* NULL check handled by platform_device_unregister */
3345        platform_device_unregister(it87_pdev[0]);
3346exit_unregister:
3347        platform_driver_unregister(&it87_driver);
3348        return err;
3349}
3350
3351static void __exit sm_it87_exit(void)
3352{
3353        /* NULL check handled by platform_device_unregister */
3354        platform_device_unregister(it87_pdev[1]);
3355        platform_device_unregister(it87_pdev[0]);
3356        platform_driver_unregister(&it87_driver);
3357}
3358
3359MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3360MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3361module_param(update_vbat, bool, 0);
3362MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3363module_param(fix_pwm_polarity, bool, 0);
3364MODULE_PARM_DESC(fix_pwm_polarity,
3365                 "Force PWM polarity to active high (DANGEROUS)");
3366MODULE_LICENSE("GPL");
3367
3368module_init(sm_it87_init);
3369module_exit(sm_it87_exit);
3370