LXR linux/drivers/mmc/host/tmio

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Driver for the MMC / SD / SDIO cell found in:
   4 *
   5 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
   6 *
   7 * Copyright (C) 2015-19 Renesas Electronics Corporation
   8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
   9 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
  10 * Copyright (C) 2007 Ian Molton
  11 * Copyright (C) 2004 Ian Molton
  12 */
  13
  14#ifndef TMIO_MMC_H
  15#define TMIO_MMC_H
  16
  17#include <linux/dmaengine.h>
  18#include <linux/highmem.h>
  19#include <linux/mutex.h>
  20#include <linux/pagemap.h>
  21#include <linux/scatterlist.h>
  22#include <linux/spinlock.h>
  23#include <linux/interrupt.h>
  24
  25#define CTL_SD_CMD 0x00
  26#define CTL_ARG_REG 0x04
  27#define CTL_STOP_INTERNAL_ACTION 0x08
  28#define CTL_XFER_BLK_COUNT 0xa
  29#define CTL_RESPONSE 0x0c
  30/* driver merges STATUS and following STATUS2 */
  31#define CTL_STATUS 0x1c
  32/* driver merges IRQ_MASK and following IRQ_MASK2 */
  33#define CTL_IRQ_MASK 0x20
  34#define CTL_SD_CARD_CLK_CTL 0x24
  35#define CTL_SD_XFER_LEN 0x26
  36#define CTL_SD_MEM_CARD_OPT 0x28
  37#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  38#define CTL_SD_DATA_PORT 0x30
  39#define CTL_TRANSACTION_CTL 0x34
  40#define CTL_SDIO_STATUS 0x36
  41#define CTL_SDIO_IRQ_MASK 0x38
  42#define CTL_DMA_ENABLE 0xd8
  43#define CTL_RESET_SD 0xe0
  44#define CTL_VERSION 0xe2
  45#define CTL_SDIF_MODE 0xe6
  46
  47/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
  48#define TMIO_STOP_STP           BIT(0)
  49#define TMIO_STOP_SEC           BIT(8)
  50
  51/* Definitions for values the CTL_STATUS register can take */
  52#define TMIO_STAT_CMDRESPEND    BIT(0)
  53#define TMIO_STAT_DATAEND       BIT(2)
  54#define TMIO_STAT_CARD_REMOVE   BIT(3)
  55#define TMIO_STAT_CARD_INSERT   BIT(4)
  56#define TMIO_STAT_SIGSTATE      BIT(5)
  57#define TMIO_STAT_WRPROTECT     BIT(7)
  58#define TMIO_STAT_CARD_REMOVE_A BIT(8)
  59#define TMIO_STAT_CARD_INSERT_A BIT(9)
  60#define TMIO_STAT_SIGSTATE_A    BIT(10)
  61
  62/* These belong technically to CTL_STATUS2, but the driver merges them */
  63#define TMIO_STAT_CMD_IDX_ERR   BIT(16)
  64#define TMIO_STAT_CRCFAIL       BIT(17)
  65#define TMIO_STAT_STOPBIT_ERR   BIT(18)
  66#define TMIO_STAT_DATATIMEOUT   BIT(19)
  67#define TMIO_STAT_RXOVERFLOW    BIT(20)
  68#define TMIO_STAT_TXUNDERRUN    BIT(21)
  69#define TMIO_STAT_CMDTIMEOUT    BIT(22)
  70#define TMIO_STAT_DAT0          BIT(23) /* only known on R-Car so far */
  71#define TMIO_STAT_RXRDY         BIT(24)
  72#define TMIO_STAT_TXRQ          BIT(25)
  73#define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */
  74#define TMIO_STAT_ILL_FUNC      BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  75#define TMIO_STAT_SCLKDIVEN     BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  76#define TMIO_STAT_CMD_BUSY      BIT(30)
  77#define TMIO_STAT_ILL_ACCESS    BIT(31)
  78
  79/* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
  80#define CLK_CTL_DIV_MASK        0xff
  81#define CLK_CTL_SCLKEN          BIT(8)
  82
  83/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
  84#define CARD_OPT_WIDTH8         BIT(13)
  85#define CARD_OPT_WIDTH          BIT(15)
  86
  87/* Definitions for values the CTL_SDIO_STATUS register can take */
  88#define TMIO_SDIO_STAT_IOIRQ    0x0001
  89#define TMIO_SDIO_STAT_EXPUB52  0x4000
  90#define TMIO_SDIO_STAT_EXWT     0x8000
  91#define TMIO_SDIO_MASK_ALL      0xc007
  92
  93#define TMIO_SDIO_SETBITS_MASK  0x0006
  94
  95/* Definitions for values the CTL_DMA_ENABLE register can take */
  96#define DMA_ENABLE_DMASDRW      BIT(1)
  97
  98/* Define some IRQ masks */
  99/* This is the mask used at reset by the chip */
 100#define TMIO_MASK_INIT_RCAR2    0x8b7f031d /* Initial value for R-Car Gen2+ */
 101#define TMIO_MASK_ALL           0x837f031d
 102#define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
 103#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
 104#define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
 105                TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
 106#define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
 107
 108#define TMIO_MAX_BLK_SIZE 512
 109
 110struct tmio_mmc_data;
 111struct tmio_mmc_host;
 112
 113struct tmio_mmc_dma_ops {
 114        void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
 115        void (*enable)(struct tmio_mmc_host *host, bool enable);
 116        void (*request)(struct tmio_mmc_host *host,
 117                        struct tmio_mmc_data *pdata);
 118        void (*release)(struct tmio_mmc_host *host);
 119        void (*abort)(struct tmio_mmc_host *host);
 120        void (*dataend)(struct tmio_mmc_host *host);
 121};
 122
 123struct tmio_mmc_host {
 124        void __iomem *ctl;
 125        struct mmc_command      *cmd;
 126        struct mmc_request      *mrq;
 127        struct mmc_data         *data;
 128        struct mmc_host         *mmc;
 129        struct mmc_host_ops     ops;
 130
 131        /* Callbacks for clock / power control */
 132        void (*set_pwr)(struct platform_device *host, int state);
 133
 134        /* pio related stuff */
 135        struct scatterlist      *sg_ptr;
 136        struct scatterlist      *sg_orig;
 137        unsigned int            sg_len;
 138        unsigned int            sg_off;
 139        unsigned int            bus_shift;
 140
 141        struct platform_device *pdev;
 142        struct tmio_mmc_data *pdata;
 143
 144        /* DMA support */
 145        bool                    dma_on;
 146        struct dma_chan         *chan_rx;
 147        struct dma_chan         *chan_tx;
 148        struct tasklet_struct   dma_issue;
 149        struct scatterlist      bounce_sg;
 150        u8                      *bounce_buf;
 151
 152        /* Track lost interrupts */
 153        struct delayed_work     delayed_reset_work;
 154        struct work_struct      done;
 155
 156        /* Cache */
 157        u32                     sdcard_irq_mask;
 158        u32                     sdio_irq_mask;
 159        unsigned int            clk_cache;
 160        u32                     sdcard_irq_setbit_mask;
 161
 162        spinlock_t              lock;           /* protect host private data */
 163        unsigned long           last_req_ts;
 164        struct mutex            ios_lock;       /* protect set_ios() context */
 165        bool                    native_hotplug;
 166        bool                    runtime_synced;
 167        bool                    sdio_irq_enabled;
 168
 169        /* Mandatory callback */
 170        int (*clk_enable)(struct tmio_mmc_host *host);
 171        void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);
 172
 173        /* Optional callbacks */
 174        void (*clk_disable)(struct tmio_mmc_host *host);
 175        int (*multi_io_quirk)(struct mmc_card *card,
 176                              unsigned int direction, int blk_size);
 177        int (*write16_hook)(struct tmio_mmc_host *host, int addr);
 178        void (*reset)(struct tmio_mmc_host *host);
 179        void (*hw_reset)(struct tmio_mmc_host *host);
 180        void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
 181        bool (*check_scc_error)(struct tmio_mmc_host *host);
 182
 183        /*
 184         * Mandatory callback for tuning to occur which is optional for SDR50
 185         * and mandatory for SDR104.
 186         */
 187        unsigned int (*init_tuning)(struct tmio_mmc_host *host);
 188        int (*select_tuning)(struct tmio_mmc_host *host);
 189
 190        /* Tuning values: 1 for success, 0 for failure */
 191        DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
 192        unsigned int tap_num;
 193        unsigned long tap_set;
 194
 195        void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
 196        void (*hs400_downgrade)(struct tmio_mmc_host *host);
 197        void (*hs400_complete)(struct tmio_mmc_host *host);
 198
 199        const struct tmio_mmc_dma_ops *dma_ops;
 200};
 201
 202struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
 203                                          struct tmio_mmc_data *pdata);
 204void tmio_mmc_host_free(struct tmio_mmc_host *host);
 205int tmio_mmc_host_probe(struct tmio_mmc_host *host);
 206void tmio_mmc_host_remove(struct tmio_mmc_host *host);
 207void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
 208
 209void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 210void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 211irqreturn_t tmio_mmc_irq(int irq, void *devid);
 212
 213static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
 214                                         unsigned long *flags)
 215{
 216        local_irq_save(*flags);
 217        return kmap_atomic(sg_page(sg)) + sg->offset;
 218}
 219
 220static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
 221                                          unsigned long *flags, void *virt)
 222{
 223        kunmap_atomic(virt - sg->offset);
 224        local_irq_restore(*flags);
 225}
 226
 227#ifdef CONFIG_PM
 228int tmio_mmc_host_runtime_suspend(struct device *dev);
 229int tmio_mmc_host_runtime_resume(struct device *dev);
 230#endif
 231
 232static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
 233{
 234        return ioread16(host->ctl + (addr << host->bus_shift));
 235}
 236
 237static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
 238                                      u16 *buf, int count)
 239{
 240        ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
 241}
 242
 243static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
 244                                              int addr)
 245{
 246        return ioread16(host->ctl + (addr << host->bus_shift)) |
 247               ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
 248}
 249
 250static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
 251                                      u32 *buf, int count)
 252{
 253        ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
 254}
 255
 256static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
 257                                   u16 val)
 258{
 259        /* If there is a hook and it returns non-zero then there
 260         * is an error and the write should be skipped
 261         */
 262        if (host->write16_hook && host->write16_hook(host, addr))
 263                return;
 264        iowrite16(val, host->ctl + (addr << host->bus_shift));
 265}
 266
 267static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
 268                                       u16 *buf, int count)
 269{
 270        iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
 271}
 272
 273static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
 274                                                int addr, u32 val)
 275{
 276        if (addr == CTL_IRQ_MASK || addr == CTL_STATUS)
 277                val |= host->sdcard_irq_setbit_mask;
 278
 279        iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
 280        iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
 281}
 282
 283static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val)
 284{
 285        iowrite32(val, host->ctl + (addr << host->bus_shift));
 286}
 287
 288static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
 289                                       const u32 *buf, int count)
 290{
 291        iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
 292}
 293
 294#endif
 295