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36#ifndef __T4VF_COMMON_H__
37#define __T4VF_COMMON_H__
38
39#include "../cxgb4/t4_hw.h"
40#include "../cxgb4/t4fw_api.h"
41
42#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
43#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
44#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
45
46
47
48
49
50
51
52
53#define CHELSIO_T4 0x4
54#define CHELSIO_T5 0x5
55#define CHELSIO_T6 0x6
56
57enum chip_type {
58 T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
59 T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
60 T4_FIRST_REV = T4_A1,
61 T4_LAST_REV = T4_A2,
62
63 T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
64 T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
65 T5_FIRST_REV = T5_A0,
66 T5_LAST_REV = T5_A1,
67};
68
69
70
71
72#define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)
73
74
75
76
77struct t4vf_port_stats {
78
79
80
81 u64 tx_bcast_bytes;
82 u64 tx_bcast_frames;
83 u64 tx_mcast_bytes;
84 u64 tx_mcast_frames;
85 u64 tx_ucast_bytes;
86 u64 tx_ucast_frames;
87 u64 tx_drop_frames;
88 u64 tx_offload_bytes;
89 u64 tx_offload_frames;
90
91
92
93
94 u64 rx_bcast_bytes;
95 u64 rx_bcast_frames;
96 u64 rx_mcast_bytes;
97 u64 rx_mcast_frames;
98 u64 rx_ucast_bytes;
99 u64 rx_ucast_frames;
100
101 u64 rx_err_frames;
102};
103
104
105
106
107typedef u16 fw_port_cap16_t;
108typedef u32 fw_port_cap32_t;
109
110enum fw_caps {
111 FW_CAPS_UNKNOWN = 0,
112 FW_CAPS16 = 1,
113 FW_CAPS32 = 2,
114};
115
116enum cc_pause {
117 PAUSE_RX = 1 << 0,
118 PAUSE_TX = 1 << 1,
119 PAUSE_AUTONEG = 1 << 2
120};
121
122enum cc_fec {
123 FEC_AUTO = 1 << 0,
124 FEC_RS = 1 << 1,
125 FEC_BASER_RS = 1 << 2,
126};
127
128struct link_config {
129 fw_port_cap32_t pcaps;
130 fw_port_cap32_t acaps;
131 fw_port_cap32_t lpacaps;
132
133 fw_port_cap32_t speed_caps;
134 u32 speed;
135
136 enum cc_pause requested_fc;
137 enum cc_pause fc;
138
139 enum cc_fec auto_fec;
140 enum cc_fec requested_fec;
141 enum cc_fec fec;
142
143 unsigned char autoneg;
144
145 unsigned char link_ok;
146 unsigned char link_down_rc;
147};
148
149
150
151
152static inline bool is_x_10g_port(const struct link_config *lc)
153{
154 fw_port_cap32_t speeds, high_speeds;
155
156 speeds = FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_G(lc->pcaps));
157 high_speeds =
158 speeds & ~(FW_PORT_CAP32_SPEED_100M | FW_PORT_CAP32_SPEED_1G);
159
160 return high_speeds != 0;
161}
162
163
164
165
166struct dev_params {
167 u32 fwrev;
168 u32 tprev;
169};
170
171
172
173
174
175
176struct sge_params {
177 u32 sge_control;
178 u32 sge_control2;
179 u32 sge_host_page_size;
180 u32 sge_egress_queues_per_page;
181 u32 sge_ingress_queues_per_page;
182 u32 sge_vf_hps;
183 u32 sge_vf_eq_qpp;
184 u32 sge_vf_iq_qpp;
185 u32 sge_fl_buffer_size[16];
186 u32 sge_ingress_rx_threshold;
187 u32 sge_congestion_control;
188 u32 sge_timer_value_0_and_1;
189 u32 sge_timer_value_2_and_3;
190 u32 sge_timer_value_4_and_5;
191};
192
193
194
195
196struct vpd_params {
197 u32 cclk;
198};
199
200
201struct arch_specific_params {
202 u32 sge_fl_db;
203 u16 mps_tcam_size;
204};
205
206
207
208
209struct rss_params {
210 unsigned int mode;
211 union {
212 struct {
213 unsigned int synmapen:1;
214 unsigned int syn4tupenipv6:1;
215 unsigned int syn2tupenipv6:1;
216 unsigned int syn4tupenipv4:1;
217 unsigned int syn2tupenipv4:1;
218 unsigned int ofdmapen:1;
219 unsigned int tnlmapen:1;
220 unsigned int tnlalllookup:1;
221 unsigned int hashtoeplitz:1;
222 } basicvirtual;
223 } u;
224};
225
226
227
228
229union rss_vi_config {
230 struct {
231 u16 defaultq;
232 unsigned int ip6fourtupen:1;
233 unsigned int ip6twotupen:1;
234 unsigned int ip4fourtupen:1;
235 unsigned int ip4twotupen:1;
236 int udpen;
237 } basicvirtual;
238};
239
240
241
242
243struct vf_resources {
244 unsigned int nvi;
245 unsigned int neq;
246 unsigned int nethctrl;
247 unsigned int niqflint;
248 unsigned int niq;
249 unsigned int tc;
250 unsigned int pmask;
251 unsigned int nexactf;
252 unsigned int r_caps;
253 unsigned int wx_caps;
254};
255
256
257
258
259struct adapter_params {
260 struct dev_params dev;
261 struct sge_params sge;
262 struct vpd_params vpd;
263 struct rss_params rss;
264 struct vf_resources vfres;
265 struct arch_specific_params arch;
266 enum chip_type chip;
267 u8 nports;
268 u8 fw_caps_support;
269};
270
271
272
273
274
275struct mbox_cmd {
276 u64 cmd[MBOX_LEN / 8];
277 u64 timestamp;
278 u32 seqno;
279 s16 access;
280 s16 execute;
281};
282
283struct mbox_cmd_log {
284 unsigned int size;
285 unsigned int cursor;
286 u32 seqno;
287
288};
289
290
291
292
293static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log,
294 unsigned int entry_idx)
295{
296 return &((struct mbox_cmd *)&(log)[1])[entry_idx];
297}
298
299#include "adapter.h"
300
301#ifndef PCI_VENDOR_ID_CHELSIO
302# define PCI_VENDOR_ID_CHELSIO 0x1425
303#endif
304
305#define for_each_port(adapter, iter) \
306 for (iter = 0; iter < (adapter)->params.nports; iter++)
307
308static inline unsigned int core_ticks_per_usec(const struct adapter *adapter)
309{
310 return adapter->params.vpd.cclk / 1000;
311}
312
313static inline unsigned int us_to_core_ticks(const struct adapter *adapter,
314 unsigned int us)
315{
316 return (us * adapter->params.vpd.cclk) / 1000;
317}
318
319static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
320 unsigned int ticks)
321{
322 return (ticks * 1000) / adapter->params.vpd.cclk;
323}
324
325int t4vf_wr_mbox_core(struct adapter *, const void *, int, void *, bool);
326
327static inline int t4vf_wr_mbox(struct adapter *adapter, const void *cmd,
328 int size, void *rpl)
329{
330 return t4vf_wr_mbox_core(adapter, cmd, size, rpl, true);
331}
332
333static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
334 int size, void *rpl)
335{
336 return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false);
337}
338
339#define CHELSIO_PCI_ID_VER(dev_id) ((dev_id) >> 12)
340
341static inline int is_t4(enum chip_type chip)
342{
343 return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
344}
345
346
347
348
349
350
351
352
353static inline int hash_mac_addr(const u8 *addr)
354{
355 u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];
356 u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];
357
358 a ^= b;
359 a ^= (a >> 12);
360 a ^= (a >> 6);
361 return a & 0x3f;
362}
363
364int t4vf_wait_dev_ready(struct adapter *);
365int t4vf_port_init(struct adapter *, int);
366
367int t4vf_fw_reset(struct adapter *);
368int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *);
369
370int t4vf_fl_pkt_align(struct adapter *adapter);
371enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
372int t4vf_bar2_sge_qregs(struct adapter *adapter,
373 unsigned int qid,
374 enum t4_bar2_qtype qtype,
375 u64 *pbar2_qoffset,
376 unsigned int *pbar2_qid);
377
378unsigned int t4vf_get_pf_from_vf(struct adapter *);
379int t4vf_get_sge_params(struct adapter *);
380int t4vf_get_vpd_params(struct adapter *);
381int t4vf_get_dev_params(struct adapter *);
382int t4vf_get_rss_glb_config(struct adapter *);
383int t4vf_get_vfres(struct adapter *);
384
385int t4vf_read_rss_vi_config(struct adapter *, unsigned int,
386 union rss_vi_config *);
387int t4vf_write_rss_vi_config(struct adapter *, unsigned int,
388 union rss_vi_config *);
389int t4vf_config_rss_range(struct adapter *, unsigned int, int, int,
390 const u16 *, int);
391
392int t4vf_alloc_vi(struct adapter *, int);
393int t4vf_free_vi(struct adapter *, int);
394int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, bool rx_en,
395 bool tx_en);
396int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, bool rx_en,
397 bool tx_en);
398int t4vf_identify_port(struct adapter *, unsigned int, unsigned int);
399
400int t4vf_set_rxmode(struct adapter *, unsigned int, int, int, int, int, int,
401 bool);
402int t4vf_alloc_mac_filt(struct adapter *, unsigned int, bool, unsigned int,
403 const u8 **, u16 *, u64 *, bool);
404int t4vf_free_mac_filt(struct adapter *, unsigned int, unsigned int naddr,
405 const u8 **, bool);
406int t4vf_change_mac(struct adapter *, unsigned int, int, const u8 *, bool);
407int t4vf_set_addr_hash(struct adapter *, unsigned int, bool, u64, bool);
408int t4vf_get_port_stats(struct adapter *, int, struct t4vf_port_stats *);
409
410int t4vf_iq_free(struct adapter *, unsigned int, unsigned int, unsigned int,
411 unsigned int);
412int t4vf_eth_eq_free(struct adapter *, unsigned int);
413
414int t4vf_update_port_info(struct port_info *pi);
415int t4vf_handle_fw_rpl(struct adapter *, const __be64 *);
416int t4vf_prep_adapter(struct adapter *);
417int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int pf,
418 unsigned int *naddr, u8 *addr);
419int t4vf_get_vf_vlan_acl(struct adapter *adapter);
420
421#endif
422