LXR linux/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/* Copyright (C) 2019 IBM Corp. */
   3#include <linux/bitops.h>
   4#include <linux/init.h>
   5#include <linux/io.h>
   6#include <linux/kernel.h>
   7#include <linux/mfd/syscon.h>
   8#include <linux/mutex.h>
   9#include <linux/of.h>
  10#include <linux/platform_device.h>
  11#include <linux/pinctrl/pinctrl.h>
  12#include <linux/pinctrl/pinmux.h>
  13#include <linux/string.h>
  14#include <linux/types.h>
  15
  16#include "../core.h"
  17#include "../pinctrl-utils.h"
  18#include "pinctrl-aspeed.h"
  19
  20#define SCU400          0x400 /* Multi-function Pin Control #1  */
  21#define SCU404          0x404 /* Multi-function Pin Control #2  */
  22#define SCU410          0x410 /* Multi-function Pin Control #4  */
  23#define SCU414          0x414 /* Multi-function Pin Control #5  */
  24#define SCU418          0x418 /* Multi-function Pin Control #6  */
  25#define SCU41C          0x41C /* Multi-function Pin Control #7  */
  26#define SCU430          0x430 /* Multi-function Pin Control #8  */
  27#define SCU434          0x434 /* Multi-function Pin Control #9  */
  28#define SCU438          0x438 /* Multi-function Pin Control #10 */
  29#define SCU450          0x450 /* Multi-function Pin Control #14 */
  30#define SCU4B0          0x4B0 /* Multi-function Pin Control #17 */
  31#define SCU4B4          0x4B4 /* Multi-function Pin Control #18 */
  32#define SCU4B8          0x4B8 /* Multi-function Pin Control #19 */
  33#define SCU4BC          0x4BC /* Multi-function Pin Control #20 */
  34#define SCU4D4          0x4D4 /* Multi-function Pin Control #22 */
  35#define SCU4D8          0x4D8 /* Multi-function Pin Control #23 */
  36#define SCU500          0x500 /* Hardware Strap 1 */
  37#define SCU510          0x510 /* Hardware Strap 2 */
  38#define SCU694          0x694 /* Multi-function Pin Control #25 */
  39
  40#define ASPEED_G6_NR_PINS 248
  41
  42#define M24 0
  43SIG_EXPR_LIST_DECL_SESG(M24, MDC3, MDIO3, SIG_DESC_SET(SCU410, 0));
  44SIG_EXPR_LIST_DECL_SESG(M24, SCL11, I2C11, SIG_DESC_SET(SCU4B0, 0));
  45PIN_DECL_2(M24, GPIOA0, MDC3, SCL11);
  46
  47#define M25 1
  48SIG_EXPR_LIST_DECL_SESG(M25, MDIO3, MDIO3, SIG_DESC_SET(SCU410, 1));
  49SIG_EXPR_LIST_DECL_SESG(M25, SDA11, I2C11, SIG_DESC_SET(SCU4B0, 1));
  50PIN_DECL_2(M25, GPIOA1, MDIO3, SDA11);
  51
  52FUNC_GROUP_DECL(MDIO3, M24, M25);
  53FUNC_GROUP_DECL(I2C11, M24, M25);
  54
  55#define L26 2
  56SIG_EXPR_LIST_DECL_SESG(L26, MDC4, MDIO4, SIG_DESC_SET(SCU410, 2));
  57SIG_EXPR_LIST_DECL_SESG(L26, SCL12, I2C12, SIG_DESC_SET(SCU4B0, 2));
  58PIN_DECL_2(L26, GPIOA2, MDC4, SCL12);
  59
  60#define K24 3
  61SIG_EXPR_LIST_DECL_SESG(K24, MDIO4, MDIO4, SIG_DESC_SET(SCU410, 3));
  62SIG_EXPR_LIST_DECL_SESG(K24, SDA12, I2C12, SIG_DESC_SET(SCU4B0, 3));
  63PIN_DECL_2(K24, GPIOA3, MDIO4, SDA12);
  64
  65FUNC_GROUP_DECL(MDIO4, L26, K24);
  66FUNC_GROUP_DECL(I2C12, L26, K24);
  67
  68#define K26 4
  69SIG_EXPR_LIST_DECL_SESG(K26, MACLINK1, MACLINK1, SIG_DESC_SET(SCU410, 4));
  70SIG_EXPR_LIST_DECL_SESG(K26, SCL13, I2C13, SIG_DESC_SET(SCU4B0, 4));
  71PIN_DECL_2(K26, GPIOA4, MACLINK1, SCL13);
  72FUNC_GROUP_DECL(MACLINK1, K26);
  73
  74#define L24 5
  75SIG_EXPR_LIST_DECL_SESG(L24, MACLINK2, MACLINK2, SIG_DESC_SET(SCU410, 5));
  76SIG_EXPR_LIST_DECL_SESG(L24, SDA13, I2C13, SIG_DESC_SET(SCU4B0, 5));
  77PIN_DECL_2(L24, GPIOA5, MACLINK2, SDA13);
  78FUNC_GROUP_DECL(MACLINK2, L24);
  79
  80FUNC_GROUP_DECL(I2C13, K26, L24);
  81
  82#define L23 6
  83SIG_EXPR_LIST_DECL_SESG(L23, MACLINK3, MACLINK3, SIG_DESC_SET(SCU410, 6));
  84SIG_EXPR_LIST_DECL_SESG(L23, SCL14, I2C14, SIG_DESC_SET(SCU4B0, 6));
  85PIN_DECL_2(L23, GPIOA6, MACLINK3, SCL14);
  86FUNC_GROUP_DECL(MACLINK3, L23);
  87
  88#define K25 7
  89SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
  90SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
  91PIN_DECL_2(K25, GPIOA7, MACLINK4, SDA14);
  92FUNC_GROUP_DECL(MACLINK4, K25);
  93
  94FUNC_GROUP_DECL(I2C14, L23, K25);
  95
  96#define J26 8
  97SIG_EXPR_LIST_DECL_SESG(J26, SALT1, SALT1, SIG_DESC_SET(SCU410, 8));
  98SIG_EXPR_LIST_DECL_SESG(J26, LHAD0, LPCHC, SIG_DESC_SET(SCU4B0, 8));
  99PIN_DECL_2(J26, GPIOB0, SALT1, LHAD0);
 100FUNC_GROUP_DECL(SALT1, J26);
 101
 102#define K23 9
 103SIG_EXPR_LIST_DECL_SESG(K23, SALT2, SALT2, SIG_DESC_SET(SCU410, 9));
 104SIG_EXPR_LIST_DECL_SESG(K23, LHAD1, LPCHC, SIG_DESC_SET(SCU4B0, 9));
 105PIN_DECL_2(K23, GPIOB1, SALT2, LHAD1);
 106FUNC_GROUP_DECL(SALT2, K23);
 107
 108#define H26 10
 109SIG_EXPR_LIST_DECL_SESG(H26, SALT3, SALT3, SIG_DESC_SET(SCU410, 10));
 110SIG_EXPR_LIST_DECL_SESG(H26, LHAD2, LPCHC, SIG_DESC_SET(SCU4B0, 10));
 111PIN_DECL_2(H26, GPIOB2, SALT3, LHAD2);
 112FUNC_GROUP_DECL(SALT3, H26);
 113
 114#define J25 11
 115SIG_EXPR_LIST_DECL_SESG(J25, SALT4, SALT4, SIG_DESC_SET(SCU410, 11));
 116SIG_EXPR_LIST_DECL_SESG(J25, LHAD3, LPCHC, SIG_DESC_SET(SCU4B0, 11));
 117PIN_DECL_2(J25, GPIOB3, SALT4, LHAD3);
 118FUNC_GROUP_DECL(SALT4, J25);
 119
 120#define J23 12
 121SIG_EXPR_LIST_DECL_SESG(J23, MDC2, MDIO2, SIG_DESC_SET(SCU410, 12));
 122SIG_EXPR_LIST_DECL_SESG(J23, LHCLK, LPCHC, SIG_DESC_SET(SCU4B0, 12));
 123PIN_DECL_2(J23, GPIOB4, MDC2, LHCLK);
 124
 125#define G26 13
 126SIG_EXPR_LIST_DECL_SESG(G26, MDIO2, MDIO2, SIG_DESC_SET(SCU410, 13));
 127SIG_EXPR_LIST_DECL_SESG(G26, LHFRAME, LPCHC, SIG_DESC_SET(SCU4B0, 13));
 128PIN_DECL_2(G26, GPIOB5, MDIO2, LHFRAME);
 129
 130FUNC_GROUP_DECL(MDIO2, J23, G26);
 131
 132#define H25 14
 133SIG_EXPR_LIST_DECL_SESG(H25, TXD4, TXD4, SIG_DESC_SET(SCU410, 14));
 134SIG_EXPR_LIST_DECL_SESG(H25, LHSIRQ, LHSIRQ, SIG_DESC_SET(SCU4B0, 14));
 135PIN_DECL_2(H25, GPIOB6, TXD4, LHSIRQ);
 136FUNC_GROUP_DECL(TXD4, H25);
 137FUNC_GROUP_DECL(LHSIRQ, H25);
 138
 139#define J24 15
 140SIG_EXPR_LIST_DECL_SESG(J24, RXD4, RXD4, SIG_DESC_SET(SCU410, 15));
 141SIG_EXPR_LIST_DECL_SESG(J24, LHRST, LPCHC, SIG_DESC_SET(SCU4B0, 15));
 142PIN_DECL_2(J24, GPIOB7, RXD4, LHRST);
 143FUNC_GROUP_DECL(RXD4, J24);
 144
 145FUNC_GROUP_DECL(LPCHC, J26, K23, H26, J25, J23, G26, H25, J24);
 146
 147#define H24 16
 148SIG_EXPR_LIST_DECL_SESG(H24, RGMII3TXCK, RGMII3, SIG_DESC_SET(SCU410, 16),
 149                          SIG_DESC_SET(SCU510, 0));
 150SIG_EXPR_LIST_DECL_SESG(H24, RMII3RCLKO, RMII3, SIG_DESC_SET(SCU410, 16),
 151                          SIG_DESC_CLEAR(SCU510, 0));
 152PIN_DECL_2(H24, GPIOC0, RGMII3TXCK, RMII3RCLKO);
 153
 154#define J22 17
 155SIG_EXPR_LIST_DECL_SESG(J22, RGMII3TXCTL, RGMII3, SIG_DESC_SET(SCU410, 17),
 156                          SIG_DESC_SET(SCU510, 0));
 157SIG_EXPR_LIST_DECL_SESG(J22, RMII3TXEN, RMII3, SIG_DESC_SET(SCU410, 17),
 158                          SIG_DESC_CLEAR(SCU510, 0));
 159PIN_DECL_2(J22, GPIOC1, RGMII3TXCTL, RMII3TXEN);
 160
 161#define H22 18
 162SIG_EXPR_LIST_DECL_SESG(H22, RGMII3TXD0, RGMII3, SIG_DESC_SET(SCU410, 18),
 163                          SIG_DESC_SET(SCU510, 0));
 164SIG_EXPR_LIST_DECL_SESG(H22, RMII3TXD0, RMII3, SIG_DESC_SET(SCU410, 18),
 165                          SIG_DESC_CLEAR(SCU510, 0));
 166PIN_DECL_2(H22, GPIOC2, RGMII3TXD0, RMII3TXD0);
 167
 168#define H23 19
 169SIG_EXPR_LIST_DECL_SESG(H23, RGMII3TXD1, RGMII3, SIG_DESC_SET(SCU410, 19),
 170                          SIG_DESC_SET(SCU510, 0));
 171SIG_EXPR_LIST_DECL_SESG(H23, RMII3TXD1, RMII3, SIG_DESC_SET(SCU410, 19),
 172                          SIG_DESC_CLEAR(SCU510, 0));
 173PIN_DECL_2(H23, GPIOC3, RGMII3TXD1, RMII3TXD1);
 174
 175#define G22 20
 176SIG_EXPR_LIST_DECL_SESG(G22, RGMII3TXD2, RGMII3, SIG_DESC_SET(SCU410, 20),
 177                          SIG_DESC_SET(SCU510, 0));
 178PIN_DECL_1(G22, GPIOC4, RGMII3TXD2);
 179
 180#define F22 21
 181SIG_EXPR_LIST_DECL_SESG(F22, RGMII3TXD3, RGMII3, SIG_DESC_SET(SCU410, 21),
 182                          SIG_DESC_SET(SCU510, 0));
 183PIN_DECL_1(F22, GPIOC5, RGMII3TXD3);
 184
 185#define G23 22
 186SIG_EXPR_LIST_DECL_SESG(G23, RGMII3RXCK, RGMII3, SIG_DESC_SET(SCU410, 22),
 187                          SIG_DESC_SET(SCU510, 0));
 188SIG_EXPR_LIST_DECL_SESG(G23, RMII3RCLKI, RMII3, SIG_DESC_SET(SCU410, 22),
 189                          SIG_DESC_CLEAR(SCU510, 0));
 190PIN_DECL_2(G23, GPIOC6, RGMII3RXCK, RMII3RCLKI);
 191
 192#define G24 23
 193SIG_EXPR_LIST_DECL_SESG(G24, RGMII3RXCTL, RGMII3, SIG_DESC_SET(SCU410, 23),
 194                          SIG_DESC_SET(SCU510, 0));
 195PIN_DECL_1(G24, GPIOC7, RGMII3RXCTL);
 196
 197#define F23 24
 198SIG_EXPR_LIST_DECL_SESG(F23, RGMII3RXD0, RGMII3, SIG_DESC_SET(SCU410, 24),
 199                          SIG_DESC_SET(SCU510, 0));
 200SIG_EXPR_LIST_DECL_SESG(F23, RMII3RXD0, RMII3, SIG_DESC_SET(SCU410, 24),
 201                          SIG_DESC_CLEAR(SCU510, 0));
 202PIN_DECL_2(F23, GPIOD0, RGMII3RXD0, RMII3RXD0);
 203
 204#define F26 25
 205SIG_EXPR_LIST_DECL_SESG(F26, RGMII3RXD1, RGMII3, SIG_DESC_SET(SCU410, 25),
 206                          SIG_DESC_SET(SCU510, 0));
 207SIG_EXPR_LIST_DECL_SESG(F26, RMII3RXD1, RMII3, SIG_DESC_SET(SCU410, 25),
 208                          SIG_DESC_CLEAR(SCU510, 0));
 209PIN_DECL_2(F26, GPIOD1, RGMII3RXD1, RMII3RXD1);
 210
 211#define F25 26
 212SIG_EXPR_LIST_DECL_SESG(F25, RGMII3RXD2, RGMII3, SIG_DESC_SET(SCU410, 26),
 213                          SIG_DESC_SET(SCU510, 0));
 214SIG_EXPR_LIST_DECL_SESG(F25, RMII3CRSDV, RMII3, SIG_DESC_SET(SCU410, 26),
 215                          SIG_DESC_CLEAR(SCU510, 0));
 216PIN_DECL_2(F25, GPIOD2, RGMII3RXD2, RMII3CRSDV);
 217
 218#define E26 27
 219SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
 220                          SIG_DESC_SET(SCU510, 0));
 221SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
 222                          SIG_DESC_CLEAR(SCU510, 0));
 223PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
 224
 225FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
 226                E26);
 227FUNC_GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
 228
 229#define F24 28
 230SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
 231SIG_EXPR_LIST_DECL_SESG(F24, RGMII4TXCK, RGMII4, SIG_DESC_SET(SCU4B0, 28),
 232                          SIG_DESC_SET(SCU510, 1));
 233SIG_EXPR_LIST_DECL_SESG(F24, RMII4RCLKO, RMII4, SIG_DESC_SET(SCU4B0, 28),
 234                          SIG_DESC_CLEAR(SCU510, 1));
 235PIN_DECL_3(F24, GPIOD4, NCTS3, RGMII4TXCK, RMII4RCLKO);
 236FUNC_GROUP_DECL(NCTS3, F24);
 237
 238#define E23 29
 239SIG_EXPR_LIST_DECL_SESG(E23, NDCD3, NDCD3, SIG_DESC_SET(SCU410, 29));
 240SIG_EXPR_LIST_DECL_SESG(E23, RGMII4TXCTL, RGMII4, SIG_DESC_SET(SCU4B0, 29),
 241                          SIG_DESC_SET(SCU510, 1));
 242SIG_EXPR_LIST_DECL_SESG(E23, RMII4TXEN, RMII4, SIG_DESC_SET(SCU4B0, 29),
 243                          SIG_DESC_CLEAR(SCU510, 1));
 244PIN_DECL_3(E23, GPIOD5, NDCD3, RGMII4TXCTL, RMII4TXEN);
 245FUNC_GROUP_DECL(NDCD3, E23);
 246
 247#define E24 30
 248SIG_EXPR_LIST_DECL_SESG(E24, NDSR3, NDSR3, SIG_DESC_SET(SCU410, 30));
 249SIG_EXPR_LIST_DECL_SESG(E24, RGMII4TXD0, RGMII4, SIG_DESC_SET(SCU4B0, 30),
 250                          SIG_DESC_SET(SCU510, 1));
 251SIG_EXPR_LIST_DECL_SESG(E24, RMII4TXD0, RMII4, SIG_DESC_SET(SCU4B0, 30),
 252                          SIG_DESC_CLEAR(SCU510, 1));
 253PIN_DECL_3(E24, GPIOD6, NDSR3, RGMII4TXD0, RMII4TXD0);
 254FUNC_GROUP_DECL(NDSR3, E24);
 255
 256#define E25 31
 257SIG_EXPR_LIST_DECL_SESG(E25, NRI3, NRI3, SIG_DESC_SET(SCU410, 31));
 258SIG_EXPR_LIST_DECL_SESG(E25, RGMII4TXD1, RGMII4, SIG_DESC_SET(SCU4B0, 31),
 259                          SIG_DESC_SET(SCU510, 1));
 260SIG_EXPR_LIST_DECL_SESG(E25, RMII4TXD1, RMII4, SIG_DESC_SET(SCU4B0, 31),
 261                          SIG_DESC_CLEAR(SCU510, 1));
 262PIN_DECL_3(E25, GPIOD7, NRI3, RGMII4TXD1, RMII4TXD1);
 263FUNC_GROUP_DECL(NRI3, E25);
 264
 265#define D26 32
 266SIG_EXPR_LIST_DECL_SESG(D26, NDTR3, NDTR3, SIG_DESC_SET(SCU414, 0));
 267SIG_EXPR_LIST_DECL_SESG(D26, RGMII4TXD2, RGMII4, SIG_DESC_SET(SCU4B4, 0),
 268                          SIG_DESC_SET(SCU510, 1));
 269PIN_DECL_2(D26, GPIOE0, NDTR3, RGMII4TXD2);
 270FUNC_GROUP_DECL(NDTR3, D26);
 271
 272#define D24 33
 273SIG_EXPR_LIST_DECL_SESG(D24, NRTS3, NRTS3, SIG_DESC_SET(SCU414, 1));
 274SIG_EXPR_LIST_DECL_SESG(D24, RGMII4TXD3, RGMII4, SIG_DESC_SET(SCU4B4, 1),
 275                          SIG_DESC_SET(SCU510, 1));
 276PIN_DECL_2(D24, GPIOE1, NRTS3, RGMII4TXD3);
 277FUNC_GROUP_DECL(NRTS3, D24);
 278
 279#define C25 34
 280SIG_EXPR_LIST_DECL_SESG(C25, NCTS4, NCTS4, SIG_DESC_SET(SCU414, 2));
 281SIG_EXPR_LIST_DECL_SESG(C25, RGMII4RXCK, RGMII4, SIG_DESC_SET(SCU4B4, 2),
 282                          SIG_DESC_SET(SCU510, 1));
 283SIG_EXPR_LIST_DECL_SESG(C25, RMII4RCLKI, RMII4, SIG_DESC_SET(SCU4B4, 2),
 284                          SIG_DESC_CLEAR(SCU510, 1));
 285PIN_DECL_3(C25, GPIOE2, NCTS4, RGMII4RXCK, RMII4RCLKI);
 286FUNC_GROUP_DECL(NCTS4, C25);
 287
 288#define C26 35
 289SIG_EXPR_LIST_DECL_SESG(C26, NDCD4, NDCD4, SIG_DESC_SET(SCU414, 3));
 290SIG_EXPR_LIST_DECL_SESG(C26, RGMII4RXCTL, RGMII4, SIG_DESC_SET(SCU4B4, 3),
 291                          SIG_DESC_SET(SCU510, 1));
 292PIN_DECL_2(C26, GPIOE3, NDCD4, RGMII4RXCTL);
 293FUNC_GROUP_DECL(NDCD4, C26);
 294
 295#define C24 36
 296SIG_EXPR_LIST_DECL_SESG(C24, NDSR4, NDSR4, SIG_DESC_SET(SCU414, 4));
 297SIG_EXPR_LIST_DECL_SESG(C24, RGMII4RXD0, RGMII4, SIG_DESC_SET(SCU4B4, 4),
 298                          SIG_DESC_SET(SCU510, 1));
 299SIG_EXPR_LIST_DECL_SESG(C24, RMII4RXD0, RMII4, SIG_DESC_SET(SCU4B4, 4),
 300                          SIG_DESC_CLEAR(SCU510, 1));
 301PIN_DECL_3(C24, GPIOE4, NDSR4, RGMII4RXD0, RMII4RXD0);
 302FUNC_GROUP_DECL(NDSR4, C24);
 303
 304#define B26 37
 305SIG_EXPR_LIST_DECL_SESG(B26, NRI4, NRI4, SIG_DESC_SET(SCU414, 5));
 306SIG_EXPR_LIST_DECL_SESG(B26, RGMII4RXD1, RGMII4, SIG_DESC_SET(SCU4B4, 5),
 307                          SIG_DESC_SET(SCU510, 1));
 308SIG_EXPR_LIST_DECL_SESG(B26, RMII4RXD1, RMII4, SIG_DESC_SET(SCU4B4, 5),
 309                          SIG_DESC_CLEAR(SCU510, 1));
 310PIN_DECL_3(B26, GPIOE5, NRI4, RGMII4RXD1, RMII4RXD1);
 311FUNC_GROUP_DECL(NRI4, B26);
 312
 313#define B25 38
 314SIG_EXPR_LIST_DECL_SESG(B25, NDTR4, NDTR4, SIG_DESC_SET(SCU414, 6));
 315SIG_EXPR_LIST_DECL_SESG(B25, RGMII4RXD2, RGMII4, SIG_DESC_SET(SCU4B4, 6),
 316                          SIG_DESC_SET(SCU510, 1));
 317SIG_EXPR_LIST_DECL_SESG(B25, RMII4CRSDV, RMII4, SIG_DESC_SET(SCU4B4, 6),
 318                          SIG_DESC_CLEAR(SCU510, 1));
 319PIN_DECL_3(B25, GPIOE6, NDTR4, RGMII4RXD2, RMII4CRSDV);
 320FUNC_GROUP_DECL(NDTR4, B25);
 321
 322#define B24 39
 323SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
 324SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
 325                          SIG_DESC_SET(SCU510, 1));
 326SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
 327                          SIG_DESC_CLEAR(SCU510, 1));
 328PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
 329FUNC_GROUP_DECL(NRTS4, B24);
 330
 331FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
 332                B24);
 333FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
 334
 335#define D22 40
 336SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
 337SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU414, 8));
 338PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
 339GROUP_DECL(PWM8G0, D22);
 340
 341#define E22 41
 342SIG_EXPR_LIST_DECL_SESG(E22, SD1CMD, SD1, SIG_DESC_SET(SCU414, 9));
 343SIG_EXPR_LIST_DECL_SEMG(E22, PWM9, PWM9G0, PWM9, SIG_DESC_SET(SCU4B4, 9));
 344PIN_DECL_2(E22, GPIOF1, SD1CMD, PWM9);
 345GROUP_DECL(PWM9G0, E22);
 346
 347#define D23 42
 348SIG_EXPR_LIST_DECL_SESG(D23, SD1DAT0, SD1, SIG_DESC_SET(SCU414, 10));
 349SIG_EXPR_LIST_DECL_SEMG(D23, PWM10, PWM10G0, PWM10, SIG_DESC_SET(SCU4B4, 10));
 350PIN_DECL_2(D23, GPIOF2, SD1DAT0, PWM10);
 351GROUP_DECL(PWM10G0, D23);
 352
 353#define C23 43
 354SIG_EXPR_LIST_DECL_SESG(C23, SD1DAT1, SD1, SIG_DESC_SET(SCU414, 11));
 355SIG_EXPR_LIST_DECL_SEMG(C23, PWM11, PWM11G0, PWM11, SIG_DESC_SET(SCU4B4, 11));
 356PIN_DECL_2(C23, GPIOF3, SD1DAT1, PWM11);
 357GROUP_DECL(PWM11G0, C23);
 358
 359#define C22 44
 360SIG_EXPR_LIST_DECL_SESG(C22, SD1DAT2, SD1, SIG_DESC_SET(SCU414, 12));
 361SIG_EXPR_LIST_DECL_SEMG(C22, PWM12, PWM12G0, PWM12, SIG_DESC_SET(SCU4B4, 12));
 362PIN_DECL_2(C22, GPIOF4, SD1DAT2, PWM12);
 363GROUP_DECL(PWM12G0, C22);
 364
 365#define A25 45
 366SIG_EXPR_LIST_DECL_SESG(A25, SD1DAT3, SD1, SIG_DESC_SET(SCU414, 13));
 367SIG_EXPR_LIST_DECL_SEMG(A25, PWM13, PWM13G0, PWM13, SIG_DESC_SET(SCU4B4, 13));
 368PIN_DECL_2(A25, GPIOF5, SD1DAT3, PWM13);
 369GROUP_DECL(PWM13G0, A25);
 370
 371#define A24 46
 372SIG_EXPR_LIST_DECL_SESG(A24, SD1CD, SD1, SIG_DESC_SET(SCU414, 14));
 373SIG_EXPR_LIST_DECL_SEMG(A24, PWM14, PWM14G0, PWM14, SIG_DESC_SET(SCU4B4, 14));
 374PIN_DECL_2(A24, GPIOF6, SD1CD, PWM14);
 375GROUP_DECL(PWM14G0, A24);
 376
 377#define A23 47
 378SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));
 379SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));
 380PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);
 381GROUP_DECL(PWM15G0, A23);
 382
 383FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);
 384
 385#define E21 48
 386SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
 387SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
 388                          SIG_DESC_SET(SCU450, 1));
 389SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
 390PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
 391GROUP_DECL(SALT9G0, E21);
 392
 393#define B22 49
 394SIG_EXPR_LIST_DECL_SESG(B22, RXD6, UART6, SIG_DESC_SET(SCU414, 17));
 395SIG_EXPR_LIST_DECL_SESG(B22, SD2CMD, SD2, SIG_DESC_SET(SCU4B4, 17),
 396                          SIG_DESC_SET(SCU450, 1));
 397SIG_EXPR_LIST_DECL_SEMG(B22, SALT10, SALT10G0, SALT10,
 398                        SIG_DESC_SET(SCU694, 17));
 399PIN_DECL_3(B22, GPIOG1, RXD6, SD2CMD, SALT10);
 400GROUP_DECL(SALT10G0, B22);
 401
 402FUNC_GROUP_DECL(UART6, E21, B22);
 403
 404#define C21 50
 405SIG_EXPR_LIST_DECL_SESG(C21, TXD7, UART7, SIG_DESC_SET(SCU414, 18));
 406SIG_EXPR_LIST_DECL_SESG(C21, SD2DAT0, SD2, SIG_DESC_SET(SCU4B4, 18),
 407                          SIG_DESC_SET(SCU450, 1));
 408SIG_EXPR_LIST_DECL_SEMG(C21, SALT11, SALT11G0, SALT11,
 409                        SIG_DESC_SET(SCU694, 18));
 410PIN_DECL_3(C21, GPIOG2, TXD7, SD2DAT0, SALT11);
 411GROUP_DECL(SALT11G0, C21);
 412
 413#define A22 51
 414SIG_EXPR_LIST_DECL_SESG(A22, RXD7, UART7, SIG_DESC_SET(SCU414, 19));
 415SIG_EXPR_LIST_DECL_SESG(A22, SD2DAT1, SD2, SIG_DESC_SET(SCU4B4, 19),
 416                          SIG_DESC_SET(SCU450, 1));
 417SIG_EXPR_LIST_DECL_SEMG(A22, SALT12, SALT12G0, SALT12,
 418                        SIG_DESC_SET(SCU694, 19));
 419PIN_DECL_3(A22, GPIOG3, RXD7, SD2DAT1, SALT12);
 420GROUP_DECL(SALT12G0, A22);
 421
 422FUNC_GROUP_DECL(UART7, C21, A22);
 423
 424#define A21 52
 425SIG_EXPR_LIST_DECL_SESG(A21, TXD8, UART8, SIG_DESC_SET(SCU414, 20));
 426SIG_EXPR_LIST_DECL_SESG(A21, SD2DAT2, SD2, SIG_DESC_SET(SCU4B4, 20),
 427                          SIG_DESC_SET(SCU450, 1));
 428SIG_EXPR_LIST_DECL_SEMG(A21, SALT13, SALT13G0, SALT13,
 429                        SIG_DESC_SET(SCU694, 20));
 430PIN_DECL_3(A21, GPIOG4, TXD8, SD2DAT2, SALT13);
 431GROUP_DECL(SALT13G0, A21);
 432
 433#define E20 53
 434SIG_EXPR_LIST_DECL_SESG(E20, RXD8, UART8, SIG_DESC_SET(SCU414, 21));
 435SIG_EXPR_LIST_DECL_SESG(E20, SD2DAT3, SD2, SIG_DESC_SET(SCU4B4, 21),
 436                          SIG_DESC_SET(SCU450, 1));
 437SIG_EXPR_LIST_DECL_SEMG(E20, SALT14, SALT14G0, SALT14,
 438                        SIG_DESC_SET(SCU694, 21));
 439PIN_DECL_3(E20, GPIOG5, RXD8, SD2DAT3, SALT14);
 440GROUP_DECL(SALT14G0, E20);
 441
 442FUNC_GROUP_DECL(UART8, A21, E20);
 443
 444#define D21 54
 445SIG_EXPR_LIST_DECL_SESG(D21, TXD9, UART9, SIG_DESC_SET(SCU414, 22));
 446SIG_EXPR_LIST_DECL_SESG(D21, SD2CD, SD2, SIG_DESC_SET(SCU4B4, 22),
 447                          SIG_DESC_SET(SCU450, 1));
 448SIG_EXPR_LIST_DECL_SEMG(D21, SALT15, SALT15G0, SALT15,
 449                        SIG_DESC_SET(SCU694, 22));
 450PIN_DECL_3(D21, GPIOG6, TXD9, SD2CD, SALT15);
 451GROUP_DECL(SALT15G0, D21);
 452
 453#define B21 55
 454SIG_EXPR_LIST_DECL_SESG(B21, RXD9, UART9, SIG_DESC_SET(SCU414, 23));
 455SIG_EXPR_LIST_DECL_SESG(B21, SD2WP, SD2, SIG_DESC_SET(SCU4B4, 23),
 456                        SIG_DESC_SET(SCU450, 1));
 457SIG_EXPR_LIST_DECL_SEMG(B21, SALT16, SALT16G0, SALT16,
 458                        SIG_DESC_SET(SCU694, 23));
 459PIN_DECL_3(B21, GPIOG7, RXD9, SD2WP, SALT16);
 460GROUP_DECL(SALT16G0, B21);
 461
 462FUNC_GROUP_DECL(UART9, D21, B21);
 463
 464FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);
 465
 466#define A18 56
 467SIG_EXPR_LIST_DECL_SESG(A18, SGPM1CLK, SGPM1, SIG_DESC_SET(SCU414, 24));
 468PIN_DECL_1(A18, GPIOH0, SGPM1CLK);
 469
 470#define B18 57
 471SIG_EXPR_LIST_DECL_SESG(B18, SGPM1LD, SGPM1, SIG_DESC_SET(SCU414, 25));
 472PIN_DECL_1(B18, GPIOH1, SGPM1LD);
 473
 474#define C18 58
 475SIG_EXPR_LIST_DECL_SESG(C18, SGPM1O, SGPM1, SIG_DESC_SET(SCU414, 26));
 476PIN_DECL_1(C18, GPIOH2, SGPM1O);
 477
 478#define A17 59
 479SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
 480PIN_DECL_1(A17, GPIOH3, SGPM1I);
 481
 482FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
 483
 484#define D18 60
 485SIG_EXPR_LIST_DECL_SESG(D18, SGPS1CK, SGPS1, SIG_DESC_SET(SCU414, 28));
 486SIG_EXPR_LIST_DECL_SESG(D18, SCL15, I2C15, SIG_DESC_SET(SCU4B4, 28));
 487PIN_DECL_2(D18, GPIOH4, SGPS1CK, SCL15);
 488
 489#define B17 61
 490SIG_EXPR_LIST_DECL_SESG(B17, SGPS1LD, SGPS1, SIG_DESC_SET(SCU414, 29));
 491SIG_EXPR_LIST_DECL_SESG(B17, SDA15, I2C15, SIG_DESC_SET(SCU4B4, 29));
 492PIN_DECL_2(B17, GPIOH5, SGPS1LD, SDA15);
 493
 494FUNC_GROUP_DECL(I2C15, D18, B17);
 495
 496#define C17 62
 497SIG_EXPR_LIST_DECL_SESG(C17, SGPS1O, SGPS1, SIG_DESC_SET(SCU414, 30));
 498SIG_EXPR_LIST_DECL_SESG(C17, SCL16, I2C16, SIG_DESC_SET(SCU4B4, 30));
 499PIN_DECL_2(C17, GPIOH6, SGPS1O, SCL16);
 500
 501#define E18 63
 502SIG_EXPR_LIST_DECL_SESG(E18, SGPS1I, SGPS1, SIG_DESC_SET(SCU414, 31));
 503SIG_EXPR_LIST_DECL_SESG(E18, SDA16, I2C16, SIG_DESC_SET(SCU4B4, 31));
 504PIN_DECL_2(E18, GPIOH7, SGPS1I, SDA16);
 505
 506FUNC_GROUP_DECL(I2C16, C17, E18);
 507FUNC_GROUP_DECL(SGPS1, D18, B17, C17, E18);
 508
 509#define D17 64
 510SIG_EXPR_LIST_DECL_SESG(D17, MTRSTN, JTAGM, SIG_DESC_SET(SCU418, 0));
 511SIG_EXPR_LIST_DECL_SEMG(D17, TXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 0));
 512PIN_DECL_2(D17, GPIOI0, MTRSTN, TXD12);
 513
 514#define A16 65
 515SIG_EXPR_LIST_DECL_SESG(A16, MTDI, JTAGM, SIG_DESC_SET(SCU418, 1));
 516SIG_EXPR_LIST_DECL_SEMG(A16, RXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 1));
 517PIN_DECL_2(A16, GPIOI1, MTDI, RXD12);
 518
 519GROUP_DECL(UART12G0, D17, A16);
 520
 521#define E17 66
 522SIG_EXPR_LIST_DECL_SESG(E17, MTCK, JTAGM, SIG_DESC_SET(SCU418, 2));
 523SIG_EXPR_LIST_DECL_SEMG(E17, TXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 2));
 524PIN_DECL_2(E17, GPIOI2, MTCK, TXD13);
 525
 526#define D16 67
 527SIG_EXPR_LIST_DECL_SESG(D16, MTMS, JTAGM, SIG_DESC_SET(SCU418, 3));
 528SIG_EXPR_LIST_DECL_SEMG(D16, RXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 3));
 529PIN_DECL_2(D16, GPIOI3, MTMS, RXD13);
 530
 531GROUP_DECL(UART13G0, E17, D16);
 532
 533#define C16 68
 534SIG_EXPR_LIST_DECL_SESG(C16, MTDO, JTAGM, SIG_DESC_SET(SCU418, 4));
 535PIN_DECL_1(C16, GPIOI4, MTDO);
 536
 537FUNC_GROUP_DECL(JTAGM, D17, A16, E17, D16, C16);
 538
 539#define E16 69
 540SIG_EXPR_LIST_DECL_SESG(E16, SIOPBO, SIOPBO, SIG_DESC_SET(SCU418, 5));
 541PIN_DECL_1(E16, GPIOI5, SIOPBO);
 542FUNC_GROUP_DECL(SIOPBO, E16);
 543
 544#define B16 70
 545SIG_EXPR_LIST_DECL_SESG(B16, SIOPBI, SIOPBI, SIG_DESC_SET(SCU418, 6));
 546PIN_DECL_1(B16, GPIOI6, SIOPBI);
 547FUNC_GROUP_DECL(SIOPBI, B16);
 548
 549#define A15 71
 550SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
 551SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
 552PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
 553FUNC_GROUP_DECL(BMCINT, A15);
 554FUNC_GROUP_DECL(SIOSCI, A15);
 555
 556#define B20 72
 557SIG_EXPR_LIST_DECL_SEMG(B20, I3C3SCL, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 8));
 558SIG_EXPR_LIST_DECL_SESG(B20, SCL1, I2C1, SIG_DESC_SET(SCU4B8, 8));
 559PIN_DECL_2(B20, GPIOJ0, I3C3SCL, SCL1);
 560
 561#define A20 73
 562SIG_EXPR_LIST_DECL_SEMG(A20, I3C3SDA, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 9));
 563SIG_EXPR_LIST_DECL_SESG(A20, SDA1, I2C1, SIG_DESC_SET(SCU4B8, 9));
 564PIN_DECL_2(A20, GPIOJ1, I3C3SDA, SDA1);
 565
 566GROUP_DECL(HVI3C3, B20, A20);
 567FUNC_GROUP_DECL(I2C1, B20, A20);
 568
 569#define E19 74
 570SIG_EXPR_LIST_DECL_SEMG(E19, I3C4SCL, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 10));
 571SIG_EXPR_LIST_DECL_SESG(E19, SCL2, I2C2, SIG_DESC_SET(SCU4B8, 10));
 572PIN_DECL_2(E19, GPIOJ2, I3C4SCL, SCL2);
 573
 574#define D20 75
 575SIG_EXPR_LIST_DECL_SEMG(D20, I3C4SDA, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 11));
 576SIG_EXPR_LIST_DECL_SESG(D20, SDA2, I2C2, SIG_DESC_SET(SCU4B8, 11));
 577PIN_DECL_2(D20, GPIOJ3, I3C4SDA, SDA2);
 578
 579GROUP_DECL(HVI3C4, E19, D20);
 580FUNC_GROUP_DECL(I2C2, E19, D20);
 581
 582#define C19 76
 583SIG_EXPR_LIST_DECL_SESG(C19, I3C5SCL, I3C5, SIG_DESC_SET(SCU418, 12));
 584SIG_EXPR_LIST_DECL_SESG(C19, SCL3, I2C3, SIG_DESC_SET(SCU4B8, 12));
 585PIN_DECL_2(C19, GPIOJ4, I3C5SCL, SCL3);
 586
 587#define A19 77
 588SIG_EXPR_LIST_DECL_SESG(A19, I3C5SDA, I3C5, SIG_DESC_SET(SCU418, 13));
 589SIG_EXPR_LIST_DECL_SESG(A19, SDA3, I2C3, SIG_DESC_SET(SCU4B8, 13));
 590PIN_DECL_2(A19, GPIOJ5, I3C5SDA, SDA3);
 591
 592FUNC_GROUP_DECL(I3C5, C19, A19);
 593FUNC_GROUP_DECL(I2C3, C19, A19);
 594
 595#define C20 78
 596SIG_EXPR_LIST_DECL_SESG(C20, I3C6SCL, I3C6, SIG_DESC_SET(SCU418, 14));
 597SIG_EXPR_LIST_DECL_SESG(C20, SCL4, I2C4, SIG_DESC_SET(SCU4B8, 14));
 598PIN_DECL_2(C20, GPIOJ6, I3C6SCL, SCL4);
 599
 600#define D19 79
 601SIG_EXPR_LIST_DECL_SESG(D19, I3C6SDA, I3C6, SIG_DESC_SET(SCU418, 15));
 602SIG_EXPR_LIST_DECL_SESG(D19, SDA4, I2C4, SIG_DESC_SET(SCU4B8, 15));
 603PIN_DECL_2(D19, GPIOJ7, I3C6SDA, SDA4);
 604
 605FUNC_GROUP_DECL(I3C6, C20, D19);
 606FUNC_GROUP_DECL(I2C4, C20, D19);
 607
 608#define A11 80
 609SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16));
 610PIN_DECL_1(A11, GPIOK0, SCL5);
 611
 612#define C11 81
 613SIG_EXPR_LIST_DECL_SESG(C11, SDA5, I2C5, SIG_DESC_SET(SCU418, 17));
 614PIN_DECL_1(C11, GPIOK1, SDA5);
 615
 616FUNC_GROUP_DECL(I2C5, A11, C11);
 617
 618#define D12 82
 619SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
 620PIN_DECL_1(D12, GPIOK2, SCL6);
 621
 622#define E13 83
 623SIG_EXPR_LIST_DECL_SESG(E13, SDA6, I2C6, SIG_DESC_SET(SCU418, 19));
 624PIN_DECL_1(E13, GPIOK3, SDA6);
 625
 626FUNC_GROUP_DECL(I2C6, D12, E13);
 627
 628#define D11 84
 629SIG_EXPR_LIST_DECL_SESG(D11, SCL7, I2C7, SIG_DESC_SET(SCU418, 20));
 630PIN_DECL_1(D11, GPIOK4, SCL7);
 631
 632#define E11 85
 633SIG_EXPR_LIST_DECL_SESG(E11, SDA7, I2C7, SIG_DESC_SET(SCU418, 21));
 634PIN_DECL_1(E11, GPIOK5, SDA7);
 635
 636FUNC_GROUP_DECL(I2C7, D11, E11);
 637
 638#define F13 86
 639SIG_EXPR_LIST_DECL_SESG(F13, SCL8, I2C8, SIG_DESC_SET(SCU418, 22));
 640PIN_DECL_1(F13, GPIOK6, SCL8);
 641
 642#define E12 87
 643SIG_EXPR_LIST_DECL_SESG(E12, SDA8, I2C8, SIG_DESC_SET(SCU418, 23));
 644PIN_DECL_1(E12, GPIOK7, SDA8);
 645
 646FUNC_GROUP_DECL(I2C8, F13, E12);
 647
 648#define D15 88
 649SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
 650PIN_DECL_1(D15, GPIOL0, SCL9);
 651
 652#define A14 89
 653SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
 654PIN_DECL_1(A14, GPIOL1, SDA9);
 655
 656FUNC_GROUP_DECL(I2C9, D15, A14);
 657
 658#define E15 90
 659SIG_EXPR_LIST_DECL_SESG(E15, SCL10, I2C10, SIG_DESC_SET(SCU418, 26));
 660PIN_DECL_1(E15, GPIOL2, SCL10);
 661
 662#define A13 91
 663SIG_EXPR_LIST_DECL_SESG(A13, SDA10, I2C10, SIG_DESC_SET(SCU418, 27));
 664PIN_DECL_1(A13, GPIOL3, SDA10);
 665
 666FUNC_GROUP_DECL(I2C10, E15, A13);
 667
 668#define C15 92
 669SSSF_PIN_DECL(C15, GPIOL4, TXD3, SIG_DESC_SET(SCU418, 28));
 670
 671#define F15 93
 672SSSF_PIN_DECL(F15, GPIOL5, RXD3, SIG_DESC_SET(SCU418, 29));
 673
 674#define B14 94
 675SSSF_PIN_DECL(B14, GPIOL6, VGAHS, SIG_DESC_SET(SCU418, 30));
 676
 677#define C14 95
 678SSSF_PIN_DECL(C14, GPIOL7, VGAVS, SIG_DESC_SET(SCU418, 31));
 679
 680#define D14 96
 681SSSF_PIN_DECL(D14, GPIOM0, NCTS1, SIG_DESC_SET(SCU41C, 0));
 682
 683#define B13 97
 684SSSF_PIN_DECL(B13, GPIOM1, NDCD1, SIG_DESC_SET(SCU41C, 1));
 685
 686#define A12 98
 687SSSF_PIN_DECL(A12, GPIOM2, NDSR1, SIG_DESC_SET(SCU41C, 2));
 688
 689#define E14 99
 690SSSF_PIN_DECL(E14, GPIOM3, NRI1, SIG_DESC_SET(SCU41C, 3));
 691
 692#define B12 100
 693SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
 694
 695#define C12 101
 696SSSF_PIN_DECL(C12, GPIOM5, NRTS1, SIG_DESC_SET(SCU41C, 5));
 697
 698#define C13 102
 699SSSF_PIN_DECL(C13, GPIOM6, TXD1, SIG_DESC_SET(SCU41C, 6));
 700
 701#define D13 103
 702SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
 703
 704#define P25 104
 705SSSF_PIN_DECL(P25, GPION0, NCTS2, SIG_DESC_SET(SCU41C, 8));
 706
 707#define N23 105
 708SSSF_PIN_DECL(N23, GPION1, NDCD2, SIG_DESC_SET(SCU41C, 9));
 709
 710#define N25 106
 711SSSF_PIN_DECL(N25, GPION2, NDSR2, SIG_DESC_SET(SCU41C, 10));
 712
 713#define N24 107
 714SSSF_PIN_DECL(N24, GPION3, NRI2, SIG_DESC_SET(SCU41C, 11));
 715
 716#define P26 108
 717SSSF_PIN_DECL(P26, GPION4, NDTR2, SIG_DESC_SET(SCU41C, 12));
 718
 719#define M23 109
 720SSSF_PIN_DECL(M23, GPION5, NRTS2, SIG_DESC_SET(SCU41C, 13));
 721
 722#define N26 110
 723SSSF_PIN_DECL(N26, GPION6, TXD2, SIG_DESC_SET(SCU41C, 14));
 724
 725#define M26 111
 726SSSF_PIN_DECL(M26, GPION7, RXD2, SIG_DESC_SET(SCU41C, 15));
 727
 728#define AD26 112
 729SSSF_PIN_DECL(AD26, GPIOO0, PWM0, SIG_DESC_SET(SCU41C, 16));
 730
 731#define AD22 113
 732SSSF_PIN_DECL(AD22, GPIOO1, PWM1, SIG_DESC_SET(SCU41C, 17));
 733
 734#define AD23 114
 735SSSF_PIN_DECL(AD23, GPIOO2, PWM2, SIG_DESC_SET(SCU41C, 18));
 736
 737#define AD24 115
 738SSSF_PIN_DECL(AD24, GPIOO3, PWM3, SIG_DESC_SET(SCU41C, 19));
 739
 740#define AD25 116
 741SSSF_PIN_DECL(AD25, GPIOO4, PWM4, SIG_DESC_SET(SCU41C, 20));
 742
 743#define AC22 117
 744SSSF_PIN_DECL(AC22, GPIOO5, PWM5, SIG_DESC_SET(SCU41C, 21));
 745
 746#define AC24 118
 747SSSF_PIN_DECL(AC24, GPIOO6, PWM6, SIG_DESC_SET(SCU41C, 22));
 748
 749#define AC23 119
 750SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23));
 751
 752#define AB22 120
 753SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24));
 754SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24));
 755PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0);
 756GROUP_DECL(PWM8G1, AB22);
 757FUNC_DECL_2(PWM8, PWM8G0, PWM8G1);
 758
 759#define W24 121
 760SIG_EXPR_LIST_DECL_SEMG(W24, PWM9, PWM9G1, PWM9, SIG_DESC_SET(SCU41C, 25));
 761SIG_EXPR_LIST_DECL_SESG(W24, THRUOUT0, THRU0, SIG_DESC_SET(SCU4BC, 25));
 762PIN_DECL_2(W24, GPIOP1, PWM9, THRUOUT0);
 763
 764FUNC_GROUP_DECL(THRU0, AB22, W24);
 765
 766GROUP_DECL(PWM9G1, W24);
 767FUNC_DECL_2(PWM9, PWM9G0, PWM9G1);
 768
 769#define AA23 122
 770SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26));
 771SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26));
 772PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1);
 773GROUP_DECL(PWM10G1, AA23);
 774FUNC_DECL_2(PWM10, PWM10G0, PWM10G1);
 775
 776#define AA24 123
 777SIG_EXPR_LIST_DECL_SEMG(AA24, PWM11, PWM11G1, PWM11, SIG_DESC_SET(SCU41C, 27));
 778SIG_EXPR_LIST_DECL_SESG(AA24, THRUOUT1, THRU1, SIG_DESC_SET(SCU4BC, 27));
 779PIN_DECL_2(AA24, GPIOP3, PWM11, THRUOUT1);
 780GROUP_DECL(PWM11G1, AA24);
 781FUNC_DECL_2(PWM11, PWM11G0, PWM11G1);
 782
 783FUNC_GROUP_DECL(THRU1, AA23, AA24);
 784
 785#define W23 124
 786SIG_EXPR_LIST_DECL_SEMG(W23, PWM12, PWM12G1, PWM12, SIG_DESC_SET(SCU41C, 28));
 787SIG_EXPR_LIST_DECL_SESG(W23, THRUIN2, THRU2, SIG_DESC_SET(SCU4BC, 28));
 788PIN_DECL_2(W23, GPIOP4, PWM12, THRUIN2);
 789GROUP_DECL(PWM12G1, W23);
 790FUNC_DECL_2(PWM12, PWM12G0, PWM12G1);
 791
 792#define AB23 125
 793SIG_EXPR_LIST_DECL_SEMG(AB23, PWM13, PWM13G1, PWM13, SIG_DESC_SET(SCU41C, 29));
 794SIG_EXPR_LIST_DECL_SESG(AB23, THRUOUT2, THRU2, SIG_DESC_SET(SCU4BC, 29));
 795PIN_DECL_2(AB23, GPIOP5, PWM13, THRUOUT2);
 796GROUP_DECL(PWM13G1, AB23);
 797FUNC_DECL_2(PWM13, PWM13G0, PWM13G1);
 798
 799FUNC_GROUP_DECL(THRU2, W23, AB23);
 800
 801#define AB24 126
 802SIG_EXPR_LIST_DECL_SEMG(AB24, PWM14, PWM14G1, PWM14, SIG_DESC_SET(SCU41C, 30));
 803SIG_EXPR_LIST_DECL_SESG(AB24, THRUIN3, THRU3, SIG_DESC_SET(SCU4BC, 30));
 804PIN_DECL_2(AB24, GPIOP6, PWM14, THRUIN3);
 805GROUP_DECL(PWM14G1, AB24);
 806FUNC_DECL_2(PWM14, PWM14G0, PWM14G1);
 807
 808#define Y23 127
 809SIG_EXPR_LIST_DECL_SEMG(Y23, PWM15, PWM15G1, PWM15, SIG_DESC_SET(SCU41C, 31));
 810SIG_EXPR_LIST_DECL_SESG(Y23, THRUOUT3, THRU3, SIG_DESC_SET(SCU4BC, 31));
 811PIN_DECL_2(Y23, GPIOP7, PWM15, THRUOUT3);
 812GROUP_DECL(PWM15G1, Y23);
 813FUNC_DECL_2(PWM15, PWM15G0, PWM15G1);
 814
 815FUNC_GROUP_DECL(THRU3, AB24, Y23);
 816
 817#define AA25 128
 818SSSF_PIN_DECL(AA25, GPIOQ0, TACH0, SIG_DESC_SET(SCU430, 0));
 819
 820#define AB25 129
 821SSSF_PIN_DECL(AB25, GPIOQ1, TACH1, SIG_DESC_SET(SCU430, 1));
 822
 823#define Y24 130
 824SSSF_PIN_DECL(Y24, GPIOQ2, TACH2, SIG_DESC_SET(SCU430, 2));
 825
 826#define AB26 131
 827SSSF_PIN_DECL(AB26, GPIOQ3, TACH3, SIG_DESC_SET(SCU430, 3));
 828
 829#define Y26 132
 830SSSF_PIN_DECL(Y26, GPIOQ4, TACH4, SIG_DESC_SET(SCU430, 4));
 831
 832#define AC26 133
 833SSSF_PIN_DECL(AC26, GPIOQ5, TACH5, SIG_DESC_SET(SCU430, 5));
 834
 835#define Y25 134
 836SSSF_PIN_DECL(Y25, GPIOQ6, TACH6, SIG_DESC_SET(SCU430, 6));
 837
 838#define AA26 135
 839SSSF_PIN_DECL(AA26, GPIOQ7, TACH7, SIG_DESC_SET(SCU430, 7));
 840
 841#define V25 136
 842SSSF_PIN_DECL(V25, GPIOR0, TACH8, SIG_DESC_SET(SCU430, 8));
 843
 844#define U24 137
 845SSSF_PIN_DECL(U24, GPIOR1, TACH9, SIG_DESC_SET(SCU430, 9));
 846
 847#define V24 138
 848SSSF_PIN_DECL(V24, GPIOR2, TACH10, SIG_DESC_SET(SCU430, 10));
 849
 850#define V26 139
 851SSSF_PIN_DECL(V26, GPIOR3, TACH11, SIG_DESC_SET(SCU430, 11));
 852
 853#define U25 140
 854SSSF_PIN_DECL(U25, GPIOR4, TACH12, SIG_DESC_SET(SCU430, 12));
 855
 856#define T23 141
 857SSSF_PIN_DECL(T23, GPIOR5, TACH13, SIG_DESC_SET(SCU430, 13));
 858
 859#define W26 142
 860SSSF_PIN_DECL(W26, GPIOR6, TACH14, SIG_DESC_SET(SCU430, 14));
 861
 862#define U26 143
 863SSSF_PIN_DECL(U26, GPIOR7, TACH15, SIG_DESC_SET(SCU430, 15));
 864
 865#define R23 144
 866SIG_EXPR_LIST_DECL_SESG(R23, MDC1, MDIO1, SIG_DESC_SET(SCU430, 16));
 867PIN_DECL_1(R23, GPIOS0, MDC1);
 868
 869#define T25 145
 870SIG_EXPR_LIST_DECL_SESG(T25, MDIO1, MDIO1, SIG_DESC_SET(SCU430, 17));
 871PIN_DECL_1(T25, GPIOS1, MDIO1);
 872
 873FUNC_GROUP_DECL(MDIO1, R23, T25);
 874
 875#define T26 146
 876SSSF_PIN_DECL(T26, GPIOS2, PEWAKE, SIG_DESC_SET(SCU430, 18));
 877
 878#define R24 147
 879SSSF_PIN_DECL(R24, GPIOS3, OSCCLK, SIG_DESC_SET(SCU430, 19));
 880
 881#define R26 148
 882SIG_EXPR_LIST_DECL_SESG(R26, TXD10, UART10, SIG_DESC_SET(SCU430, 20));
 883PIN_DECL_1(R26, GPIOS4, TXD10);
 884
 885#define P24 149
 886SIG_EXPR_LIST_DECL_SESG(P24, RXD10, UART10, SIG_DESC_SET(SCU430, 21));
 887PIN_DECL_1(P24, GPIOS5, RXD10);
 888
 889FUNC_GROUP_DECL(UART10, R26, P24);
 890
 891#define P23 150
 892SIG_EXPR_LIST_DECL_SESG(P23, TXD11, UART11, SIG_DESC_SET(SCU430, 22));
 893PIN_DECL_1(P23, GPIOS6, TXD11);
 894
 895#define T24 151
 896SIG_EXPR_LIST_DECL_SESG(T24, RXD11, UART11, SIG_DESC_SET(SCU430, 23));
 897PIN_DECL_1(T24, GPIOS7, RXD11);
 898
 899FUNC_GROUP_DECL(UART11, P23, T24);
 900
 901#define AD20 152
 902SIG_EXPR_LIST_DECL_SESG(AD20, GPIT0, GPIT0, SIG_DESC_SET(SCU430, 24));
 903SIG_EXPR_LIST_DECL_SESG(AD20, ADC0, ADC0);
 904PIN_DECL_(AD20, SIG_EXPR_LIST_PTR(AD20, GPIT0), SIG_EXPR_LIST_PTR(AD20, ADC0));
 905FUNC_GROUP_DECL(GPIT0, AD20);
 906FUNC_GROUP_DECL(ADC0, AD20);
 907
 908#define AC18 153
 909SIG_EXPR_LIST_DECL_SESG(AC18, GPIT1, GPIT1, SIG_DESC_SET(SCU430, 25));
 910SIG_EXPR_LIST_DECL_SESG(AC18, ADC1, ADC1);
 911PIN_DECL_(AC18, SIG_EXPR_LIST_PTR(AC18, GPIT1), SIG_EXPR_LIST_PTR(AC18, ADC1));
 912FUNC_GROUP_DECL(GPIT1, AC18);
 913FUNC_GROUP_DECL(ADC1, AC18);
 914
 915#define AE19 154
 916SIG_EXPR_LIST_DECL_SESG(AE19, GPIT2, GPIT2, SIG_DESC_SET(SCU430, 26));
 917SIG_EXPR_LIST_DECL_SESG(AE19, ADC2, ADC2);
 918PIN_DECL_(AE19, SIG_EXPR_LIST_PTR(AE19, GPIT2), SIG_EXPR_LIST_PTR(AE19, ADC2));
 919FUNC_GROUP_DECL(GPIT2, AE19);
 920FUNC_GROUP_DECL(ADC2, AE19);
 921
 922#define AD19 155
 923SIG_EXPR_LIST_DECL_SESG(AD19, GPIT3, GPIT3, SIG_DESC_SET(SCU430, 27));
 924SIG_EXPR_LIST_DECL_SESG(AD19, ADC3, ADC3);
 925PIN_DECL_(AD19, SIG_EXPR_LIST_PTR(AD19, GPIT3), SIG_EXPR_LIST_PTR(AD19, ADC3));
 926FUNC_GROUP_DECL(GPIT3, AD19);
 927FUNC_GROUP_DECL(ADC3, AD19);
 928
 929#define AC19 156
 930SIG_EXPR_LIST_DECL_SESG(AC19, GPIT4, GPIT4, SIG_DESC_SET(SCU430, 28));
 931SIG_EXPR_LIST_DECL_SESG(AC19, ADC4, ADC4);
 932PIN_DECL_(AC19, SIG_EXPR_LIST_PTR(AC19, GPIT4), SIG_EXPR_LIST_PTR(AC19, ADC4));
 933FUNC_GROUP_DECL(GPIT4, AC19);
 934FUNC_GROUP_DECL(ADC4, AC19);
 935
 936#define AB19 157
 937SIG_EXPR_LIST_DECL_SESG(AB19, GPIT5, GPIT5, SIG_DESC_SET(SCU430, 29));
 938SIG_EXPR_LIST_DECL_SESG(AB19, ADC5, ADC5);
 939PIN_DECL_(AB19, SIG_EXPR_LIST_PTR(AB19, GPIT5), SIG_EXPR_LIST_PTR(AB19, ADC5));
 940FUNC_GROUP_DECL(GPIT5, AB19);
 941FUNC_GROUP_DECL(ADC5, AB19);
 942
 943#define AB18 158
 944SIG_EXPR_LIST_DECL_SESG(AB18, GPIT6, GPIT6, SIG_DESC_SET(SCU430, 30));
 945SIG_EXPR_LIST_DECL_SESG(AB18, ADC6, ADC6);
 946PIN_DECL_(AB18, SIG_EXPR_LIST_PTR(AB18, GPIT6), SIG_EXPR_LIST_PTR(AB18, ADC6));
 947FUNC_GROUP_DECL(GPIT6, AB18);
 948FUNC_GROUP_DECL(ADC6, AB18);
 949
 950#define AE18 159
 951SIG_EXPR_LIST_DECL_SESG(AE18, GPIT7, GPIT7, SIG_DESC_SET(SCU430, 31));
 952SIG_EXPR_LIST_DECL_SESG(AE18, ADC7, ADC7);
 953PIN_DECL_(AE18, SIG_EXPR_LIST_PTR(AE18, GPIT7), SIG_EXPR_LIST_PTR(AE18, ADC7));
 954FUNC_GROUP_DECL(GPIT7, AE18);
 955FUNC_GROUP_DECL(ADC7, AE18);
 956
 957#define AB16 160
 958SIG_EXPR_LIST_DECL_SEMG(AB16, SALT9, SALT9G1, SALT9, SIG_DESC_SET(SCU434, 0),
 959                        SIG_DESC_CLEAR(SCU694, 16));
 960SIG_EXPR_LIST_DECL_SESG(AB16, GPIU0, GPIU0, SIG_DESC_SET(SCU434, 0),
 961                        SIG_DESC_SET(SCU694, 16));
 962SIG_EXPR_LIST_DECL_SESG(AB16, ADC8, ADC8);
 963PIN_DECL_(AB16, SIG_EXPR_LIST_PTR(AB16, SALT9), SIG_EXPR_LIST_PTR(AB16, GPIU0),
 964          SIG_EXPR_LIST_PTR(AB16, ADC8));
 965GROUP_DECL(SALT9G1, AB16);
 966FUNC_DECL_2(SALT9, SALT9G0, SALT9G1);
 967FUNC_GROUP_DECL(GPIU0, AB16);
 968FUNC_GROUP_DECL(ADC8, AB16);
 969
 970#define AA17 161
 971SIG_EXPR_LIST_DECL_SEMG(AA17, SALT10, SALT10G1, SALT10, SIG_DESC_SET(SCU434, 1),
 972                        SIG_DESC_CLEAR(SCU694, 17));
 973SIG_EXPR_LIST_DECL_SESG(AA17, GPIU1, GPIU1, SIG_DESC_SET(SCU434, 1),
 974                        SIG_DESC_SET(SCU694, 17));
 975SIG_EXPR_LIST_DECL_SESG(AA17, ADC9, ADC9);
 976PIN_DECL_(AA17, SIG_EXPR_LIST_PTR(AA17, SALT10), SIG_EXPR_LIST_PTR(AA17, GPIU1),
 977          SIG_EXPR_LIST_PTR(AA17, ADC9));
 978GROUP_DECL(SALT10G1, AA17);
 979FUNC_DECL_2(SALT10, SALT10G0, SALT10G1);
 980FUNC_GROUP_DECL(GPIU1, AA17);
 981FUNC_GROUP_DECL(ADC9, AA17);
 982
 983#define AB17 162
 984SIG_EXPR_LIST_DECL_SEMG(AB17, SALT11, SALT11G1, SALT11, SIG_DESC_SET(SCU434, 2),
 985                        SIG_DESC_CLEAR(SCU694, 18));
 986SIG_EXPR_LIST_DECL_SESG(AB17, GPIU2, GPIU2, SIG_DESC_SET(SCU434, 2),
 987                        SIG_DESC_SET(SCU694, 18));
 988SIG_EXPR_LIST_DECL_SESG(AB17, ADC10, ADC10);
 989PIN_DECL_(AB17, SIG_EXPR_LIST_PTR(AB17, SALT11), SIG_EXPR_LIST_PTR(AB17, GPIU2),
 990          SIG_EXPR_LIST_PTR(AB17, ADC10));
 991GROUP_DECL(SALT11G1, AB17);
 992FUNC_DECL_2(SALT11, SALT11G0, SALT11G1);
 993FUNC_GROUP_DECL(GPIU2, AB17);
 994FUNC_GROUP_DECL(ADC10, AB17);
 995
 996#define AE16 163
 997SIG_EXPR_LIST_DECL_SEMG(AE16, SALT12, SALT12G1, SALT12, SIG_DESC_SET(SCU434, 3),
 998                        SIG_DESC_CLEAR(SCU694, 19));
 999SIG_EXPR_LIST_DECL_SESG(AE16, GPIU3, GPIU3, SIG_DESC_SET(SCU434, 3),
1000                        SIG_DESC_SET(SCU694, 19));

1001SIG_EXPR_LIST_DECL_SESG(AE16, ADC11, ADC11);
1002PIN_DECL_(AE16, SIG_EXPR_LIST_PTR(AE16, SALT12), SIG_EXPR_LIST_PTR(AE16, GPIU3),
1003          SIG_EXPR_LIST_PTR(AE16, ADC11));
1004GROUP_DECL(SALT12G1, AE16);
1005FUNC_DECL_2(SALT12, SALT12G0, SALT12G1);
1006FUNC_GROUP_DECL(GPIU3, AE16);
1007FUNC_GROUP_DECL(ADC11, AE16);
1008
1009#define AC16 164
1010SIG_EXPR_LIST_DECL_SEMG(AC16, SALT13, SALT13G1, SALT13, SIG_DESC_SET(SCU434, 4),
1011                        SIG_DESC_CLEAR(SCU694, 20));
1012SIG_EXPR_LIST_DECL_SESG(AC16, GPIU4, GPIU4, SIG_DESC_SET(SCU434, 4),
1013                        SIG_DESC_SET(SCU694, 20));
1014SIG_EXPR_LIST_DECL_SESG(AC16, ADC12, ADC12);
1015PIN_DECL_(AC16, SIG_EXPR_LIST_PTR(AC16, SALT13), SIG_EXPR_LIST_PTR(AC16, GPIU4),
1016          SIG_EXPR_LIST_PTR(AC16, ADC12));
1017GROUP_DECL(SALT13G1, AC16);
1018FUNC_DECL_2(SALT13, SALT13G0, SALT13G1);
1019FUNC_GROUP_DECL(GPIU4, AC16);
1020FUNC_GROUP_DECL(ADC12, AC16);
1021
1022#define AA16 165
1023SIG_EXPR_LIST_DECL_SEMG(AA16, SALT14, SALT14G1, SALT14, SIG_DESC_SET(SCU434, 5),
1024                        SIG_DESC_CLEAR(SCU694, 21));
1025SIG_EXPR_LIST_DECL_SESG(AA16, GPIU5, GPIU5, SIG_DESC_SET(SCU434, 5),
1026                        SIG_DESC_SET(SCU694, 21));
1027SIG_EXPR_LIST_DECL_SESG(AA16, ADC13, ADC13);
1028PIN_DECL_(AA16, SIG_EXPR_LIST_PTR(AA16, SALT14), SIG_EXPR_LIST_PTR(AA16, GPIU5),
1029          SIG_EXPR_LIST_PTR(AA16, ADC13));
1030GROUP_DECL(SALT14G1, AA16);
1031FUNC_DECL_2(SALT14, SALT14G0, SALT14G1);
1032FUNC_GROUP_DECL(GPIU5, AA16);
1033FUNC_GROUP_DECL(ADC13, AA16);
1034
1035#define AD16 166
1036SIG_EXPR_LIST_DECL_SEMG(AD16, SALT15, SALT15G1, SALT15, SIG_DESC_SET(SCU434, 6),
1037                        SIG_DESC_CLEAR(SCU694, 22));
1038SIG_EXPR_LIST_DECL_SESG(AD16, GPIU6, GPIU6, SIG_DESC_SET(SCU434, 6),
1039                        SIG_DESC_SET(SCU694, 22));
1040SIG_EXPR_LIST_DECL_SESG(AD16, ADC14, ADC14);
1041PIN_DECL_(AD16, SIG_EXPR_LIST_PTR(AD16, SALT15), SIG_EXPR_LIST_PTR(AD16, GPIU6),
1042          SIG_EXPR_LIST_PTR(AD16, ADC14));
1043GROUP_DECL(SALT15G1, AD16);
1044FUNC_DECL_2(SALT15, SALT15G0, SALT15G1);
1045FUNC_GROUP_DECL(GPIU6, AD16);
1046FUNC_GROUP_DECL(ADC14, AD16);
1047
1048#define AC17 167
1049SIG_EXPR_LIST_DECL_SEMG(AC17, SALT16, SALT16G1, SALT16, SIG_DESC_SET(SCU434, 7),
1050                        SIG_DESC_CLEAR(SCU694, 23));
1051SIG_EXPR_LIST_DECL_SESG(AC17, GPIU7, GPIU7, SIG_DESC_SET(SCU434, 7),
1052                        SIG_DESC_SET(SCU694, 23));
1053SIG_EXPR_LIST_DECL_SESG(AC17, ADC15, ADC15);
1054PIN_DECL_(AC17, SIG_EXPR_LIST_PTR(AC17, SALT16), SIG_EXPR_LIST_PTR(AC17, GPIU7),
1055          SIG_EXPR_LIST_PTR(AC17, ADC15));
1056GROUP_DECL(SALT16G1, AC17);
1057FUNC_DECL_2(SALT16, SALT16G0, SALT16G1);
1058FUNC_GROUP_DECL(GPIU7, AC17);
1059FUNC_GROUP_DECL(ADC15, AC17);
1060
1061#define AB15 168
1062SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8));
1063
1064#define AF14 169
1065SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9));
1066
1067#define AD14 170
1068SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10));
1069
1070#define AC15 171
1071SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11));
1072
1073#define AE15 172
1074SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12));
1075
1076#define AE14 173
1077SIG_EXPR_LIST_DECL_SESG(AE14, LPCPD, LPCPD, SIG_DESC_SET(SCU434, 13));
1078SIG_EXPR_LIST_DECL_SESG(AE14, LHPD, LHPD, SIG_DESC_SET(SCU4D4, 13));
1079PIN_DECL_2(AE14, GPIOV5, LPCPD, LHPD);
1080FUNC_GROUP_DECL(LPCPD, AE14);
1081FUNC_GROUP_DECL(LHPD, AE14);
1082
1083#define AD15 174
1084SSSF_PIN_DECL(AD15, GPIOV6, LPCPME, SIG_DESC_SET(SCU434, 14));
1085
1086#define AF15 175
1087SSSF_PIN_DECL(AF15, GPIOV7, LPCSMI, SIG_DESC_SET(SCU434, 15));
1088
1089#define AB7 176
1090SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1091                          SIG_DESC_CLEAR(SCU510, 6));
1092SIG_EXPR_LIST_DECL_SESG(AB7, ESPID0, ESPI, SIG_DESC_SET(SCU434, 16),
1093                          SIG_DESC_SET(SCU510, 6));
1094PIN_DECL_2(AB7, GPIOW0, LAD0, ESPID0);
1095
1096#define AB8 177
1097SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1098                          SIG_DESC_CLEAR(SCU510, 6));
1099SIG_EXPR_LIST_DECL_SESG(AB8, ESPID1, ESPI, SIG_DESC_SET(SCU434, 17),
1100                          SIG_DESC_SET(SCU510, 6));
1101PIN_DECL_2(AB8, GPIOW1, LAD1, ESPID1);
1102
1103#define AC8 178
1104SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1105                          SIG_DESC_CLEAR(SCU510, 6));
1106SIG_EXPR_LIST_DECL_SESG(AC8, ESPID2, ESPI, SIG_DESC_SET(SCU434, 18),
1107                          SIG_DESC_SET(SCU510, 6));
1108PIN_DECL_2(AC8, GPIOW2, LAD2, ESPID2);
1109
1110#define AC7 179
1111SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1112                          SIG_DESC_CLEAR(SCU510, 6));
1113SIG_EXPR_LIST_DECL_SESG(AC7, ESPID3, ESPI, SIG_DESC_SET(SCU434, 19),
1114                          SIG_DESC_SET(SCU510, 6));
1115PIN_DECL_2(AC7, GPIOW3, LAD3, ESPID3);
1116
1117#define AE7 180
1118SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1119                          SIG_DESC_CLEAR(SCU510, 6));
1120SIG_EXPR_LIST_DECL_SESG(AE7, ESPICK, ESPI, SIG_DESC_SET(SCU434, 20),
1121                          SIG_DESC_SET(SCU510, 6));
1122PIN_DECL_2(AE7, GPIOW4, LCLK, ESPICK);
1123
1124#define AF7 181
1125SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1126                          SIG_DESC_CLEAR(SCU510, 6));
1127SIG_EXPR_LIST_DECL_SESG(AF7, ESPICS, ESPI, SIG_DESC_SET(SCU434, 21),
1128                          SIG_DESC_SET(SCU510, 6));
1129PIN_DECL_2(AF7, GPIOW5, LFRAME, ESPICS);
1130
1131#define AD7 182
1132SIG_EXPR_LIST_DECL_SESG(AD7, LSIRQ, LSIRQ, SIG_DESC_SET(SCU434, 22),
1133                          SIG_DESC_CLEAR(SCU510, 6));
1134SIG_EXPR_LIST_DECL_SESG(AD7, ESPIALT, ESPIALT, SIG_DESC_SET(SCU434, 22),
1135                          SIG_DESC_SET(SCU510, 6));
1136PIN_DECL_2(AD7, GPIOW6, LSIRQ, ESPIALT);
1137FUNC_GROUP_DECL(LSIRQ, AD7);
1138FUNC_GROUP_DECL(ESPIALT, AD7);
1139
1140#define AD8 183
1141SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1142                          SIG_DESC_CLEAR(SCU510, 6));
1143SIG_EXPR_LIST_DECL_SESG(AD8, ESPIRST, ESPI, SIG_DESC_SET(SCU434, 23),
1144                          SIG_DESC_SET(SCU510, 6));
1145PIN_DECL_2(AD8, GPIOW7, LPCRST, ESPIRST);
1146
1147FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1148FUNC_GROUP_DECL(ESPI, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1149
1150#define AE8 184
1151SIG_EXPR_LIST_DECL_SEMG(AE8, SPI2CS0, SPI2, SPI2, SIG_DESC_SET(SCU434, 24));
1152PIN_DECL_1(AE8, GPIOX0, SPI2CS0);
1153
1154#define AA9 185
1155SSSF_PIN_DECL(AA9, GPIOX1, SPI2CS1, SIG_DESC_SET(SCU434, 25));
1156
1157#define AC9 186
1158SSSF_PIN_DECL(AC9, GPIOX2, SPI2CS2, SIG_DESC_SET(SCU434, 26));
1159
1160#define AF8 187
1161SIG_EXPR_LIST_DECL_SEMG(AF8, SPI2CK, SPI2, SPI2, SIG_DESC_SET(SCU434, 27));
1162PIN_DECL_1(AF8, GPIOX3, SPI2CK);
1163
1164#define AB9 188
1165SIG_EXPR_LIST_DECL_SEMG(AB9, SPI2MOSI, SPI2, SPI2, SIG_DESC_SET(SCU434, 28));
1166PIN_DECL_1(AB9, GPIOX4, SPI2MOSI);
1167
1168#define AD9 189
1169SIG_EXPR_LIST_DECL_SEMG(AD9, SPI2MISO, SPI2, SPI2, SIG_DESC_SET(SCU434, 29));
1170PIN_DECL_1(AD9, GPIOX5, SPI2MISO);
1171
1172GROUP_DECL(SPI2, AE8, AF8, AB9, AD9);
1173
1174#define AF9 190
1175SIG_EXPR_LIST_DECL_SEMG(AF9, SPI2DQ2, QSPI2, SPI2, SIG_DESC_SET(SCU434, 30));
1176SIG_EXPR_LIST_DECL_SEMG(AF9, TXD12, UART12G1, UART12, SIG_DESC_SET(SCU4D4, 30));
1177PIN_DECL_2(AF9, GPIOX6, SPI2DQ2, TXD12);
1178
1179#define AB10 191
1180SIG_EXPR_LIST_DECL_SEMG(AB10, SPI2DQ3, QSPI2, SPI2, SIG_DESC_SET(SCU434, 31));
1181SIG_EXPR_LIST_DECL_SEMG(AB10, RXD12, UART12G1, UART12,
1182                        SIG_DESC_SET(SCU4D4, 31));
1183PIN_DECL_2(AB10, GPIOX7, SPI2DQ3, RXD12);
1184
1185GROUP_DECL(QSPI2, AE8, AF8, AB9, AD9, AF9, AB10);
1186FUNC_DECL_2(SPI2, SPI2, QSPI2);
1187
1188GROUP_DECL(UART12G1, AF9, AB10);
1189FUNC_DECL_2(UART12, UART12G0, UART12G1);
1190
1191#define AF11 192
1192SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1193SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1194PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1195FUNC_GROUP_DECL(SALT5, AF11);
1196FUNC_GROUP_DECL(WDTRST1, AF11);
1197
1198#define AD12 193
1199SIG_EXPR_LIST_DECL_SESG(AD12, SALT6, SALT6, SIG_DESC_SET(SCU438, 1));
1200SIG_EXPR_LIST_DECL_SESG(AD12, WDTRST2, WDTRST2, SIG_DESC_SET(SCU4D8, 1));
1201PIN_DECL_2(AD12, GPIOY1, SALT6, WDTRST2);
1202FUNC_GROUP_DECL(SALT6, AD12);
1203FUNC_GROUP_DECL(WDTRST2, AD12);
1204
1205#define AE11 194
1206SIG_EXPR_LIST_DECL_SESG(AE11, SALT7, SALT7, SIG_DESC_SET(SCU438, 2));
1207SIG_EXPR_LIST_DECL_SESG(AE11, WDTRST3, WDTRST3, SIG_DESC_SET(SCU4D8, 2));
1208PIN_DECL_2(AE11, GPIOY2, SALT7, WDTRST3);
1209FUNC_GROUP_DECL(SALT7, AE11);
1210FUNC_GROUP_DECL(WDTRST3, AE11);
1211
1212#define AA12 195
1213SIG_EXPR_LIST_DECL_SESG(AA12, SALT8, SALT8, SIG_DESC_SET(SCU438, 3));
1214SIG_EXPR_LIST_DECL_SESG(AA12, WDTRST4, WDTRST4, SIG_DESC_SET(SCU4D8, 3));
1215PIN_DECL_2(AA12, GPIOY3, SALT8, WDTRST4);
1216FUNC_GROUP_DECL(SALT8, AA12);
1217FUNC_GROUP_DECL(WDTRST4, AA12);
1218
1219#define AE12 196
1220SIG_EXPR_LIST_DECL_SEMG(AE12, FWSPIDQ2, FWQSPID, FWSPID,
1221                        SIG_DESC_SET(SCU438, 4));
1222SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
1223PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIDQ2),
1224          SIG_EXPR_LIST_PTR(AE12, GPIOY4));
1225
1226#define AF12 197
1227SIG_EXPR_LIST_DECL_SEMG(AF12, FWSPIDQ3, FWQSPID, FWSPID,
1228                        SIG_DESC_SET(SCU438, 5));
1229SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
1230PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIDQ3),
1231          SIG_EXPR_LIST_PTR(AF12, GPIOY5));
1232
1233#define AC12 198
1234SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
1235
1236#define AB12 199
1237SSSF_PIN_DECL(AB12, GPIOY7, FWSPIWP, SIG_DESC_SET(SCU438, 7));
1238
1239#define AC10 200
1240SSSF_PIN_DECL(AC10, GPIOZ0, SPI1CS1, SIG_DESC_SET(SCU438, 8));
1241
1242#define AD10 201
1243SSSF_PIN_DECL(AD10, GPIOZ1, SPI1ABR, SIG_DESC_SET(SCU438, 9));
1244
1245#define AE10 202
1246SSSF_PIN_DECL(AE10, GPIOZ2, SPI1WP, SIG_DESC_SET(SCU438, 10));
1247
1248#define AB11 203
1249SIG_EXPR_LIST_DECL_SEMG(AB11, SPI1CK, SPI1, SPI1, SIG_DESC_SET(SCU438, 11));
1250PIN_DECL_1(AB11, GPIOZ3, SPI1CK);
1251
1252#define AC11 204
1253SIG_EXPR_LIST_DECL_SEMG(AC11, SPI1MOSI, SPI1, SPI1, SIG_DESC_SET(SCU438, 12));
1254PIN_DECL_1(AC11, GPIOZ4, SPI1MOSI);
1255
1256#define AA11 205
1257SIG_EXPR_LIST_DECL_SEMG(AA11, SPI1MISO, SPI1, SPI1, SIG_DESC_SET(SCU438, 13));
1258PIN_DECL_1(AA11, GPIOZ5, SPI1MISO);
1259
1260GROUP_DECL(SPI1, AB11, AC11, AA11);
1261
1262#define AD11 206
1263SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1264SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1265                        SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1266PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1267
1268#define AF10 207
1269SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1270SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1271                        SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1272PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1273
1274GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1275FUNC_DECL_2(SPI1, SPI1, QSPI1);
1276
1277GROUP_DECL(UART13G1, AD11, AF10);
1278FUNC_DECL_2(UART13, UART13G0, UART13G1);
1279
1280#define C6 208
1281SIG_EXPR_LIST_DECL_SESG(C6, RGMII1TXCK, RGMII1, SIG_DESC_SET(SCU400, 0),
1282                          SIG_DESC_SET(SCU500, 6));
1283SIG_EXPR_LIST_DECL_SESG(C6, RMII1RCLKO, RMII1, SIG_DESC_SET(SCU400, 0),
1284                          SIG_DESC_CLEAR(SCU500, 6));
1285PIN_DECL_2(C6, GPIO18A0, RGMII1TXCK, RMII1RCLKO);
1286
1287#define D6 209
1288SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1289                          SIG_DESC_SET(SCU500, 6));
1290SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1291                          SIG_DESC_CLEAR(SCU500, 6));
1292PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1293
1294#define D5 210
1295SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1296                          SIG_DESC_SET(SCU500, 6));
1297SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1298                          SIG_DESC_CLEAR(SCU500, 6));
1299PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1300
1301#define A3 211
1302SIG_EXPR_LIST_DECL_SESG(A3, RGMII1TXD1, RGMII1, SIG_DESC_SET(SCU400, 3),
1303                          SIG_DESC_SET(SCU500, 6));
1304SIG_EXPR_LIST_DECL_SESG(A3, RMII1TXD1, RMII1, SIG_DESC_SET(SCU400, 3),
1305                          SIG_DESC_CLEAR(SCU500, 6));
1306PIN_DECL_2(A3, GPIO18A3, RGMII1TXD1, RMII1TXD1);
1307
1308#define C5 212
1309SIG_EXPR_LIST_DECL_SESG(C5, RGMII1TXD2, RGMII1, SIG_DESC_SET(SCU400, 4),
1310                          SIG_DESC_SET(SCU500, 6));
1311PIN_DECL_1(C5, GPIO18A4, RGMII1TXD2);
1312
1313#define E6 213
1314SIG_EXPR_LIST_DECL_SESG(E6, RGMII1TXD3, RGMII1, SIG_DESC_SET(SCU400, 5),
1315                          SIG_DESC_SET(SCU500, 6));
1316PIN_DECL_1(E6, GPIO18A5, RGMII1TXD3);
1317
1318#define B3 214
1319SIG_EXPR_LIST_DECL_SESG(B3, RGMII1RXCK, RGMII1, SIG_DESC_SET(SCU400, 6),
1320                          SIG_DESC_SET(SCU500, 6));
1321SIG_EXPR_LIST_DECL_SESG(B3, RMII1RCLKI, RMII1, SIG_DESC_SET(SCU400, 6),
1322                          SIG_DESC_CLEAR(SCU500, 6));
1323PIN_DECL_2(B3, GPIO18A6, RGMII1RXCK, RMII1RCLKI);
1324
1325#define A2 215
1326SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1327                          SIG_DESC_SET(SCU500, 6));
1328PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1329
1330#define B2 216
1331SIG_EXPR_LIST_DECL_SESG(B2, RGMII1RXD0, RGMII1, SIG_DESC_SET(SCU400, 8),
1332                          SIG_DESC_SET(SCU500, 6));
1333SIG_EXPR_LIST_DECL_SESG(B2, RMII1RXD0, RMII1, SIG_DESC_SET(SCU400, 8),
1334                          SIG_DESC_CLEAR(SCU500, 6));
1335PIN_DECL_2(B2, GPIO18B0, RGMII1RXD0, RMII1RXD0);
1336
1337#define B1 217
1338SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
1339                          SIG_DESC_SET(SCU500, 6));
1340SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
1341                          SIG_DESC_CLEAR(SCU500, 6));
1342PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
1343
1344#define C4 218
1345SIG_EXPR_LIST_DECL_SESG(C4, RGMII1RXD2, RGMII1, SIG_DESC_SET(SCU400, 10),
1346                          SIG_DESC_SET(SCU500, 6));
1347SIG_EXPR_LIST_DECL_SESG(C4, RMII1CRSDV, RMII1, SIG_DESC_SET(SCU400, 10),
1348                          SIG_DESC_CLEAR(SCU500, 6));
1349PIN_DECL_2(C4, GPIO18B2, RGMII1RXD2, RMII1CRSDV);
1350
1351#define E5 219
1352SIG_EXPR_LIST_DECL_SESG(E5, RGMII1RXD3, RGMII1, SIG_DESC_SET(SCU400, 11),
1353                          SIG_DESC_SET(SCU500, 6));
1354SIG_EXPR_LIST_DECL_SESG(E5, RMII1RXER, RMII1, SIG_DESC_SET(SCU400, 11),
1355                          SIG_DESC_CLEAR(SCU500, 6));
1356PIN_DECL_2(E5, GPIO18B3, RGMII1RXD3, RMII1RXER);
1357
1358FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1359FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1360
1361#define D4 220
1362SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1363                          SIG_DESC_SET(SCU500, 7));
1364SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1365                          SIG_DESC_CLEAR(SCU500, 7));
1366PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1367
1368#define C2 221
1369SIG_EXPR_LIST_DECL_SESG(C2, RGMII2TXCTL, RGMII2, SIG_DESC_SET(SCU400, 13),
1370                          SIG_DESC_SET(SCU500, 7));
1371SIG_EXPR_LIST_DECL_SESG(C2, RMII2TXEN, RMII2, SIG_DESC_SET(SCU400, 13),
1372                          SIG_DESC_CLEAR(SCU500, 7));
1373PIN_DECL_2(C2, GPIO18B5, RGMII2TXCTL, RMII2TXEN);
1374
1375#define C1 222
1376SIG_EXPR_LIST_DECL_SESG(C1, RGMII2TXD0, RGMII2, SIG_DESC_SET(SCU400, 14),
1377                          SIG_DESC_SET(SCU500, 7));
1378SIG_EXPR_LIST_DECL_SESG(C1, RMII2TXD0, RMII2, SIG_DESC_SET(SCU400, 14),
1379                          SIG_DESC_CLEAR(SCU500, 7));
1380PIN_DECL_2(C1, GPIO18B6, RGMII2TXD0, RMII2TXD0);
1381
1382#define D3 223
1383SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1384                          SIG_DESC_SET(SCU500, 7));
1385SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1386                          SIG_DESC_CLEAR(SCU500, 7));
1387PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1388
1389#define E4 224
1390SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
1391                          SIG_DESC_SET(SCU500, 7));
1392PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
1393
1394#define F5 225
1395SIG_EXPR_LIST_DECL_SESG(F5, RGMII2TXD3, RGMII2, SIG_DESC_SET(SCU400, 17),
1396                          SIG_DESC_SET(SCU500, 7));
1397PIN_DECL_1(F5, GPIO18C1, RGMII2TXD3);
1398
1399#define D2 226
1400SIG_EXPR_LIST_DECL_SESG(D2, RGMII2RXCK, RGMII2, SIG_DESC_SET(SCU400, 18),
1401                          SIG_DESC_SET(SCU500, 7));
1402SIG_EXPR_LIST_DECL_SESG(D2, RMII2RCLKI, RMII2, SIG_DESC_SET(SCU400, 18),
1403                          SIG_DESC_CLEAR(SCU500, 7));
1404PIN_DECL_2(D2, GPIO18C2, RGMII2RXCK, RMII2RCLKI);
1405
1406#define E3 227
1407SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
1408                          SIG_DESC_SET(SCU500, 7));
1409PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
1410
1411#define D1 228
1412SIG_EXPR_LIST_DECL_SESG(D1, RGMII2RXD0, RGMII2, SIG_DESC_SET(SCU400, 20),
1413                          SIG_DESC_SET(SCU500, 7));
1414SIG_EXPR_LIST_DECL_SESG(D1, RMII2RXD0, RMII2, SIG_DESC_SET(SCU400, 20),
1415                          SIG_DESC_CLEAR(SCU500, 7));
1416PIN_DECL_2(D1, GPIO18C4, RGMII2RXD0, RMII2RXD0);
1417
1418#define F4 229
1419SIG_EXPR_LIST_DECL_SESG(F4, RGMII2RXD1, RGMII2, SIG_DESC_SET(SCU400, 21),
1420                          SIG_DESC_SET(SCU500, 7));
1421SIG_EXPR_LIST_DECL_SESG(F4, RMII2RXD1, RMII2, SIG_DESC_SET(SCU400, 21),
1422                          SIG_DESC_CLEAR(SCU500, 7));
1423PIN_DECL_2(F4, GPIO18C5, RGMII2RXD1, RMII2RXD1);
1424
1425#define E2 230
1426SIG_EXPR_LIST_DECL_SESG(E2, RGMII2RXD2, RGMII2, SIG_DESC_SET(SCU400, 22),
1427                          SIG_DESC_SET(SCU500, 7));
1428SIG_EXPR_LIST_DECL_SESG(E2, RMII2CRSDV, RMII2, SIG_DESC_SET(SCU400, 22),
1429                          SIG_DESC_CLEAR(SCU500, 7));
1430PIN_DECL_2(E2, GPIO18C6, RGMII2RXD2, RMII2CRSDV);
1431
1432#define E1 231
1433SIG_EXPR_LIST_DECL_SESG(E1, RGMII2RXD3, RGMII2, SIG_DESC_SET(SCU400, 23),
1434                          SIG_DESC_SET(SCU500, 7));
1435SIG_EXPR_LIST_DECL_SESG(E1, RMII2RXER, RMII2, SIG_DESC_SET(SCU400, 23),
1436                          SIG_DESC_CLEAR(SCU500, 7));
1437PIN_DECL_2(E1, GPIO18C7, RGMII2RXD3, RMII2RXER);
1438
1439FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1440FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1441
1442#define AB4 232
1443SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1444PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1445
1446#define AA4 233
1447SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1448PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1449
1450#define AC4 234
1451SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1452PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1453
1454#define AA5 235
1455SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1456PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1457
1458#define Y5 236
1459SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1460PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1461
1462#define AB5 237
1463SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1464PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1465
1466#define AB6 238
1467SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1468PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1469
1470#define AC5 239
1471SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1472PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1473
1474GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
1475GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1476
1477#define Y1 240
1478SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1479SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1480SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1481PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1482
1483#define Y2 241
1484SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1485SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1486SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1487PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1488
1489#define Y3 242
1490SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1491                        SIG_DESC_SET(SCU500, 3));
1492SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1493SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1494PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1495
1496#define Y4 243
1497SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1498                        SIG_DESC_SET(SCU500, 3));
1499SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1500SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1501PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1502
1503GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1504GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);
1505GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1506FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);
1507FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1508FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1509/*
1510 * FIXME: Confirm bits and priorities are the right way around for the
1511 * following 4 pins
1512 */
1513#define AF25 244
1514SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1515SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1516PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1517          SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1518
1519#define AE26 245
1520SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1521SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1522PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1523          SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1524
1525GROUP_DECL(I3C3, AF25, AE26);
1526FUNC_DECL_2(I3C3, HVI3C3, I3C3);
1527FUNC_GROUP_DECL(FSI1, AF25, AE26);
1528
1529#define AE25 246
1530SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1531SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1532PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1533          SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1534
1535#define AF24 247
1536SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1537SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1538PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1539          SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1540
1541GROUP_DECL(I3C4, AE25, AF24);
1542FUNC_DECL_2(I3C4, HVI3C4, I3C4);
1543FUNC_GROUP_DECL(FSI2, AE25, AF24);
1544
1545/* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1546
1547static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = {
1548        ASPEED_PINCTRL_PIN(A11),
1549        ASPEED_PINCTRL_PIN(A12),
1550        ASPEED_PINCTRL_PIN(A13),
1551        ASPEED_PINCTRL_PIN(A14),
1552        ASPEED_PINCTRL_PIN(A15),
1553        ASPEED_PINCTRL_PIN(A16),
1554        ASPEED_PINCTRL_PIN(A17),
1555        ASPEED_PINCTRL_PIN(A18),
1556        ASPEED_PINCTRL_PIN(A19),
1557        ASPEED_PINCTRL_PIN(A2),
1558        ASPEED_PINCTRL_PIN(A20),
1559        ASPEED_PINCTRL_PIN(A21),
1560        ASPEED_PINCTRL_PIN(A22),
1561        ASPEED_PINCTRL_PIN(A23),
1562        ASPEED_PINCTRL_PIN(A24),
1563        ASPEED_PINCTRL_PIN(A25),
1564        ASPEED_PINCTRL_PIN(A3),
1565        ASPEED_PINCTRL_PIN(AA11),
1566        ASPEED_PINCTRL_PIN(AA12),
1567        ASPEED_PINCTRL_PIN(AA16),
1568        ASPEED_PINCTRL_PIN(AA17),
1569        ASPEED_PINCTRL_PIN(AA23),
1570        ASPEED_PINCTRL_PIN(AA24),
1571        ASPEED_PINCTRL_PIN(AA25),
1572        ASPEED_PINCTRL_PIN(AA26),
1573        ASPEED_PINCTRL_PIN(AA4),
1574        ASPEED_PINCTRL_PIN(AA5),
1575        ASPEED_PINCTRL_PIN(AA9),
1576        ASPEED_PINCTRL_PIN(AB10),
1577        ASPEED_PINCTRL_PIN(AB11),
1578        ASPEED_PINCTRL_PIN(AB12),
1579        ASPEED_PINCTRL_PIN(AB15),
1580        ASPEED_PINCTRL_PIN(AB16),
1581        ASPEED_PINCTRL_PIN(AB17),
1582        ASPEED_PINCTRL_PIN(AB18),
1583        ASPEED_PINCTRL_PIN(AB19),
1584        ASPEED_PINCTRL_PIN(AB22),
1585        ASPEED_PINCTRL_PIN(AB23),
1586        ASPEED_PINCTRL_PIN(AB24),
1587        ASPEED_PINCTRL_PIN(AB25),
1588        ASPEED_PINCTRL_PIN(AB26),
1589        ASPEED_PINCTRL_PIN(AB4),
1590        ASPEED_PINCTRL_PIN(AB5),
1591        ASPEED_PINCTRL_PIN(AB6),
1592        ASPEED_PINCTRL_PIN(AB7),
1593        ASPEED_PINCTRL_PIN(AB8),
1594        ASPEED_PINCTRL_PIN(AB9),
1595        ASPEED_PINCTRL_PIN(AC10),
1596        ASPEED_PINCTRL_PIN(AC11),
1597        ASPEED_PINCTRL_PIN(AC12),
1598        ASPEED_PINCTRL_PIN(AC15),
1599        ASPEED_PINCTRL_PIN(AC16),
1600        ASPEED_PINCTRL_PIN(AC17),
1601        ASPEED_PINCTRL_PIN(AC18),
1602        ASPEED_PINCTRL_PIN(AC19),
1603        ASPEED_PINCTRL_PIN(AC22),
1604        ASPEED_PINCTRL_PIN(AC23),
1605        ASPEED_PINCTRL_PIN(AC24),
1606        ASPEED_PINCTRL_PIN(AC26),
1607        ASPEED_PINCTRL_PIN(AC4),
1608        ASPEED_PINCTRL_PIN(AC5),
1609        ASPEED_PINCTRL_PIN(AC7),
1610        ASPEED_PINCTRL_PIN(AC8),
1611        ASPEED_PINCTRL_PIN(AC9),
1612        ASPEED_PINCTRL_PIN(AD10),
1613        ASPEED_PINCTRL_PIN(AD11),
1614        ASPEED_PINCTRL_PIN(AD12),
1615        ASPEED_PINCTRL_PIN(AD14),
1616        ASPEED_PINCTRL_PIN(AD15),
1617        ASPEED_PINCTRL_PIN(AD16),
1618        ASPEED_PINCTRL_PIN(AD19),
1619        ASPEED_PINCTRL_PIN(AD20),
1620        ASPEED_PINCTRL_PIN(AD22),
1621        ASPEED_PINCTRL_PIN(AD23),
1622        ASPEED_PINCTRL_PIN(AD24),
1623        ASPEED_PINCTRL_PIN(AD25),
1624        ASPEED_PINCTRL_PIN(AD26),
1625        ASPEED_PINCTRL_PIN(AD7),
1626        ASPEED_PINCTRL_PIN(AD8),
1627        ASPEED_PINCTRL_PIN(AD9),
1628        ASPEED_PINCTRL_PIN(AE10),
1629        ASPEED_PINCTRL_PIN(AE11),
1630        ASPEED_PINCTRL_PIN(AE12),
1631        ASPEED_PINCTRL_PIN(AE14),
1632        ASPEED_PINCTRL_PIN(AE15),
1633        ASPEED_PINCTRL_PIN(AE16),
1634        ASPEED_PINCTRL_PIN(AE18),
1635        ASPEED_PINCTRL_PIN(AE19),
1636        ASPEED_PINCTRL_PIN(AE25),
1637        ASPEED_PINCTRL_PIN(AE26),
1638        ASPEED_PINCTRL_PIN(AE7),
1639        ASPEED_PINCTRL_PIN(AE8),
1640        ASPEED_PINCTRL_PIN(AF10),
1641        ASPEED_PINCTRL_PIN(AF11),
1642        ASPEED_PINCTRL_PIN(AF12),
1643        ASPEED_PINCTRL_PIN(AF14),
1644        ASPEED_PINCTRL_PIN(AF15),
1645        ASPEED_PINCTRL_PIN(AF24),
1646        ASPEED_PINCTRL_PIN(AF25),
1647        ASPEED_PINCTRL_PIN(AF7),
1648        ASPEED_PINCTRL_PIN(AF8),
1649        ASPEED_PINCTRL_PIN(AF9),
1650        ASPEED_PINCTRL_PIN(B1),
1651        ASPEED_PINCTRL_PIN(B12),
1652        ASPEED_PINCTRL_PIN(B13),
1653        ASPEED_PINCTRL_PIN(B14),
1654        ASPEED_PINCTRL_PIN(B16),
1655        ASPEED_PINCTRL_PIN(B17),
1656        ASPEED_PINCTRL_PIN(B18),
1657        ASPEED_PINCTRL_PIN(B2),
1658        ASPEED_PINCTRL_PIN(B20),
1659        ASPEED_PINCTRL_PIN(B21),
1660        ASPEED_PINCTRL_PIN(B22),
1661        ASPEED_PINCTRL_PIN(B24),
1662        ASPEED_PINCTRL_PIN(B25),
1663        ASPEED_PINCTRL_PIN(B26),
1664        ASPEED_PINCTRL_PIN(B3),
1665        ASPEED_PINCTRL_PIN(C1),
1666        ASPEED_PINCTRL_PIN(C11),
1667        ASPEED_PINCTRL_PIN(C12),
1668        ASPEED_PINCTRL_PIN(C13),
1669        ASPEED_PINCTRL_PIN(C14),
1670        ASPEED_PINCTRL_PIN(C15),
1671        ASPEED_PINCTRL_PIN(C16),
1672        ASPEED_PINCTRL_PIN(C17),
1673        ASPEED_PINCTRL_PIN(C18),
1674        ASPEED_PINCTRL_PIN(C19),
1675        ASPEED_PINCTRL_PIN(C2),
1676        ASPEED_PINCTRL_PIN(C20),
1677        ASPEED_PINCTRL_PIN(C21),
1678        ASPEED_PINCTRL_PIN(C22),
1679        ASPEED_PINCTRL_PIN(C23),
1680        ASPEED_PINCTRL_PIN(C24),
1681        ASPEED_PINCTRL_PIN(C25),
1682        ASPEED_PINCTRL_PIN(C26),
1683        ASPEED_PINCTRL_PIN(C4),
1684        ASPEED_PINCTRL_PIN(C5),
1685        ASPEED_PINCTRL_PIN(C6),
1686        ASPEED_PINCTRL_PIN(D1),
1687        ASPEED_PINCTRL_PIN(D11),
1688        ASPEED_PINCTRL_PIN(D12),
1689        ASPEED_PINCTRL_PIN(D13),
1690        ASPEED_PINCTRL_PIN(D14),
1691        ASPEED_PINCTRL_PIN(D15),
1692        ASPEED_PINCTRL_PIN(D16),
1693        ASPEED_PINCTRL_PIN(D17),
1694        ASPEED_PINCTRL_PIN(D18),
1695        ASPEED_PINCTRL_PIN(D19),
1696        ASPEED_PINCTRL_PIN(D2),
1697        ASPEED_PINCTRL_PIN(D20),
1698        ASPEED_PINCTRL_PIN(D21),
1699        ASPEED_PINCTRL_PIN(D22),
1700        ASPEED_PINCTRL_PIN(D23),
1701        ASPEED_PINCTRL_PIN(D24),
1702        ASPEED_PINCTRL_PIN(D26),
1703        ASPEED_PINCTRL_PIN(D3),
1704        ASPEED_PINCTRL_PIN(D4),
1705        ASPEED_PINCTRL_PIN(D5),
1706        ASPEED_PINCTRL_PIN(D6),
1707        ASPEED_PINCTRL_PIN(E1),
1708        ASPEED_PINCTRL_PIN(E11),
1709        ASPEED_PINCTRL_PIN(E12),
1710        ASPEED_PINCTRL_PIN(E13),
1711        ASPEED_PINCTRL_PIN(E14),
1712        ASPEED_PINCTRL_PIN(E15),
1713        ASPEED_PINCTRL_PIN(E16),
1714        ASPEED_PINCTRL_PIN(E17),
1715        ASPEED_PINCTRL_PIN(E18),
1716        ASPEED_PINCTRL_PIN(E19),
1717        ASPEED_PINCTRL_PIN(E2),
1718        ASPEED_PINCTRL_PIN(E20),
1719        ASPEED_PINCTRL_PIN(E21),
1720        ASPEED_PINCTRL_PIN(E22),
1721        ASPEED_PINCTRL_PIN(E23),
1722        ASPEED_PINCTRL_PIN(E24),
1723        ASPEED_PINCTRL_PIN(E25),
1724        ASPEED_PINCTRL_PIN(E26),
1725        ASPEED_PINCTRL_PIN(E3),
1726        ASPEED_PINCTRL_PIN(E4),
1727        ASPEED_PINCTRL_PIN(E5),
1728        ASPEED_PINCTRL_PIN(E6),
1729        ASPEED_PINCTRL_PIN(F13),
1730        ASPEED_PINCTRL_PIN(F15),
1731        ASPEED_PINCTRL_PIN(F22),
1732        ASPEED_PINCTRL_PIN(F23),
1733        ASPEED_PINCTRL_PIN(F24),
1734        ASPEED_PINCTRL_PIN(F25),
1735        ASPEED_PINCTRL_PIN(F26),
1736        ASPEED_PINCTRL_PIN(F4),
1737        ASPEED_PINCTRL_PIN(F5),
1738        ASPEED_PINCTRL_PIN(G22),
1739        ASPEED_PINCTRL_PIN(G23),
1740        ASPEED_PINCTRL_PIN(G24),
1741        ASPEED_PINCTRL_PIN(G26),
1742        ASPEED_PINCTRL_PIN(H22),
1743        ASPEED_PINCTRL_PIN(H23),
1744        ASPEED_PINCTRL_PIN(H24),
1745        ASPEED_PINCTRL_PIN(H25),
1746        ASPEED_PINCTRL_PIN(H26),
1747        ASPEED_PINCTRL_PIN(J22),
1748        ASPEED_PINCTRL_PIN(J23),
1749        ASPEED_PINCTRL_PIN(J24),
1750        ASPEED_PINCTRL_PIN(J25),
1751        ASPEED_PINCTRL_PIN(J26),
1752        ASPEED_PINCTRL_PIN(K23),
1753        ASPEED_PINCTRL_PIN(K24),
1754        ASPEED_PINCTRL_PIN(K25),
1755        ASPEED_PINCTRL_PIN(K26),
1756        ASPEED_PINCTRL_PIN(L23),
1757        ASPEED_PINCTRL_PIN(L24),
1758        ASPEED_PINCTRL_PIN(L26),
1759        ASPEED_PINCTRL_PIN(M23),
1760        ASPEED_PINCTRL_PIN(M24),
1761        ASPEED_PINCTRL_PIN(M25),
1762        ASPEED_PINCTRL_PIN(M26),
1763        ASPEED_PINCTRL_PIN(N23),
1764        ASPEED_PINCTRL_PIN(N24),
1765        ASPEED_PINCTRL_PIN(N25),
1766        ASPEED_PINCTRL_PIN(N26),
1767        ASPEED_PINCTRL_PIN(P23),
1768        ASPEED_PINCTRL_PIN(P24),
1769        ASPEED_PINCTRL_PIN(P25),
1770        ASPEED_PINCTRL_PIN(P26),
1771        ASPEED_PINCTRL_PIN(R23),
1772        ASPEED_PINCTRL_PIN(R24),
1773        ASPEED_PINCTRL_PIN(R26),
1774        ASPEED_PINCTRL_PIN(T23),
1775        ASPEED_PINCTRL_PIN(T24),
1776        ASPEED_PINCTRL_PIN(T25),
1777        ASPEED_PINCTRL_PIN(T26),
1778        ASPEED_PINCTRL_PIN(U24),
1779        ASPEED_PINCTRL_PIN(U25),
1780        ASPEED_PINCTRL_PIN(U26),
1781        ASPEED_PINCTRL_PIN(V24),
1782        ASPEED_PINCTRL_PIN(V25),
1783        ASPEED_PINCTRL_PIN(V26),
1784        ASPEED_PINCTRL_PIN(W23),
1785        ASPEED_PINCTRL_PIN(W24),
1786        ASPEED_PINCTRL_PIN(W26),
1787        ASPEED_PINCTRL_PIN(Y1),
1788        ASPEED_PINCTRL_PIN(Y2),
1789        ASPEED_PINCTRL_PIN(Y23),
1790        ASPEED_PINCTRL_PIN(Y24),
1791        ASPEED_PINCTRL_PIN(Y25),
1792        ASPEED_PINCTRL_PIN(Y26),
1793        ASPEED_PINCTRL_PIN(Y3),
1794        ASPEED_PINCTRL_PIN(Y4),
1795        ASPEED_PINCTRL_PIN(Y5),
1796};
1797
1798static const struct aspeed_pin_group aspeed_g6_groups[] = {
1799        ASPEED_PINCTRL_GROUP(ADC0),
1800        ASPEED_PINCTRL_GROUP(ADC1),
1801        ASPEED_PINCTRL_GROUP(ADC10),
1802        ASPEED_PINCTRL_GROUP(ADC11),
1803        ASPEED_PINCTRL_GROUP(ADC12),
1804        ASPEED_PINCTRL_GROUP(ADC13),
1805        ASPEED_PINCTRL_GROUP(ADC14),
1806        ASPEED_PINCTRL_GROUP(ADC15),
1807        ASPEED_PINCTRL_GROUP(ADC2),
1808        ASPEED_PINCTRL_GROUP(ADC3),
1809        ASPEED_PINCTRL_GROUP(ADC4),
1810        ASPEED_PINCTRL_GROUP(ADC5),
1811        ASPEED_PINCTRL_GROUP(ADC6),
1812        ASPEED_PINCTRL_GROUP(ADC7),
1813        ASPEED_PINCTRL_GROUP(ADC8),
1814        ASPEED_PINCTRL_GROUP(ADC9),
1815        ASPEED_PINCTRL_GROUP(BMCINT),
1816        ASPEED_PINCTRL_GROUP(ESPI),
1817        ASPEED_PINCTRL_GROUP(ESPIALT),
1818        ASPEED_PINCTRL_GROUP(FSI1),
1819        ASPEED_PINCTRL_GROUP(FSI2),
1820        ASPEED_PINCTRL_GROUP(FWSPIABR),
1821        ASPEED_PINCTRL_GROUP(FWSPID),
1822        ASPEED_PINCTRL_GROUP(FWQSPID),
1823        ASPEED_PINCTRL_GROUP(FWSPIWP),
1824        ASPEED_PINCTRL_GROUP(GPIT0),
1825        ASPEED_PINCTRL_GROUP(GPIT1),
1826        ASPEED_PINCTRL_GROUP(GPIT2),
1827        ASPEED_PINCTRL_GROUP(GPIT3),
1828        ASPEED_PINCTRL_GROUP(GPIT4),
1829        ASPEED_PINCTRL_GROUP(GPIT5),
1830        ASPEED_PINCTRL_GROUP(GPIT6),
1831        ASPEED_PINCTRL_GROUP(GPIT7),
1832        ASPEED_PINCTRL_GROUP(GPIU0),
1833        ASPEED_PINCTRL_GROUP(GPIU1),
1834        ASPEED_PINCTRL_GROUP(GPIU2),
1835        ASPEED_PINCTRL_GROUP(GPIU3),
1836        ASPEED_PINCTRL_GROUP(GPIU4),
1837        ASPEED_PINCTRL_GROUP(GPIU5),
1838        ASPEED_PINCTRL_GROUP(GPIU6),
1839        ASPEED_PINCTRL_GROUP(GPIU7),
1840        ASPEED_PINCTRL_GROUP(HVI3C3),
1841        ASPEED_PINCTRL_GROUP(HVI3C4),
1842        ASPEED_PINCTRL_GROUP(I2C1),
1843        ASPEED_PINCTRL_GROUP(I2C10),
1844        ASPEED_PINCTRL_GROUP(I2C11),
1845        ASPEED_PINCTRL_GROUP(I2C12),
1846        ASPEED_PINCTRL_GROUP(I2C13),
1847        ASPEED_PINCTRL_GROUP(I2C14),
1848        ASPEED_PINCTRL_GROUP(I2C15),
1849        ASPEED_PINCTRL_GROUP(I2C16),
1850        ASPEED_PINCTRL_GROUP(I2C2),
1851        ASPEED_PINCTRL_GROUP(I2C3),
1852        ASPEED_PINCTRL_GROUP(I2C4),
1853        ASPEED_PINCTRL_GROUP(I2C5),
1854        ASPEED_PINCTRL_GROUP(I2C6),
1855        ASPEED_PINCTRL_GROUP(I2C7),
1856        ASPEED_PINCTRL_GROUP(I2C8),
1857        ASPEED_PINCTRL_GROUP(I2C9),
1858        ASPEED_PINCTRL_GROUP(I3C3),
1859        ASPEED_PINCTRL_GROUP(I3C4),
1860        ASPEED_PINCTRL_GROUP(I3C5),
1861        ASPEED_PINCTRL_GROUP(I3C6),
1862        ASPEED_PINCTRL_GROUP(JTAGM),
1863        ASPEED_PINCTRL_GROUP(LHPD),
1864        ASPEED_PINCTRL_GROUP(LHSIRQ),
1865        ASPEED_PINCTRL_GROUP(LPC),
1866        ASPEED_PINCTRL_GROUP(LPCHC),
1867        ASPEED_PINCTRL_GROUP(LPCPD),
1868        ASPEED_PINCTRL_GROUP(LPCPME),
1869        ASPEED_PINCTRL_GROUP(LPCSMI),
1870        ASPEED_PINCTRL_GROUP(LSIRQ),
1871        ASPEED_PINCTRL_GROUP(MACLINK1),
1872        ASPEED_PINCTRL_GROUP(MACLINK2),
1873        ASPEED_PINCTRL_GROUP(MACLINK3),
1874        ASPEED_PINCTRL_GROUP(MACLINK4),
1875        ASPEED_PINCTRL_GROUP(MDIO1),
1876        ASPEED_PINCTRL_GROUP(MDIO2),
1877        ASPEED_PINCTRL_GROUP(MDIO3),
1878        ASPEED_PINCTRL_GROUP(MDIO4),
1879        ASPEED_PINCTRL_GROUP(NCTS1),
1880        ASPEED_PINCTRL_GROUP(NCTS2),
1881        ASPEED_PINCTRL_GROUP(NCTS3),
1882        ASPEED_PINCTRL_GROUP(NCTS4),
1883        ASPEED_PINCTRL_GROUP(NDCD1),
1884        ASPEED_PINCTRL_GROUP(NDCD2),
1885        ASPEED_PINCTRL_GROUP(NDCD3),
1886        ASPEED_PINCTRL_GROUP(NDCD4),
1887        ASPEED_PINCTRL_GROUP(NDSR1),
1888        ASPEED_PINCTRL_GROUP(NDSR2),
1889        ASPEED_PINCTRL_GROUP(NDSR3),
1890        ASPEED_PINCTRL_GROUP(NDSR4),
1891        ASPEED_PINCTRL_GROUP(NDTR1),
1892        ASPEED_PINCTRL_GROUP(NDTR2),
1893        ASPEED_PINCTRL_GROUP(NDTR3),
1894        ASPEED_PINCTRL_GROUP(NDTR4),
1895        ASPEED_PINCTRL_GROUP(NRI1),
1896        ASPEED_PINCTRL_GROUP(NRI2),
1897        ASPEED_PINCTRL_GROUP(NRI3),
1898        ASPEED_PINCTRL_GROUP(NRI4),
1899        ASPEED_PINCTRL_GROUP(NRTS1),
1900        ASPEED_PINCTRL_GROUP(NRTS2),
1901        ASPEED_PINCTRL_GROUP(NRTS3),
1902        ASPEED_PINCTRL_GROUP(NRTS4),
1903        ASPEED_PINCTRL_GROUP(OSCCLK),
1904        ASPEED_PINCTRL_GROUP(PEWAKE),
1905        ASPEED_PINCTRL_GROUP(PWM0),
1906        ASPEED_PINCTRL_GROUP(PWM1),
1907        ASPEED_PINCTRL_GROUP(PWM10G0),
1908        ASPEED_PINCTRL_GROUP(PWM10G1),
1909        ASPEED_PINCTRL_GROUP(PWM11G0),
1910        ASPEED_PINCTRL_GROUP(PWM11G1),
1911        ASPEED_PINCTRL_GROUP(PWM12G0),
1912        ASPEED_PINCTRL_GROUP(PWM12G1),
1913        ASPEED_PINCTRL_GROUP(PWM13G0),
1914        ASPEED_PINCTRL_GROUP(PWM13G1),
1915        ASPEED_PINCTRL_GROUP(PWM14G0),
1916        ASPEED_PINCTRL_GROUP(PWM14G1),
1917        ASPEED_PINCTRL_GROUP(PWM15G0),
1918        ASPEED_PINCTRL_GROUP(PWM15G1),
1919        ASPEED_PINCTRL_GROUP(PWM2),
1920        ASPEED_PINCTRL_GROUP(PWM3),
1921        ASPEED_PINCTRL_GROUP(PWM4),
1922        ASPEED_PINCTRL_GROUP(PWM5),
1923        ASPEED_PINCTRL_GROUP(PWM6),
1924        ASPEED_PINCTRL_GROUP(PWM7),
1925        ASPEED_PINCTRL_GROUP(PWM8G0),
1926        ASPEED_PINCTRL_GROUP(PWM8G1),
1927        ASPEED_PINCTRL_GROUP(PWM9G0),
1928        ASPEED_PINCTRL_GROUP(PWM9G1),
1929        ASPEED_PINCTRL_GROUP(QSPI1),
1930        ASPEED_PINCTRL_GROUP(QSPI2),
1931        ASPEED_PINCTRL_GROUP(RGMII1),
1932        ASPEED_PINCTRL_GROUP(RGMII2),
1933        ASPEED_PINCTRL_GROUP(RGMII3),
1934        ASPEED_PINCTRL_GROUP(RGMII4),
1935        ASPEED_PINCTRL_GROUP(RMII1),
1936        ASPEED_PINCTRL_GROUP(RMII2),
1937        ASPEED_PINCTRL_GROUP(RMII3),
1938        ASPEED_PINCTRL_GROUP(RMII4),
1939        ASPEED_PINCTRL_GROUP(RXD1),
1940        ASPEED_PINCTRL_GROUP(RXD2),
1941        ASPEED_PINCTRL_GROUP(RXD3),
1942        ASPEED_PINCTRL_GROUP(RXD4),
1943        ASPEED_PINCTRL_GROUP(SALT1),
1944        ASPEED_PINCTRL_GROUP(SALT10G0),
1945        ASPEED_PINCTRL_GROUP(SALT10G1),
1946        ASPEED_PINCTRL_GROUP(SALT11G0),
1947        ASPEED_PINCTRL_GROUP(SALT11G1),
1948        ASPEED_PINCTRL_GROUP(SALT12G0),
1949        ASPEED_PINCTRL_GROUP(SALT12G1),
1950        ASPEED_PINCTRL_GROUP(SALT13G0),
1951        ASPEED_PINCTRL_GROUP(SALT13G1),
1952        ASPEED_PINCTRL_GROUP(SALT14G0),
1953        ASPEED_PINCTRL_GROUP(SALT14G1),
1954        ASPEED_PINCTRL_GROUP(SALT15G0),
1955        ASPEED_PINCTRL_GROUP(SALT15G1),
1956        ASPEED_PINCTRL_GROUP(SALT16G0),
1957        ASPEED_PINCTRL_GROUP(SALT16G1),
1958        ASPEED_PINCTRL_GROUP(SALT2),
1959        ASPEED_PINCTRL_GROUP(SALT3),
1960        ASPEED_PINCTRL_GROUP(SALT4),
1961        ASPEED_PINCTRL_GROUP(SALT5),
1962        ASPEED_PINCTRL_GROUP(SALT6),
1963        ASPEED_PINCTRL_GROUP(SALT7),
1964        ASPEED_PINCTRL_GROUP(SALT8),
1965        ASPEED_PINCTRL_GROUP(SALT9G0),
1966        ASPEED_PINCTRL_GROUP(SALT9G1),
1967        ASPEED_PINCTRL_GROUP(SD1),
1968        ASPEED_PINCTRL_GROUP(SD2),
1969        ASPEED_PINCTRL_GROUP(EMMCG1),
1970        ASPEED_PINCTRL_GROUP(EMMCG4),
1971        ASPEED_PINCTRL_GROUP(EMMCG8),
1972        ASPEED_PINCTRL_GROUP(SGPM1),
1973        ASPEED_PINCTRL_GROUP(SGPS1),
1974        ASPEED_PINCTRL_GROUP(SIOONCTRL),
1975        ASPEED_PINCTRL_GROUP(SIOPBI),
1976        ASPEED_PINCTRL_GROUP(SIOPBO),
1977        ASPEED_PINCTRL_GROUP(SIOPWREQ),
1978        ASPEED_PINCTRL_GROUP(SIOPWRGD),
1979        ASPEED_PINCTRL_GROUP(SIOS3),
1980        ASPEED_PINCTRL_GROUP(SIOS5),
1981        ASPEED_PINCTRL_GROUP(SIOSCI),
1982        ASPEED_PINCTRL_GROUP(SPI1),
1983        ASPEED_PINCTRL_GROUP(SPI1ABR),
1984        ASPEED_PINCTRL_GROUP(SPI1CS1),
1985        ASPEED_PINCTRL_GROUP(SPI1WP),
1986        ASPEED_PINCTRL_GROUP(SPI2),
1987        ASPEED_PINCTRL_GROUP(SPI2CS1),
1988        ASPEED_PINCTRL_GROUP(SPI2CS2),
1989        ASPEED_PINCTRL_GROUP(TACH0),
1990        ASPEED_PINCTRL_GROUP(TACH1),
1991        ASPEED_PINCTRL_GROUP(TACH10),
1992        ASPEED_PINCTRL_GROUP(TACH11),
1993        ASPEED_PINCTRL_GROUP(TACH12),
1994        ASPEED_PINCTRL_GROUP(TACH13),
1995        ASPEED_PINCTRL_GROUP(TACH14),
1996        ASPEED_PINCTRL_GROUP(TACH15),
1997        ASPEED_PINCTRL_GROUP(TACH2),
1998        ASPEED_PINCTRL_GROUP(TACH3),
1999        ASPEED_PINCTRL_GROUP(TACH4),
2000        ASPEED_PINCTRL_GROUP(TACH5),

2001        ASPEED_PINCTRL_GROUP(TACH6),
2002        ASPEED_PINCTRL_GROUP(TACH7),
2003        ASPEED_PINCTRL_GROUP(TACH8),
2004        ASPEED_PINCTRL_GROUP(TACH9),
2005        ASPEED_PINCTRL_GROUP(THRU0),
2006        ASPEED_PINCTRL_GROUP(THRU1),
2007        ASPEED_PINCTRL_GROUP(THRU2),
2008        ASPEED_PINCTRL_GROUP(THRU3),
2009        ASPEED_PINCTRL_GROUP(TXD1),
2010        ASPEED_PINCTRL_GROUP(TXD2),
2011        ASPEED_PINCTRL_GROUP(TXD3),
2012        ASPEED_PINCTRL_GROUP(TXD4),
2013        ASPEED_PINCTRL_GROUP(UART10),
2014        ASPEED_PINCTRL_GROUP(UART11),
2015        ASPEED_PINCTRL_GROUP(UART12G0),
2016        ASPEED_PINCTRL_GROUP(UART12G1),
2017        ASPEED_PINCTRL_GROUP(UART13G0),
2018        ASPEED_PINCTRL_GROUP(UART13G1),
2019        ASPEED_PINCTRL_GROUP(UART6),
2020        ASPEED_PINCTRL_GROUP(UART7),
2021        ASPEED_PINCTRL_GROUP(UART8),
2022        ASPEED_PINCTRL_GROUP(UART9),
2023        ASPEED_PINCTRL_GROUP(VB),
2024        ASPEED_PINCTRL_GROUP(VGAHS),
2025        ASPEED_PINCTRL_GROUP(VGAVS),
2026        ASPEED_PINCTRL_GROUP(WDTRST1),
2027        ASPEED_PINCTRL_GROUP(WDTRST2),
2028        ASPEED_PINCTRL_GROUP(WDTRST3),
2029        ASPEED_PINCTRL_GROUP(WDTRST4),
2030};
2031
2032static const struct aspeed_pin_function aspeed_g6_functions[] = {
2033        ASPEED_PINCTRL_FUNC(ADC0),
2034        ASPEED_PINCTRL_FUNC(ADC1),
2035        ASPEED_PINCTRL_FUNC(ADC10),
2036        ASPEED_PINCTRL_FUNC(ADC11),
2037        ASPEED_PINCTRL_FUNC(ADC12),
2038        ASPEED_PINCTRL_FUNC(ADC13),
2039        ASPEED_PINCTRL_FUNC(ADC14),
2040        ASPEED_PINCTRL_FUNC(ADC15),
2041        ASPEED_PINCTRL_FUNC(ADC2),
2042        ASPEED_PINCTRL_FUNC(ADC3),
2043        ASPEED_PINCTRL_FUNC(ADC4),
2044        ASPEED_PINCTRL_FUNC(ADC5),
2045        ASPEED_PINCTRL_FUNC(ADC6),
2046        ASPEED_PINCTRL_FUNC(ADC7),
2047        ASPEED_PINCTRL_FUNC(ADC8),
2048        ASPEED_PINCTRL_FUNC(ADC9),
2049        ASPEED_PINCTRL_FUNC(BMCINT),
2050        ASPEED_PINCTRL_FUNC(EMMC),
2051        ASPEED_PINCTRL_FUNC(ESPI),
2052        ASPEED_PINCTRL_FUNC(ESPIALT),
2053        ASPEED_PINCTRL_FUNC(FSI1),
2054        ASPEED_PINCTRL_FUNC(FSI2),
2055        ASPEED_PINCTRL_FUNC(FWSPIABR),
2056        ASPEED_PINCTRL_FUNC(FWSPID),
2057        ASPEED_PINCTRL_FUNC(FWSPIWP),
2058        ASPEED_PINCTRL_FUNC(GPIT0),
2059        ASPEED_PINCTRL_FUNC(GPIT1),
2060        ASPEED_PINCTRL_FUNC(GPIT2),
2061        ASPEED_PINCTRL_FUNC(GPIT3),
2062        ASPEED_PINCTRL_FUNC(GPIT4),
2063        ASPEED_PINCTRL_FUNC(GPIT5),
2064        ASPEED_PINCTRL_FUNC(GPIT6),
2065        ASPEED_PINCTRL_FUNC(GPIT7),
2066        ASPEED_PINCTRL_FUNC(GPIU0),
2067        ASPEED_PINCTRL_FUNC(GPIU1),
2068        ASPEED_PINCTRL_FUNC(GPIU2),
2069        ASPEED_PINCTRL_FUNC(GPIU3),
2070        ASPEED_PINCTRL_FUNC(GPIU4),
2071        ASPEED_PINCTRL_FUNC(GPIU5),
2072        ASPEED_PINCTRL_FUNC(GPIU6),
2073        ASPEED_PINCTRL_FUNC(GPIU7),
2074        ASPEED_PINCTRL_FUNC(I2C1),
2075        ASPEED_PINCTRL_FUNC(I2C10),
2076        ASPEED_PINCTRL_FUNC(I2C11),
2077        ASPEED_PINCTRL_FUNC(I2C12),
2078        ASPEED_PINCTRL_FUNC(I2C13),
2079        ASPEED_PINCTRL_FUNC(I2C14),
2080        ASPEED_PINCTRL_FUNC(I2C15),
2081        ASPEED_PINCTRL_FUNC(I2C16),
2082        ASPEED_PINCTRL_FUNC(I2C2),
2083        ASPEED_PINCTRL_FUNC(I2C3),
2084        ASPEED_PINCTRL_FUNC(I2C4),
2085        ASPEED_PINCTRL_FUNC(I2C5),
2086        ASPEED_PINCTRL_FUNC(I2C6),
2087        ASPEED_PINCTRL_FUNC(I2C7),
2088        ASPEED_PINCTRL_FUNC(I2C8),
2089        ASPEED_PINCTRL_FUNC(I2C9),
2090        ASPEED_PINCTRL_FUNC(I3C3),
2091        ASPEED_PINCTRL_FUNC(I3C4),
2092        ASPEED_PINCTRL_FUNC(I3C5),
2093        ASPEED_PINCTRL_FUNC(I3C6),
2094        ASPEED_PINCTRL_FUNC(JTAGM),
2095        ASPEED_PINCTRL_FUNC(LHPD),
2096        ASPEED_PINCTRL_FUNC(LHSIRQ),
2097        ASPEED_PINCTRL_FUNC(LPC),
2098        ASPEED_PINCTRL_FUNC(LPCHC),
2099        ASPEED_PINCTRL_FUNC(LPCPD),
2100        ASPEED_PINCTRL_FUNC(LPCPME),
2101        ASPEED_PINCTRL_FUNC(LPCSMI),
2102        ASPEED_PINCTRL_FUNC(LSIRQ),
2103        ASPEED_PINCTRL_FUNC(MACLINK1),
2104        ASPEED_PINCTRL_FUNC(MACLINK2),
2105        ASPEED_PINCTRL_FUNC(MACLINK3),
2106        ASPEED_PINCTRL_FUNC(MACLINK4),
2107        ASPEED_PINCTRL_FUNC(MDIO1),
2108        ASPEED_PINCTRL_FUNC(MDIO2),
2109        ASPEED_PINCTRL_FUNC(MDIO3),
2110        ASPEED_PINCTRL_FUNC(MDIO4),
2111        ASPEED_PINCTRL_FUNC(NCTS1),
2112        ASPEED_PINCTRL_FUNC(NCTS2),
2113        ASPEED_PINCTRL_FUNC(NCTS3),
2114        ASPEED_PINCTRL_FUNC(NCTS4),
2115        ASPEED_PINCTRL_FUNC(NDCD1),
2116        ASPEED_PINCTRL_FUNC(NDCD2),
2117        ASPEED_PINCTRL_FUNC(NDCD3),
2118        ASPEED_PINCTRL_FUNC(NDCD4),
2119        ASPEED_PINCTRL_FUNC(NDSR1),
2120        ASPEED_PINCTRL_FUNC(NDSR2),
2121        ASPEED_PINCTRL_FUNC(NDSR3),
2122        ASPEED_PINCTRL_FUNC(NDSR4),
2123        ASPEED_PINCTRL_FUNC(NDTR1),
2124        ASPEED_PINCTRL_FUNC(NDTR2),
2125        ASPEED_PINCTRL_FUNC(NDTR3),
2126        ASPEED_PINCTRL_FUNC(NDTR4),
2127        ASPEED_PINCTRL_FUNC(NRI1),
2128        ASPEED_PINCTRL_FUNC(NRI2),
2129        ASPEED_PINCTRL_FUNC(NRI3),
2130        ASPEED_PINCTRL_FUNC(NRI4),
2131        ASPEED_PINCTRL_FUNC(NRTS1),
2132        ASPEED_PINCTRL_FUNC(NRTS2),
2133        ASPEED_PINCTRL_FUNC(NRTS3),
2134        ASPEED_PINCTRL_FUNC(NRTS4),
2135        ASPEED_PINCTRL_FUNC(OSCCLK),
2136        ASPEED_PINCTRL_FUNC(PEWAKE),
2137        ASPEED_PINCTRL_FUNC(PWM0),
2138        ASPEED_PINCTRL_FUNC(PWM1),
2139        ASPEED_PINCTRL_FUNC(PWM10),
2140        ASPEED_PINCTRL_FUNC(PWM11),
2141        ASPEED_PINCTRL_FUNC(PWM12),
2142        ASPEED_PINCTRL_FUNC(PWM13),
2143        ASPEED_PINCTRL_FUNC(PWM14),
2144        ASPEED_PINCTRL_FUNC(PWM15),
2145        ASPEED_PINCTRL_FUNC(PWM2),
2146        ASPEED_PINCTRL_FUNC(PWM3),
2147        ASPEED_PINCTRL_FUNC(PWM4),
2148        ASPEED_PINCTRL_FUNC(PWM5),
2149        ASPEED_PINCTRL_FUNC(PWM6),
2150        ASPEED_PINCTRL_FUNC(PWM7),
2151        ASPEED_PINCTRL_FUNC(PWM8),
2152        ASPEED_PINCTRL_FUNC(PWM9),
2153        ASPEED_PINCTRL_FUNC(RGMII1),
2154        ASPEED_PINCTRL_FUNC(RGMII2),
2155        ASPEED_PINCTRL_FUNC(RGMII3),
2156        ASPEED_PINCTRL_FUNC(RGMII4),
2157        ASPEED_PINCTRL_FUNC(RMII1),
2158        ASPEED_PINCTRL_FUNC(RMII2),
2159        ASPEED_PINCTRL_FUNC(RMII3),
2160        ASPEED_PINCTRL_FUNC(RMII4),
2161        ASPEED_PINCTRL_FUNC(RXD1),
2162        ASPEED_PINCTRL_FUNC(RXD2),
2163        ASPEED_PINCTRL_FUNC(RXD3),
2164        ASPEED_PINCTRL_FUNC(RXD4),
2165        ASPEED_PINCTRL_FUNC(SALT1),
2166        ASPEED_PINCTRL_FUNC(SALT10),
2167        ASPEED_PINCTRL_FUNC(SALT11),
2168        ASPEED_PINCTRL_FUNC(SALT12),
2169        ASPEED_PINCTRL_FUNC(SALT13),
2170        ASPEED_PINCTRL_FUNC(SALT14),
2171        ASPEED_PINCTRL_FUNC(SALT15),
2172        ASPEED_PINCTRL_FUNC(SALT16),
2173        ASPEED_PINCTRL_FUNC(SALT2),
2174        ASPEED_PINCTRL_FUNC(SALT3),
2175        ASPEED_PINCTRL_FUNC(SALT4),
2176        ASPEED_PINCTRL_FUNC(SALT5),
2177        ASPEED_PINCTRL_FUNC(SALT6),
2178        ASPEED_PINCTRL_FUNC(SALT7),
2179        ASPEED_PINCTRL_FUNC(SALT8),
2180        ASPEED_PINCTRL_FUNC(SALT9),
2181        ASPEED_PINCTRL_FUNC(SD1),
2182        ASPEED_PINCTRL_FUNC(SD2),
2183        ASPEED_PINCTRL_FUNC(SGPM1),
2184        ASPEED_PINCTRL_FUNC(SGPS1),
2185        ASPEED_PINCTRL_FUNC(SIOONCTRL),
2186        ASPEED_PINCTRL_FUNC(SIOPBI),
2187        ASPEED_PINCTRL_FUNC(SIOPBO),
2188        ASPEED_PINCTRL_FUNC(SIOPWREQ),
2189        ASPEED_PINCTRL_FUNC(SIOPWRGD),
2190        ASPEED_PINCTRL_FUNC(SIOS3),
2191        ASPEED_PINCTRL_FUNC(SIOS5),
2192        ASPEED_PINCTRL_FUNC(SIOSCI),
2193        ASPEED_PINCTRL_FUNC(SPI1),
2194        ASPEED_PINCTRL_FUNC(SPI1ABR),
2195        ASPEED_PINCTRL_FUNC(SPI1CS1),
2196        ASPEED_PINCTRL_FUNC(SPI1WP),
2197        ASPEED_PINCTRL_FUNC(SPI2),
2198        ASPEED_PINCTRL_FUNC(SPI2CS1),
2199        ASPEED_PINCTRL_FUNC(SPI2CS2),
2200        ASPEED_PINCTRL_FUNC(TACH0),
2201        ASPEED_PINCTRL_FUNC(TACH1),
2202        ASPEED_PINCTRL_FUNC(TACH10),
2203        ASPEED_PINCTRL_FUNC(TACH11),
2204        ASPEED_PINCTRL_FUNC(TACH12),
2205        ASPEED_PINCTRL_FUNC(TACH13),
2206        ASPEED_PINCTRL_FUNC(TACH14),
2207        ASPEED_PINCTRL_FUNC(TACH15),
2208        ASPEED_PINCTRL_FUNC(TACH2),
2209        ASPEED_PINCTRL_FUNC(TACH3),
2210        ASPEED_PINCTRL_FUNC(TACH4),
2211        ASPEED_PINCTRL_FUNC(TACH5),
2212        ASPEED_PINCTRL_FUNC(TACH6),
2213        ASPEED_PINCTRL_FUNC(TACH7),
2214        ASPEED_PINCTRL_FUNC(TACH8),
2215        ASPEED_PINCTRL_FUNC(TACH9),
2216        ASPEED_PINCTRL_FUNC(THRU0),
2217        ASPEED_PINCTRL_FUNC(THRU1),
2218        ASPEED_PINCTRL_FUNC(THRU2),
2219        ASPEED_PINCTRL_FUNC(THRU3),
2220        ASPEED_PINCTRL_FUNC(TXD1),
2221        ASPEED_PINCTRL_FUNC(TXD2),
2222        ASPEED_PINCTRL_FUNC(TXD3),
2223        ASPEED_PINCTRL_FUNC(TXD4),
2224        ASPEED_PINCTRL_FUNC(UART10),
2225        ASPEED_PINCTRL_FUNC(UART11),
2226        ASPEED_PINCTRL_FUNC(UART12),
2227        ASPEED_PINCTRL_FUNC(UART13),
2228        ASPEED_PINCTRL_FUNC(UART6),
2229        ASPEED_PINCTRL_FUNC(UART7),
2230        ASPEED_PINCTRL_FUNC(UART8),
2231        ASPEED_PINCTRL_FUNC(UART9),
2232        ASPEED_PINCTRL_FUNC(VB),
2233        ASPEED_PINCTRL_FUNC(VGAHS),
2234        ASPEED_PINCTRL_FUNC(VGAVS),
2235        ASPEED_PINCTRL_FUNC(WDTRST1),
2236        ASPEED_PINCTRL_FUNC(WDTRST2),
2237        ASPEED_PINCTRL_FUNC(WDTRST3),
2238        ASPEED_PINCTRL_FUNC(WDTRST4),
2239};
2240
2241/**
2242 * Configure a pin's signal by applying an expression's descriptor state for
2243 * all descriptors in the expression.
2244 *
2245 * @ctx: The pinmux context
2246 * @expr: The expression associated with the function whose signal is to be
2247 *        configured
2248 * @enable: true to enable an function's signal through a pin's signal
2249 *          expression, false to disable the function's signal
2250 *
2251 * Return: 0 if the expression is configured as requested and a negative error
2252 * code otherwise
2253 */
2254static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
2255                                  const struct aspeed_sig_expr *expr,
2256                                  bool enable)
2257{
2258        int ret;
2259        int i;
2260
2261        for (i = 0; i < expr->ndescs; i++) {
2262                const struct aspeed_sig_desc *desc = &expr->descs[i];
2263                u32 pattern = enable ? desc->enable : desc->disable;
2264                u32 val = (pattern << __ffs(desc->mask));
2265                bool is_strap;
2266
2267                if (!ctx->maps[desc->ip])
2268                        return -ENODEV;
2269
2270                WARN_ON(desc->ip != ASPEED_IP_SCU);
2271                is_strap = desc->reg == SCU500 || desc->reg == SCU510;
2272
2273                if (is_strap) {
2274                        /*
2275                         * The AST2600 has write protection mask registers for
2276                         * the hardware strapping in SCU508 and SCU518. Assume
2277                         * that if the platform doesn't want the strapping
2278                         * values changed that it has set the write mask.
2279                         *
2280                         * The strapping registers implement write-1-clear
2281                         * behaviour. SCU500 is paired with clear writes on
2282                         * SCU504, likewise SCU510 is paired with SCU514.
2283                         */
2284                        u32 clear = ~val & desc->mask;
2285                        u32 w1c = desc->reg + 4;
2286
2287                        if (clear)
2288                                ret = regmap_update_bits(ctx->maps[desc->ip],
2289                                                         w1c, desc->mask,
2290                                                         clear);
2291                }
2292
2293                ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2294                                         desc->mask, val);
2295                if (ret)
2296                        return ret;
2297        }
2298
2299        ret = aspeed_sig_expr_eval(ctx, expr, enable);
2300        if (ret < 0)
2301                return ret;
2302
2303        if (!ret)
2304                return -EPERM;
2305        return 0;
2306}
2307
2308static const struct aspeed_pinmux_ops aspeed_g5_ops = {
2309        .set = aspeed_g6_sig_expr_set,
2310};
2311
2312static struct aspeed_pinctrl_data aspeed_g6_pinctrl_data = {
2313        .pins = aspeed_g6_pins,
2314        .npins = ARRAY_SIZE(aspeed_g6_pins),
2315        .pinmux = {
2316                .ops = &aspeed_g5_ops,
2317                .groups = aspeed_g6_groups,
2318                .ngroups = ARRAY_SIZE(aspeed_g6_groups),
2319                .functions = aspeed_g6_functions,
2320                .nfunctions = ARRAY_SIZE(aspeed_g6_functions),
2321        },
2322};
2323
2324static const struct pinmux_ops aspeed_g6_pinmux_ops = {
2325        .get_functions_count = aspeed_pinmux_get_fn_count,
2326        .get_function_name = aspeed_pinmux_get_fn_name,
2327        .get_function_groups = aspeed_pinmux_get_fn_groups,
2328        .set_mux = aspeed_pinmux_set_mux,
2329        .gpio_request_enable = aspeed_gpio_request_enable,
2330        .strict = true,
2331};
2332
2333static const struct pinctrl_ops aspeed_g6_pinctrl_ops = {
2334        .get_groups_count = aspeed_pinctrl_get_groups_count,
2335        .get_group_name = aspeed_pinctrl_get_group_name,
2336        .get_group_pins = aspeed_pinctrl_get_group_pins,
2337        .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2338        .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2339        .dt_free_map = pinctrl_utils_free_map,
2340};
2341
2342static struct pinctrl_desc aspeed_g6_pinctrl_desc = {
2343        .name = "aspeed-g6-pinctrl",
2344        .pins = aspeed_g6_pins,
2345        .npins = ARRAY_SIZE(aspeed_g6_pins),
2346        .pctlops = &aspeed_g6_pinctrl_ops,
2347        .pmxops = &aspeed_g6_pinmux_ops,
2348};
2349
2350static int aspeed_g6_pinctrl_probe(struct platform_device *pdev)
2351{
2352        int i;
2353
2354        for (i = 0; i < ARRAY_SIZE(aspeed_g6_pins); i++)
2355                aspeed_g6_pins[i].number = i;
2356
2357        return aspeed_pinctrl_probe(pdev, &aspeed_g6_pinctrl_desc,
2358                        &aspeed_g6_pinctrl_data);
2359}
2360
2361static const struct of_device_id aspeed_g6_pinctrl_of_match[] = {
2362        { .compatible = "aspeed,ast2600-pinctrl", },
2363        { },
2364};
2365
2366static struct platform_driver aspeed_g6_pinctrl_driver = {
2367        .probe = aspeed_g6_pinctrl_probe,
2368        .driver = {
2369                .name = "aspeed-g6-pinctrl",
2370                .of_match_table = aspeed_g6_pinctrl_of_match,
2371        },
2372};
2373
2374static int aspeed_g6_pinctrl_init(void)
2375{
2376        return platform_driver_register(&aspeed_g6_pinctrl_driver);
2377}
2378
2379arch_initcall(aspeed_g6_pinctrl_init);
2380