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23#ifndef _H_LPFC_DEBUG_FS
24#define _H_LPFC_DEBUG_FS
25
26#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
27
28
29#define LPFC_DEBUG_TRC_ENTRY_SIZE 100
30
31
32#define LPFC_NODELIST_SIZE 8192
33#define LPFC_NODELIST_ENTRY_SIZE 120
34
35
36#define LPFC_DUMPHBASLIM_SIZE 4096
37
38
39#define LPFC_DUMPHOSTSLIM_SIZE 4096
40
41
42#define LPFC_DUMPSLIQINFO_SIZE 4096
43
44
45#define LPFC_HBQINFO_SIZE 8192
46
47
48#define LPFC_NVMESTAT_SIZE 8192
49#define LPFC_NVMEKTIME_SIZE 8192
50#define LPFC_CPUCHECK_SIZE 8192
51#define LPFC_NVMEIO_TRC_SIZE 8192
52
53
54#define LPFC_SCSISTAT_SIZE 8192
55
56#define LPFC_DEBUG_OUT_LINE_SZ 80
57
58
59
60
61
62
63#define LPFC_PCI_CFG_BROWSE 0xffff
64#define LPFC_PCI_CFG_RD_CMD_ARG 2
65#define LPFC_PCI_CFG_WR_CMD_ARG 3
66#define LPFC_PCI_CFG_SIZE 4096
67#define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
68
69#define IDIAG_PCICFG_WHERE_INDX 0
70#define IDIAG_PCICFG_COUNT_INDX 1
71#define IDIAG_PCICFG_VALUE_INDX 2
72
73
74#define LPFC_PCI_BAR_BROWSE 0xffff
75#define LPFC_PCI_BAR_RD_CMD_ARG 3
76#define LPFC_PCI_BAR_WR_CMD_ARG 3
77
78#define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16)
79#define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
80#define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
81#define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32)
82
83#define LPFC_PCI_BAR_RD_BUF_SIZE 4096
84#define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
85
86#define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
87#define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
88#define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
89#define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
90
91#define IDIAG_BARACC_BAR_NUM_INDX 0
92#define IDIAG_BARACC_OFF_SET_INDX 1
93#define IDIAG_BARACC_ACC_MOD_INDX 2
94#define IDIAG_BARACC_REG_VAL_INDX 2
95#define IDIAG_BARACC_BAR_SZE_INDX 3
96
97#define IDIAG_BARACC_BAR_0 0
98#define IDIAG_BARACC_BAR_1 1
99#define IDIAG_BARACC_BAR_2 2
100
101#define SINGLE_WORD 1
102
103
104#define LPFC_QUE_INFO_GET_BUF_SIZE 4096
105
106
107#define LPFC_QUE_ACC_BROWSE 0xffff
108#define LPFC_QUE_ACC_RD_CMD_ARG 4
109#define LPFC_QUE_ACC_WR_CMD_ARG 6
110#define LPFC_QUE_ACC_BUF_SIZE 4096
111#define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
112
113#define LPFC_IDIAG_EQ 1
114#define LPFC_IDIAG_CQ 2
115#define LPFC_IDIAG_MQ 3
116#define LPFC_IDIAG_WQ 4
117#define LPFC_IDIAG_RQ 5
118
119#define IDIAG_QUEACC_QUETP_INDX 0
120#define IDIAG_QUEACC_QUEID_INDX 1
121#define IDIAG_QUEACC_INDEX_INDX 2
122#define IDIAG_QUEACC_COUNT_INDX 3
123#define IDIAG_QUEACC_OFFST_INDX 4
124#define IDIAG_QUEACC_VALUE_INDX 5
125
126
127#define LPFC_DRB_ACC_ALL 0xffff
128#define LPFC_DRB_ACC_RD_CMD_ARG 1
129#define LPFC_DRB_ACC_WR_CMD_ARG 2
130#define LPFC_DRB_ACC_BUF_SIZE 256
131
132#define LPFC_DRB_EQ 1
133#define LPFC_DRB_CQ 2
134#define LPFC_DRB_MQ 3
135#define LPFC_DRB_WQ 4
136#define LPFC_DRB_RQ 5
137
138#define LPFC_DRB_MAX 5
139
140#define IDIAG_DRBACC_REGID_INDX 0
141#define IDIAG_DRBACC_VALUE_INDX 1
142
143
144#define LPFC_CTL_ACC_ALL 0xffff
145#define LPFC_CTL_ACC_RD_CMD_ARG 1
146#define LPFC_CTL_ACC_WR_CMD_ARG 2
147#define LPFC_CTL_ACC_BUF_SIZE 256
148
149#define LPFC_CTL_PORT_SEM 1
150#define LPFC_CTL_PORT_STA 2
151#define LPFC_CTL_PORT_CTL 3
152#define LPFC_CTL_PORT_ER1 4
153#define LPFC_CTL_PORT_ER2 5
154#define LPFC_CTL_PDEV_CTL 6
155
156#define LPFC_CTL_MAX 6
157
158#define IDIAG_CTLACC_REGID_INDX 0
159#define IDIAG_CTLACC_VALUE_INDX 1
160
161
162#define LPFC_MBX_DMP_ARG 4
163
164#define LPFC_MBX_ACC_BUF_SIZE 512
165#define LPFC_MBX_ACC_LBUF_SZ 128
166
167#define LPFC_MBX_DMP_MBX_WORD 0x00000001
168#define LPFC_MBX_DMP_MBX_BYTE 0x00000002
169#define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
170
171#define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
172#define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
173#define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
174#define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
175#define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
176 LPFC_BSG_DMP_MBX_RD_BUF | \
177 LPFC_BSG_DMP_MBX_WR_MBX | \
178 LPFC_BSG_DMP_MBX_WR_BUF)
179
180#define LPFC_MBX_DMP_ALL 0xffff
181#define LPFC_MBX_ALL_CMD 0xff
182
183#define IDIAG_MBXACC_MBCMD_INDX 0
184#define IDIAG_MBXACC_DPMAP_INDX 1
185#define IDIAG_MBXACC_DPCNT_INDX 2
186#define IDIAG_MBXACC_WDCNT_INDX 3
187
188
189#define LPFC_EXT_ACC_CMD_ARG 1
190#define LPFC_EXT_ACC_BUF_SIZE 4096
191
192#define LPFC_EXT_ACC_AVAIL 0x1
193#define LPFC_EXT_ACC_ALLOC 0x2
194#define LPFC_EXT_ACC_DRIVR 0x4
195#define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \
196 LPFC_EXT_ACC_AVAIL | \
197 LPFC_EXT_ACC_ALLOC)
198
199#define IDIAG_EXTACC_EXMAP_INDX 0
200
201#define SIZE_U8 sizeof(uint8_t)
202#define SIZE_U16 sizeof(uint16_t)
203#define SIZE_U32 sizeof(uint32_t)
204
205#define lpfc_nvmeio_data(phba, fmt, arg...) \
206 { \
207 if (phba->nvmeio_trc_on) \
208 lpfc_debugfs_nvme_trc(phba, fmt, ##arg); \
209 }
210
211struct lpfc_debug {
212 char *i_private;
213 char op;
214#define LPFC_IDIAG_OP_RD 1
215#define LPFC_IDIAG_OP_WR 2
216 char *buffer;
217 int len;
218};
219
220struct lpfc_debugfs_trc {
221 char *fmt;
222 uint32_t data1;
223 uint32_t data2;
224 uint32_t data3;
225 uint32_t seq_cnt;
226 unsigned long jif;
227};
228
229struct lpfc_debugfs_nvmeio_trc {
230 char *fmt;
231 uint16_t data1;
232 uint16_t data2;
233 uint32_t data3;
234};
235
236struct lpfc_idiag_offset {
237 uint32_t last_rd;
238};
239
240#define LPFC_IDIAG_CMD_DATA_SIZE 8
241struct lpfc_idiag_cmd {
242 uint32_t opcode;
243#define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
244#define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
245#define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
246#define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
247
248#define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
249#define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
250#define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
251#define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
252
253#define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
254#define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
255#define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
256#define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
257
258#define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
259#define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
260#define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
261#define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
262
263#define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
264#define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
265#define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
266#define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
267
268#define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
269#define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
270
271#define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
272
273 uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
274};
275
276struct lpfc_idiag {
277 uint32_t active;
278 struct lpfc_idiag_cmd cmd;
279 struct lpfc_idiag_offset offset;
280 void *ptr_private;
281};
282
283#else
284
285#define lpfc_nvmeio_data(phba, fmt, arg...) \
286 no_printk(fmt, ##arg)
287
288#endif
289
290
291#define LPFC_DUMP_MULTIXRIPOOL_SIZE 8192
292
293enum {
294 DUMP_IO,
295 DUMP_MBX,
296 DUMP_ELS,
297 DUMP_NVMELS,
298};
299
300
301#define LPFC_DISC_TRC_ELS_CMD 0x1
302#define LPFC_DISC_TRC_ELS_RSP 0x2
303#define LPFC_DISC_TRC_ELS_UNSOL 0x4
304#define LPFC_DISC_TRC_ELS_ALL 0x7
305#define LPFC_DISC_TRC_MBOX_VPORT 0x8
306#define LPFC_DISC_TRC_MBOX 0x10
307#define LPFC_DISC_TRC_MBOX_ALL 0x18
308#define LPFC_DISC_TRC_CT 0x20
309#define LPFC_DISC_TRC_DSM 0x40
310#define LPFC_DISC_TRC_RPORT 0x80
311#define LPFC_DISC_TRC_NODE 0x100
312
313#define LPFC_DISC_TRC_DISCOVERY 0xef
314
315#endif
316
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329
330
331
332static void
333lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)
334{
335 char line_buf[LPFC_LBUF_SZ];
336 int i, esize, qe_word_cnt, len;
337 uint32_t *pword;
338
339
340 if (!q)
341 return;
342 if (idx >= q->entry_count)
343 return;
344
345 esize = q->entry_size;
346 qe_word_cnt = esize / sizeof(uint32_t);
347 pword = lpfc_sli4_qe(q, idx);
348
349 len = 0;
350 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);
351 if (qe_word_cnt > 8)
352 printk(KERN_ERR "%s\n", line_buf);
353
354 for (i = 0; i < qe_word_cnt; i++) {
355 if (!(i % 8)) {
356 if (i != 0)
357 printk(KERN_ERR "%s\n", line_buf);
358 if (qe_word_cnt > 8) {
359 len = 0;
360 memset(line_buf, 0, LPFC_LBUF_SZ);
361 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len,
362 "%03d: ", i);
363 }
364 }
365 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",
366 ((uint32_t)*pword) & 0xffffffff);
367 pword++;
368 }
369 if (qe_word_cnt <= 8 || (i - 1) % 8)
370 printk(KERN_ERR "%s\n", line_buf);
371}
372
373
374
375
376
377
378
379
380static inline void
381lpfc_debug_dump_q(struct lpfc_queue *q)
382{
383 int idx, entry_count;
384
385
386 if (!q)
387 return;
388
389 dev_printk(KERN_ERR, &(((q->phba))->pcidev)->dev,
390 "%d: [qid:%d, type:%d, subtype:%d, "
391 "qe_size:%d, qe_count:%d, "
392 "host_index:%d, port_index:%d]\n",
393 (q->phba)->brd_no,
394 q->queue_id, q->type, q->subtype,
395 q->entry_size, q->entry_count,
396 q->host_index, q->hba_index);
397 entry_count = q->entry_count;
398 for (idx = 0; idx < entry_count; idx++)
399 lpfc_debug_dump_qe(q, idx);
400 printk(KERN_ERR "\n");
401}
402
403
404
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409
410
411static inline void
412lpfc_debug_dump_wq(struct lpfc_hba *phba, int qtype, int wqidx)
413{
414 struct lpfc_queue *wq;
415 char *qtypestr;
416
417 if (qtype == DUMP_IO) {
418 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
419 qtypestr = "IO";
420 } else if (qtype == DUMP_MBX) {
421 wq = phba->sli4_hba.mbx_wq;
422 qtypestr = "MBX";
423 } else if (qtype == DUMP_ELS) {
424 wq = phba->sli4_hba.els_wq;
425 qtypestr = "ELS";
426 } else if (qtype == DUMP_NVMELS) {
427 wq = phba->sli4_hba.nvmels_wq;
428 qtypestr = "NVMELS";
429 } else
430 return;
431
432 if (qtype == DUMP_IO)
433 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n",
434 qtypestr, wqidx, wq->queue_id);
435 else
436 pr_err("%s WQ: WQ[Qid:%d]\n",
437 qtypestr, wq->queue_id);
438
439 lpfc_debug_dump_q(wq);
440}
441
442
443
444
445
446
447
448
449
450
451static inline void
452lpfc_debug_dump_cq(struct lpfc_hba *phba, int qtype, int wqidx)
453{
454 struct lpfc_queue *wq, *cq, *eq;
455 char *qtypestr;
456 int eqidx;
457
458
459 eq = NULL;
460
461 if (qtype == DUMP_IO) {
462 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
463 cq = phba->sli4_hba.hdwq[wqidx].io_cq;
464 qtypestr = "IO";
465 } else if (qtype == DUMP_MBX) {
466 wq = phba->sli4_hba.mbx_wq;
467 cq = phba->sli4_hba.mbx_cq;
468 qtypestr = "MBX";
469 } else if (qtype == DUMP_ELS) {
470 wq = phba->sli4_hba.els_wq;
471 cq = phba->sli4_hba.els_cq;
472 qtypestr = "ELS";
473 } else if (qtype == DUMP_NVMELS) {
474 wq = phba->sli4_hba.nvmels_wq;
475 cq = phba->sli4_hba.nvmels_cq;
476 qtypestr = "NVMELS";
477 } else
478 return;
479
480 for (eqidx = 0; eqidx < phba->cfg_hdw_queue; eqidx++) {
481 eq = phba->sli4_hba.hdwq[eqidx].hba_eq;
482 if (cq->assoc_qid == eq->queue_id)
483 break;
484 }
485 if (eqidx == phba->cfg_hdw_queue) {
486 pr_err("Couldn't find EQ for CQ. Using EQ[0]\n");
487 eqidx = 0;
488 eq = phba->sli4_hba.hdwq[0].hba_eq;
489 }
490
491 if (qtype == DUMP_IO)
492 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]"
493 "->EQ[Idx:%d|Qid:%d]:\n",
494 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id,
495 eqidx, eq->queue_id);
496 else
497 pr_err("%s CQ: WQ[Qid:%d]->CQ[Qid:%d]"
498 "->EQ[Idx:%d|Qid:%d]:\n",
499 qtypestr, wq->queue_id, cq->queue_id,
500 eqidx, eq->queue_id);
501
502 lpfc_debug_dump_q(cq);
503}
504
505
506
507
508
509
510
511
512
513static inline void
514lpfc_debug_dump_hba_eq(struct lpfc_hba *phba, int qidx)
515{
516 struct lpfc_queue *qp;
517
518 qp = phba->sli4_hba.hdwq[qidx].hba_eq;
519
520 pr_err("EQ[Idx:%d|Qid:%d]\n", qidx, qp->queue_id);
521
522 lpfc_debug_dump_q(qp);
523}
524
525
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527
528
529
530
531static inline void
532lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)
533{
534 printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",
535 phba->sli4_hba.dat_rq->queue_id);
536 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
537}
538
539
540
541
542
543
544
545static inline void
546lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)
547{
548 printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",
549 phba->sli4_hba.hdr_rq->queue_id);
550 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
551}
552
553
554
555
556
557
558
559
560
561static inline void
562lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)
563{
564 int wq_idx;
565
566 for (wq_idx = 0; wq_idx < phba->cfg_hdw_queue; wq_idx++)
567 if (phba->sli4_hba.hdwq[wq_idx].io_wq->queue_id == qid)
568 break;
569 if (wq_idx < phba->cfg_hdw_queue) {
570 pr_err("IO WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
571 lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].io_wq);
572 return;
573 }
574
575 if (phba->sli4_hba.els_wq->queue_id == qid) {
576 pr_err("ELS WQ[Qid:%d]\n", qid);
577 lpfc_debug_dump_q(phba->sli4_hba.els_wq);
578 return;
579 }
580
581 if (phba->sli4_hba.nvmels_wq->queue_id == qid) {
582 pr_err("NVME LS WQ[Qid:%d]\n", qid);
583 lpfc_debug_dump_q(phba->sli4_hba.nvmels_wq);
584 }
585}
586
587
588
589
590
591
592
593
594
595static inline void
596lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)
597{
598 if (phba->sli4_hba.mbx_wq->queue_id == qid) {
599 printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);
600 lpfc_debug_dump_q(phba->sli4_hba.mbx_wq);
601 }
602}
603
604
605
606
607
608
609
610
611
612static inline void
613lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)
614{
615 if (phba->sli4_hba.hdr_rq->queue_id == qid) {
616 printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);
617 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
618 return;
619 }
620 if (phba->sli4_hba.dat_rq->queue_id == qid) {
621 printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);
622 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
623 }
624}
625
626
627
628
629
630
631
632
633
634static inline void
635lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)
636{
637 int cq_idx;
638
639 for (cq_idx = 0; cq_idx < phba->cfg_hdw_queue; cq_idx++)
640 if (phba->sli4_hba.hdwq[cq_idx].io_cq->queue_id == qid)
641 break;
642
643 if (cq_idx < phba->cfg_hdw_queue) {
644 pr_err("IO CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
645 lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].io_cq);
646 return;
647 }
648
649 if (phba->sli4_hba.els_cq->queue_id == qid) {
650 pr_err("ELS CQ[Qid:%d]\n", qid);
651 lpfc_debug_dump_q(phba->sli4_hba.els_cq);
652 return;
653 }
654
655 if (phba->sli4_hba.nvmels_cq->queue_id == qid) {
656 pr_err("NVME LS CQ[Qid:%d]\n", qid);
657 lpfc_debug_dump_q(phba->sli4_hba.nvmels_cq);
658 return;
659 }
660
661 if (phba->sli4_hba.mbx_cq->queue_id == qid) {
662 pr_err("MBX CQ[Qid:%d]\n", qid);
663 lpfc_debug_dump_q(phba->sli4_hba.mbx_cq);
664 }
665}
666
667
668
669
670
671
672
673
674
675static inline void
676lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)
677{
678 int eq_idx;
679
680 for (eq_idx = 0; eq_idx < phba->cfg_hdw_queue; eq_idx++)
681 if (phba->sli4_hba.hdwq[eq_idx].hba_eq->queue_id == qid)
682 break;
683
684 if (eq_idx < phba->cfg_hdw_queue) {
685 printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);
686 lpfc_debug_dump_q(phba->sli4_hba.hdwq[eq_idx].hba_eq);
687 return;
688 }
689}
690
691void lpfc_debug_dump_all_queues(struct lpfc_hba *);
692