1
2
3
4#ifndef __IPU3_CSS_H
5#define __IPU3_CSS_H
6
7#include <linux/videodev2.h>
8#include <linux/types.h>
9
10#include "ipu3-abi.h"
11#include "ipu3-css-pool.h"
12
13
14#define IMGU_NUM_SP 2
15#define IMGU_MAX_PIPELINE_NUM 20
16#define IMGU_MAX_PIPE_NUM 2
17
18
19#define IPU3_CSS_AUX_FRAME_REF 0
20
21#define IPU3_CSS_AUX_FRAME_TNR 1
22#define IPU3_CSS_AUX_FRAME_TYPES 2
23#define IPU3_CSS_AUX_FRAMES 2
24
25#define IPU3_CSS_QUEUE_IN 0
26#define IPU3_CSS_QUEUE_PARAMS 1
27#define IPU3_CSS_QUEUE_OUT 2
28#define IPU3_CSS_QUEUE_VF 3
29#define IPU3_CSS_QUEUE_STAT_3A 4
30#define IPU3_CSS_QUEUES 5
31
32#define IPU3_CSS_RECT_EFFECTIVE 0
33#define IPU3_CSS_RECT_BDS 1
34#define IPU3_CSS_RECT_ENVELOPE 2
35#define IPU3_CSS_RECT_GDC 3
36#define IPU3_CSS_RECTS 4
37
38#define IA_CSS_BINARY_MODE_PRIMARY 2
39#define IA_CSS_BINARY_MODE_VIDEO 3
40#define IPU3_CSS_DEFAULT_BINARY 3
41
42
43
44
45
46enum imgu_css_pipe_id {
47 IPU3_CSS_PIPE_ID_PREVIEW,
48 IPU3_CSS_PIPE_ID_COPY,
49 IPU3_CSS_PIPE_ID_VIDEO,
50 IPU3_CSS_PIPE_ID_CAPTURE,
51 IPU3_CSS_PIPE_ID_YUVPP,
52 IPU3_CSS_PIPE_ID_ACC,
53 IPU3_CSS_PIPE_ID_NUM
54};
55
56struct imgu_css_resolution {
57 u32 w;
58 u32 h;
59};
60
61enum imgu_css_buffer_state {
62 IPU3_CSS_BUFFER_NEW,
63 IPU3_CSS_BUFFER_QUEUED,
64 IPU3_CSS_BUFFER_DONE,
65 IPU3_CSS_BUFFER_FAILED,
66};
67
68struct imgu_css_buffer {
69
70 dma_addr_t daddr;
71 unsigned int queue;
72 enum imgu_css_buffer_state state;
73 struct list_head list;
74 u8 queue_pos;
75 unsigned int pipe;
76};
77
78struct imgu_css_format {
79 u32 pixelformat;
80 enum v4l2_colorspace colorspace;
81 enum imgu_abi_frame_format frame_format;
82 enum imgu_abi_bayer_order bayer_order;
83 enum imgu_abi_osys_format osys_format;
84 enum imgu_abi_osys_tiling osys_tiling;
85 u32 bytesperpixel_num;
86 u8 bit_depth;
87 u8 chroma_decim;
88 u8 width_align;
89 u8 flags;
90};
91
92struct imgu_css_queue {
93 union {
94 struct v4l2_pix_format_mplane mpix;
95 struct v4l2_meta_format meta;
96
97 } fmt;
98 const struct imgu_css_format *css_fmt;
99 unsigned int width_pad;
100 struct list_head bufs;
101};
102
103struct imgu_css_pipe {
104 enum imgu_css_pipe_id pipe_id;
105 unsigned int bindex;
106
107 struct imgu_css_queue queue[IPU3_CSS_QUEUES];
108 struct v4l2_rect rect[IPU3_CSS_RECTS];
109
110 bool vf_output_en;
111
112 spinlock_t qlock;
113
114
115 struct imgu_css_map sp_ddr_ptrs;
116 struct imgu_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
117 [IMGU_ABI_MAX_STAGES];
118 struct imgu_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
119 [IMGU_ABI_MAX_STAGES];
120
121
122
123
124
125 struct imgu_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1]
126 [IMGU_ABI_NUM_MEMORIES];
127
128 struct {
129 struct imgu_css_map mem[IPU3_CSS_AUX_FRAMES];
130 unsigned int width;
131 unsigned int height;
132 unsigned int bytesperline;
133 unsigned int bytesperpixel;
134 } aux_frames[IPU3_CSS_AUX_FRAME_TYPES];
135
136 struct {
137 struct imgu_css_pool parameter_set_info;
138 struct imgu_css_pool acc;
139 struct imgu_css_pool gdc;
140 struct imgu_css_pool obgrid;
141
142 struct imgu_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES];
143 } pool;
144
145 struct imgu_css_map abi_buffers[IPU3_CSS_QUEUES]
146 [IMGU_ABI_HOST2SP_BUFQ_SIZE];
147};
148
149
150struct imgu_css {
151 struct device *dev;
152 void __iomem *base;
153 const struct firmware *fw;
154 struct imgu_fw_header *fwp;
155 int iomem_length;
156 int fw_bl, fw_sp[IMGU_NUM_SP];
157 struct imgu_css_map *binary;
158 bool streaming;
159
160 struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM];
161 struct imgu_css_map xmem_sp_group_ptrs;
162
163
164 DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM);
165};
166
167
168int imgu_css_init(struct device *dev, struct imgu_css *css,
169 void __iomem *base, int length);
170void imgu_css_cleanup(struct imgu_css *css);
171int imgu_css_fmt_try(struct imgu_css *css,
172 struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
173 struct v4l2_rect *rects[IPU3_CSS_RECTS],
174 unsigned int pipe);
175int imgu_css_fmt_set(struct imgu_css *css,
176 struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
177 struct v4l2_rect *rects[IPU3_CSS_RECTS],
178 unsigned int pipe);
179int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt);
180int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe,
181 struct imgu_css_buffer *b);
182struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css);
183int imgu_css_start_streaming(struct imgu_css *css);
184void imgu_css_stop_streaming(struct imgu_css *css);
185bool imgu_css_queue_empty(struct imgu_css *css);
186bool imgu_css_is_streaming(struct imgu_css *css);
187bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe);
188
189
190int imgu_css_set_powerup(struct device *dev, void __iomem *base);
191void imgu_css_set_powerdown(struct device *dev, void __iomem *base);
192int imgu_css_irq_ack(struct imgu_css *css);
193
194
195int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe,
196 struct ipu3_uapi_params *set_params);
197
198
199static inline enum imgu_css_buffer_state
200imgu_css_buf_state(struct imgu_css_buffer *b)
201{
202 return b->state;
203}
204
205
206static inline void imgu_css_buf_init(struct imgu_css_buffer *b,
207 unsigned int queue, dma_addr_t daddr)
208{
209 b->state = IPU3_CSS_BUFFER_NEW;
210 b->queue = queue;
211 b->daddr = daddr;
212}
213#endif
214