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14#include <linux/acpi.h>
15#include <linux/device.h>
16#include <linux/resource.h>
17#include <linux/amba/bus.h>
18#include <linux/bitops.h>
19#include <linux/clk.h>
20#include <linux/io.h>
21#include <linux/ioport.h>
22#include <linux/kernel.h>
23#include <linux/math64.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/of.h>
27#include <linux/pm.h>
28#include <linux/slab.h>
29#include <linux/spinlock.h>
30#include <linux/types.h>
31#include <linux/watchdog.h>
32
33
34#define DEFAULT_TIMEOUT 60
35
36#define MODULE_NAME "sp805-wdt"
37
38
39#define WDTLOAD 0x000
40 #define LOAD_MIN 0x00000001
41 #define LOAD_MAX 0xFFFFFFFF
42#define WDTVALUE 0x004
43#define WDTCONTROL 0x008
44
45 #define INT_ENABLE (1 << 0)
46 #define RESET_ENABLE (1 << 1)
47 #define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
48#define WDTINTCLR 0x00C
49#define WDTRIS 0x010
50#define WDTMIS 0x014
51 #define INT_MASK (1 << 0)
52#define WDTLOCK 0xC00
53 #define UNLOCK 0x1ACCE551
54 #define LOCK 0x00000001
55
56
57
58
59
60
61
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63
64
65
66struct sp805_wdt {
67 struct watchdog_device wdd;
68 spinlock_t lock;
69 void __iomem *base;
70 struct clk *clk;
71 u64 rate;
72 struct amba_device *adev;
73 unsigned int load_val;
74};
75
76static bool nowayout = WATCHDOG_NOWAYOUT;
77module_param(nowayout, bool, 0);
78MODULE_PARM_DESC(nowayout,
79 "Set to 1 to keep watchdog running after device release");
80
81
82static bool wdt_is_running(struct watchdog_device *wdd)
83{
84 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
85 u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
86
87 return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
88}
89
90
91static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
92{
93 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
94 u64 load, rate;
95
96 rate = wdt->rate;
97
98
99
100
101
102
103
104 load = div_u64(rate, 2) * timeout - 1;
105
106 load = (load > LOAD_MAX) ? LOAD_MAX : load;
107 load = (load < LOAD_MIN) ? LOAD_MIN : load;
108
109 spin_lock(&wdt->lock);
110 wdt->load_val = load;
111
112 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
113 spin_unlock(&wdt->lock);
114
115 return 0;
116}
117
118
119static unsigned int wdt_timeleft(struct watchdog_device *wdd)
120{
121 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
122 u64 load;
123
124 spin_lock(&wdt->lock);
125 load = readl_relaxed(wdt->base + WDTVALUE);
126
127
128 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
129 load += wdt->load_val + 1;
130 spin_unlock(&wdt->lock);
131
132 return div_u64(load, wdt->rate);
133}
134
135static int
136wdt_restart(struct watchdog_device *wdd, unsigned long mode, void *cmd)
137{
138 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
139
140 writel_relaxed(0, wdt->base + WDTCONTROL);
141 writel_relaxed(0, wdt->base + WDTLOAD);
142 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
143
144 return 0;
145}
146
147static int wdt_config(struct watchdog_device *wdd, bool ping)
148{
149 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
150 int ret;
151
152 if (!ping) {
153
154 ret = clk_prepare_enable(wdt->clk);
155 if (ret) {
156 dev_err(&wdt->adev->dev, "clock enable fail");
157 return ret;
158 }
159 }
160
161 spin_lock(&wdt->lock);
162
163 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
164 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
165 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
166
167 if (!ping)
168 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
169 WDTCONTROL);
170
171 writel_relaxed(LOCK, wdt->base + WDTLOCK);
172
173
174 readl_relaxed(wdt->base + WDTLOCK);
175 spin_unlock(&wdt->lock);
176
177 return 0;
178}
179
180static int wdt_ping(struct watchdog_device *wdd)
181{
182 return wdt_config(wdd, true);
183}
184
185
186static int wdt_enable(struct watchdog_device *wdd)
187{
188 return wdt_config(wdd, false);
189}
190
191
192static int wdt_disable(struct watchdog_device *wdd)
193{
194 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
195
196 spin_lock(&wdt->lock);
197
198 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
199 writel_relaxed(0, wdt->base + WDTCONTROL);
200 writel_relaxed(LOCK, wdt->base + WDTLOCK);
201
202
203 readl_relaxed(wdt->base + WDTLOCK);
204 spin_unlock(&wdt->lock);
205
206 clk_disable_unprepare(wdt->clk);
207
208 return 0;
209}
210
211static const struct watchdog_info wdt_info = {
212 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
213 .identity = MODULE_NAME,
214};
215
216static const struct watchdog_ops wdt_ops = {
217 .owner = THIS_MODULE,
218 .start = wdt_enable,
219 .stop = wdt_disable,
220 .ping = wdt_ping,
221 .set_timeout = wdt_setload,
222 .get_timeleft = wdt_timeleft,
223 .restart = wdt_restart,
224};
225
226static int
227sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
228{
229 struct sp805_wdt *wdt;
230 int ret = 0;
231
232 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
233 if (!wdt) {
234 ret = -ENOMEM;
235 goto err;
236 }
237
238 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
239 if (IS_ERR(wdt->base))
240 return PTR_ERR(wdt->base);
241
242 if (adev->dev.of_node) {
243 wdt->clk = devm_clk_get(&adev->dev, NULL);
244 if (IS_ERR(wdt->clk)) {
245 dev_err(&adev->dev, "Clock not found\n");
246 return PTR_ERR(wdt->clk);
247 }
248 wdt->rate = clk_get_rate(wdt->clk);
249 } else if (has_acpi_companion(&adev->dev)) {
250
251
252
253
254
255 device_property_read_u64(&adev->dev, "clock-frequency",
256 &wdt->rate);
257 if (!wdt->rate) {
258 dev_err(&adev->dev, "no clock-frequency property\n");
259 return -ENODEV;
260 }
261 }
262
263 wdt->adev = adev;
264 wdt->wdd.info = &wdt_info;
265 wdt->wdd.ops = &wdt_ops;
266 wdt->wdd.parent = &adev->dev;
267
268 spin_lock_init(&wdt->lock);
269 watchdog_set_nowayout(&wdt->wdd, nowayout);
270 watchdog_set_drvdata(&wdt->wdd, wdt);
271 watchdog_set_restart_priority(&wdt->wdd, 128);
272
273
274
275
276
277 wdt->wdd.timeout = DEFAULT_TIMEOUT;
278 watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
279 wdt_setload(&wdt->wdd, wdt->wdd.timeout);
280
281
282
283
284
285 if (wdt_is_running(&wdt->wdd)) {
286 wdt_enable(&wdt->wdd);
287 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
288 }
289
290 ret = watchdog_register_device(&wdt->wdd);
291 if (ret)
292 goto err;
293 amba_set_drvdata(adev, wdt);
294
295 dev_info(&adev->dev, "registration successful\n");
296 return 0;
297
298err:
299 dev_err(&adev->dev, "Probe Failed!!!\n");
300 return ret;
301}
302
303static int sp805_wdt_remove(struct amba_device *adev)
304{
305 struct sp805_wdt *wdt = amba_get_drvdata(adev);
306
307 watchdog_unregister_device(&wdt->wdd);
308 watchdog_set_drvdata(&wdt->wdd, NULL);
309
310 return 0;
311}
312
313static int __maybe_unused sp805_wdt_suspend(struct device *dev)
314{
315 struct sp805_wdt *wdt = dev_get_drvdata(dev);
316
317 if (watchdog_active(&wdt->wdd))
318 return wdt_disable(&wdt->wdd);
319
320 return 0;
321}
322
323static int __maybe_unused sp805_wdt_resume(struct device *dev)
324{
325 struct sp805_wdt *wdt = dev_get_drvdata(dev);
326
327 if (watchdog_active(&wdt->wdd))
328 return wdt_enable(&wdt->wdd);
329
330 return 0;
331}
332
333static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
334 sp805_wdt_resume);
335
336static const struct amba_id sp805_wdt_ids[] = {
337 {
338 .id = 0x00141805,
339 .mask = 0x00ffffff,
340 },
341 { 0, 0 },
342};
343
344MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
345
346static struct amba_driver sp805_wdt_driver = {
347 .drv = {
348 .name = MODULE_NAME,
349 .pm = &sp805_wdt_dev_pm_ops,
350 },
351 .id_table = sp805_wdt_ids,
352 .probe = sp805_wdt_probe,
353 .remove = sp805_wdt_remove,
354};
355
356module_amba_driver(sp805_wdt_driver);
357
358MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
359MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
360MODULE_LICENSE("GPL");
361