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24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
27#if defined(__KERNEL__) || defined(__linux__)
28#include <linux/types.h>
29#else
30#include <sys/ioctl.h>
31#endif
32
33#ifndef __KERNEL__
34#include <stdlib.h>
35#include <time.h>
36#endif
37
38
39
40
41
42#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
43#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
44#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
45#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
46#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
47 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
48 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
49 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
50
51
52
53
54
55
56
57struct snd_aes_iec958 {
58 unsigned char status[24];
59 unsigned char subcode[147];
60 unsigned char pad;
61 unsigned char dig_subframe[4];
62};
63
64
65
66
67
68
69
70struct snd_cea_861_aud_if {
71 unsigned char db1_ct_cc;
72 unsigned char db2_sf_ss;
73 unsigned char db3;
74 unsigned char db4_ca;
75 unsigned char db5_dminh_lsv;
76};
77
78
79
80
81
82
83
84#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
85
86enum {
87 SNDRV_HWDEP_IFACE_OPL2 = 0,
88 SNDRV_HWDEP_IFACE_OPL3,
89 SNDRV_HWDEP_IFACE_OPL4,
90 SNDRV_HWDEP_IFACE_SB16CSP,
91 SNDRV_HWDEP_IFACE_EMU10K1,
92 SNDRV_HWDEP_IFACE_YSS225,
93 SNDRV_HWDEP_IFACE_ICS2115,
94 SNDRV_HWDEP_IFACE_SSCAPE,
95 SNDRV_HWDEP_IFACE_VX,
96 SNDRV_HWDEP_IFACE_MIXART,
97 SNDRV_HWDEP_IFACE_USX2Y,
98 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
99 SNDRV_HWDEP_IFACE_BLUETOOTH,
100 SNDRV_HWDEP_IFACE_USX2Y_PCM,
101 SNDRV_HWDEP_IFACE_PCXHR,
102 SNDRV_HWDEP_IFACE_SB_RC,
103 SNDRV_HWDEP_IFACE_HDA,
104 SNDRV_HWDEP_IFACE_USB_STREAM,
105 SNDRV_HWDEP_IFACE_FW_DICE,
106 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
107 SNDRV_HWDEP_IFACE_FW_BEBOB,
108 SNDRV_HWDEP_IFACE_FW_OXFW,
109 SNDRV_HWDEP_IFACE_FW_DIGI00X,
110 SNDRV_HWDEP_IFACE_FW_TASCAM,
111 SNDRV_HWDEP_IFACE_LINE6,
112 SNDRV_HWDEP_IFACE_FW_MOTU,
113 SNDRV_HWDEP_IFACE_FW_FIREFACE,
114
115
116 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
117};
118
119struct snd_hwdep_info {
120 unsigned int device;
121 int card;
122 unsigned char id[64];
123 unsigned char name[80];
124 int iface;
125 unsigned char reserved[64];
126};
127
128
129struct snd_hwdep_dsp_status {
130 unsigned int version;
131 unsigned char id[32];
132 unsigned int num_dsps;
133 unsigned int dsp_loaded;
134 unsigned int chip_ready;
135 unsigned char reserved[16];
136};
137
138struct snd_hwdep_dsp_image {
139 unsigned int index;
140 unsigned char name[64];
141 unsigned char __user *image;
142 size_t length;
143 unsigned long driver_data;
144};
145
146#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
147#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
148#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
149#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
150
151
152
153
154
155
156
157#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14)
158
159typedef unsigned long snd_pcm_uframes_t;
160typedef signed long snd_pcm_sframes_t;
161
162enum {
163 SNDRV_PCM_CLASS_GENERIC = 0,
164 SNDRV_PCM_CLASS_MULTI,
165 SNDRV_PCM_CLASS_MODEM,
166 SNDRV_PCM_CLASS_DIGITIZER,
167
168 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
169};
170
171enum {
172 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
173 SNDRV_PCM_SUBCLASS_MULTI_MIX,
174
175 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
176};
177
178enum {
179 SNDRV_PCM_STREAM_PLAYBACK = 0,
180 SNDRV_PCM_STREAM_CAPTURE,
181 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
182};
183
184typedef int __bitwise snd_pcm_access_t;
185#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
186#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
187#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
188#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
189#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
190#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
191
192typedef int __bitwise snd_pcm_format_t;
193#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
194#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
195#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
196#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
197#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
198#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
199#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
200#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
201#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
202#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
203#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
204#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
205#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
206#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
207#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
208#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
209#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
210#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
211#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
212#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
213#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
214#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
215#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
216#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
217#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
218#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
219#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
220#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
221#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
222
223#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
224#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
225#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
226#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
227#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
228#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
229#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
230#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
231#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
232#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
233#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
234#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
235#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
236#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
237#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
238#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
239#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
240#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
241#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
242#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
243#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
244#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
245#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
246#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
247
248#ifdef SNDRV_LITTLE_ENDIAN
249#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
250#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
251#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
252#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
253#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
254#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
255#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
256#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
257#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
258#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
259#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
260#endif
261#ifdef SNDRV_BIG_ENDIAN
262#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
263#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
264#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
265#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
266#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
267#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
268#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
269#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
270#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
271#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
272#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
273#endif
274
275typedef int __bitwise snd_pcm_subformat_t;
276#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
277#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
278
279#define SNDRV_PCM_INFO_MMAP 0x00000001
280#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
281#define SNDRV_PCM_INFO_DOUBLE 0x00000004
282#define SNDRV_PCM_INFO_BATCH 0x00000010
283#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
284#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
285#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
286#define SNDRV_PCM_INFO_COMPLEX 0x00000400
287#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
288#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
289#define SNDRV_PCM_INFO_RESUME 0x00040000
290#define SNDRV_PCM_INFO_PAUSE 0x00080000
291#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
292#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
293#define SNDRV_PCM_INFO_SYNC_START 0x00400000
294#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
295#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
296#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
297#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
298#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
299#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
300
301#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
302#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
303
304
305
306typedef int __bitwise snd_pcm_state_t;
307#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
308#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
309#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
310#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
311#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
312#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
313#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
314#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
315#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
316#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
317
318enum {
319 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
320 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
321 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
322};
323
324union snd_pcm_sync_id {
325 unsigned char id[16];
326 unsigned short id16[8];
327 unsigned int id32[4];
328};
329
330struct snd_pcm_info {
331 unsigned int device;
332 unsigned int subdevice;
333 int stream;
334 int card;
335 unsigned char id[64];
336 unsigned char name[80];
337 unsigned char subname[32];
338 int dev_class;
339 int dev_subclass;
340 unsigned int subdevices_count;
341 unsigned int subdevices_avail;
342 union snd_pcm_sync_id sync;
343 unsigned char reserved[64];
344};
345
346typedef int snd_pcm_hw_param_t;
347#define SNDRV_PCM_HW_PARAM_ACCESS 0
348#define SNDRV_PCM_HW_PARAM_FORMAT 1
349#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
350#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
351#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
352
353#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
354#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
355#define SNDRV_PCM_HW_PARAM_CHANNELS 10
356#define SNDRV_PCM_HW_PARAM_RATE 11
357#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
358
359
360#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
361
362
363#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
364
365
366#define SNDRV_PCM_HW_PARAM_PERIODS 15
367
368
369#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
370
371
372#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
373#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
374#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
375#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
376#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
377
378#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
379#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
380#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
381
382struct snd_interval {
383 unsigned int min, max;
384 unsigned int openmin:1,
385 openmax:1,
386 integer:1,
387 empty:1;
388};
389
390#define SNDRV_MASK_MAX 256
391
392struct snd_mask {
393 __u32 bits[(SNDRV_MASK_MAX+31)/32];
394};
395
396struct snd_pcm_hw_params {
397 unsigned int flags;
398 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
399 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
400 struct snd_mask mres[5];
401 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
402 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
403 struct snd_interval ires[9];
404 unsigned int rmask;
405 unsigned int cmask;
406 unsigned int info;
407 unsigned int msbits;
408 unsigned int rate_num;
409 unsigned int rate_den;
410 snd_pcm_uframes_t fifo_size;
411 unsigned char reserved[64];
412};
413
414enum {
415 SNDRV_PCM_TSTAMP_NONE = 0,
416 SNDRV_PCM_TSTAMP_ENABLE,
417 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
418};
419
420struct snd_pcm_sw_params {
421 int tstamp_mode;
422 unsigned int period_step;
423 unsigned int sleep_min;
424 snd_pcm_uframes_t avail_min;
425 snd_pcm_uframes_t xfer_align;
426 snd_pcm_uframes_t start_threshold;
427 snd_pcm_uframes_t stop_threshold;
428 snd_pcm_uframes_t silence_threshold;
429 snd_pcm_uframes_t silence_size;
430 snd_pcm_uframes_t boundary;
431 unsigned int proto;
432 unsigned int tstamp_type;
433 unsigned char reserved[56];
434};
435
436struct snd_pcm_channel_info {
437 unsigned int channel;
438 __kernel_off_t offset;
439 unsigned int first;
440 unsigned int step;
441};
442
443enum {
444
445
446
447
448 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
449
450
451 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
452 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
453 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
454 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
455 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
456 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
457};
458
459struct snd_pcm_status {
460 snd_pcm_state_t state;
461 struct timespec trigger_tstamp;
462 struct timespec tstamp;
463 snd_pcm_uframes_t appl_ptr;
464 snd_pcm_uframes_t hw_ptr;
465 snd_pcm_sframes_t delay;
466 snd_pcm_uframes_t avail;
467 snd_pcm_uframes_t avail_max;
468 snd_pcm_uframes_t overrange;
469 snd_pcm_state_t suspended_state;
470 __u32 audio_tstamp_data;
471 struct timespec audio_tstamp;
472 struct timespec driver_tstamp;
473 __u32 audio_tstamp_accuracy;
474 unsigned char reserved[52-2*sizeof(struct timespec)];
475};
476
477struct snd_pcm_mmap_status {
478 snd_pcm_state_t state;
479 int pad1;
480 snd_pcm_uframes_t hw_ptr;
481 struct timespec tstamp;
482 snd_pcm_state_t suspended_state;
483 struct timespec audio_tstamp;
484};
485
486struct snd_pcm_mmap_control {
487 snd_pcm_uframes_t appl_ptr;
488 snd_pcm_uframes_t avail_min;
489};
490
491#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
492#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
493#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
494
495struct snd_pcm_sync_ptr {
496 unsigned int flags;
497 union {
498 struct snd_pcm_mmap_status status;
499 unsigned char reserved[64];
500 } s;
501 union {
502 struct snd_pcm_mmap_control control;
503 unsigned char reserved[64];
504 } c;
505};
506
507struct snd_xferi {
508 snd_pcm_sframes_t result;
509 void __user *buf;
510 snd_pcm_uframes_t frames;
511};
512
513struct snd_xfern {
514 snd_pcm_sframes_t result;
515 void __user * __user *bufs;
516 snd_pcm_uframes_t frames;
517};
518
519enum {
520 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
521 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
522 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
523 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
524};
525
526
527enum {
528 SNDRV_CHMAP_UNKNOWN = 0,
529 SNDRV_CHMAP_NA,
530 SNDRV_CHMAP_MONO,
531
532 SNDRV_CHMAP_FL,
533 SNDRV_CHMAP_FR,
534 SNDRV_CHMAP_RL,
535 SNDRV_CHMAP_RR,
536 SNDRV_CHMAP_FC,
537 SNDRV_CHMAP_LFE,
538 SNDRV_CHMAP_SL,
539 SNDRV_CHMAP_SR,
540 SNDRV_CHMAP_RC,
541
542 SNDRV_CHMAP_FLC,
543 SNDRV_CHMAP_FRC,
544 SNDRV_CHMAP_RLC,
545 SNDRV_CHMAP_RRC,
546 SNDRV_CHMAP_FLW,
547 SNDRV_CHMAP_FRW,
548 SNDRV_CHMAP_FLH,
549 SNDRV_CHMAP_FCH,
550 SNDRV_CHMAP_FRH,
551 SNDRV_CHMAP_TC,
552 SNDRV_CHMAP_TFL,
553 SNDRV_CHMAP_TFR,
554 SNDRV_CHMAP_TFC,
555 SNDRV_CHMAP_TRL,
556 SNDRV_CHMAP_TRR,
557 SNDRV_CHMAP_TRC,
558
559 SNDRV_CHMAP_TFLC,
560 SNDRV_CHMAP_TFRC,
561 SNDRV_CHMAP_TSL,
562 SNDRV_CHMAP_TSR,
563 SNDRV_CHMAP_LLFE,
564 SNDRV_CHMAP_RLFE,
565 SNDRV_CHMAP_BC,
566 SNDRV_CHMAP_BLC,
567 SNDRV_CHMAP_BRC,
568 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
569};
570
571#define SNDRV_CHMAP_POSITION_MASK 0xffff
572#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
573#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
574
575#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
576#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
577#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
578#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
579#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
580#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
581#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
582#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
583#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
584#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
585#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
586#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
587#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
588#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
589#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
590#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
591#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
592#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
593#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
594#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
595#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
596#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
597#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
598#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
599#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
600#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
601#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
602#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
603#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
604#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
605#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
606
607
608
609
610
611
612
613
614
615
616
617#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
618
619enum {
620 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
621 SNDRV_RAWMIDI_STREAM_INPUT,
622 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
623};
624
625#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
626#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
627#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
628
629struct snd_rawmidi_info {
630 unsigned int device;
631 unsigned int subdevice;
632 int stream;
633 int card;
634 unsigned int flags;
635 unsigned char id[64];
636 unsigned char name[80];
637 unsigned char subname[32];
638 unsigned int subdevices_count;
639 unsigned int subdevices_avail;
640 unsigned char reserved[64];
641};
642
643struct snd_rawmidi_params {
644 int stream;
645 size_t buffer_size;
646 size_t avail_min;
647 unsigned int no_active_sensing: 1;
648 unsigned char reserved[16];
649};
650
651struct snd_rawmidi_status {
652 int stream;
653 struct timespec tstamp;
654 size_t avail;
655 size_t xruns;
656 unsigned char reserved[16];
657};
658
659#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
660#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
661#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
662#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
663#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
664#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
665
666
667
668
669
670#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
671
672enum {
673 SNDRV_TIMER_CLASS_NONE = -1,
674 SNDRV_TIMER_CLASS_SLAVE = 0,
675 SNDRV_TIMER_CLASS_GLOBAL,
676 SNDRV_TIMER_CLASS_CARD,
677 SNDRV_TIMER_CLASS_PCM,
678 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
679};
680
681
682enum {
683 SNDRV_TIMER_SCLASS_NONE = 0,
684 SNDRV_TIMER_SCLASS_APPLICATION,
685 SNDRV_TIMER_SCLASS_SEQUENCER,
686 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
687 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
688};
689
690
691#define SNDRV_TIMER_GLOBAL_SYSTEM 0
692#define SNDRV_TIMER_GLOBAL_RTC 1
693#define SNDRV_TIMER_GLOBAL_HPET 2
694#define SNDRV_TIMER_GLOBAL_HRTIMER 3
695
696
697#define SNDRV_TIMER_FLG_SLAVE (1<<0)
698
699struct snd_timer_id {
700 int dev_class;
701 int dev_sclass;
702 int card;
703 int device;
704 int subdevice;
705};
706
707struct snd_timer_ginfo {
708 struct snd_timer_id tid;
709 unsigned int flags;
710 int card;
711 unsigned char id[64];
712 unsigned char name[80];
713 unsigned long reserved0;
714 unsigned long resolution;
715 unsigned long resolution_min;
716 unsigned long resolution_max;
717 unsigned int clients;
718 unsigned char reserved[32];
719};
720
721struct snd_timer_gparams {
722 struct snd_timer_id tid;
723 unsigned long period_num;
724 unsigned long period_den;
725 unsigned char reserved[32];
726};
727
728struct snd_timer_gstatus {
729 struct snd_timer_id tid;
730 unsigned long resolution;
731 unsigned long resolution_num;
732 unsigned long resolution_den;
733 unsigned char reserved[32];
734};
735
736struct snd_timer_select {
737 struct snd_timer_id id;
738 unsigned char reserved[32];
739};
740
741struct snd_timer_info {
742 unsigned int flags;
743 int card;
744 unsigned char id[64];
745 unsigned char name[80];
746 unsigned long reserved0;
747 unsigned long resolution;
748 unsigned char reserved[64];
749};
750
751#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
752#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
753#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
754
755struct snd_timer_params {
756 unsigned int flags;
757 unsigned int ticks;
758 unsigned int queue_size;
759 unsigned int reserved0;
760 unsigned int filter;
761 unsigned char reserved[60];
762};
763
764struct snd_timer_status {
765 struct timespec tstamp;
766 unsigned int resolution;
767 unsigned int lost;
768 unsigned int overrun;
769 unsigned int queue;
770 unsigned char reserved[64];
771};
772
773#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
774#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
775#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
776#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
777#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
778#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
779#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
780#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
781#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
782#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
783
784#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
785#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
786#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
787#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
788
789struct snd_timer_read {
790 unsigned int resolution;
791 unsigned int ticks;
792};
793
794enum {
795 SNDRV_TIMER_EVENT_RESOLUTION = 0,
796 SNDRV_TIMER_EVENT_TICK,
797 SNDRV_TIMER_EVENT_START,
798 SNDRV_TIMER_EVENT_STOP,
799 SNDRV_TIMER_EVENT_CONTINUE,
800 SNDRV_TIMER_EVENT_PAUSE,
801 SNDRV_TIMER_EVENT_EARLY,
802 SNDRV_TIMER_EVENT_SUSPEND,
803 SNDRV_TIMER_EVENT_RESUME,
804
805 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
806 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
807 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
808 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
809 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
810 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
811};
812
813struct snd_timer_tread {
814 int event;
815 struct timespec tstamp;
816 unsigned int val;
817};
818
819
820
821
822
823
824
825#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
826
827struct snd_ctl_card_info {
828 int card;
829 int pad;
830 unsigned char id[16];
831 unsigned char driver[16];
832 unsigned char name[32];
833 unsigned char longname[80];
834 unsigned char reserved_[16];
835 unsigned char mixername[80];
836 unsigned char components[128];
837};
838
839typedef int __bitwise snd_ctl_elem_type_t;
840#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
841#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
842#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
843#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
844#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
845#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
846#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
847#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
848
849typedef int __bitwise snd_ctl_elem_iface_t;
850#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
851#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
852#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
853#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
854#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
855#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
856#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
857#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
858
859#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
860#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
861#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
862#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
863#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3)
864#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
865#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
866#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
867#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
868#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
869#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
870#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
871#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
872#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
873
874
875
876#define SNDRV_CTL_POWER_D0 0x0000
877#define SNDRV_CTL_POWER_D1 0x0100
878#define SNDRV_CTL_POWER_D2 0x0200
879#define SNDRV_CTL_POWER_D3 0x0300
880#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
881#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
882
883#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
884
885struct snd_ctl_elem_id {
886 unsigned int numid;
887 snd_ctl_elem_iface_t iface;
888 unsigned int device;
889 unsigned int subdevice;
890 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
891 unsigned int index;
892};
893
894struct snd_ctl_elem_list {
895 unsigned int offset;
896 unsigned int space;
897 unsigned int used;
898 unsigned int count;
899 struct snd_ctl_elem_id __user *pids;
900 unsigned char reserved[50];
901};
902
903struct snd_ctl_elem_info {
904 struct snd_ctl_elem_id id;
905 snd_ctl_elem_type_t type;
906 unsigned int access;
907 unsigned int count;
908 __kernel_pid_t owner;
909 union {
910 struct {
911 long min;
912 long max;
913 long step;
914 } integer;
915 struct {
916 long long min;
917 long long max;
918 long long step;
919 } integer64;
920 struct {
921 unsigned int items;
922 unsigned int item;
923 char name[64];
924 __u64 names_ptr;
925 unsigned int names_length;
926 } enumerated;
927 unsigned char reserved[128];
928 } value;
929 union {
930 unsigned short d[4];
931 unsigned short *d_ptr;
932 } dimen;
933 unsigned char reserved[64-4*sizeof(unsigned short)];
934};
935
936struct snd_ctl_elem_value {
937 struct snd_ctl_elem_id id;
938 unsigned int indirect: 1;
939 union {
940 union {
941 long value[128];
942 long *value_ptr;
943 } integer;
944 union {
945 long long value[64];
946 long long *value_ptr;
947 } integer64;
948 union {
949 unsigned int item[128];
950 unsigned int *item_ptr;
951 } enumerated;
952 union {
953 unsigned char data[512];
954 unsigned char *data_ptr;
955 } bytes;
956 struct snd_aes_iec958 iec958;
957 } value;
958 struct timespec tstamp;
959 unsigned char reserved[128-sizeof(struct timespec)];
960};
961
962struct snd_ctl_tlv {
963 unsigned int numid;
964 unsigned int length;
965 unsigned int tlv[0];
966};
967
968#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
969#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
970#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
971#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
972#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
973#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
974#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
975#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
976#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
977#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
978#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
979#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
980#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
981#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
982#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
983#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
984#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
985#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
986#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
987#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
988#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
989#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
990#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
991#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
992#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
993
994
995
996
997
998enum sndrv_ctl_event_type {
999 SNDRV_CTL_EVENT_ELEM = 0,
1000 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1001};
1002
1003#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
1004#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
1005#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
1006#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
1007#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
1008
1009struct snd_ctl_event {
1010 int type;
1011 union {
1012 struct {
1013 unsigned int mask;
1014 struct snd_ctl_elem_id id;
1015 } elem;
1016 unsigned char data8[60];
1017 } data;
1018};
1019
1020
1021
1022
1023
1024#define SNDRV_CTL_NAME_NONE ""
1025#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1026#define SNDRV_CTL_NAME_CAPTURE "Capture "
1027
1028#define SNDRV_CTL_NAME_IEC958_NONE ""
1029#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1030#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1031#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1032#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1033#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1034#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1035#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1036#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1037
1038#endif
1039