LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c

   1/*
   2 * Copyright 2018 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#define gv100_dmaobj(p) container_of((p), struct gv100_dmaobj, base)
  23#include "user.h"
  24
  25#include <core/client.h>
  26#include <core/gpuobj.h>
  27#include <subdev/fb.h>
  28
  29#include <nvif/cl0002.h>
  30#include <nvif/unpack.h>
  31
  32struct gv100_dmaobj {
  33        struct nvkm_dmaobj base;
  34        u32 flags0;
  35};
  36
  37static int
  38gv100_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,
  39                  int align, struct nvkm_gpuobj **pgpuobj)
  40{
  41        struct gv100_dmaobj *dmaobj = gv100_dmaobj(base);
  42        struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
  43        u64 start = dmaobj->base.start >> 8;
  44        u64 limit = dmaobj->base.limit >> 8;
  45        int ret;
  46
  47        ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
  48        if (ret == 0) {
  49                nvkm_kmap(*pgpuobj);
  50                nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
  51                nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(start));
  52                nvkm_wo32(*pgpuobj, 0x08, upper_32_bits(start));
  53                nvkm_wo32(*pgpuobj, 0x0c, lower_32_bits(limit));
  54                nvkm_wo32(*pgpuobj, 0x10, upper_32_bits(limit));
  55                nvkm_done(*pgpuobj);
  56        }
  57
  58        return ret;
  59}
  60
  61static const struct nvkm_dmaobj_func
  62gv100_dmaobj_func = {
  63        .bind = gv100_dmaobj_bind,
  64};
  65
  66int
  67gv100_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass,
  68                 void *data, u32 size, struct nvkm_dmaobj **pdmaobj)
  69{
  70        union {
  71                struct gf119_dma_v0 v0;
  72        } *args;
  73        struct nvkm_object *parent = oclass->parent;
  74        struct gv100_dmaobj *dmaobj;
  75        u32 kind, page;
  76        int ret;
  77
  78        if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
  79                return -ENOMEM;
  80        *pdmaobj = &dmaobj->base;
  81
  82        ret = nvkm_dmaobj_ctor(&gv100_dmaobj_func, dma, oclass,
  83                               &data, &size, &dmaobj->base);
  84        if (ret)
  85                return ret;
  86
  87        ret  = -ENOSYS;
  88        args = data;
  89
  90        nvif_ioctl(parent, "create gv100 dma size %d\n", size);
  91        if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
  92                nvif_ioctl(parent,
  93                           "create gv100 dma vers %d page %d kind %02x\n",
  94                           args->v0.version, args->v0.page, args->v0.kind);
  95                kind = args->v0.kind != 0;
  96                page = args->v0.page != 0;
  97        } else
  98        if (size == 0) {
  99                kind = 0;
 100                page = GF119_DMA_V0_PAGE_SP;
 101        } else
 102                return ret;
 103
 104        if (kind)
 105                dmaobj->flags0 |= 0x00100000;
 106        if (page)
 107                dmaobj->flags0 |= 0x00000040;
 108        dmaobj->flags0 |= 0x00000004; /* rw */
 109
 110        switch (dmaobj->base.target) {
 111        case NV_MEM_TARGET_VRAM       : dmaobj->flags0 |= 0x00000001; break;
 112        case NV_MEM_TARGET_PCI        : dmaobj->flags0 |= 0x00000002; break;
 113        case NV_MEM_TARGET_PCI_NOSNOOP: dmaobj->flags0 |= 0x00000003; break;
 114        default:
 115                return -EINVAL;
 116        }
 117
 118        return 0;
 119}
 120