linux/drivers/gpu/drm/tegra/drm.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2012 Avionic Design GmbH
   4 * Copyright (C) 2012-2016 NVIDIA CORPORATION.  All rights reserved.
   5 */
   6
   7#include <linux/bitops.h>
   8#include <linux/host1x.h>
   9#include <linux/idr.h>
  10#include <linux/iommu.h>
  11#include <linux/module.h>
  12#include <linux/platform_device.h>
  13
  14#include <drm/drm_atomic.h>
  15#include <drm/drm_atomic_helper.h>
  16#include <drm/drm_debugfs.h>
  17#include <drm/drm_drv.h>
  18#include <drm/drm_fourcc.h>
  19#include <drm/drm_ioctl.h>
  20#include <drm/drm_prime.h>
  21#include <drm/drm_vblank.h>
  22
  23#include "drm.h"
  24#include "gem.h"
  25
  26#define DRIVER_NAME "tegra"
  27#define DRIVER_DESC "NVIDIA Tegra graphics"
  28#define DRIVER_DATE "20120330"
  29#define DRIVER_MAJOR 0
  30#define DRIVER_MINOR 0
  31#define DRIVER_PATCHLEVEL 0
  32
  33#define CARVEOUT_SZ SZ_64M
  34#define CDMA_GATHER_FETCHES_MAX_NB 16383
  35
  36struct tegra_drm_file {
  37        struct idr contexts;
  38        struct mutex lock;
  39};
  40
  41static int tegra_atomic_check(struct drm_device *drm,
  42                              struct drm_atomic_state *state)
  43{
  44        int err;
  45
  46        err = drm_atomic_helper_check(drm, state);
  47        if (err < 0)
  48                return err;
  49
  50        return tegra_display_hub_atomic_check(drm, state);
  51}
  52
  53static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
  54        .fb_create = tegra_fb_create,
  55#ifdef CONFIG_DRM_FBDEV_EMULATION
  56        .output_poll_changed = drm_fb_helper_output_poll_changed,
  57#endif
  58        .atomic_check = tegra_atomic_check,
  59        .atomic_commit = drm_atomic_helper_commit,
  60};
  61
  62static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
  63{
  64        struct drm_device *drm = old_state->dev;
  65        struct tegra_drm *tegra = drm->dev_private;
  66
  67        if (tegra->hub) {
  68                drm_atomic_helper_commit_modeset_disables(drm, old_state);
  69                tegra_display_hub_atomic_commit(drm, old_state);
  70                drm_atomic_helper_commit_planes(drm, old_state, 0);
  71                drm_atomic_helper_commit_modeset_enables(drm, old_state);
  72                drm_atomic_helper_commit_hw_done(old_state);
  73                drm_atomic_helper_wait_for_vblanks(drm, old_state);
  74                drm_atomic_helper_cleanup_planes(drm, old_state);
  75        } else {
  76                drm_atomic_helper_commit_tail_rpm(old_state);
  77        }
  78}
  79
  80static const struct drm_mode_config_helper_funcs
  81tegra_drm_mode_config_helpers = {
  82        .atomic_commit_tail = tegra_atomic_commit_tail,
  83};
  84
  85static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  86{
  87        struct tegra_drm_file *fpriv;
  88
  89        fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  90        if (!fpriv)
  91                return -ENOMEM;
  92
  93        idr_init_base(&fpriv->contexts, 1);
  94        mutex_init(&fpriv->lock);
  95        filp->driver_priv = fpriv;
  96
  97        return 0;
  98}
  99
 100static void tegra_drm_context_free(struct tegra_drm_context *context)
 101{
 102        context->client->ops->close_channel(context);
 103        kfree(context);
 104}
 105
 106static struct host1x_bo *
 107host1x_bo_lookup(struct drm_file *file, u32 handle)
 108{
 109        struct drm_gem_object *gem;
 110        struct tegra_bo *bo;
 111
 112        gem = drm_gem_object_lookup(file, handle);
 113        if (!gem)
 114                return NULL;
 115
 116        bo = to_tegra_bo(gem);
 117        return &bo->base;
 118}
 119
 120static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
 121                                       struct drm_tegra_reloc __user *src,
 122                                       struct drm_device *drm,
 123                                       struct drm_file *file)
 124{
 125        u32 cmdbuf, target;
 126        int err;
 127
 128        err = get_user(cmdbuf, &src->cmdbuf.handle);
 129        if (err < 0)
 130                return err;
 131
 132        err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
 133        if (err < 0)
 134                return err;
 135
 136        err = get_user(target, &src->target.handle);
 137        if (err < 0)
 138                return err;
 139
 140        err = get_user(dest->target.offset, &src->target.offset);
 141        if (err < 0)
 142                return err;
 143
 144        err = get_user(dest->shift, &src->shift);
 145        if (err < 0)
 146                return err;
 147
 148        dest->flags = HOST1X_RELOC_READ | HOST1X_RELOC_WRITE;
 149
 150        dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
 151        if (!dest->cmdbuf.bo)
 152                return -ENOENT;
 153
 154        dest->target.bo = host1x_bo_lookup(file, target);
 155        if (!dest->target.bo)
 156                return -ENOENT;
 157
 158        return 0;
 159}
 160
 161int tegra_drm_submit(struct tegra_drm_context *context,
 162                     struct drm_tegra_submit *args, struct drm_device *drm,
 163                     struct drm_file *file)
 164{
 165        struct host1x_client *client = &context->client->base;
 166        unsigned int num_cmdbufs = args->num_cmdbufs;
 167        unsigned int num_relocs = args->num_relocs;
 168        struct drm_tegra_cmdbuf __user *user_cmdbufs;
 169        struct drm_tegra_reloc __user *user_relocs;
 170        struct drm_tegra_syncpt __user *user_syncpt;
 171        struct drm_tegra_syncpt syncpt;
 172        struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 173        struct drm_gem_object **refs;
 174        struct host1x_syncpt *sp;
 175        struct host1x_job *job;
 176        unsigned int num_refs;
 177        int err;
 178
 179        user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
 180        user_relocs = u64_to_user_ptr(args->relocs);
 181        user_syncpt = u64_to_user_ptr(args->syncpts);
 182
 183        /* We don't yet support other than one syncpt_incr struct per submit */
 184        if (args->num_syncpts != 1)
 185                return -EINVAL;
 186
 187        /* We don't yet support waitchks */
 188        if (args->num_waitchks != 0)
 189                return -EINVAL;
 190
 191        job = host1x_job_alloc(context->channel, args->num_cmdbufs,
 192                               args->num_relocs);
 193        if (!job)
 194                return -ENOMEM;
 195
 196        job->num_relocs = args->num_relocs;
 197        job->client = client;
 198        job->class = client->class;
 199        job->serialize = true;
 200
 201        /*
 202         * Track referenced BOs so that they can be unreferenced after the
 203         * submission is complete.
 204         */
 205        num_refs = num_cmdbufs + num_relocs * 2;
 206
 207        refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
 208        if (!refs) {
 209                err = -ENOMEM;
 210                goto put;
 211        }
 212
 213        /* reuse as an iterator later */
 214        num_refs = 0;
 215
 216        while (num_cmdbufs) {
 217                struct drm_tegra_cmdbuf cmdbuf;
 218                struct host1x_bo *bo;
 219                struct tegra_bo *obj;
 220                u64 offset;
 221
 222                if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
 223                        err = -EFAULT;
 224                        goto fail;
 225                }
 226
 227                /*
 228                 * The maximum number of CDMA gather fetches is 16383, a higher
 229                 * value means the words count is malformed.
 230                 */
 231                if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
 232                        err = -EINVAL;
 233                        goto fail;
 234                }
 235
 236                bo = host1x_bo_lookup(file, cmdbuf.handle);
 237                if (!bo) {
 238                        err = -ENOENT;
 239                        goto fail;
 240                }
 241
 242                offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
 243                obj = host1x_to_tegra_bo(bo);
 244                refs[num_refs++] = &obj->gem;
 245
 246                /*
 247                 * Gather buffer base address must be 4-bytes aligned,
 248                 * unaligned offset is malformed and cause commands stream
 249                 * corruption on the buffer address relocation.
 250                 */
 251                if (offset & 3 || offset > obj->gem.size) {
 252                        err = -EINVAL;
 253                        goto fail;
 254                }
 255
 256                host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
 257                num_cmdbufs--;
 258                user_cmdbufs++;
 259        }
 260
 261        /* copy and resolve relocations from submit */
 262        while (num_relocs--) {
 263                struct host1x_reloc *reloc;
 264                struct tegra_bo *obj;
 265
 266                err = host1x_reloc_copy_from_user(&job->relocs[num_relocs],
 267                                                  &user_relocs[num_relocs], drm,
 268                                                  file);
 269                if (err < 0)
 270                        goto fail;
 271
 272                reloc = &job->relocs[num_relocs];
 273                obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
 274                refs[num_refs++] = &obj->gem;
 275
 276                /*
 277                 * The unaligned cmdbuf offset will cause an unaligned write
 278                 * during of the relocations patching, corrupting the commands
 279                 * stream.
 280                 */
 281                if (reloc->cmdbuf.offset & 3 ||
 282                    reloc->cmdbuf.offset >= obj->gem.size) {
 283                        err = -EINVAL;
 284                        goto fail;
 285                }
 286
 287                obj = host1x_to_tegra_bo(reloc->target.bo);
 288                refs[num_refs++] = &obj->gem;
 289
 290                if (reloc->target.offset >= obj->gem.size) {
 291                        err = -EINVAL;
 292                        goto fail;
 293                }
 294        }
 295
 296        if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
 297                err = -EFAULT;
 298                goto fail;
 299        }
 300
 301        /* check whether syncpoint ID is valid */
 302        sp = host1x_syncpt_get(host1x, syncpt.id);
 303        if (!sp) {
 304                err = -ENOENT;
 305                goto fail;
 306        }
 307
 308        job->is_addr_reg = context->client->ops->is_addr_reg;
 309        job->is_valid_class = context->client->ops->is_valid_class;
 310        job->syncpt_incrs = syncpt.incrs;
 311        job->syncpt_id = syncpt.id;
 312        job->timeout = 10000;
 313
 314        if (args->timeout && args->timeout < 10000)
 315                job->timeout = args->timeout;
 316
 317        err = host1x_job_pin(job, context->client->base.dev);
 318        if (err)
 319                goto fail;
 320
 321        err = host1x_job_submit(job);
 322        if (err) {
 323                host1x_job_unpin(job);
 324                goto fail;
 325        }
 326
 327        args->fence = job->syncpt_end;
 328
 329fail:
 330        while (num_refs--)
 331                drm_gem_object_put(refs[num_refs]);
 332
 333        kfree(refs);
 334
 335put:
 336        host1x_job_put(job);
 337        return err;
 338}
 339
 340
 341#ifdef CONFIG_DRM_TEGRA_STAGING
 342static int tegra_gem_create(struct drm_device *drm, void *data,
 343                            struct drm_file *file)
 344{
 345        struct drm_tegra_gem_create *args = data;
 346        struct tegra_bo *bo;
 347
 348        bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
 349                                         &args->handle);
 350        if (IS_ERR(bo))
 351                return PTR_ERR(bo);
 352
 353        return 0;
 354}
 355
 356static int tegra_gem_mmap(struct drm_device *drm, void *data,
 357                          struct drm_file *file)
 358{
 359        struct drm_tegra_gem_mmap *args = data;
 360        struct drm_gem_object *gem;
 361        struct tegra_bo *bo;
 362
 363        gem = drm_gem_object_lookup(file, args->handle);
 364        if (!gem)
 365                return -EINVAL;
 366
 367        bo = to_tegra_bo(gem);
 368
 369        args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
 370
 371        drm_gem_object_put(gem);
 372
 373        return 0;
 374}
 375
 376static int tegra_syncpt_read(struct drm_device *drm, void *data,
 377                             struct drm_file *file)
 378{
 379        struct host1x *host = dev_get_drvdata(drm->dev->parent);
 380        struct drm_tegra_syncpt_read *args = data;
 381        struct host1x_syncpt *sp;
 382
 383        sp = host1x_syncpt_get(host, args->id);
 384        if (!sp)
 385                return -EINVAL;
 386
 387        args->value = host1x_syncpt_read_min(sp);
 388        return 0;
 389}
 390
 391static int tegra_syncpt_incr(struct drm_device *drm, void *data,
 392                             struct drm_file *file)
 393{
 394        struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 395        struct drm_tegra_syncpt_incr *args = data;
 396        struct host1x_syncpt *sp;
 397
 398        sp = host1x_syncpt_get(host1x, args->id);
 399        if (!sp)
 400                return -EINVAL;
 401
 402        return host1x_syncpt_incr(sp);
 403}
 404
 405static int tegra_syncpt_wait(struct drm_device *drm, void *data,
 406                             struct drm_file *file)
 407{
 408        struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 409        struct drm_tegra_syncpt_wait *args = data;
 410        struct host1x_syncpt *sp;
 411
 412        sp = host1x_syncpt_get(host1x, args->id);
 413        if (!sp)
 414                return -EINVAL;
 415
 416        return host1x_syncpt_wait(sp, args->thresh,
 417                                  msecs_to_jiffies(args->timeout),
 418                                  &args->value);
 419}
 420
 421static int tegra_client_open(struct tegra_drm_file *fpriv,
 422                             struct tegra_drm_client *client,
 423                             struct tegra_drm_context *context)
 424{
 425        int err;
 426
 427        err = client->ops->open_channel(client, context);
 428        if (err < 0)
 429                return err;
 430
 431        err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
 432        if (err < 0) {
 433                client->ops->close_channel(context);
 434                return err;
 435        }
 436
 437        context->client = client;
 438        context->id = err;
 439
 440        return 0;
 441}
 442
 443static int tegra_open_channel(struct drm_device *drm, void *data,
 444                              struct drm_file *file)
 445{
 446        struct tegra_drm_file *fpriv = file->driver_priv;
 447        struct tegra_drm *tegra = drm->dev_private;
 448        struct drm_tegra_open_channel *args = data;
 449        struct tegra_drm_context *context;
 450        struct tegra_drm_client *client;
 451        int err = -ENODEV;
 452
 453        context = kzalloc(sizeof(*context), GFP_KERNEL);
 454        if (!context)
 455                return -ENOMEM;
 456
 457        mutex_lock(&fpriv->lock);
 458
 459        list_for_each_entry(client, &tegra->clients, list)
 460                if (client->base.class == args->client) {
 461                        err = tegra_client_open(fpriv, client, context);
 462                        if (err < 0)
 463                                break;
 464
 465                        args->context = context->id;
 466                        break;
 467                }
 468
 469        if (err < 0)
 470                kfree(context);
 471
 472        mutex_unlock(&fpriv->lock);
 473        return err;
 474}
 475
 476static int tegra_close_channel(struct drm_device *drm, void *data,
 477                               struct drm_file *file)
 478{
 479        struct tegra_drm_file *fpriv = file->driver_priv;
 480        struct drm_tegra_close_channel *args = data;
 481        struct tegra_drm_context *context;
 482        int err = 0;
 483
 484        mutex_lock(&fpriv->lock);
 485
 486        context = idr_find(&fpriv->contexts, args->context);
 487        if (!context) {
 488                err = -EINVAL;
 489                goto unlock;
 490        }
 491
 492        idr_remove(&fpriv->contexts, context->id);
 493        tegra_drm_context_free(context);
 494
 495unlock:
 496        mutex_unlock(&fpriv->lock);
 497        return err;
 498}
 499
 500static int tegra_get_syncpt(struct drm_device *drm, void *data,
 501                            struct drm_file *file)
 502{
 503        struct tegra_drm_file *fpriv = file->driver_priv;
 504        struct drm_tegra_get_syncpt *args = data;
 505        struct tegra_drm_context *context;
 506        struct host1x_syncpt *syncpt;
 507        int err = 0;
 508
 509        mutex_lock(&fpriv->lock);
 510
 511        context = idr_find(&fpriv->contexts, args->context);
 512        if (!context) {
 513                err = -ENODEV;
 514                goto unlock;
 515        }
 516
 517        if (args->index >= context->client->base.num_syncpts) {
 518                err = -EINVAL;
 519                goto unlock;
 520        }
 521
 522        syncpt = context->client->base.syncpts[args->index];
 523        args->id = host1x_syncpt_id(syncpt);
 524
 525unlock:
 526        mutex_unlock(&fpriv->lock);
 527        return err;
 528}
 529
 530static int tegra_submit(struct drm_device *drm, void *data,
 531                        struct drm_file *file)
 532{
 533        struct tegra_drm_file *fpriv = file->driver_priv;
 534        struct drm_tegra_submit *args = data;
 535        struct tegra_drm_context *context;
 536        int err;
 537
 538        mutex_lock(&fpriv->lock);
 539
 540        context = idr_find(&fpriv->contexts, args->context);
 541        if (!context) {
 542                err = -ENODEV;
 543                goto unlock;
 544        }
 545
 546        err = context->client->ops->submit(context, args, drm, file);
 547
 548unlock:
 549        mutex_unlock(&fpriv->lock);
 550        return err;
 551}
 552
 553static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
 554                                 struct drm_file *file)
 555{
 556        struct tegra_drm_file *fpriv = file->driver_priv;
 557        struct drm_tegra_get_syncpt_base *args = data;
 558        struct tegra_drm_context *context;
 559        struct host1x_syncpt_base *base;
 560        struct host1x_syncpt *syncpt;
 561        int err = 0;
 562
 563        mutex_lock(&fpriv->lock);
 564
 565        context = idr_find(&fpriv->contexts, args->context);
 566        if (!context) {
 567                err = -ENODEV;
 568                goto unlock;
 569        }
 570
 571        if (args->syncpt >= context->client->base.num_syncpts) {
 572                err = -EINVAL;
 573                goto unlock;
 574        }
 575
 576        syncpt = context->client->base.syncpts[args->syncpt];
 577
 578        base = host1x_syncpt_get_base(syncpt);
 579        if (!base) {
 580                err = -ENXIO;
 581                goto unlock;
 582        }
 583
 584        args->id = host1x_syncpt_base_id(base);
 585
 586unlock:
 587        mutex_unlock(&fpriv->lock);
 588        return err;
 589}
 590
 591static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
 592                                struct drm_file *file)
 593{
 594        struct drm_tegra_gem_set_tiling *args = data;
 595        enum tegra_bo_tiling_mode mode;
 596        struct drm_gem_object *gem;
 597        unsigned long value = 0;
 598        struct tegra_bo *bo;
 599
 600        switch (args->mode) {
 601        case DRM_TEGRA_GEM_TILING_MODE_PITCH:
 602                mode = TEGRA_BO_TILING_MODE_PITCH;
 603
 604                if (args->value != 0)
 605                        return -EINVAL;
 606
 607                break;
 608
 609        case DRM_TEGRA_GEM_TILING_MODE_TILED:
 610                mode = TEGRA_BO_TILING_MODE_TILED;
 611
 612                if (args->value != 0)
 613                        return -EINVAL;
 614
 615                break;
 616
 617        case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
 618                mode = TEGRA_BO_TILING_MODE_BLOCK;
 619
 620                if (args->value > 5)
 621                        return -EINVAL;
 622
 623                value = args->value;
 624                break;
 625
 626        default:
 627                return -EINVAL;
 628        }
 629
 630        gem = drm_gem_object_lookup(file, args->handle);
 631        if (!gem)
 632                return -ENOENT;
 633
 634        bo = to_tegra_bo(gem);
 635
 636        bo->tiling.mode = mode;
 637        bo->tiling.value = value;
 638
 639        drm_gem_object_put(gem);
 640
 641        return 0;
 642}
 643
 644static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
 645                                struct drm_file *file)
 646{
 647        struct drm_tegra_gem_get_tiling *args = data;
 648        struct drm_gem_object *gem;
 649        struct tegra_bo *bo;
 650        int err = 0;
 651
 652        gem = drm_gem_object_lookup(file, args->handle);
 653        if (!gem)
 654                return -ENOENT;
 655
 656        bo = to_tegra_bo(gem);
 657
 658        switch (bo->tiling.mode) {
 659        case TEGRA_BO_TILING_MODE_PITCH:
 660                args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
 661                args->value = 0;
 662                break;
 663
 664        case TEGRA_BO_TILING_MODE_TILED:
 665                args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
 666                args->value = 0;
 667                break;
 668
 669        case TEGRA_BO_TILING_MODE_BLOCK:
 670                args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
 671                args->value = bo->tiling.value;
 672                break;
 673
 674        default:
 675                err = -EINVAL;
 676                break;
 677        }
 678
 679        drm_gem_object_put(gem);
 680
 681        return err;
 682}
 683
 684static int tegra_gem_set_flags(struct drm_device *drm, void *data,
 685                               struct drm_file *file)
 686{
 687        struct drm_tegra_gem_set_flags *args = data;
 688        struct drm_gem_object *gem;
 689        struct tegra_bo *bo;
 690
 691        if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
 692                return -EINVAL;
 693
 694        gem = drm_gem_object_lookup(file, args->handle);
 695        if (!gem)
 696                return -ENOENT;
 697
 698        bo = to_tegra_bo(gem);
 699        bo->flags = 0;
 700
 701        if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
 702                bo->flags |= TEGRA_BO_BOTTOM_UP;
 703
 704        drm_gem_object_put(gem);
 705
 706        return 0;
 707}
 708
 709static int tegra_gem_get_flags(struct drm_device *drm, void *data,
 710                               struct drm_file *file)
 711{
 712        struct drm_tegra_gem_get_flags *args = data;
 713        struct drm_gem_object *gem;
 714        struct tegra_bo *bo;
 715
 716        gem = drm_gem_object_lookup(file, args->handle);
 717        if (!gem)
 718                return -ENOENT;
 719
 720        bo = to_tegra_bo(gem);
 721        args->flags = 0;
 722
 723        if (bo->flags & TEGRA_BO_BOTTOM_UP)
 724                args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
 725
 726        drm_gem_object_put(gem);
 727
 728        return 0;
 729}
 730#endif
 731
 732static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
 733#ifdef CONFIG_DRM_TEGRA_STAGING
 734        DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
 735                          DRM_RENDER_ALLOW),
 736        DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
 737                          DRM_RENDER_ALLOW),
 738        DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
 739                          DRM_RENDER_ALLOW),
 740        DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
 741                          DRM_RENDER_ALLOW),
 742        DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
 743                          DRM_RENDER_ALLOW),
 744        DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
 745                          DRM_RENDER_ALLOW),
 746        DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
 747                          DRM_RENDER_ALLOW),
 748        DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
 749                          DRM_RENDER_ALLOW),
 750        DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
 751                          DRM_RENDER_ALLOW),
 752        DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
 753                          DRM_RENDER_ALLOW),
 754        DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
 755                          DRM_RENDER_ALLOW),
 756        DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
 757                          DRM_RENDER_ALLOW),
 758        DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
 759                          DRM_RENDER_ALLOW),
 760        DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
 761                          DRM_RENDER_ALLOW),
 762#endif
 763};
 764
 765static const struct file_operations tegra_drm_fops = {
 766        .owner = THIS_MODULE,
 767        .open = drm_open,
 768        .release = drm_release,
 769        .unlocked_ioctl = drm_ioctl,
 770        .mmap = tegra_drm_mmap,
 771        .poll = drm_poll,
 772        .read = drm_read,
 773        .compat_ioctl = drm_compat_ioctl,
 774        .llseek = noop_llseek,
 775};
 776
 777static int tegra_drm_context_cleanup(int id, void *p, void *data)
 778{
 779        struct tegra_drm_context *context = p;
 780
 781        tegra_drm_context_free(context);
 782
 783        return 0;
 784}
 785
 786static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
 787{
 788        struct tegra_drm_file *fpriv = file->driver_priv;
 789
 790        mutex_lock(&fpriv->lock);
 791        idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
 792        mutex_unlock(&fpriv->lock);
 793
 794        idr_destroy(&fpriv->contexts);
 795        mutex_destroy(&fpriv->lock);
 796        kfree(fpriv);
 797}
 798
 799#ifdef CONFIG_DEBUG_FS
 800static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
 801{
 802        struct drm_info_node *node = (struct drm_info_node *)s->private;
 803        struct drm_device *drm = node->minor->dev;
 804        struct drm_framebuffer *fb;
 805
 806        mutex_lock(&drm->mode_config.fb_lock);
 807
 808        list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
 809                seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
 810                           fb->base.id, fb->width, fb->height,
 811                           fb->format->depth,
 812                           fb->format->cpp[0] * 8,
 813                           drm_framebuffer_read_refcount(fb));
 814        }
 815
 816        mutex_unlock(&drm->mode_config.fb_lock);
 817
 818        return 0;
 819}
 820
 821static int tegra_debugfs_iova(struct seq_file *s, void *data)
 822{
 823        struct drm_info_node *node = (struct drm_info_node *)s->private;
 824        struct drm_device *drm = node->minor->dev;
 825        struct tegra_drm *tegra = drm->dev_private;
 826        struct drm_printer p = drm_seq_file_printer(s);
 827
 828        if (tegra->domain) {
 829                mutex_lock(&tegra->mm_lock);
 830                drm_mm_print(&tegra->mm, &p);
 831                mutex_unlock(&tegra->mm_lock);
 832        }
 833
 834        return 0;
 835}
 836
 837static struct drm_info_list tegra_debugfs_list[] = {
 838        { "framebuffers", tegra_debugfs_framebuffers, 0 },
 839        { "iova", tegra_debugfs_iova, 0 },
 840};
 841
 842static void tegra_debugfs_init(struct drm_minor *minor)
 843{
 844        drm_debugfs_create_files(tegra_debugfs_list,
 845                                 ARRAY_SIZE(tegra_debugfs_list),
 846                                 minor->debugfs_root, minor);
 847}
 848#endif
 849
 850static struct drm_driver tegra_drm_driver = {
 851        .driver_features = DRIVER_MODESET | DRIVER_GEM |
 852                           DRIVER_ATOMIC | DRIVER_RENDER,
 853        .open = tegra_drm_open,
 854        .postclose = tegra_drm_postclose,
 855        .lastclose = drm_fb_helper_lastclose,
 856
 857#if defined(CONFIG_DEBUG_FS)
 858        .debugfs_init = tegra_debugfs_init,
 859#endif
 860
 861        .gem_free_object_unlocked = tegra_bo_free_object,
 862        .gem_vm_ops = &tegra_bo_vm_ops,
 863
 864        .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 865        .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 866        .gem_prime_export = tegra_gem_prime_export,
 867        .gem_prime_import = tegra_gem_prime_import,
 868
 869        .dumb_create = tegra_bo_dumb_create,
 870
 871        .ioctls = tegra_drm_ioctls,
 872        .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
 873        .fops = &tegra_drm_fops,
 874
 875        .name = DRIVER_NAME,
 876        .desc = DRIVER_DESC,
 877        .date = DRIVER_DATE,
 878        .major = DRIVER_MAJOR,
 879        .minor = DRIVER_MINOR,
 880        .patchlevel = DRIVER_PATCHLEVEL,
 881};
 882
 883int tegra_drm_register_client(struct tegra_drm *tegra,
 884                              struct tegra_drm_client *client)
 885{
 886        mutex_lock(&tegra->clients_lock);
 887        list_add_tail(&client->list, &tegra->clients);
 888        client->drm = tegra;
 889        mutex_unlock(&tegra->clients_lock);
 890
 891        return 0;
 892}
 893
 894int tegra_drm_unregister_client(struct tegra_drm *tegra,
 895                                struct tegra_drm_client *client)
 896{
 897        mutex_lock(&tegra->clients_lock);
 898        list_del_init(&client->list);
 899        client->drm = NULL;
 900        mutex_unlock(&tegra->clients_lock);
 901
 902        return 0;
 903}
 904
 905int host1x_client_iommu_attach(struct host1x_client *client)
 906{
 907        struct iommu_domain *domain = iommu_get_domain_for_dev(client->dev);
 908        struct drm_device *drm = dev_get_drvdata(client->host);
 909        struct tegra_drm *tegra = drm->dev_private;
 910        struct iommu_group *group = NULL;
 911        int err;
 912
 913        /*
 914         * If the host1x client is already attached to an IOMMU domain that is
 915         * not the shared IOMMU domain, don't try to attach it to a different
 916         * domain. This allows using the IOMMU-backed DMA API.
 917         */
 918        if (domain && domain != tegra->domain)
 919                return 0;
 920
 921        if (tegra->domain) {
 922                group = iommu_group_get(client->dev);
 923                if (!group)
 924                        return -ENODEV;
 925
 926                if (domain != tegra->domain) {
 927                        err = iommu_attach_group(tegra->domain, group);
 928                        if (err < 0) {
 929                                iommu_group_put(group);
 930                                return err;
 931                        }
 932                }
 933
 934                tegra->use_explicit_iommu = true;
 935        }
 936
 937        client->group = group;
 938
 939        return 0;
 940}
 941
 942void host1x_client_iommu_detach(struct host1x_client *client)
 943{
 944        struct drm_device *drm = dev_get_drvdata(client->host);
 945        struct tegra_drm *tegra = drm->dev_private;
 946        struct iommu_domain *domain;
 947
 948        if (client->group) {
 949                /*
 950                 * Devices that are part of the same group may no longer be
 951                 * attached to a domain at this point because their group may
 952                 * have been detached by an earlier client.
 953                 */
 954                domain = iommu_get_domain_for_dev(client->dev);
 955                if (domain)
 956                        iommu_detach_group(tegra->domain, client->group);
 957
 958                iommu_group_put(client->group);
 959                client->group = NULL;
 960        }
 961}
 962
 963void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
 964{
 965        struct iova *alloc;
 966        void *virt;
 967        gfp_t gfp;
 968        int err;
 969
 970        if (tegra->domain)
 971                size = iova_align(&tegra->carveout.domain, size);
 972        else
 973                size = PAGE_ALIGN(size);
 974
 975        gfp = GFP_KERNEL | __GFP_ZERO;
 976        if (!tegra->domain) {
 977                /*
 978                 * Many units only support 32-bit addresses, even on 64-bit
 979                 * SoCs. If there is no IOMMU to translate into a 32-bit IO
 980                 * virtual address space, force allocations to be in the
 981                 * lower 32-bit range.
 982                 */
 983                gfp |= GFP_DMA;
 984        }
 985
 986        virt = (void *)__get_free_pages(gfp, get_order(size));
 987        if (!virt)
 988                return ERR_PTR(-ENOMEM);
 989
 990        if (!tegra->domain) {
 991                /*
 992                 * If IOMMU is disabled, devices address physical memory
 993                 * directly.
 994                 */
 995                *dma = virt_to_phys(virt);
 996                return virt;
 997        }
 998
 999        alloc = alloc_iova(&tegra->carveout.domain,
1000                           size >> tegra->carveout.shift,
1001                           tegra->carveout.limit, true);
1002        if (!alloc) {
1003                err = -EBUSY;
1004                goto free_pages;
1005        }
1006
1007        *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1008        err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1009                        size, IOMMU_READ | IOMMU_WRITE);
1010        if (err < 0)
1011                goto free_iova;
1012
1013        return virt;
1014
1015free_iova:
1016        __free_iova(&tegra->carveout.domain, alloc);
1017free_pages:
1018        free_pages((unsigned long)virt, get_order(size));
1019
1020        return ERR_PTR(err);
1021}
1022
1023void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1024                    dma_addr_t dma)
1025{
1026        if (tegra->domain)
1027                size = iova_align(&tegra->carveout.domain, size);
1028        else
1029                size = PAGE_ALIGN(size);
1030
1031        if (tegra->domain) {
1032                iommu_unmap(tegra->domain, dma, size);
1033                free_iova(&tegra->carveout.domain,
1034                          iova_pfn(&tegra->carveout.domain, dma));
1035        }
1036
1037        free_pages((unsigned long)virt, get_order(size));
1038}
1039
1040static bool host1x_drm_wants_iommu(struct host1x_device *dev)
1041{
1042        struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
1043        struct iommu_domain *domain;
1044
1045        /*
1046         * If the Tegra DRM clients are backed by an IOMMU, push buffers are
1047         * likely to be allocated beyond the 32-bit boundary if sufficient
1048         * system memory is available. This is problematic on earlier Tegra
1049         * generations where host1x supports a maximum of 32 address bits in
1050         * the GATHER opcode. In this case, unless host1x is behind an IOMMU
1051         * as well it won't be able to process buffers allocated beyond the
1052         * 32-bit boundary.
1053         *
1054         * The DMA API will use bounce buffers in this case, so that could
1055         * perhaps still be made to work, even if less efficient, but there
1056         * is another catch: in order to perform cache maintenance on pages
1057         * allocated for discontiguous buffers we need to map and unmap the
1058         * SG table representing these buffers. This is fine for something
1059         * small like a push buffer, but it exhausts the bounce buffer pool
1060         * (typically on the order of a few MiB) for framebuffers (many MiB
1061         * for any modern resolution).
1062         *
1063         * Work around this by making sure that Tegra DRM clients only use
1064         * an IOMMU if the parent host1x also uses an IOMMU.
1065         *
1066         * Note that there's still a small gap here that we don't cover: if
1067         * the DMA API is backed by an IOMMU there's no way to control which
1068         * device is attached to an IOMMU and which isn't, except via wiring
1069         * up the device tree appropriately. This is considered an problem
1070         * of integration, so care must be taken for the DT to be consistent.
1071         */
1072        domain = iommu_get_domain_for_dev(dev->dev.parent);
1073
1074        /*
1075         * Tegra20 and Tegra30 don't support addressing memory beyond the
1076         * 32-bit boundary, so the regular GATHER opcodes will always be
1077         * sufficient and whether or not the host1x is attached to an IOMMU
1078         * doesn't matter.
1079         */
1080        if (!domain && host1x_get_dma_mask(host1x) <= DMA_BIT_MASK(32))
1081                return true;
1082
1083        return domain != NULL;
1084}
1085
1086static int host1x_drm_probe(struct host1x_device *dev)
1087{
1088        struct drm_driver *driver = &tegra_drm_driver;
1089        struct tegra_drm *tegra;
1090        struct drm_device *drm;
1091        int err;
1092
1093        drm = drm_dev_alloc(driver, &dev->dev);
1094        if (IS_ERR(drm))
1095                return PTR_ERR(drm);
1096
1097        tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
1098        if (!tegra) {
1099                err = -ENOMEM;
1100                goto put;
1101        }
1102
1103        if (host1x_drm_wants_iommu(dev) && iommu_present(&platform_bus_type)) {
1104                tegra->domain = iommu_domain_alloc(&platform_bus_type);
1105                if (!tegra->domain) {
1106                        err = -ENOMEM;
1107                        goto free;
1108                }
1109
1110                err = iova_cache_get();
1111                if (err < 0)
1112                        goto domain;
1113        }
1114
1115        mutex_init(&tegra->clients_lock);
1116        INIT_LIST_HEAD(&tegra->clients);
1117
1118        dev_set_drvdata(&dev->dev, drm);
1119        drm->dev_private = tegra;
1120        tegra->drm = drm;
1121
1122        drm_mode_config_init(drm);
1123
1124        drm->mode_config.min_width = 0;
1125        drm->mode_config.min_height = 0;
1126
1127        drm->mode_config.max_width = 4096;
1128        drm->mode_config.max_height = 4096;
1129
1130        drm->mode_config.allow_fb_modifiers = true;
1131
1132        drm->mode_config.normalize_zpos = true;
1133
1134        drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
1135        drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
1136
1137        err = tegra_drm_fb_prepare(drm);
1138        if (err < 0)
1139                goto config;
1140
1141        drm_kms_helper_poll_init(drm);
1142
1143        err = host1x_device_init(dev);
1144        if (err < 0)
1145                goto fbdev;
1146
1147        if (tegra->use_explicit_iommu) {
1148                u64 carveout_start, carveout_end, gem_start, gem_end;
1149                u64 dma_mask = dma_get_mask(&dev->dev);
1150                dma_addr_t start, end;
1151                unsigned long order;
1152
1153                start = tegra->domain->geometry.aperture_start & dma_mask;
1154                end = tegra->domain->geometry.aperture_end & dma_mask;
1155
1156                gem_start = start;
1157                gem_end = end - CARVEOUT_SZ;
1158                carveout_start = gem_end + 1;
1159                carveout_end = end;
1160
1161                order = __ffs(tegra->domain->pgsize_bitmap);
1162                init_iova_domain(&tegra->carveout.domain, 1UL << order,
1163                                 carveout_start >> order);
1164
1165                tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
1166                tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
1167
1168                drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
1169                mutex_init(&tegra->mm_lock);
1170
1171                DRM_DEBUG_DRIVER("IOMMU apertures:\n");
1172                DRM_DEBUG_DRIVER("  GEM: %#llx-%#llx\n", gem_start, gem_end);
1173                DRM_DEBUG_DRIVER("  Carveout: %#llx-%#llx\n", carveout_start,
1174                                 carveout_end);
1175        } else if (tegra->domain) {
1176                iommu_domain_free(tegra->domain);
1177                tegra->domain = NULL;
1178                iova_cache_put();
1179        }
1180
1181        if (tegra->hub) {
1182                err = tegra_display_hub_prepare(tegra->hub);
1183                if (err < 0)
1184                        goto device;
1185        }
1186
1187        /*
1188         * We don't use the drm_irq_install() helpers provided by the DRM
1189         * core, so we need to set this manually in order to allow the
1190         * DRM_IOCTL_WAIT_VBLANK to operate correctly.
1191         */
1192        drm->irq_enabled = true;
1193
1194        /* syncpoints are used for full 32-bit hardware VBLANK counters */
1195        drm->max_vblank_count = 0xffffffff;
1196
1197        err = drm_vblank_init(drm, drm->mode_config.num_crtc);
1198        if (err < 0)
1199                goto hub;
1200
1201        drm_mode_config_reset(drm);
1202
1203        err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb",
1204                                                            false);
1205        if (err < 0)
1206                goto hub;
1207
1208        err = tegra_drm_fb_init(drm);
1209        if (err < 0)
1210                goto hub;
1211
1212        err = drm_dev_register(drm, 0);
1213        if (err < 0)
1214                goto fb;
1215
1216        return 0;
1217
1218fb:
1219        tegra_drm_fb_exit(drm);
1220hub:
1221        if (tegra->hub)
1222                tegra_display_hub_cleanup(tegra->hub);
1223device:
1224        if (tegra->domain) {
1225                mutex_destroy(&tegra->mm_lock);
1226                drm_mm_takedown(&tegra->mm);
1227                put_iova_domain(&tegra->carveout.domain);
1228                iova_cache_put();
1229        }
1230
1231        host1x_device_exit(dev);
1232fbdev:
1233        drm_kms_helper_poll_fini(drm);
1234        tegra_drm_fb_free(drm);
1235config:
1236        drm_mode_config_cleanup(drm);
1237domain:
1238        if (tegra->domain)
1239                iommu_domain_free(tegra->domain);
1240free:
1241        kfree(tegra);
1242put:
1243        drm_dev_put(drm);
1244        return err;
1245}
1246
1247static int host1x_drm_remove(struct host1x_device *dev)
1248{
1249        struct drm_device *drm = dev_get_drvdata(&dev->dev);
1250        struct tegra_drm *tegra = drm->dev_private;
1251        int err;
1252
1253        drm_dev_unregister(drm);
1254
1255        drm_kms_helper_poll_fini(drm);
1256        tegra_drm_fb_exit(drm);
1257        drm_atomic_helper_shutdown(drm);
1258        drm_mode_config_cleanup(drm);
1259
1260        if (tegra->hub)
1261                tegra_display_hub_cleanup(tegra->hub);
1262
1263        err = host1x_device_exit(dev);
1264        if (err < 0)
1265                dev_err(&dev->dev, "host1x device cleanup failed: %d\n", err);
1266
1267        if (tegra->domain) {
1268                mutex_destroy(&tegra->mm_lock);
1269                drm_mm_takedown(&tegra->mm);
1270                put_iova_domain(&tegra->carveout.domain);
1271                iova_cache_put();
1272                iommu_domain_free(tegra->domain);
1273        }
1274
1275        kfree(tegra);
1276        drm_dev_put(drm);
1277
1278        return 0;
1279}
1280
1281#ifdef CONFIG_PM_SLEEP
1282static int host1x_drm_suspend(struct device *dev)
1283{
1284        struct drm_device *drm = dev_get_drvdata(dev);
1285
1286        return drm_mode_config_helper_suspend(drm);
1287}
1288
1289static int host1x_drm_resume(struct device *dev)
1290{
1291        struct drm_device *drm = dev_get_drvdata(dev);
1292
1293        return drm_mode_config_helper_resume(drm);
1294}
1295#endif
1296
1297static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1298                         host1x_drm_resume);
1299
1300static const struct of_device_id host1x_drm_subdevs[] = {
1301        { .compatible = "nvidia,tegra20-dc", },
1302        { .compatible = "nvidia,tegra20-hdmi", },
1303        { .compatible = "nvidia,tegra20-gr2d", },
1304        { .compatible = "nvidia,tegra20-gr3d", },
1305        { .compatible = "nvidia,tegra30-dc", },
1306        { .compatible = "nvidia,tegra30-hdmi", },
1307        { .compatible = "nvidia,tegra30-gr2d", },
1308        { .compatible = "nvidia,tegra30-gr3d", },
1309        { .compatible = "nvidia,tegra114-dsi", },
1310        { .compatible = "nvidia,tegra114-hdmi", },
1311        { .compatible = "nvidia,tegra114-gr3d", },
1312        { .compatible = "nvidia,tegra124-dc", },
1313        { .compatible = "nvidia,tegra124-sor", },
1314        { .compatible = "nvidia,tegra124-hdmi", },
1315        { .compatible = "nvidia,tegra124-dsi", },
1316        { .compatible = "nvidia,tegra124-vic", },
1317        { .compatible = "nvidia,tegra132-dsi", },
1318        { .compatible = "nvidia,tegra210-dc", },
1319        { .compatible = "nvidia,tegra210-dsi", },
1320        { .compatible = "nvidia,tegra210-sor", },
1321        { .compatible = "nvidia,tegra210-sor1", },
1322        { .compatible = "nvidia,tegra210-vic", },
1323        { .compatible = "nvidia,tegra186-display", },
1324        { .compatible = "nvidia,tegra186-dc", },
1325        { .compatible = "nvidia,tegra186-sor", },
1326        { .compatible = "nvidia,tegra186-sor1", },
1327        { .compatible = "nvidia,tegra186-vic", },
1328        { .compatible = "nvidia,tegra194-display", },
1329        { .compatible = "nvidia,tegra194-dc", },
1330        { .compatible = "nvidia,tegra194-sor", },
1331        { .compatible = "nvidia,tegra194-vic", },
1332        { /* sentinel */ }
1333};
1334
1335static struct host1x_driver host1x_drm_driver = {
1336        .driver = {
1337                .name = "drm",
1338                .pm = &host1x_drm_pm_ops,
1339        },
1340        .probe = host1x_drm_probe,
1341        .remove = host1x_drm_remove,
1342        .subdevs = host1x_drm_subdevs,
1343};
1344
1345static struct platform_driver * const drivers[] = {
1346        &tegra_display_hub_driver,
1347        &tegra_dc_driver,
1348        &tegra_hdmi_driver,
1349        &tegra_dsi_driver,
1350        &tegra_dpaux_driver,
1351        &tegra_sor_driver,
1352        &tegra_gr2d_driver,
1353        &tegra_gr3d_driver,
1354        &tegra_vic_driver,
1355};
1356
1357static int __init host1x_drm_init(void)
1358{
1359        int err;
1360
1361        err = host1x_driver_register(&host1x_drm_driver);
1362        if (err < 0)
1363                return err;
1364
1365        err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1366        if (err < 0)
1367                goto unregister_host1x;
1368
1369        return 0;
1370
1371unregister_host1x:
1372        host1x_driver_unregister(&host1x_drm_driver);
1373        return err;
1374}
1375module_init(host1x_drm_init);
1376
1377static void __exit host1x_drm_exit(void)
1378{
1379        platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1380        host1x_driver_unregister(&host1x_drm_driver);
1381}
1382module_exit(host1x_drm_exit);
1383
1384MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1385MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1386MODULE_LICENSE("GPL v2");
1387