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10#include <linux/backlight.h>
11#include <linux/delay.h>
12#include <linux/dma-buf.h>
13#include <linux/gpio/consumer.h>
14#include <linux/module.h>
15#include <linux/property.h>
16#include <linux/spi/spi.h>
17#include <video/mipi_display.h>
18
19#include <drm/drm_atomic_helper.h>
20#include <drm/drm_drv.h>
21#include <drm/drm_fb_helper.h>
22#include <drm/drm_gem_cma_helper.h>
23#include <drm/drm_gem_framebuffer_helper.h>
24#include <drm/drm_managed.h>
25#include <drm/drm_mipi_dbi.h>
26
27#define ST7735R_FRMCTR1 0xb1
28#define ST7735R_FRMCTR2 0xb2
29#define ST7735R_FRMCTR3 0xb3
30#define ST7735R_INVCTR 0xb4
31#define ST7735R_PWCTR1 0xc0
32#define ST7735R_PWCTR2 0xc1
33#define ST7735R_PWCTR3 0xc2
34#define ST7735R_PWCTR4 0xc3
35#define ST7735R_PWCTR5 0xc4
36#define ST7735R_VMCTR1 0xc5
37#define ST7735R_GAMCTRP1 0xe0
38#define ST7735R_GAMCTRN1 0xe1
39
40#define ST7735R_MY BIT(7)
41#define ST7735R_MX BIT(6)
42#define ST7735R_MV BIT(5)
43#define ST7735R_RGB BIT(3)
44
45struct st7735r_cfg {
46 const struct drm_display_mode mode;
47 unsigned int left_offset;
48 unsigned int top_offset;
49 unsigned int write_only:1;
50 unsigned int rgb:1;
51};
52
53struct st7735r_priv {
54 struct mipi_dbi_dev dbidev;
55 const struct st7735r_cfg *cfg;
56};
57
58static void st7735r_pipe_enable(struct drm_simple_display_pipe *pipe,
59 struct drm_crtc_state *crtc_state,
60 struct drm_plane_state *plane_state)
61{
62 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
63 struct st7735r_priv *priv = container_of(dbidev, struct st7735r_priv,
64 dbidev);
65 struct mipi_dbi *dbi = &dbidev->dbi;
66 int ret, idx;
67 u8 addr_mode;
68
69 if (!drm_dev_enter(pipe->crtc.dev, &idx))
70 return;
71
72 DRM_DEBUG_KMS("\n");
73
74 ret = mipi_dbi_poweron_reset(dbidev);
75 if (ret)
76 goto out_exit;
77
78 msleep(150);
79
80 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
81 msleep(500);
82
83 mipi_dbi_command(dbi, ST7735R_FRMCTR1, 0x01, 0x2c, 0x2d);
84 mipi_dbi_command(dbi, ST7735R_FRMCTR2, 0x01, 0x2c, 0x2d);
85 mipi_dbi_command(dbi, ST7735R_FRMCTR3, 0x01, 0x2c, 0x2d, 0x01, 0x2c,
86 0x2d);
87 mipi_dbi_command(dbi, ST7735R_INVCTR, 0x07);
88 mipi_dbi_command(dbi, ST7735R_PWCTR1, 0xa2, 0x02, 0x84);
89 mipi_dbi_command(dbi, ST7735R_PWCTR2, 0xc5);
90 mipi_dbi_command(dbi, ST7735R_PWCTR3, 0x0a, 0x00);
91 mipi_dbi_command(dbi, ST7735R_PWCTR4, 0x8a, 0x2a);
92 mipi_dbi_command(dbi, ST7735R_PWCTR5, 0x8a, 0xee);
93 mipi_dbi_command(dbi, ST7735R_VMCTR1, 0x0e);
94 mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE);
95 switch (dbidev->rotation) {
96 default:
97 addr_mode = ST7735R_MX | ST7735R_MY;
98 break;
99 case 90:
100 addr_mode = ST7735R_MX | ST7735R_MV;
101 break;
102 case 180:
103 addr_mode = 0;
104 break;
105 case 270:
106 addr_mode = ST7735R_MY | ST7735R_MV;
107 break;
108 }
109
110 if (priv->cfg->rgb)
111 addr_mode |= ST7735R_RGB;
112
113 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
114 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
115 MIPI_DCS_PIXEL_FMT_16BIT);
116 mipi_dbi_command(dbi, ST7735R_GAMCTRP1, 0x02, 0x1c, 0x07, 0x12, 0x37,
117 0x32, 0x29, 0x2d, 0x29, 0x25, 0x2b, 0x39, 0x00, 0x01,
118 0x03, 0x10);
119 mipi_dbi_command(dbi, ST7735R_GAMCTRN1, 0x03, 0x1d, 0x07, 0x06, 0x2e,
120 0x2c, 0x29, 0x2d, 0x2e, 0x2e, 0x37, 0x3f, 0x00, 0x00,
121 0x02, 0x10);
122 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
123
124 msleep(100);
125
126 mipi_dbi_command(dbi, MIPI_DCS_ENTER_NORMAL_MODE);
127
128 msleep(20);
129
130 mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
131out_exit:
132 drm_dev_exit(idx);
133}
134
135static const struct drm_simple_display_pipe_funcs st7735r_pipe_funcs = {
136 .enable = st7735r_pipe_enable,
137 .disable = mipi_dbi_pipe_disable,
138 .update = mipi_dbi_pipe_update,
139 .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb,
140};
141
142static const struct st7735r_cfg jd_t18003_t01_cfg = {
143 .mode = { DRM_SIMPLE_MODE(128, 160, 28, 35) },
144
145 .write_only = true,
146};
147
148static const struct st7735r_cfg rh128128t_cfg = {
149 .mode = { DRM_SIMPLE_MODE(128, 128, 25, 26) },
150 .left_offset = 2,
151 .top_offset = 3,
152 .rgb = true,
153};
154
155DEFINE_DRM_GEM_CMA_FOPS(st7735r_fops);
156
157static struct drm_driver st7735r_driver = {
158 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
159 .fops = &st7735r_fops,
160 DRM_GEM_CMA_DRIVER_OPS_VMAP,
161 .debugfs_init = mipi_dbi_debugfs_init,
162 .name = "st7735r",
163 .desc = "Sitronix ST7735R",
164 .date = "20171128",
165 .major = 1,
166 .minor = 0,
167};
168
169static const struct of_device_id st7735r_of_match[] = {
170 { .compatible = "jianda,jd-t18003-t01", .data = &jd_t18003_t01_cfg },
171 { .compatible = "okaya,rh128128t", .data = &rh128128t_cfg },
172 { },
173};
174MODULE_DEVICE_TABLE(of, st7735r_of_match);
175
176static const struct spi_device_id st7735r_id[] = {
177 { "jd-t18003-t01", (uintptr_t)&jd_t18003_t01_cfg },
178 { },
179};
180MODULE_DEVICE_TABLE(spi, st7735r_id);
181
182static int st7735r_probe(struct spi_device *spi)
183{
184 struct device *dev = &spi->dev;
185 const struct st7735r_cfg *cfg;
186 struct mipi_dbi_dev *dbidev;
187 struct st7735r_priv *priv;
188 struct drm_device *drm;
189 struct mipi_dbi *dbi;
190 struct gpio_desc *dc;
191 u32 rotation = 0;
192 int ret;
193
194 cfg = device_get_match_data(&spi->dev);
195 if (!cfg)
196 cfg = (void *)spi_get_device_id(spi)->driver_data;
197
198 priv = devm_drm_dev_alloc(dev, &st7735r_driver,
199 struct st7735r_priv, dbidev.drm);
200 if (IS_ERR(priv))
201 return PTR_ERR(priv);
202
203 dbidev = &priv->dbidev;
204 priv->cfg = cfg;
205
206 dbi = &dbidev->dbi;
207 drm = &dbidev->drm;
208
209 dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
210 if (IS_ERR(dbi->reset)) {
211 DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
212 return PTR_ERR(dbi->reset);
213 }
214
215 dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
216 if (IS_ERR(dc)) {
217 DRM_DEV_ERROR(dev, "Failed to get gpio 'dc'\n");
218 return PTR_ERR(dc);
219 }
220
221 dbidev->backlight = devm_of_find_backlight(dev);
222 if (IS_ERR(dbidev->backlight))
223 return PTR_ERR(dbidev->backlight);
224
225 device_property_read_u32(dev, "rotation", &rotation);
226
227 ret = mipi_dbi_spi_init(spi, dbi, dc);
228 if (ret)
229 return ret;
230
231 if (cfg->write_only)
232 dbi->read_commands = NULL;
233
234 dbidev->left_offset = cfg->left_offset;
235 dbidev->top_offset = cfg->top_offset;
236
237 ret = mipi_dbi_dev_init(dbidev, &st7735r_pipe_funcs, &cfg->mode,
238 rotation);
239 if (ret)
240 return ret;
241
242 drm_mode_config_reset(drm);
243
244 ret = drm_dev_register(drm, 0);
245 if (ret)
246 return ret;
247
248 spi_set_drvdata(spi, drm);
249
250 drm_fbdev_generic_setup(drm, 0);
251
252 return 0;
253}
254
255static int st7735r_remove(struct spi_device *spi)
256{
257 struct drm_device *drm = spi_get_drvdata(spi);
258
259 drm_dev_unplug(drm);
260 drm_atomic_helper_shutdown(drm);
261
262 return 0;
263}
264
265static void st7735r_shutdown(struct spi_device *spi)
266{
267 drm_atomic_helper_shutdown(spi_get_drvdata(spi));
268}
269
270static struct spi_driver st7735r_spi_driver = {
271 .driver = {
272 .name = "st7735r",
273 .of_match_table = st7735r_of_match,
274 },
275 .id_table = st7735r_id,
276 .probe = st7735r_probe,
277 .remove = st7735r_remove,
278 .shutdown = st7735r_shutdown,
279};
280module_spi_driver(st7735r_spi_driver);
281
282MODULE_DESCRIPTION("Sitronix ST7735R DRM driver");
283MODULE_AUTHOR("David Lechner <david@lechnology.com>");
284MODULE_LICENSE("GPL");
285
