1
2
3
4#ifndef _I40E_H_
5#define _I40E_H_
6
7#include <net/tcp.h>
8#include <net/udp.h>
9#include <linux/types.h>
10#include <linux/errno.h>
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/aer.h>
14#include <linux/netdevice.h>
15#include <linux/ioport.h>
16#include <linux/iommu.h>
17#include <linux/slab.h>
18#include <linux/list.h>
19#include <linux/hashtable.h>
20#include <linux/string.h>
21#include <linux/in.h>
22#include <linux/ip.h>
23#include <linux/sctp.h>
24#include <linux/pkt_sched.h>
25#include <linux/ipv6.h>
26#include <net/checksum.h>
27#include <net/ip6_checksum.h>
28#include <linux/ethtool.h>
29#include <linux/if_vlan.h>
30#include <linux/if_macvlan.h>
31#include <linux/if_bridge.h>
32#include <linux/clocksource.h>
33#include <linux/net_tstamp.h>
34#include <linux/ptp_clock_kernel.h>
35#include <net/pkt_cls.h>
36#include <net/tc_act/tc_gact.h>
37#include <net/tc_act/tc_mirred.h>
38#include <net/udp_tunnel.h>
39#include <net/xdp_sock.h>
40#include "i40e_type.h"
41#include "i40e_prototype.h"
42#include <linux/net/intel/i40e_client.h>
43#include <linux/avf/virtchnl.h>
44#include "i40e_virtchnl_pf.h"
45#include "i40e_txrx.h"
46#include "i40e_dcb.h"
47
48
49#define I40E_MAX_VEB 16
50
51#define I40E_MAX_NUM_DESCRIPTORS 4096
52#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
53#define I40E_DEFAULT_NUM_DESCRIPTORS 512
54#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
55#define I40E_MIN_NUM_DESCRIPTORS 64
56#define I40E_MIN_MSIX 2
57#define I40E_DEFAULT_NUM_VMDQ_VSI 8
58#define I40E_MIN_VSI_ALLOC 83
59
60#define i40e_default_queues_per_vmdq(pf) \
61 (((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
62#define I40E_DEFAULT_QUEUES_PER_VF 4
63#define I40E_MAX_VF_QUEUES 16
64#define i40e_pf_get_max_q_per_tc(pf) \
65 (((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
66#define I40E_FDIR_RING_COUNT 32
67#define I40E_MAX_AQ_BUF_SIZE 4096
68#define I40E_AQ_LEN 256
69#define I40E_AQ_WORK_LIMIT 66
70#define I40E_MAX_USER_PRIORITY 8
71#define I40E_DEFAULT_TRAFFIC_CLASS BIT(0)
72#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
73#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
74
75#define I40E_NVM_VERSION_LO_SHIFT 0
76#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
77#define I40E_NVM_VERSION_HI_SHIFT 12
78#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
79#define I40E_OEM_VER_BUILD_MASK 0xffff
80#define I40E_OEM_VER_PATCH_MASK 0xff
81#define I40E_OEM_VER_BUILD_SHIFT 8
82#define I40E_OEM_VER_SHIFT 24
83#define I40E_PHY_DEBUG_ALL \
84 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \
85 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW)
86
87#define I40E_OEM_EETRACK_ID 0xffffffff
88#define I40E_OEM_GEN_SHIFT 24
89#define I40E_OEM_SNAP_MASK 0x00ff0000
90#define I40E_OEM_SNAP_SHIFT 16
91#define I40E_OEM_RELEASE_MASK 0x0000ffff
92
93#define I40E_RX_DESC(R, i) \
94 (&(((union i40e_rx_desc *)((R)->desc))[i]))
95#define I40E_TX_DESC(R, i) \
96 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
97#define I40E_TX_CTXTDESC(R, i) \
98 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
99#define I40E_TX_FDIRDESC(R, i) \
100 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
101
102
103#define I40E_BW_CREDIT_DIVISOR 50
104#define I40E_BW_MBPS_DIVISOR 125000
105#define I40E_MAX_BW_INACTIVE_ACCUM 4
106
107
108enum i40e_state_t {
109 __I40E_TESTING,
110 __I40E_CONFIG_BUSY,
111 __I40E_CONFIG_DONE,
112 __I40E_DOWN,
113 __I40E_SERVICE_SCHED,
114 __I40E_ADMINQ_EVENT_PENDING,
115 __I40E_MDD_EVENT_PENDING,
116 __I40E_VFLR_EVENT_PENDING,
117 __I40E_RESET_RECOVERY_PENDING,
118 __I40E_TIMEOUT_RECOVERY_PENDING,
119 __I40E_MISC_IRQ_REQUESTED,
120 __I40E_RESET_INTR_RECEIVED,
121 __I40E_REINIT_REQUESTED,
122 __I40E_PF_RESET_REQUESTED,
123 __I40E_CORE_RESET_REQUESTED,
124 __I40E_GLOBAL_RESET_REQUESTED,
125 __I40E_EMP_RESET_INTR_RECEIVED,
126 __I40E_SUSPENDED,
127 __I40E_PTP_TX_IN_PROGRESS,
128 __I40E_BAD_EEPROM,
129 __I40E_DOWN_REQUESTED,
130 __I40E_FD_FLUSH_REQUESTED,
131 __I40E_FD_ATR_AUTO_DISABLED,
132 __I40E_FD_SB_AUTO_DISABLED,
133 __I40E_RESET_FAILED,
134 __I40E_PORT_SUSPENDED,
135 __I40E_VF_DISABLE,
136 __I40E_MACVLAN_SYNC_PENDING,
137 __I40E_TEMP_LINK_POLLING,
138 __I40E_CLIENT_SERVICE_REQUESTED,
139 __I40E_CLIENT_L2_CHANGE,
140 __I40E_CLIENT_RESET,
141 __I40E_VIRTCHNL_OP_PENDING,
142 __I40E_RECOVERY_MODE,
143 __I40E_VF_RESETS_DISABLED,
144
145 __I40E_STATE_SIZE__,
146};
147
148#define I40E_PF_RESET_FLAG BIT_ULL(__I40E_PF_RESET_REQUESTED)
149
150
151enum i40e_vsi_state_t {
152 __I40E_VSI_DOWN,
153 __I40E_VSI_NEEDS_RESTART,
154 __I40E_VSI_SYNCING_FILTERS,
155 __I40E_VSI_OVERFLOW_PROMISC,
156 __I40E_VSI_REINIT_REQUESTED,
157 __I40E_VSI_DOWN_REQUESTED,
158
159 __I40E_VSI_STATE_SIZE__,
160};
161
162enum i40e_interrupt_policy {
163 I40E_INTERRUPT_BEST_CASE,
164 I40E_INTERRUPT_MEDIUM,
165 I40E_INTERRUPT_LOWEST
166};
167
168struct i40e_lump_tracking {
169 u16 num_entries;
170 u16 search_hint;
171 u16 list[0];
172#define I40E_PILE_VALID_BIT 0x8000
173#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
174};
175
176#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
177#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
178#define I40E_FDIR_BUFFER_FULL_MARGIN 10
179#define I40E_FDIR_BUFFER_HEAD_ROOM 32
180#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
181
182#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
183#define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
184#define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4)
185
186enum i40e_fd_stat_idx {
187 I40E_FD_STAT_ATR,
188 I40E_FD_STAT_SB,
189 I40E_FD_STAT_ATR_TUNNEL,
190 I40E_FD_STAT_PF_COUNT
191};
192#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
193#define I40E_FD_ATR_STAT_IDX(pf_id) \
194 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
195#define I40E_FD_SB_STAT_IDX(pf_id) \
196 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
197#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
198 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
199
200
201
202
203struct i40e_rx_flow_userdef {
204 bool flex_filter;
205 u16 flex_word;
206 u16 flex_offset;
207};
208
209struct i40e_fdir_filter {
210 struct hlist_node fdir_node;
211
212 u8 flow_type;
213 u8 ip4_proto;
214
215 __be32 dst_ip;
216 __be32 src_ip;
217 __be16 src_port;
218 __be16 dst_port;
219 __be32 sctp_v_tag;
220
221
222 __be16 flex_word;
223 u16 flex_offset;
224 bool flex_filter;
225
226
227 u16 q_index;
228 u8 flex_off;
229 u8 pctype;
230 u16 dest_vsi;
231 u8 dest_ctl;
232 u8 fd_status;
233 u16 cnt_index;
234 u32 fd_id;
235};
236
237#define I40E_CLOUD_FIELD_OMAC BIT(0)
238#define I40E_CLOUD_FIELD_IMAC BIT(1)
239#define I40E_CLOUD_FIELD_IVLAN BIT(2)
240#define I40E_CLOUD_FIELD_TEN_ID BIT(3)
241#define I40E_CLOUD_FIELD_IIP BIT(4)
242
243#define I40E_CLOUD_FILTER_FLAGS_OMAC I40E_CLOUD_FIELD_OMAC
244#define I40E_CLOUD_FILTER_FLAGS_IMAC I40E_CLOUD_FIELD_IMAC
245#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN (I40E_CLOUD_FIELD_IMAC | \
246 I40E_CLOUD_FIELD_IVLAN)
247#define I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
248 I40E_CLOUD_FIELD_TEN_ID)
249#define I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC (I40E_CLOUD_FIELD_OMAC | \
250 I40E_CLOUD_FIELD_IMAC | \
251 I40E_CLOUD_FIELD_TEN_ID)
252#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
253 I40E_CLOUD_FIELD_IVLAN | \
254 I40E_CLOUD_FIELD_TEN_ID)
255#define I40E_CLOUD_FILTER_FLAGS_IIP I40E_CLOUD_FIELD_IIP
256
257struct i40e_cloud_filter {
258 struct hlist_node cloud_node;
259 unsigned long cookie;
260
261 u8 dst_mac[ETH_ALEN];
262 u8 src_mac[ETH_ALEN];
263 __be16 vlan_id;
264 u16 seid;
265 __be16 dst_port;
266 __be16 src_port;
267 u32 tenant_id;
268 union {
269 struct {
270 struct in_addr dst_ip;
271 struct in_addr src_ip;
272 } v4;
273 struct {
274 struct in6_addr dst_ip6;
275 struct in6_addr src_ip6;
276 } v6;
277 } ip;
278#define dst_ipv6 ip.v6.dst_ip6.s6_addr32
279#define src_ipv6 ip.v6.src_ip6.s6_addr32
280#define dst_ipv4 ip.v4.dst_ip.s_addr
281#define src_ipv4 ip.v4.src_ip.s_addr
282 u16 n_proto;
283 u8 ip_proto;
284 u8 flags;
285#define I40E_CLOUD_TNL_TYPE_NONE 0xff
286 u8 tunnel_type;
287};
288
289
290struct i40e_tc_info {
291 u16 qoffset;
292 u16 qcount;
293 u8 netdev_tc;
294};
295
296
297struct i40e_tc_configuration {
298 u8 numtc;
299 u8 enabled_tc;
300 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
301};
302
303#define I40E_UDP_PORT_INDEX_UNUSED 255
304struct i40e_udp_port_config {
305
306 u16 port;
307 u8 type;
308 u8 filter_index;
309};
310
311#define I40_DDP_FLASH_REGION 100
312#define I40E_PROFILE_INFO_SIZE 48
313#define I40E_MAX_PROFILE_NUM 16
314#define I40E_PROFILE_LIST_SIZE \
315 (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4)
316#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/"
317#define I40E_DDP_PROFILE_NAME_MAX 64
318
319int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size,
320 bool is_add);
321int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash);
322
323struct i40e_ddp_profile_list {
324 u32 p_count;
325 struct i40e_profile_info p_info[];
326};
327
328struct i40e_ddp_old_profile_list {
329 struct list_head list;
330 size_t old_ddp_size;
331 u8 old_ddp_buf[];
332};
333
334
335#define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \
336 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
337 I40E_PRTQF_FLX_PIT_FSIZE_MASK)
338#define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \
339 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \
340 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK)
341#define I40E_FLEX_SET_SRC_WORD(src) (((src) << \
342 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \
343 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK)
344#define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \
345 I40E_FLEX_SET_FSIZE(fsize) | \
346 I40E_FLEX_SET_SRC_WORD(src))
347
348
349#define I40E_MAX_FLEX_SRC_OFFSET 0x1F
350
351
352#define I40E_ORT_SET_IDX(idx) (((idx) << \
353 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \
354 I40E_GLQF_ORT_PIT_INDX_MASK)
355
356#define I40E_ORT_SET_COUNT(count) (((count) << \
357 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \
358 I40E_GLQF_ORT_FIELD_CNT_MASK)
359
360#define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \
361 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \
362 I40E_GLQF_ORT_FLX_PAYLOAD_MASK)
363
364#define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \
365 I40E_ORT_SET_COUNT(count) | \
366 I40E_ORT_SET_PAYLOAD(payload))
367
368#define I40E_L3_GLQF_ORT_IDX 34
369#define I40E_L4_GLQF_ORT_IDX 35
370
371
372#define I40E_FLEX_PIT_IDX_START_L3 3
373#define I40E_FLEX_PIT_IDX_START_L4 6
374
375#define I40E_FLEX_PIT_TABLE_SIZE 3
376
377#define I40E_FLEX_DEST_UNUSED 63
378
379#define I40E_FLEX_INDEX_ENTRIES 8
380
381
382#define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \
383 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \
384 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \
385 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK)
386
387struct i40e_flex_pit {
388 struct list_head list;
389 u16 src_offset;
390 u8 pit_index;
391};
392
393struct i40e_fwd_adapter {
394 struct net_device *netdev;
395 int bit_no;
396};
397
398struct i40e_channel {
399 struct list_head list;
400 bool initialized;
401 u8 type;
402 u16 vsi_number;
403 u16 stat_counter_idx;
404 u16 base_queue;
405 u16 num_queue_pairs;
406 u16 seid;
407
408 u8 enabled_tc;
409 struct i40e_aqc_vsi_properties_data info;
410
411 u64 max_tx_rate;
412 struct i40e_fwd_adapter *fwd;
413
414
415 struct i40e_vsi *parent_vsi;
416};
417
418static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch)
419{
420 return !!ch->fwd;
421}
422
423static inline u8 *i40e_channel_mac(struct i40e_channel *ch)
424{
425 if (i40e_is_channel_macvlan(ch))
426 return ch->fwd->netdev->dev_addr;
427 else
428 return NULL;
429}
430
431
432struct i40e_pf {
433 struct pci_dev *pdev;
434 struct i40e_hw hw;
435 DECLARE_BITMAP(state, __I40E_STATE_SIZE__);
436 struct msix_entry *msix_entries;
437 bool fc_autoneg_status;
438
439 u16 eeprom_version;
440 u16 num_vmdq_vsis;
441 u16 num_vmdq_qps;
442 u16 num_vmdq_msix;
443 u16 num_req_vfs;
444 u16 num_vf_qps;
445 u16 num_lan_qps;
446 u16 num_lan_msix;
447 u16 num_fdsb_msix;
448 u16 num_iwarp_msix;
449 int iwarp_base_vector;
450 int queues_left;
451 u16 alloc_rss_size;
452 u16 rss_size_max;
453 u16 fdir_pf_filter_count;
454 u16 num_alloc_vsi;
455 u8 atr_sample_rate;
456 bool wol_en;
457
458 struct hlist_head fdir_filter_list;
459 u16 fdir_pf_active_filters;
460 unsigned long fd_flush_timestamp;
461 u32 fd_flush_cnt;
462 u32 fd_add_err;
463 u32 fd_atr_cnt;
464
465
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467
468
469 u16 fd_tcp4_filter_cnt;
470 u16 fd_udp4_filter_cnt;
471 u16 fd_sctp4_filter_cnt;
472 u16 fd_ip4_filter_cnt;
473
474
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477
478
479 struct list_head l3_flex_pit_list;
480 struct list_head l4_flex_pit_list;
481
482 struct udp_tunnel_nic_shared udp_tunnel_shared;
483 struct udp_tunnel_nic_info udp_tunnel_nic;
484
485 struct hlist_head cloud_filter_list;
486 u16 num_cloud_filters;
487
488 enum i40e_interrupt_policy int_policy;
489 u16 rx_itr_default;
490 u16 tx_itr_default;
491 u32 msg_enable;
492 char int_name[I40E_INT_NAME_STR_LEN];
493 u16 adminq_work_limit;
494 unsigned long service_timer_period;
495 unsigned long service_timer_previous;
496 struct timer_list service_timer;
497 struct work_struct service_task;
498
499 u32 hw_features;
500#define I40E_HW_RSS_AQ_CAPABLE BIT(0)
501#define I40E_HW_128_QP_RSS_CAPABLE BIT(1)
502#define I40E_HW_ATR_EVICT_CAPABLE BIT(2)
503#define I40E_HW_WB_ON_ITR_CAPABLE BIT(3)
504#define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT(4)
505#define I40E_HW_NO_PCI_LINK_CHECK BIT(5)
506#define I40E_HW_100M_SGMII_CAPABLE BIT(6)
507#define I40E_HW_NO_DCB_SUPPORT BIT(7)
508#define I40E_HW_USE_SET_LLDP_MIB BIT(8)
509#define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT(9)
510#define I40E_HW_PTP_L4_CAPABLE BIT(10)
511#define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT(11)
512#define I40E_HW_HAVE_CRT_RETIMER BIT(13)
513#define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT(14)
514#define I40E_HW_PHY_CONTROLS_LEDS BIT(15)
515#define I40E_HW_STOP_FW_LLDP BIT(16)
516#define I40E_HW_PORT_ID_VALID BIT(17)
517#define I40E_HW_RESTART_AUTONEG BIT(18)
518
519 u32 flags;
520#define I40E_FLAG_RX_CSUM_ENABLED BIT(0)
521#define I40E_FLAG_MSI_ENABLED BIT(1)
522#define I40E_FLAG_MSIX_ENABLED BIT(2)
523#define I40E_FLAG_RSS_ENABLED BIT(3)
524#define I40E_FLAG_VMDQ_ENABLED BIT(4)
525#define I40E_FLAG_SRIOV_ENABLED BIT(5)
526#define I40E_FLAG_DCB_CAPABLE BIT(6)
527#define I40E_FLAG_DCB_ENABLED BIT(7)
528#define I40E_FLAG_FD_SB_ENABLED BIT(8)
529#define I40E_FLAG_FD_ATR_ENABLED BIT(9)
530#define I40E_FLAG_MFP_ENABLED BIT(10)
531#define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT(11)
532#define I40E_FLAG_VEB_MODE_ENABLED BIT(12)
533#define I40E_FLAG_VEB_STATS_ENABLED BIT(13)
534#define I40E_FLAG_LINK_POLLING_ENABLED BIT(14)
535#define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT(15)
536#define I40E_FLAG_LEGACY_RX BIT(16)
537#define I40E_FLAG_PTP BIT(17)
538#define I40E_FLAG_IWARP_ENABLED BIT(18)
539#define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED BIT(19)
540#define I40E_FLAG_SOURCE_PRUNING_DISABLED BIT(20)
541#define I40E_FLAG_TC_MQPRIO BIT(21)
542#define I40E_FLAG_FD_SB_INACTIVE BIT(22)
543#define I40E_FLAG_FD_SB_TO_CLOUD_FILTER BIT(23)
544#define I40E_FLAG_DISABLE_FW_LLDP BIT(24)
545#define I40E_FLAG_RS_FEC BIT(25)
546#define I40E_FLAG_BASE_R_FEC BIT(26)
547
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567
568#define I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED BIT(27)
569
570 struct i40e_client_instance *cinst;
571 bool stat_offsets_loaded;
572 struct i40e_hw_port_stats stats;
573 struct i40e_hw_port_stats stats_offsets;
574 u32 tx_timeout_count;
575 u32 tx_timeout_recovery_level;
576 unsigned long tx_timeout_last_recovery;
577 u32 tx_sluggish_count;
578 u32 hw_csum_rx_error;
579 u32 led_status;
580 u16 corer_count;
581 u16 globr_count;
582 u16 empr_count;
583 u16 pfr_count;
584 u16 sw_int_count;
585
586 struct mutex switch_mutex;
587 u16 lan_vsi;
588 u16 lan_veb;
589#define I40E_NO_VEB 0xffff
590#define I40E_NO_VSI 0xffff
591 u16 next_vsi;
592 struct i40e_vsi **vsi;
593 struct i40e_veb *veb[I40E_MAX_VEB];
594
595 struct i40e_lump_tracking *qp_pile;
596 struct i40e_lump_tracking *irq_pile;
597
598
599 u16 pf_seid;
600 u16 main_vsi_seid;
601 u16 mac_seid;
602 struct kobject *switch_kobj;
603#ifdef CONFIG_DEBUG_FS
604 struct dentry *i40e_dbg_pf;
605#endif
606 bool cur_promisc;
607
608 u16 instance;
609
610
611 struct i40e_vf *vf;
612 int num_alloc_vfs;
613 u32 vf_aq_requests;
614 u32 arq_overflows;
615
616
617
618
619
620
621
622
623 u16 dcbx_cap;
624
625 struct i40e_filter_control_settings filter_settings;
626
627 struct ptp_clock *ptp_clock;
628 struct ptp_clock_info ptp_caps;
629 struct sk_buff *ptp_tx_skb;
630 unsigned long ptp_tx_start;
631 struct hwtstamp_config tstamp_config;
632 struct timespec64 ptp_prev_hw_time;
633 ktime_t ptp_reset_start;
634 struct mutex tmreg_lock;
635 u32 ptp_adj_mult;
636 u32 tx_hwtstamp_timeouts;
637 u32 tx_hwtstamp_skipped;
638 u32 rx_hwtstamp_cleared;
639 u32 latch_event_flags;
640 spinlock_t ptp_rx_lock;
641 unsigned long latch_events[4];
642 bool ptp_tx;
643 bool ptp_rx;
644 u16 rss_table_size;
645 u32 max_bw;
646 u32 min_bw;
647
648 u32 ioremap_len;
649 u32 fd_inv;
650 u16 phy_led_val;
651
652 u16 override_q_count;
653 u16 last_sw_conf_flags;
654 u16 last_sw_conf_valid_flags;
655
656 struct list_head ddp_old_prof;
657};
658
659
660
661
662
663
664
665static inline u64 i40e_addr_to_hkey(const u8 *macaddr)
666{
667 u64 key = 0;
668
669 ether_addr_copy((u8 *)&key, macaddr);
670 return key;
671}
672
673enum i40e_filter_state {
674 I40E_FILTER_INVALID = 0,
675 I40E_FILTER_NEW,
676 I40E_FILTER_ACTIVE,
677 I40E_FILTER_FAILED,
678 I40E_FILTER_REMOVE,
679
680};
681struct i40e_mac_filter {
682 struct hlist_node hlist;
683 u8 macaddr[ETH_ALEN];
684#define I40E_VLAN_ANY -1
685 s16 vlan;
686 enum i40e_filter_state state;
687};
688
689
690
691
692
693
694
695
696
697struct i40e_new_mac_filter {
698 struct hlist_node hlist;
699 struct i40e_mac_filter *f;
700
701
702 enum i40e_filter_state state;
703};
704
705struct i40e_veb {
706 struct i40e_pf *pf;
707 u16 idx;
708 u16 veb_idx;
709 u16 seid;
710 u16 uplink_seid;
711 u16 stats_idx;
712 u8 enabled_tc;
713 u16 bridge_mode;
714 u16 flags;
715 u16 bw_limit;
716 u8 bw_max_quanta;
717 bool is_abs_credits;
718 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
719 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
720 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
721 struct kobject *kobj;
722 bool stat_offsets_loaded;
723 struct i40e_eth_stats stats;
724 struct i40e_eth_stats stats_offsets;
725 struct i40e_veb_tc_stats tc_stats;
726 struct i40e_veb_tc_stats tc_stats_offsets;
727};
728
729
730struct i40e_vsi {
731 struct net_device *netdev;
732 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
733 bool netdev_registered;
734 bool stat_offsets_loaded;
735
736 u32 current_netdev_flags;
737 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__);
738#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
739#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
740 unsigned long flags;
741
742
743 spinlock_t mac_filter_hash_lock;
744
745 DECLARE_HASHTABLE(mac_filter_hash, 8);
746 bool has_vlan_filter;
747
748
749 struct rtnl_link_stats64 net_stats;
750 struct rtnl_link_stats64 net_stats_offsets;
751 struct i40e_eth_stats eth_stats;
752 struct i40e_eth_stats eth_stats_offsets;
753 u32 tx_restart;
754 u32 tx_busy;
755 u64 tx_linearize;
756 u64 tx_force_wb;
757 u32 rx_buf_failed;
758 u32 rx_page_failed;
759
760
761 struct i40e_ring **rx_rings;
762 struct i40e_ring **tx_rings;
763 struct i40e_ring **xdp_rings;
764
765 u32 active_filters;
766 u32 promisc_threshold;
767
768 u16 work_limit;
769 u16 int_rate_limit;
770
771 u16 rss_table_size;
772 u16 rss_size;
773 u8 *rss_hkey_user;
774 u8 *rss_lut_user;
775
776
777 u16 max_frame;
778 u16 rx_buf_len;
779
780 struct bpf_prog *xdp_prog;
781
782
783 struct i40e_q_vector **q_vectors;
784 int num_q_vectors;
785 int base_vector;
786 bool irqs_ready;
787
788 u16 seid;
789 u16 id;
790 u16 uplink_seid;
791
792 u16 base_queue;
793 u16 alloc_queue_pairs;
794 u16 req_queue_pairs;
795 u16 num_queue_pairs;
796 u16 num_tx_desc;
797 u16 num_rx_desc;
798 enum i40e_vsi_type type;
799 s16 vf_id;
800
801 struct tc_mqprio_qopt_offload mqprio_qopt;
802 struct i40e_tc_configuration tc_config;
803 struct i40e_aqc_vsi_properties_data info;
804
805
806 u16 bw_limit;
807 u8 bw_max_quanta;
808
809
810 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
811
812 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
813
814 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
815
816 struct i40e_pf *back;
817 u16 idx;
818 u16 veb_idx;
819 struct kobject *kobj;
820 bool current_isup;
821 enum i40e_aq_link_speed current_speed;
822
823
824 u16 cnt_q_avail;
825 u16 orig_rss_size;
826 u16 current_rss_size;
827 bool reconfig_rss;
828
829 u16 next_base_queue;
830
831 struct list_head ch_list;
832 u16 tc_seid_map[I40E_MAX_TRAFFIC_CLASS];
833
834
835#define I40E_MAX_MACVLANS 128
836#define I40E_MIN_MACVLAN_VECTORS 2
837 DECLARE_BITMAP(fwd_bitmask, I40E_MAX_MACVLANS);
838 struct list_head macvlan_list;
839 int macvlan_cnt;
840
841 void *priv;
842
843
844 irqreturn_t (*irq_handler)(int irq, void *data);
845
846 unsigned long *af_xdp_zc_qps;
847} ____cacheline_internodealigned_in_smp;
848
849struct i40e_netdev_priv {
850 struct i40e_vsi *vsi;
851};
852
853
854struct i40e_q_vector {
855 struct i40e_vsi *vsi;
856
857 u16 v_idx;
858 u16 reg_idx;
859
860 struct napi_struct napi;
861
862 struct i40e_ring_container rx;
863 struct i40e_ring_container tx;
864
865 u8 itr_countdown;
866 u8 num_ringpairs;
867
868 cpumask_t affinity_mask;
869 struct irq_affinity_notify affinity_notify;
870
871 struct rcu_head rcu;
872 char name[I40E_INT_NAME_STR_LEN];
873 bool arm_wb_state;
874} ____cacheline_internodealigned_in_smp;
875
876
877struct i40e_device {
878 struct list_head list;
879 struct i40e_pf *pf;
880};
881
882
883
884
885
886static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
887{
888 static char buf[32];
889 u32 full_ver;
890
891 full_ver = hw->nvm.oem_ver;
892
893 if (hw->nvm.eetrack == I40E_OEM_EETRACK_ID) {
894 u8 gen, snap;
895 u16 release;
896
897 gen = (u8)(full_ver >> I40E_OEM_GEN_SHIFT);
898 snap = (u8)((full_ver & I40E_OEM_SNAP_MASK) >>
899 I40E_OEM_SNAP_SHIFT);
900 release = (u16)(full_ver & I40E_OEM_RELEASE_MASK);
901
902 snprintf(buf, sizeof(buf), "%x.%x.%x", gen, snap, release);
903 } else {
904 u8 ver, patch;
905 u16 build;
906
907 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
908 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
909 I40E_OEM_VER_BUILD_MASK);
910 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
911
912 snprintf(buf, sizeof(buf),
913 "%x.%02x 0x%x %d.%d.%d",
914 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
915 I40E_NVM_VERSION_HI_SHIFT,
916 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
917 I40E_NVM_VERSION_LO_SHIFT,
918 hw->nvm.eetrack, ver, build, patch);
919 }
920
921 return buf;
922}
923
924
925
926
927
928
929
930static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
931{
932 struct i40e_netdev_priv *np = netdev_priv(netdev);
933 struct i40e_vsi *vsi = np->vsi;
934
935 return vsi->back;
936}
937
938static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
939 irqreturn_t (*irq_handler)(int, void *))
940{
941 vsi->irq_handler = irq_handler;
942}
943
944
945
946
947
948static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
949{
950 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
951}
952
953
954
955
956
957
958
959
960
961static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr)
962{
963 u64 val;
964
965 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1));
966 val <<= 32;
967 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0));
968
969 return val;
970}
971
972
973
974
975
976
977
978
979
980
981static inline void i40e_write_fd_input_set(struct i40e_pf *pf,
982 u16 addr, u64 val)
983{
984 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1),
985 (u32)(val >> 32));
986 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0),
987 (u32)(val & 0xFFFFFFFFULL));
988}
989
990
991int i40e_up(struct i40e_vsi *vsi);
992void i40e_down(struct i40e_vsi *vsi);
993extern const char i40e_driver_name[];
994void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
995void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired);
996int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
997int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
998void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
999 u16 rss_table_size, u16 rss_size);
1000struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
1001
1002
1003
1004
1005
1006static inline struct i40e_vsi *
1007i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type)
1008{
1009 int i;
1010
1011 for (i = 0; i < pf->num_alloc_vsi; i++) {
1012 struct i40e_vsi *vsi = pf->vsi[i];
1013
1014 if (vsi && vsi->type == type)
1015 return vsi;
1016 }
1017
1018 return NULL;
1019}
1020void i40e_update_stats(struct i40e_vsi *vsi);
1021void i40e_update_veb_stats(struct i40e_veb *veb);
1022void i40e_update_eth_stats(struct i40e_vsi *vsi);
1023struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
1024int i40e_fetch_switch_configuration(struct i40e_pf *pf,
1025 bool printconfig);
1026
1027int i40e_add_del_fdir(struct i40e_vsi *vsi,
1028 struct i40e_fdir_filter *input, bool add);
1029void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
1030u32 i40e_get_current_fd_count(struct i40e_pf *pf);
1031u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1032u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
1033u32 i40e_get_global_fd_count(struct i40e_pf *pf);
1034bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
1035void i40e_set_ethtool_ops(struct net_device *netdev);
1036struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1037 const u8 *macaddr, s16 vlan);
1038void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f);
1039void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan);
1040int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
1041struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
1042 u16 uplink, u32 param1);
1043int i40e_vsi_release(struct i40e_vsi *vsi);
1044void i40e_service_event_schedule(struct i40e_pf *pf);
1045void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id,
1046 u8 *msg, u16 len);
1047
1048int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, bool is_xdp,
1049 bool enable);
1050int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable);
1051int i40e_vsi_start_rings(struct i40e_vsi *vsi);
1052void i40e_vsi_stop_rings(struct i40e_vsi *vsi);
1053void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi);
1054int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi);
1055int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
1056struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
1057 u16 downlink_seid, u8 enabled_tc);
1058void i40e_veb_release(struct i40e_veb *veb);
1059
1060int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
1061int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
1062void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
1063void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
1064void i40e_pf_reset_stats(struct i40e_pf *pf);
1065#ifdef CONFIG_DEBUG_FS
1066void i40e_dbg_pf_init(struct i40e_pf *pf);
1067void i40e_dbg_pf_exit(struct i40e_pf *pf);
1068void i40e_dbg_init(void);
1069void i40e_dbg_exit(void);
1070#else
1071static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
1072static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
1073static inline void i40e_dbg_init(void) {}
1074static inline void i40e_dbg_exit(void) {}
1075#endif
1076
1077int i40e_lan_add_device(struct i40e_pf *pf);
1078int i40e_lan_del_device(struct i40e_pf *pf);
1079void i40e_client_subtask(struct i40e_pf *pf);
1080void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi);
1081void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset);
1082void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs);
1083void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id);
1084void i40e_client_update_msix_info(struct i40e_pf *pf);
1085int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id);
1086
1087
1088
1089
1090
1091static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
1092{
1093 struct i40e_pf *pf = vsi->back;
1094 struct i40e_hw *hw = &pf->hw;
1095 u32 val;
1096
1097 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
1098 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
1099 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
1100 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
1101
1102}
1103
1104void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
1105void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
1106int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
1107int i40e_open(struct net_device *netdev);
1108int i40e_close(struct net_device *netdev);
1109int i40e_vsi_open(struct i40e_vsi *vsi);
1110void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
1111int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1112int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid);
1113void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1114void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid);
1115struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1116 const u8 *macaddr);
1117int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
1118bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
1119int i40e_count_filters(struct i40e_vsi *vsi);
1120struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
1121void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
1122#ifdef CONFIG_I40E_DCB
1123void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
1124 struct i40e_dcbx_config *old_cfg,
1125 struct i40e_dcbx_config *new_cfg);
1126void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
1127void i40e_dcbnl_setup(struct i40e_vsi *vsi);
1128bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
1129 struct i40e_dcbx_config *old_cfg,
1130 struct i40e_dcbx_config *new_cfg);
1131#endif
1132void i40e_ptp_rx_hang(struct i40e_pf *pf);
1133void i40e_ptp_tx_hang(struct i40e_pf *pf);
1134void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
1135void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
1136void i40e_ptp_set_increment(struct i40e_pf *pf);
1137int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1138int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1139void i40e_ptp_save_hw_time(struct i40e_pf *pf);
1140void i40e_ptp_restore_hw_time(struct i40e_pf *pf);
1141void i40e_ptp_init(struct i40e_pf *pf);
1142void i40e_ptp_stop(struct i40e_pf *pf);
1143int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
1144i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
1145i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);
1146i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf);
1147void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
1148
1149void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags);
1150
1151static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
1152{
1153 return !!READ_ONCE(vsi->xdp_prog);
1154}
1155
1156int i40e_create_queue_channel(struct i40e_vsi *vsi, struct i40e_channel *ch);
1157int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate);
1158int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
1159 struct i40e_cloud_filter *filter,
1160 bool add);
1161int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
1162 struct i40e_cloud_filter *filter,
1163 bool add);
1164#endif
1165