LXR linux/drivers/video/fbdev/sis/sis.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * SiS 300/540/630[S]/730[S],
   4 * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
   5 * XGI V3XT/V5/V8, Z7
   6 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
   7 *
   8 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
   9 */
  10
  11#ifndef _SIS_H_
  12#define _SIS_H_
  13
  14#include <video/sisfb.h>
  15
  16#include "vgatypes.h"
  17#include "vstruct.h"
  18#include "init.h"
  19
  20#define VER_MAJOR               1
  21#define VER_MINOR               8
  22#define VER_LEVEL               9
  23
  24#include <linux/spinlock.h>
  25
  26#ifdef CONFIG_COMPAT
  27#define SIS_NEW_CONFIG_COMPAT
  28#endif  /* CONFIG_COMPAT */
  29
  30#undef SISFBDEBUG
  31
  32#ifdef SISFBDEBUG
  33#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
  34#define TWDEBUG(x) printk(KERN_INFO x "\n");
  35#else
  36#define DPRINTK(fmt, args...)
  37#define TWDEBUG(x)
  38#endif
  39
  40#define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
  41
  42/* To be included in pci_ids.h */
  43#ifndef PCI_DEVICE_ID_SI_650_VGA
  44#define PCI_DEVICE_ID_SI_650_VGA        0x6325
  45#endif
  46#ifndef PCI_DEVICE_ID_SI_650
  47#define PCI_DEVICE_ID_SI_650            0x0650
  48#endif
  49#ifndef PCI_DEVICE_ID_SI_651
  50#define PCI_DEVICE_ID_SI_651            0x0651
  51#endif
  52#ifndef PCI_DEVICE_ID_SI_740
  53#define PCI_DEVICE_ID_SI_740            0x0740
  54#endif
  55#ifndef PCI_DEVICE_ID_SI_330
  56#define PCI_DEVICE_ID_SI_330            0x0330
  57#endif
  58#ifndef PCI_DEVICE_ID_SI_660_VGA
  59#define PCI_DEVICE_ID_SI_660_VGA        0x6330
  60#endif
  61#ifndef PCI_DEVICE_ID_SI_661
  62#define PCI_DEVICE_ID_SI_661            0x0661
  63#endif
  64#ifndef PCI_DEVICE_ID_SI_741
  65#define PCI_DEVICE_ID_SI_741            0x0741
  66#endif
  67#ifndef PCI_DEVICE_ID_SI_660
  68#define PCI_DEVICE_ID_SI_660            0x0660
  69#endif
  70#ifndef PCI_DEVICE_ID_SI_760
  71#define PCI_DEVICE_ID_SI_760            0x0760
  72#endif
  73#ifndef PCI_DEVICE_ID_SI_761
  74#define PCI_DEVICE_ID_SI_761            0x0761
  75#endif
  76
  77#ifndef PCI_VENDOR_ID_XGI
  78#define PCI_VENDOR_ID_XGI               0x18ca
  79#endif
  80
  81#ifndef PCI_DEVICE_ID_XGI_20
  82#define PCI_DEVICE_ID_XGI_20            0x0020
  83#endif
  84
  85#ifndef PCI_DEVICE_ID_XGI_40
  86#define PCI_DEVICE_ID_XGI_40            0x0040
  87#endif
  88
  89/* To be included in fb.h */
  90#ifndef FB_ACCEL_SIS_GLAMOUR_2
  91#define FB_ACCEL_SIS_GLAMOUR_2  40      /* SiS 315, 65x, 740, 661, 741  */
  92#endif
  93#ifndef FB_ACCEL_SIS_XABRE
  94#define FB_ACCEL_SIS_XABRE      41      /* SiS 330 ("Xabre"), 76x       */
  95#endif
  96#ifndef FB_ACCEL_XGI_VOLARI_V
  97#define FB_ACCEL_XGI_VOLARI_V   47      /* XGI Volari Vx (V3XT, V5, V8) */
  98#endif
  99#ifndef FB_ACCEL_XGI_VOLARI_Z
 100#define FB_ACCEL_XGI_VOLARI_Z   48      /* XGI Volari Z7                */
 101#endif
 102
 103/* ivideo->caps */
 104#define HW_CURSOR_CAP           0x80
 105#define TURBO_QUEUE_CAP         0x40
 106#define AGP_CMD_QUEUE_CAP       0x20
 107#define VM_CMD_QUEUE_CAP        0x10
 108#define MMIO_CMD_QUEUE_CAP      0x08
 109
 110/* For 300 series */
 111#define TURBO_QUEUE_AREA_SIZE   (512 * 1024)    /* 512K */
 112#define HW_CURSOR_AREA_SIZE_300 4096            /* 4K */
 113
 114/* For 315/Xabre series */
 115#define COMMAND_QUEUE_AREA_SIZE (512 * 1024)    /* 512K */
 116#define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
 117#define HW_CURSOR_AREA_SIZE_315 16384           /* 16K */
 118#define COMMAND_QUEUE_THRESHOLD 0x1F
 119
 120#define SIS_OH_ALLOC_SIZE       4000
 121#define SENTINEL                0x7fffffff
 122
 123#define SEQ_ADR                 0x14
 124#define SEQ_DATA                0x15
 125#define DAC_ADR                 0x18
 126#define DAC_DATA                0x19
 127#define CRTC_ADR                0x24
 128#define CRTC_DATA               0x25
 129#define DAC2_ADR                (0x16-0x30)
 130#define DAC2_DATA               (0x17-0x30)
 131#define VB_PART1_ADR            (0x04-0x30)
 132#define VB_PART1_DATA           (0x05-0x30)
 133#define VB_PART2_ADR            (0x10-0x30)
 134#define VB_PART2_DATA           (0x11-0x30)
 135#define VB_PART3_ADR            (0x12-0x30)
 136#define VB_PART3_DATA           (0x13-0x30)
 137#define VB_PART4_ADR            (0x14-0x30)
 138#define VB_PART4_DATA           (0x15-0x30)
 139
 140#define SISSR                   ivideo->SiS_Pr.SiS_P3c4
 141#define SISCR                   ivideo->SiS_Pr.SiS_P3d4
 142#define SISDACA                 ivideo->SiS_Pr.SiS_P3c8
 143#define SISDACD                 ivideo->SiS_Pr.SiS_P3c9
 144#define SISPART1                ivideo->SiS_Pr.SiS_Part1Port
 145#define SISPART2                ivideo->SiS_Pr.SiS_Part2Port
 146#define SISPART3                ivideo->SiS_Pr.SiS_Part3Port
 147#define SISPART4                ivideo->SiS_Pr.SiS_Part4Port
 148#define SISPART5                ivideo->SiS_Pr.SiS_Part5Port
 149#define SISDAC2A                SISPART5
 150#define SISDAC2D                (SISPART5 + 1)
 151#define SISMISCR                (ivideo->SiS_Pr.RelIO + 0x1c)
 152#define SISMISCW                ivideo->SiS_Pr.SiS_P3c2
 153#define SISINPSTAT              (ivideo->SiS_Pr.RelIO + 0x2a)
 154#define SISPEL                  ivideo->SiS_Pr.SiS_P3c6
 155#define SISVGAENABLE            (ivideo->SiS_Pr.RelIO + 0x13)
 156#define SISVID                  (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
 157#define SISCAP                  (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
 158
 159#define IND_SIS_PASSWORD                0x05  /* SRs */
 160#define IND_SIS_COLOR_MODE              0x06
 161#define IND_SIS_RAMDAC_CONTROL          0x07
 162#define IND_SIS_DRAM_SIZE               0x14
 163#define IND_SIS_MODULE_ENABLE           0x1E
 164#define IND_SIS_PCI_ADDRESS_SET         0x20
 165#define IND_SIS_TURBOQUEUE_ADR          0x26
 166#define IND_SIS_TURBOQUEUE_SET          0x27
 167#define IND_SIS_POWER_ON_TRAP           0x38
 168#define IND_SIS_POWER_ON_TRAP2          0x39
 169#define IND_SIS_CMDQUEUE_SET            0x26
 170#define IND_SIS_CMDQUEUE_THRESHOLD      0x27
 171
 172#define IND_SIS_AGP_IO_PAD      0x48
 173
 174#define SIS_CRT2_WENABLE_300    0x24  /* Part1 */
 175#define SIS_CRT2_WENABLE_315    0x2F
 176
 177#define SIS_PASSWORD            0x86  /* SR05 */
 178
 179#define SIS_INTERLACED_MODE     0x20  /* SR06 */
 180#define SIS_8BPP_COLOR_MODE     0x0
 181#define SIS_15BPP_COLOR_MODE    0x1
 182#define SIS_16BPP_COLOR_MODE    0x2
 183#define SIS_32BPP_COLOR_MODE    0x4
 184
 185#define SIS_ENABLE_2D           0x40  /* SR1E */
 186
 187#define SIS_MEM_MAP_IO_ENABLE   0x01  /* SR20 */
 188#define SIS_PCI_ADDR_ENABLE     0x80
 189
 190#define SIS_AGP_CMDQUEUE_ENABLE         0x80  /* 315/330/340 series SR26 */
 191#define SIS_VRAM_CMDQUEUE_ENABLE        0x40
 192#define SIS_MMIO_CMD_ENABLE             0x20
 193#define SIS_CMD_QUEUE_SIZE_512k         0x00
 194#define SIS_CMD_QUEUE_SIZE_1M           0x04
 195#define SIS_CMD_QUEUE_SIZE_2M           0x08
 196#define SIS_CMD_QUEUE_SIZE_4M           0x0C
 197#define SIS_CMD_QUEUE_RESET             0x01
 198#define SIS_CMD_AUTO_CORR               0x02
 199
 200#define SIS_CMD_QUEUE_SIZE_Z7_64k       0x00 /* XGI Z7 */
 201#define SIS_CMD_QUEUE_SIZE_Z7_128k      0x04
 202
 203#define SIS_SIMULTANEOUS_VIEW_ENABLE    0x01  /* CR30 */
 204#define SIS_MODE_SELECT_CRT2            0x02
 205#define SIS_VB_OUTPUT_COMPOSITE         0x04
 206#define SIS_VB_OUTPUT_SVIDEO            0x08
 207#define SIS_VB_OUTPUT_SCART             0x10
 208#define SIS_VB_OUTPUT_LCD               0x20
 209#define SIS_VB_OUTPUT_CRT2              0x40
 210#define SIS_VB_OUTPUT_HIVISION          0x80
 211
 212#define SIS_VB_OUTPUT_DISABLE   0x20  /* CR31 */
 213#define SIS_DRIVER_MODE         0x40
 214
 215#define SIS_VB_COMPOSITE        0x01  /* CR32 */
 216#define SIS_VB_SVIDEO           0x02
 217#define SIS_VB_SCART            0x04
 218#define SIS_VB_LCD              0x08
 219#define SIS_VB_CRT2             0x10
 220#define SIS_CRT1                0x20
 221#define SIS_VB_HIVISION         0x40
 222#define SIS_VB_YPBPR            0x80
 223#define SIS_VB_TV               (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
 224                                SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
 225
 226#define SIS_EXTERNAL_CHIP_MASK                  0x0E  /* CR37 (< SiS 660) */
 227#define SIS_EXTERNAL_CHIP_SIS301                0x01  /* in CR37 << 1 ! */
 228#define SIS_EXTERNAL_CHIP_LVDS                  0x02
 229#define SIS_EXTERNAL_CHIP_TRUMPION              0x03
 230#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL         0x04
 231#define SIS_EXTERNAL_CHIP_CHRONTEL              0x05
 232#define SIS310_EXTERNAL_CHIP_LVDS               0x02
 233#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL      0x03
 234
 235#define SIS_AGP_2X              0x20  /* CR48 */
 236
 237/* vbflags, private entries (others in sisfb.h) */
 238#define VB_CONEXANT             0x00000800      /* 661 series only */
 239#define VB_TRUMPION             VB_CONEXANT     /* 300 series only */
 240#define VB_302ELV               0x00004000
 241#define VB_301                  0x00100000      /* Video bridge type */
 242#define VB_301B                 0x00200000
 243#define VB_302B                 0x00400000
 244#define VB_30xBDH               0x00800000      /* 30xB DH version (w/o LCD support) */
 245#define VB_LVDS                 0x01000000
 246#define VB_CHRONTEL             0x02000000
 247#define VB_301LV                0x04000000
 248#define VB_302LV                0x08000000
 249#define VB_301C                 0x10000000
 250
 251#define VB_SISBRIDGE            (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
 252#define VB_VIDEOBRIDGE          (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
 253
 254/* vbflags2 (static stuff only!) */
 255#define VB2_SISUMC              0x00000001
 256#define VB2_301                 0x00000002      /* Video bridge type */
 257#define VB2_301B                0x00000004
 258#define VB2_301C                0x00000008
 259#define VB2_307T                0x00000010
 260#define VB2_302B                0x00000800
 261#define VB2_301LV               0x00001000
 262#define VB2_302LV               0x00002000
 263#define VB2_302ELV              0x00004000
 264#define VB2_307LV               0x00008000
 265#define VB2_30xBDH              0x08000000      /* 30xB DH version (w/o LCD support) */
 266#define VB2_CONEXANT            0x10000000
 267#define VB2_TRUMPION            0x20000000
 268#define VB2_LVDS                0x40000000
 269#define VB2_CHRONTEL            0x80000000
 270
 271#define VB2_SISLVDSBRIDGE       (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 272#define VB2_SISTMDSBRIDGE       (VB2_301   | VB2_301B  | VB2_301C   | VB2_302B | VB2_307T)
 273#define VB2_SISBRIDGE           (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
 274
 275#define VB2_SISTMDSLCDABRIDGE   (VB2_301C | VB2_307T)
 276#define VB2_SISLCDABRIDGE       (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 277
 278#define VB2_SISHIVISIONBRIDGE   (VB2_301  | VB2_301B | VB2_302B)
 279#define VB2_SISYPBPRBRIDGE      (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
 280#define VB2_SISYPBPRARBRIDGE    (VB2_301C | VB2_307T | VB2_307LV)
 281#define VB2_SISTAP4SCALER       (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
 282#define VB2_SISTVBRIDGE         (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
 283
 284#define VB2_SISVGA2BRIDGE       (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
 285
 286#define VB2_VIDEOBRIDGE         (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
 287
 288#define VB2_30xB                (VB2_301B  | VB2_301C   | VB2_302B  | VB2_307T)
 289#define VB2_30xBLV              (VB2_30xB  | VB2_SISLVDSBRIDGE)
 290#define VB2_30xC                (VB2_301C  | VB2_307T)
 291#define VB2_30xCLV              (VB2_301C  | VB2_307T   | VB2_302ELV| VB2_307LV)
 292#define VB2_SISEMIBRIDGE        (VB2_302LV | VB2_302ELV | VB2_307LV)
 293#define VB2_LCD162MHZBRIDGE     (VB2_301C  | VB2_307T)
 294#define VB2_LCDOVER1280BRIDGE   (VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
 295#define VB2_LCDOVER1600BRIDGE   (VB2_307T  | VB2_307LV)
 296#define VB2_RAMDAC202MHZBRIDGE  (VB2_301C  | VB2_307T)
 297
 298/* I/O port access functions */
 299
 300void SiS_SetReg(SISIOADDRESS, u8, u8);
 301void SiS_SetRegByte(SISIOADDRESS, u8);
 302void SiS_SetRegShort(SISIOADDRESS, u16);
 303void SiS_SetRegLong(SISIOADDRESS, u32);
 304void SiS_SetRegANDOR(SISIOADDRESS, u8, u8, u8);
 305void SiS_SetRegAND(SISIOADDRESS, u8, u8);
 306void SiS_SetRegOR(SISIOADDRESS, u8, u8);
 307u8 SiS_GetReg(SISIOADDRESS, u8);
 308u8 SiS_GetRegByte(SISIOADDRESS);
 309u16 SiS_GetRegShort(SISIOADDRESS);
 310u32 SiS_GetRegLong(SISIOADDRESS);
 311
 312/* Chrontel TV, DDC and DPMS functions */
 313/* from init.c */
 314bool            SiSInitPtr(struct SiS_Private *SiS_Pr);
 315unsigned short  SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
 316                                int VDisplay, int Depth, bool FSTN,
 317                                unsigned short CustomT, int LCDwith, int LCDheight,
 318                                unsigned int VBFlags2);
 319unsigned short  SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
 320                                int VDisplay, int Depth, unsigned int VBFlags2);
 321unsigned short  SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
 322                                int VDisplay, int Depth, unsigned int VBFlags2);
 323
 324void            SiS_DisplayOn(struct SiS_Private *SiS_Pr);
 325void            SiS_DisplayOff(struct SiS_Private *SiS_Pr);
 326void            SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
 327void            SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
 328void            SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
 329unsigned short  SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 330                                unsigned short ModeIdIndex);
 331bool            SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
 332
 333bool            SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
 334                                unsigned short *ModeIdIndex);
 335unsigned short  SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 336                                unsigned short ModeIdIndex);
 337unsigned short  SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
 338unsigned short  SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
 339unsigned short  SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 340                                unsigned short ModeIdIndex);
 341unsigned short  SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
 342                                unsigned short ModeIdIndex, unsigned short RRTI);
 343#ifdef CONFIG_FB_SIS_300
 344void            SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
 345                                unsigned short *idx2);
 346unsigned short  SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
 347unsigned short  SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
 348#endif
 349void            SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
 350bool            SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
 351void            SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
 352void            SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 353                                unsigned short ModeIdIndex);
 354void            SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
 355                                int yres, struct fb_var_screeninfo *var, bool writeres);
 356
 357/* From init301.c: */
 358extern void             SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 359                                unsigned short ModeIdIndex, int chkcrt2mode);
 360extern void             SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 361                                unsigned short ModeIdIndex);
 362extern void             SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
 363extern void             SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 364                                unsigned short ModeIdIndex);
 365extern void             SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
 366extern void             SiS_DisableBridge(struct SiS_Private *);
 367extern bool             SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
 368extern unsigned short   SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 369                                unsigned short ModeIdIndex);
 370extern void             SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
 371extern unsigned short   SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 372                                unsigned short ModeIdIndex);
 373extern unsigned short   SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
 374extern unsigned short   SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
 375                                unsigned short ModeIdIndex, unsigned short RRTI);
 376extern bool             SiS_IsVAMode(struct SiS_Private *);
 377extern bool             SiS_IsDualEdge(struct SiS_Private *);
 378
 379#ifdef CONFIG_FB_SIS_300
 380extern unsigned int     sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 381extern void             sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
 382                                unsigned int val);
 383#endif
 384#ifdef CONFIG_FB_SIS_315
 385extern void             sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
 386                                unsigned char val);
 387extern unsigned int     sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
 388#endif
 389
 390
 391/* MMIO access macros */
 392#define MMIO_IN8(base, offset)  readb((base+offset))
 393#define MMIO_IN16(base, offset) readw((base+offset))
 394#define MMIO_IN32(base, offset) readl((base+offset))
 395
 396#define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
 397#define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
 398#define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
 399
 400/* Queue control MMIO registers */
 401#define Q_BASE_ADDR             0x85C0  /* Base address of software queue */
 402#define Q_WRITE_PTR             0x85C4  /* Current write pointer */
 403#define Q_READ_PTR              0x85C8  /* Current read pointer */
 404#define Q_STATUS                0x85CC  /* queue status */
 405
 406#define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
 407#define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
 408#define MMIO_QUEUE_READPORT     Q_READ_PTR
 409
 410#ifndef FB_BLANK_UNBLANK
 411#define FB_BLANK_UNBLANK        0
 412#endif
 413#ifndef FB_BLANK_NORMAL
 414#define FB_BLANK_NORMAL         1
 415#endif
 416#ifndef FB_BLANK_VSYNC_SUSPEND
 417#define FB_BLANK_VSYNC_SUSPEND  2
 418#endif
 419#ifndef FB_BLANK_HSYNC_SUSPEND
 420#define FB_BLANK_HSYNC_SUSPEND  3
 421#endif
 422#ifndef FB_BLANK_POWERDOWN
 423#define FB_BLANK_POWERDOWN      4
 424#endif
 425
 426enum _SIS_LCD_TYPE {
 427    LCD_INVALID = 0,
 428    LCD_800x600,
 429    LCD_1024x768,
 430    LCD_1280x1024,
 431    LCD_1280x960,
 432    LCD_640x480,
 433    LCD_1600x1200,
 434    LCD_1920x1440,
 435    LCD_2048x1536,
 436    LCD_320x240,        /* FSTN */
 437    LCD_1400x1050,
 438    LCD_1152x864,
 439    LCD_1152x768,
 440    LCD_1280x768,
 441    LCD_1024x600,
 442    LCD_320x240_2,      /* DSTN */
 443    LCD_320x240_3,      /* DSTN */
 444    LCD_848x480,
 445    LCD_1280x800,
 446    LCD_1680x1050,
 447    LCD_1280x720,
 448    LCD_1280x854,
 449    LCD_CUSTOM,
 450    LCD_UNKNOWN
 451};
 452
 453enum _SIS_CMDTYPE {
 454    MMIO_CMD = 0,
 455    AGP_CMD_QUEUE,
 456    VM_CMD_QUEUE,
 457};
 458
 459struct SIS_OH {
 460        struct SIS_OH *poh_next;
 461        struct SIS_OH *poh_prev;
 462        u32            offset;
 463        u32            size;
 464};
 465
 466struct SIS_OHALLOC {
 467        struct SIS_OHALLOC *poha_next;
 468        struct SIS_OH aoh[1];
 469};
 470
 471struct SIS_HEAP {
 472        struct SIS_OH   oh_free;
 473        struct SIS_OH   oh_used;
 474        struct SIS_OH   *poh_freelist;
 475        struct SIS_OHALLOC *poha_chain;
 476        u32             max_freesize;
 477        struct sis_video_info *vinfo;
 478};
 479
 480/* Our "par" */
 481struct sis_video_info {
 482        int             cardnumber;
 483        struct fb_info  *memyselfandi;
 484
 485        struct SiS_Private SiS_Pr;
 486
 487        struct sisfb_info sisfbinfo;    /* For ioctl SISFB_GET_INFO */
 488
 489        struct fb_var_screeninfo default_var;
 490
 491        struct fb_fix_screeninfo sisfb_fix;
 492        u32             pseudo_palette[16];
 493
 494        struct sisfb_monitor {
 495                u16 hmin;
 496                u16 hmax;
 497                u16 vmin;
 498                u16 vmax;
 499                u32 dclockmax;
 500                u8  feature;
 501                bool datavalid;
 502        }               sisfb_thismonitor;
 503
 504        unsigned short  chip_id;        /* PCI ID of chip */
 505        unsigned short  chip_vendor;    /* PCI ID of vendor */
 506        char            myid[40];
 507
 508        struct pci_dev  *nbridge;
 509        struct pci_dev  *lpcdev;
 510
 511        int             mni;    /* Mode number index */
 512
 513        unsigned long   video_size;
 514        unsigned long   video_base;
 515        unsigned long   mmio_size;
 516        unsigned long   mmio_base;
 517        unsigned long   vga_base;
 518
 519        unsigned long   video_offset;
 520
 521        unsigned long   UMAsize, LFBsize;
 522
 523        void __iomem    *video_vbase;
 524        void __iomem    *mmio_vbase;
 525
 526        unsigned char   *bios_abase;
 527
 528        int             wc_cookie;
 529
 530        u32             sisfb_mem;
 531
 532        u32             sisfb_parm_mem;
 533        int             sisfb_accel;
 534        int             sisfb_ypan;
 535        int             sisfb_max;
 536        int             sisfb_userom;
 537        int             sisfb_useoem;
 538        int             sisfb_mode_idx;
 539        int             sisfb_parm_rate;
 540        int             sisfb_crt1off;
 541        int             sisfb_forcecrt1;
 542        int             sisfb_crt2type;
 543        int             sisfb_crt2flags;
 544        int             sisfb_dstn;
 545        int             sisfb_fstn;
 546        int             sisfb_tvplug;
 547        int             sisfb_tvstd;
 548        int             sisfb_nocrt2rate;
 549
 550        u32             heapstart;              /* offset  */
 551        void __iomem    *sisfb_heap_start;      /* address */
 552        void __iomem    *sisfb_heap_end;        /* address */
 553        u32             sisfb_heap_size;
 554        int             havenoheap;
 555
 556        struct SIS_HEAP sisfb_heap;             /* This card's vram heap */
 557
 558        int             video_bpp;
 559        int             video_cmap_len;
 560        int             video_width;
 561        int             video_height;
 562        unsigned int    refresh_rate;
 563
 564        unsigned int    chip;
 565        unsigned int    chip_real_id;
 566        u8              revision_id;
 567        int             sisvga_enabled;         /* PCI device was enabled */
 568
 569        int             video_linelength;       /* real pitch */
 570        int             scrnpitchCRT1;          /* pitch regarding interlace */
 571
 572        u16             DstColor;               /* For 2d acceleration */
 573        u32             SiS310_AccelDepth;
 574        u32             CommandReg;
 575        int             cmdqueuelength;         /* Current (for accel) */
 576        u32             cmdQueueSize;           /* Total size in KB */
 577
 578        spinlock_t      lockaccel;              /* Do not use outside of kernel! */
 579
 580        unsigned int    pcibus;
 581        unsigned int    pcislot;
 582        unsigned int    pcifunc;
 583
 584        int             accel;
 585        int             engineok;
 586
 587        u16             subsysvendor;
 588        u16             subsysdevice;
 589
 590        u32             vbflags;                /* Replacing deprecated stuff from above */
 591        u32             currentvbflags;
 592        u32             vbflags2;
 593
 594        int             lcdxres, lcdyres;
 595        int             lcddefmodeidx, tvdefmodeidx, defmodeidx;
 596        u32             CRT2LCDType;            /* defined in "SIS_LCD_TYPE" */
 597        u32             curFSTN, curDSTN;
 598
 599        int             current_bpp;
 600        int             current_width;
 601        int             current_height;
 602        int             current_htotal;
 603        int             current_vtotal;
 604        int             current_linelength;
 605        __u32           current_pixclock;
 606        int             current_refresh_rate;
 607
 608        unsigned int    current_base;
 609
 610        u8              mode_no;
 611        u8              rate_idx;
 612        int             modechanged;
 613        unsigned char   modeprechange;
 614
 615        u8              sisfb_lastrates[128];
 616
 617        int             newrom;
 618        int             haveXGIROM;
 619        int             registered;
 620        int             warncount;
 621
 622        int             sisvga_engine;
 623        int             hwcursor_size;
 624        int             CRT2_write_enable;
 625        u8              caps;
 626
 627        u8              detectedpdc;
 628        u8              detectedpdca;
 629        u8              detectedlcda;
 630
 631        void __iomem    *hwcursor_vbase;
 632
 633        int             chronteltype;
 634        int             tvxpos, tvypos;
 635        u8              p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
 636        int             tvx, tvy;
 637
 638        u8              sisfblocked;
 639
 640        struct sisfb_info sisfb_infoblock;
 641
 642        struct sisfb_cmd sisfb_command;
 643
 644        u32             sisfb_id;
 645
 646        u8              sisfb_can_post;
 647        u8              sisfb_card_posted;
 648        u8              sisfb_was_boot_device;
 649
 650        struct sis_video_info *next;
 651};
 652
 653/* from sis_accel.c */
 654extern void     fbcon_sis_fillrect(struct fb_info *info,
 655                                const struct fb_fillrect *rect);
 656extern void     fbcon_sis_copyarea(struct fb_info *info,
 657                                const struct fb_copyarea *area);
 658extern int      fbcon_sis_sync(struct fb_info *info);
 659
 660/* Internal 2D accelerator functions */
 661extern int      sisfb_initaccel(struct sis_video_info *ivideo);
 662extern void     sisfb_syncaccel(struct sis_video_info *ivideo);
 663
 664/* Internal general routines */
 665#ifdef CONFIG_FB_SIS_300
 666unsigned int    sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 667void            sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
 668unsigned int    sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
 669#endif
 670#ifdef CONFIG_FB_SIS_315
 671void            sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
 672unsigned int    sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
 673#endif
 674
 675/* SiS-specific exported functions */
 676void                    sis_malloc(struct sis_memreq *req);
 677void                    sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
 678void                    sis_free(u32 base);
 679void                    sis_free_new(struct pci_dev *pdev, u32 base);
 680
 681/* Routines from init.c/init301.c */
 682extern unsigned short   SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
 683                                int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
 684                                int LCDwith, int LCDheight, unsigned int VBFlags2);
 685extern unsigned short   SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
 686                                int VDisplay, int Depth, unsigned int VBFlags2);
 687extern unsigned short   SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
 688                                int VDisplay, int Depth, unsigned int VBFlags2);
 689extern void             SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
 690extern bool             SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
 691extern void             SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
 692extern void             SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
 693
 694extern bool             SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
 695
 696extern bool             sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
 697                                int *htotal, int *vtotal, unsigned char rateindex);
 698extern int              sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
 699                                unsigned char modeno, unsigned char rateindex);
 700extern int              sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
 701                                unsigned char rateindex, struct fb_var_screeninfo *var);
 702
 703
 704#endif
 705