LXR linux/arch/microblaze/include/asm/cacheflush.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
   4 * Copyright (C) 2007-2009 PetaLogix
   5 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
   6 * based on v850 version which was
   7 * Copyright (C) 2001,02,03 NEC Electronics Corporation
   8 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
   9 */
  10
  11#ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
  12#define _ASM_MICROBLAZE_CACHEFLUSH_H
  13
  14/* Somebody depends on this; sigh... */
  15#include <linux/mm.h>
  16#include <linux/io.h>
  17
  18/* Look at Documentation/core-api/cachetlb.rst */
  19
  20/*
  21 * Cache handling functions.
  22 * Microblaze has a write-through data cache, meaning that the data cache
  23 * never needs to be flushed.  The only flushing operations that are
  24 * implemented are to invalidate the instruction cache.  These are called
  25 * after loading a user application into memory, we must invalidate the
  26 * instruction cache to make sure we don't fetch old, bad code.
  27 */
  28
  29/* struct cache, d=dcache, i=icache, fl = flush, iv = invalidate,
  30 * suffix r = range */
  31struct scache {
  32        /* icache */
  33        void (*ie)(void); /* enable */
  34        void (*id)(void); /* disable */
  35        void (*ifl)(void); /* flush */
  36        void (*iflr)(unsigned long a, unsigned long b);
  37        void (*iin)(void); /* invalidate */
  38        void (*iinr)(unsigned long a, unsigned long b);
  39        /* dcache */
  40        void (*de)(void); /* enable */
  41        void (*dd)(void); /* disable */
  42        void (*dfl)(void); /* flush */
  43        void (*dflr)(unsigned long a, unsigned long b);
  44        void (*din)(void); /* invalidate */
  45        void (*dinr)(unsigned long a, unsigned long b);
  46};
  47
  48/* microblaze cache */
  49extern struct scache *mbc;
  50
  51void microblaze_cache_init(void);
  52
  53#define enable_icache()                                 mbc->ie();
  54#define disable_icache()                                mbc->id();
  55#define flush_icache()                                  mbc->ifl();
  56#define flush_icache_range(start, end)                  mbc->iflr(start, end);
  57#define invalidate_icache()                             mbc->iin();
  58#define invalidate_icache_range(start, end)             mbc->iinr(start, end);
  59
  60#define enable_dcache()                                 mbc->de();
  61#define disable_dcache()                                mbc->dd();
  62/* FIXME for LL-temac driver */
  63#define invalidate_dcache()                             mbc->din();
  64#define invalidate_dcache_range(start, end)             mbc->dinr(start, end);
  65#define flush_dcache()                                  mbc->dfl();
  66#define flush_dcache_range(start, end)                  mbc->dflr(start, end);
  67
  68#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
  69/* MS: We have to implement it because of rootfs-jffs2 issue on WB */
  70#define flush_dcache_page(page) \
  71do { \
  72        unsigned long addr = (unsigned long) page_address(page); /* virtual */ \
  73        addr = (u32)virt_to_phys((void *)addr); \
  74        flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
  75} while (0);
  76
  77#define flush_cache_page(vma, vmaddr, pfn) \
  78        flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
  79
  80static inline void copy_to_user_page(struct vm_area_struct *vma,
  81                                     struct page *page, unsigned long vaddr,
  82                                     void *dst, void *src, int len)
  83{
  84        u32 addr = virt_to_phys(dst);
  85        memcpy(dst, src, len);
  86        if (vma->vm_flags & VM_EXEC) {
  87                invalidate_icache_range(addr, addr + PAGE_SIZE);
  88                flush_dcache_range(addr, addr + PAGE_SIZE);
  89        }
  90}
  91#define copy_to_user_page copy_to_user_page
  92
  93#include <asm-generic/cacheflush.h>
  94
  95#endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
  96