LXR linux/drivers/crypto/hisilicon/sec2/sec

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (c) 2019 HiSilicon Limited. */
   3
   4#ifndef __HISI_SEC_V2_CRYPTO_H
   5#define __HISI_SEC_V2_CRYPTO_H
   6
   7#define SEC_IV_SIZE             24
   8#define SEC_MAX_KEY_SIZE        64
   9#define SEC_COMM_SCENE          0
  10
  11enum sec_calg {
  12        SEC_CALG_3DES = 0x1,
  13        SEC_CALG_AES  = 0x2,
  14        SEC_CALG_SM4  = 0x3,
  15};
  16
  17enum sec_hash_alg {
  18        SEC_A_HMAC_SHA1   = 0x10,
  19        SEC_A_HMAC_SHA256 = 0x11,
  20        SEC_A_HMAC_SHA512 = 0x15,
  21};
  22
  23enum sec_mac_len {
  24        SEC_HMAC_SHA1_MAC   = 20,
  25        SEC_HMAC_SHA256_MAC = 32,
  26        SEC_HMAC_SHA512_MAC = 64,
  27};
  28
  29enum sec_cmode {
  30        SEC_CMODE_ECB    = 0x0,
  31        SEC_CMODE_CBC    = 0x1,
  32        SEC_CMODE_CTR    = 0x4,
  33        SEC_CMODE_XTS    = 0x7,
  34};
  35
  36enum sec_ckey_type {
  37        SEC_CKEY_128BIT = 0x0,
  38        SEC_CKEY_192BIT = 0x1,
  39        SEC_CKEY_256BIT = 0x2,
  40        SEC_CKEY_3DES_3KEY = 0x1,
  41        SEC_CKEY_3DES_2KEY = 0x3,
  42};
  43
  44enum sec_bd_type {
  45        SEC_BD_TYPE1 = 0x1,
  46        SEC_BD_TYPE2 = 0x2,
  47};
  48
  49enum sec_auth {
  50        SEC_NO_AUTH = 0x0,
  51        SEC_AUTH_TYPE1 = 0x1,
  52        SEC_AUTH_TYPE2 = 0x2,
  53};
  54
  55enum sec_cipher_dir {
  56        SEC_CIPHER_ENC = 0x1,
  57        SEC_CIPHER_DEC = 0x2,
  58};
  59
  60enum sec_addr_type {
  61        SEC_PBUF = 0x0,
  62        SEC_SGL  = 0x1,
  63        SEC_PRP  = 0x2,
  64};
  65
  66struct sec_sqe_type2 {
  67
  68        /*
  69         * mac_len: 0~4 bits
  70         * a_key_len: 5~10 bits
  71         * a_alg: 11~16 bits
  72         */
  73        __le32 mac_key_alg;
  74
  75        /*
  76         * c_icv_len: 0~5 bits
  77         * c_width: 6~8 bits
  78         * c_key_len: 9~11 bits
  79         * c_mode: 12~15 bits
  80         */
  81        __le16 icvw_kmode;
  82
  83        /* c_alg: 0~3 bits */
  84        __u8 c_alg;
  85        __u8 rsvd4;
  86
  87        /*
  88         * a_len: 0~23 bits
  89         * iv_offset_l: 24~31 bits
  90         */
  91        __le32 alen_ivllen;
  92
  93        /*
  94         * c_len: 0~23 bits
  95         * iv_offset_h: 24~31 bits
  96         */
  97        __le32 clen_ivhlen;
  98
  99        __le16 auth_src_offset;
 100        __le16 cipher_src_offset;
 101        __le16 cs_ip_header_offset;
 102        __le16 cs_udp_header_offset;
 103        __le16 pass_word_len;
 104        __le16 dk_len;
 105        __u8 salt3;
 106        __u8 salt2;
 107        __u8 salt1;
 108        __u8 salt0;
 109
 110        __le16 tag;
 111        __le16 rsvd5;
 112
 113        /*
 114         * c_pad_type: 0~3 bits
 115         * c_pad_len: 4~11 bits
 116         * c_pad_data_type: 12~15 bits
 117         */
 118        __le16 cph_pad;
 119
 120        /* c_pad_len_field: 0~1 bits */
 121        __le16 c_pad_len_field;
 122
 123
 124        __le64 long_a_data_len;
 125        __le64 a_ivin_addr;
 126        __le64 a_key_addr;
 127        __le64 mac_addr;
 128        __le64 c_ivin_addr;
 129        __le64 c_key_addr;
 130
 131        __le64 data_src_addr;
 132        __le64 data_dst_addr;
 133
 134        /*
 135         * done: 0 bit
 136         * icv: 1~3 bits
 137         * csc: 4~6 bits
 138         * flag: 7-10 bits
 139         * dif_check: 11~13 bits
 140         */
 141        __le16 done_flag;
 142
 143        __u8 error_type;
 144        __u8 warning_type;
 145        __u8 mac_i3;
 146        __u8 mac_i2;
 147        __u8 mac_i1;
 148        __u8 mac_i0;
 149        __le16 check_sum_i;
 150        __u8 tls_pad_len_i;
 151        __u8 rsvd12;
 152        __le32 counter;
 153};
 154
 155struct sec_sqe {
 156        /*
 157         * type:        0~3 bits
 158         * cipher:      4~5 bits
 159         * auth:        6~7 bit s
 160         */
 161        __u8 type_cipher_auth;
 162
 163        /*
 164         * seq: 0 bit
 165         * de:  1~2 bits
 166         * scene:       3~6 bits
 167         * src_addr_type: ~7 bit, with sdm_addr_type 0-1 bits
 168         */
 169        __u8 sds_sa_type;
 170
 171        /*
 172         * src_addr_type: 0~1 bits, not used now,
 173         * if support PRP, set this field, or set zero.
 174         * dst_addr_type: 2~4 bits
 175         * mac_addr_type: 5~7 bits
 176         */
 177        __u8 sdm_addr_type;
 178        __u8 rsvd0;
 179
 180        /*
 181         * nonce_len(type2): 0~3 bits
 182         * huk(type2): 4 bit
 183         * key_s(type2): 5 bit
 184         * ci_gen: 6~7 bits
 185         */
 186        __u8 huk_key_ci;
 187
 188        /*
 189         * ai_gen: 0~1 bits
 190         * a_pad(type2): 2~3 bits
 191         * c_s(type2): 4~5 bits
 192         */
 193        __u8 ai_apd_cs;
 194
 195        /*
 196         * rhf(type2): 0 bit
 197         * c_key_type: 1~2 bits
 198         * a_key_type: 3~4 bits
 199         * write_frame_len(type2): 5~7 bits
 200         */
 201        __u8 rca_key_frm;
 202
 203        /*
 204         * cal_iv_addr_en(type2): 0 bit
 205         * tls_up(type2): 1 bit
 206         * inveld: 7 bit
 207         */
 208        __u8 iv_tls_ld;
 209
 210        /* Just using type2 BD now */
 211        struct sec_sqe_type2 type2;
 212};
 213
 214int sec_register_to_crypto(void);
 215void sec_unregister_from_crypto(void);
 216#endif
 217