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12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/i2c.h>
15#include <linux/regmap.h>
16#include <linux/delay.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/buffer.h>
21#include <linux/iio/trigger.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24#include <linux/iio/sysfs.h>
25#include <linux/pm_runtime.h>
26
27#define RPR0521_REG_SYSTEM_CTRL 0x40
28#define RPR0521_REG_MODE_CTRL 0x41
29#define RPR0521_REG_ALS_CTRL 0x42
30#define RPR0521_REG_PXS_CTRL 0x43
31#define RPR0521_REG_PXS_DATA 0x44
32#define RPR0521_REG_ALS_DATA0 0x46
33#define RPR0521_REG_ALS_DATA1 0x48
34#define RPR0521_REG_INTERRUPT 0x4A
35#define RPR0521_REG_PS_OFFSET_LSB 0x53
36#define RPR0521_REG_ID 0x92
37
38#define RPR0521_MODE_ALS_MASK BIT(7)
39#define RPR0521_MODE_PXS_MASK BIT(6)
40#define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0)
41#define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4)
42#define RPR0521_ALS_DATA0_GAIN_SHIFT 4
43#define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2)
44#define RPR0521_ALS_DATA1_GAIN_SHIFT 2
45#define RPR0521_PXS_GAIN_MASK GENMASK(5, 4)
46#define RPR0521_PXS_GAIN_SHIFT 4
47#define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0)
48#define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0)
49#define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1)
50#define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3)
51#define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6)
52#define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7)
53
54#define RPR0521_MODE_ALS_ENABLE BIT(7)
55#define RPR0521_MODE_ALS_DISABLE 0x00
56#define RPR0521_MODE_PXS_ENABLE BIT(6)
57#define RPR0521_MODE_PXS_DISABLE 0x00
58#define RPR0521_PXS_PERSISTENCE_DRDY 0x00
59
60#define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0)
61#define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00
62#define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1)
63#define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00
64#define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3)
65#define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00
66
67#define RPR0521_MANUFACT_ID 0xE0
68#define RPR0521_DEFAULT_MEAS_TIME 0x06
69
70#define RPR0521_DRV_NAME "RPR0521"
71#define RPR0521_IRQ_NAME "rpr0521_event"
72#define RPR0521_REGMAP_NAME "rpr0521_regmap"
73
74#define RPR0521_SLEEP_DELAY_MS 2000
75
76#define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1"
77#define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1"
78
79struct rpr0521_gain {
80 int scale;
81 int uscale;
82};
83
84static const struct rpr0521_gain rpr0521_als_gain[4] = {
85 {1, 0},
86 {0, 500000},
87 {0, 15625},
88 {0, 7812},
89};
90
91static const struct rpr0521_gain rpr0521_pxs_gain[3] = {
92 {1, 0},
93 {0, 500000},
94 {0, 125000},
95};
96
97enum rpr0521_channel {
98 RPR0521_CHAN_PXS,
99 RPR0521_CHAN_ALS_DATA0,
100 RPR0521_CHAN_ALS_DATA1,
101};
102
103struct rpr0521_reg_desc {
104 u8 address;
105 u8 device_mask;
106};
107
108static const struct rpr0521_reg_desc rpr0521_data_reg[] = {
109 [RPR0521_CHAN_PXS] = {
110 .address = RPR0521_REG_PXS_DATA,
111 .device_mask = RPR0521_MODE_PXS_MASK,
112 },
113 [RPR0521_CHAN_ALS_DATA0] = {
114 .address = RPR0521_REG_ALS_DATA0,
115 .device_mask = RPR0521_MODE_ALS_MASK,
116 },
117 [RPR0521_CHAN_ALS_DATA1] = {
118 .address = RPR0521_REG_ALS_DATA1,
119 .device_mask = RPR0521_MODE_ALS_MASK,
120 },
121};
122
123static const struct rpr0521_gain_info {
124 u8 reg;
125 u8 mask;
126 u8 shift;
127 const struct rpr0521_gain *gain;
128 int size;
129} rpr0521_gain[] = {
130 [RPR0521_CHAN_PXS] = {
131 .reg = RPR0521_REG_PXS_CTRL,
132 .mask = RPR0521_PXS_GAIN_MASK,
133 .shift = RPR0521_PXS_GAIN_SHIFT,
134 .gain = rpr0521_pxs_gain,
135 .size = ARRAY_SIZE(rpr0521_pxs_gain),
136 },
137 [RPR0521_CHAN_ALS_DATA0] = {
138 .reg = RPR0521_REG_ALS_CTRL,
139 .mask = RPR0521_ALS_DATA0_GAIN_MASK,
140 .shift = RPR0521_ALS_DATA0_GAIN_SHIFT,
141 .gain = rpr0521_als_gain,
142 .size = ARRAY_SIZE(rpr0521_als_gain),
143 },
144 [RPR0521_CHAN_ALS_DATA1] = {
145 .reg = RPR0521_REG_ALS_CTRL,
146 .mask = RPR0521_ALS_DATA1_GAIN_MASK,
147 .shift = RPR0521_ALS_DATA1_GAIN_SHIFT,
148 .gain = rpr0521_als_gain,
149 .size = ARRAY_SIZE(rpr0521_als_gain),
150 },
151};
152
153struct rpr0521_samp_freq {
154 int als_hz;
155 int als_uhz;
156 int pxs_hz;
157 int pxs_uhz;
158};
159
160static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = {
161
162 {0, 0, 0, 0},
163 {0, 0, 100, 0},
164 {0, 0, 25, 0},
165 {0, 0, 10, 0},
166 {0, 0, 2, 500000},
167 {10, 0, 20, 0},
168 {10, 0, 10, 0},
169 {10, 0, 2, 500000},
170 {2, 500000, 20, 0},
171 {2, 500000, 10, 0},
172 {2, 500000, 0, 0},
173 {2, 500000, 2, 500000},
174 {20, 0, 20, 0}
175};
176
177struct rpr0521_data {
178 struct i2c_client *client;
179
180
181 struct mutex lock;
182
183
184 bool als_dev_en;
185 bool pxs_dev_en;
186
187 struct iio_trigger *drdy_trigger0;
188 s64 irq_timestamp;
189
190
191 bool als_ps_need_en;
192 bool pxs_ps_need_en;
193 bool als_need_dis;
194 bool pxs_need_dis;
195
196 struct regmap *regmap;
197};
198
199static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL);
200static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL);
201
202
203
204
205
206static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10");
207
208static struct attribute *rpr0521_attributes[] = {
209 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
210 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
211 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
212 NULL,
213};
214
215static const struct attribute_group rpr0521_attribute_group = {
216 .attrs = rpr0521_attributes,
217};
218
219
220enum rpr0521_scan_index_order {
221 RPR0521_CHAN_INDEX_PXS,
222 RPR0521_CHAN_INDEX_BOTH,
223 RPR0521_CHAN_INDEX_IR,
224};
225
226static const unsigned long rpr0521_available_scan_masks[] = {
227 BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) |
228 BIT(RPR0521_CHAN_INDEX_IR),
229 0
230};
231
232static const struct iio_chan_spec rpr0521_channels[] = {
233 {
234 .type = IIO_PROXIMITY,
235 .address = RPR0521_CHAN_PXS,
236 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
237 BIT(IIO_CHAN_INFO_OFFSET) |
238 BIT(IIO_CHAN_INFO_SCALE),
239 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
240 .scan_index = RPR0521_CHAN_INDEX_PXS,
241 .scan_type = {
242 .sign = 'u',
243 .realbits = 16,
244 .storagebits = 16,
245 .endianness = IIO_LE,
246 },
247 },
248 {
249 .type = IIO_INTENSITY,
250 .modified = 1,
251 .address = RPR0521_CHAN_ALS_DATA0,
252 .channel2 = IIO_MOD_LIGHT_BOTH,
253 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
254 BIT(IIO_CHAN_INFO_SCALE),
255 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
256 .scan_index = RPR0521_CHAN_INDEX_BOTH,
257 .scan_type = {
258 .sign = 'u',
259 .realbits = 16,
260 .storagebits = 16,
261 .endianness = IIO_LE,
262 },
263 },
264 {
265 .type = IIO_INTENSITY,
266 .modified = 1,
267 .address = RPR0521_CHAN_ALS_DATA1,
268 .channel2 = IIO_MOD_LIGHT_IR,
269 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
270 BIT(IIO_CHAN_INFO_SCALE),
271 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
272 .scan_index = RPR0521_CHAN_INDEX_IR,
273 .scan_type = {
274 .sign = 'u',
275 .realbits = 16,
276 .storagebits = 16,
277 .endianness = IIO_LE,
278 },
279 },
280};
281
282static int rpr0521_als_enable(struct rpr0521_data *data, u8 status)
283{
284 int ret;
285
286 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
287 RPR0521_MODE_ALS_MASK,
288 status);
289 if (ret < 0)
290 return ret;
291
292 if (status & RPR0521_MODE_ALS_MASK)
293 data->als_dev_en = true;
294 else
295 data->als_dev_en = false;
296
297 return 0;
298}
299
300static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status)
301{
302 int ret;
303
304 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
305 RPR0521_MODE_PXS_MASK,
306 status);
307 if (ret < 0)
308 return ret;
309
310 if (status & RPR0521_MODE_PXS_MASK)
311 data->pxs_dev_en = true;
312 else
313 data->pxs_dev_en = false;
314
315 return 0;
316}
317
318
319
320
321
322
323
324
325
326
327
328static int rpr0521_set_power_state(struct rpr0521_data *data, bool on,
329 u8 device_mask)
330{
331#ifdef CONFIG_PM
332 int ret;
333
334 if (device_mask & RPR0521_MODE_ALS_MASK) {
335 data->als_ps_need_en = on;
336 data->als_need_dis = !on;
337 }
338
339 if (device_mask & RPR0521_MODE_PXS_MASK) {
340 data->pxs_ps_need_en = on;
341 data->pxs_need_dis = !on;
342 }
343
344
345
346
347
348
349
350
351 if (on) {
352 ret = pm_runtime_get_sync(&data->client->dev);
353 } else {
354 pm_runtime_mark_last_busy(&data->client->dev);
355 ret = pm_runtime_put_autosuspend(&data->client->dev);
356 }
357 if (ret < 0) {
358 dev_err(&data->client->dev,
359 "Failed: rpr0521_set_power_state for %d, ret %d\n",
360 on, ret);
361 if (on)
362 pm_runtime_put_noidle(&data->client->dev);
363
364 return ret;
365 }
366
367 if (on) {
368
369 if (data->als_ps_need_en) {
370 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
371 if (ret)
372 return ret;
373 data->als_ps_need_en = false;
374 }
375
376 if (data->pxs_ps_need_en) {
377 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
378 if (ret)
379 return ret;
380 data->pxs_ps_need_en = false;
381 }
382 }
383#endif
384 return 0;
385}
386
387
388static inline bool rpr0521_is_triggered(struct rpr0521_data *data)
389{
390 int ret;
391 int reg;
392
393 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®);
394 if (ret < 0)
395 return false;
396 if (reg &
397 (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK |
398 RPR0521_INTERRUPT_PS_INT_STATUS_MASK))
399 return true;
400 else
401 return false;
402}
403
404
405static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private)
406{
407 struct iio_dev *indio_dev = private;
408 struct rpr0521_data *data = iio_priv(indio_dev);
409
410 data->irq_timestamp = iio_get_time_ns(indio_dev);
411
412
413
414
415
416
417 return IRQ_WAKE_THREAD;
418}
419
420static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private)
421{
422 struct iio_dev *indio_dev = private;
423 struct rpr0521_data *data = iio_priv(indio_dev);
424
425 if (rpr0521_is_triggered(data)) {
426 iio_trigger_poll_chained(data->drdy_trigger0);
427 return IRQ_HANDLED;
428 }
429
430 return IRQ_NONE;
431}
432
433static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p)
434{
435 struct iio_poll_func *pf = p;
436 struct iio_dev *indio_dev = pf->indio_dev;
437
438
439 if (!iio_trigger_using_own(indio_dev))
440 pf->timestamp = iio_get_time_ns(indio_dev);
441
442 return IRQ_WAKE_THREAD;
443}
444
445static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p)
446{
447 struct iio_poll_func *pf = p;
448 struct iio_dev *indio_dev = pf->indio_dev;
449 struct rpr0521_data *data = iio_priv(indio_dev);
450 int err;
451
452 u8 buffer[16];
453
454
455 if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) {
456 pf->timestamp = data->irq_timestamp;
457 data->irq_timestamp = 0;
458 }
459
460 if (!pf->timestamp)
461 pf->timestamp = iio_get_time_ns(indio_dev);
462
463 err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA,
464 &buffer,
465 (3 * 2) + 1);
466 if (!err)
467 iio_push_to_buffers_with_timestamp(indio_dev,
468 buffer, pf->timestamp);
469 else
470 dev_err(&data->client->dev,
471 "Trigger consumer can't read from sensor.\n");
472 pf->timestamp = 0;
473
474 iio_trigger_notify_done(indio_dev->trig);
475
476 return IRQ_HANDLED;
477}
478
479static int rpr0521_write_int_enable(struct rpr0521_data *data)
480{
481 int err;
482
483
484 err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL,
485 RPR0521_PXS_PERSISTENCE_MASK,
486 RPR0521_PXS_PERSISTENCE_DRDY);
487 if (err) {
488 dev_err(&data->client->dev, "PS control reg write fail.\n");
489 return -EBUSY;
490 }
491
492
493 err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
494 RPR0521_INTERRUPT_INT_REASSERT_DISABLE |
495 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
496 RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE
497 );
498 if (err) {
499 dev_err(&data->client->dev, "Interrupt setup write fail.\n");
500 return -EBUSY;
501 }
502
503 return 0;
504}
505
506static int rpr0521_write_int_disable(struct rpr0521_data *data)
507{
508
509 return regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
510 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
511 RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE
512 );
513}
514
515
516
517
518
519static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger,
520 bool enable_drdy)
521{
522 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger);
523 struct rpr0521_data *data = iio_priv(indio_dev);
524 int err;
525
526 if (enable_drdy)
527 err = rpr0521_write_int_enable(data);
528 else
529 err = rpr0521_write_int_disable(data);
530 if (err)
531 dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n");
532
533 return err;
534}
535
536static const struct iio_trigger_ops rpr0521_trigger_ops = {
537 .set_trigger_state = rpr0521_pxs_drdy_set_state,
538 };
539
540
541static int rpr0521_buffer_preenable(struct iio_dev *indio_dev)
542{
543 int err;
544 struct rpr0521_data *data = iio_priv(indio_dev);
545
546 mutex_lock(&data->lock);
547 err = rpr0521_set_power_state(data, true,
548 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
549 mutex_unlock(&data->lock);
550 if (err)
551 dev_err(&data->client->dev, "_buffer_preenable fail\n");
552
553 return err;
554}
555
556static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev)
557{
558 int err;
559 struct rpr0521_data *data = iio_priv(indio_dev);
560
561 mutex_lock(&data->lock);
562 err = rpr0521_set_power_state(data, false,
563 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
564 mutex_unlock(&data->lock);
565 if (err)
566 dev_err(&data->client->dev, "_buffer_postdisable fail\n");
567
568 return err;
569}
570
571static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = {
572 .preenable = rpr0521_buffer_preenable,
573 .postdisable = rpr0521_buffer_postdisable,
574};
575
576static int rpr0521_get_gain(struct rpr0521_data *data, int chan,
577 int *val, int *val2)
578{
579 int ret, reg, idx;
580
581 ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®);
582 if (ret < 0)
583 return ret;
584
585 idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift;
586 *val = rpr0521_gain[chan].gain[idx].scale;
587 *val2 = rpr0521_gain[chan].gain[idx].uscale;
588
589 return 0;
590}
591
592static int rpr0521_set_gain(struct rpr0521_data *data, int chan,
593 int val, int val2)
594{
595 int i, idx = -EINVAL;
596
597
598 for (i = 0; i < rpr0521_gain[chan].size; i++)
599 if (val == rpr0521_gain[chan].gain[i].scale &&
600 val2 == rpr0521_gain[chan].gain[i].uscale) {
601 idx = i;
602 break;
603 }
604
605 if (idx < 0)
606 return idx;
607
608 return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg,
609 rpr0521_gain[chan].mask,
610 idx << rpr0521_gain[chan].shift);
611}
612
613static int rpr0521_read_samp_freq(struct rpr0521_data *data,
614 enum iio_chan_type chan_type,
615 int *val, int *val2)
616{
617 int reg, ret;
618
619 ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®);
620 if (ret < 0)
621 return ret;
622
623 reg &= RPR0521_MODE_MEAS_TIME_MASK;
624 if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i))
625 return -EINVAL;
626
627 switch (chan_type) {
628 case IIO_INTENSITY:
629 *val = rpr0521_samp_freq_i[reg].als_hz;
630 *val2 = rpr0521_samp_freq_i[reg].als_uhz;
631 return 0;
632
633 case IIO_PROXIMITY:
634 *val = rpr0521_samp_freq_i[reg].pxs_hz;
635 *val2 = rpr0521_samp_freq_i[reg].pxs_uhz;
636 return 0;
637
638 default:
639 return -EINVAL;
640 }
641}
642
643static int rpr0521_write_samp_freq_common(struct rpr0521_data *data,
644 enum iio_chan_type chan_type,
645 int val, int val2)
646{
647 int i;
648
649
650
651
652
653 switch (val) {
654 case 0:
655 i = 0;
656 break;
657
658 case 2:
659 if (val2 != 500000)
660 return -EINVAL;
661
662 i = 11;
663 break;
664
665 case 10:
666 i = 6;
667 break;
668
669 default:
670 return -EINVAL;
671 }
672
673 return regmap_update_bits(data->regmap,
674 RPR0521_REG_MODE_CTRL,
675 RPR0521_MODE_MEAS_TIME_MASK,
676 i);
677}
678
679static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset)
680{
681 int ret;
682 __le16 buffer;
683
684 ret = regmap_bulk_read(data->regmap,
685 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
686
687 if (ret < 0) {
688 dev_err(&data->client->dev, "Failed to read PS OFFSET register\n");
689 return ret;
690 }
691 *offset = le16_to_cpu(buffer);
692
693 return ret;
694}
695
696static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset)
697{
698 int ret;
699 __le16 buffer;
700
701 buffer = cpu_to_le16(offset & 0x3ff);
702 ret = regmap_raw_write(data->regmap,
703 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
704
705 if (ret < 0) {
706 dev_err(&data->client->dev, "Failed to write PS OFFSET register\n");
707 return ret;
708 }
709
710 return ret;
711}
712
713static int rpr0521_read_raw(struct iio_dev *indio_dev,
714 struct iio_chan_spec const *chan, int *val,
715 int *val2, long mask)
716{
717 struct rpr0521_data *data = iio_priv(indio_dev);
718 int ret;
719 int busy;
720 u8 device_mask;
721 __le16 raw_data;
722
723 switch (mask) {
724 case IIO_CHAN_INFO_RAW:
725 if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY)
726 return -EINVAL;
727
728 busy = iio_device_claim_direct_mode(indio_dev);
729 if (busy)
730 return -EBUSY;
731
732 device_mask = rpr0521_data_reg[chan->address].device_mask;
733
734 mutex_lock(&data->lock);
735 ret = rpr0521_set_power_state(data, true, device_mask);
736 if (ret < 0)
737 goto rpr0521_read_raw_out;
738
739 ret = regmap_bulk_read(data->regmap,
740 rpr0521_data_reg[chan->address].address,
741 &raw_data, sizeof(raw_data));
742 if (ret < 0) {
743 rpr0521_set_power_state(data, false, device_mask);
744 goto rpr0521_read_raw_out;
745 }
746
747 ret = rpr0521_set_power_state(data, false, device_mask);
748
749rpr0521_read_raw_out:
750 mutex_unlock(&data->lock);
751 iio_device_release_direct_mode(indio_dev);
752 if (ret < 0)
753 return ret;
754
755 *val = le16_to_cpu(raw_data);
756
757 return IIO_VAL_INT;
758
759 case IIO_CHAN_INFO_SCALE:
760 mutex_lock(&data->lock);
761 ret = rpr0521_get_gain(data, chan->address, val, val2);
762 mutex_unlock(&data->lock);
763 if (ret < 0)
764 return ret;
765
766 return IIO_VAL_INT_PLUS_MICRO;
767
768 case IIO_CHAN_INFO_SAMP_FREQ:
769 mutex_lock(&data->lock);
770 ret = rpr0521_read_samp_freq(data, chan->type, val, val2);
771 mutex_unlock(&data->lock);
772 if (ret < 0)
773 return ret;
774
775 return IIO_VAL_INT_PLUS_MICRO;
776
777 case IIO_CHAN_INFO_OFFSET:
778 mutex_lock(&data->lock);
779 ret = rpr0521_read_ps_offset(data, val);
780 mutex_unlock(&data->lock);
781 if (ret < 0)
782 return ret;
783
784 return IIO_VAL_INT;
785
786 default:
787 return -EINVAL;
788 }
789}
790
791static int rpr0521_write_raw(struct iio_dev *indio_dev,
792 struct iio_chan_spec const *chan, int val,
793 int val2, long mask)
794{
795 struct rpr0521_data *data = iio_priv(indio_dev);
796 int ret;
797
798 switch (mask) {
799 case IIO_CHAN_INFO_SCALE:
800 mutex_lock(&data->lock);
801 ret = rpr0521_set_gain(data, chan->address, val, val2);
802 mutex_unlock(&data->lock);
803
804 return ret;
805
806 case IIO_CHAN_INFO_SAMP_FREQ:
807 mutex_lock(&data->lock);
808 ret = rpr0521_write_samp_freq_common(data, chan->type,
809 val, val2);
810 mutex_unlock(&data->lock);
811
812 return ret;
813
814 case IIO_CHAN_INFO_OFFSET:
815 mutex_lock(&data->lock);
816 ret = rpr0521_write_ps_offset(data, val);
817 mutex_unlock(&data->lock);
818
819 return ret;
820
821 default:
822 return -EINVAL;
823 }
824}
825
826static const struct iio_info rpr0521_info = {
827 .read_raw = rpr0521_read_raw,
828 .write_raw = rpr0521_write_raw,
829 .attrs = &rpr0521_attribute_group,
830};
831
832static int rpr0521_init(struct rpr0521_data *data)
833{
834 int ret;
835 int id;
836
837 ret = regmap_read(data->regmap, RPR0521_REG_ID, &id);
838 if (ret < 0) {
839 dev_err(&data->client->dev, "Failed to read REG_ID register\n");
840 return ret;
841 }
842
843 if (id != RPR0521_MANUFACT_ID) {
844 dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n",
845 id, RPR0521_MANUFACT_ID);
846 return -ENODEV;
847 }
848
849
850 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
851 RPR0521_MODE_MEAS_TIME_MASK,
852 RPR0521_DEFAULT_MEAS_TIME);
853 if (ret) {
854 pr_err("regmap_update_bits returned %d\n", ret);
855 return ret;
856 }
857
858#ifndef CONFIG_PM
859 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
860 if (ret < 0)
861 return ret;
862 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
863 if (ret < 0)
864 return ret;
865#endif
866
867 data->irq_timestamp = 0;
868
869 return 0;
870}
871
872static int rpr0521_poweroff(struct rpr0521_data *data)
873{
874 int ret;
875 int tmp;
876
877 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
878 RPR0521_MODE_ALS_MASK |
879 RPR0521_MODE_PXS_MASK,
880 RPR0521_MODE_ALS_DISABLE |
881 RPR0521_MODE_PXS_DISABLE);
882 if (ret < 0)
883 return ret;
884
885 data->als_dev_en = false;
886 data->pxs_dev_en = false;
887
888
889
890
891
892 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp);
893 if (ret) {
894 dev_err(&data->client->dev, "Failed to reset int pin.\n");
895 return ret;
896 }
897
898 return 0;
899}
900
901static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg)
902{
903 switch (reg) {
904 case RPR0521_REG_MODE_CTRL:
905 case RPR0521_REG_ALS_CTRL:
906 case RPR0521_REG_PXS_CTRL:
907 return false;
908 default:
909 return true;
910 }
911}
912
913static const struct regmap_config rpr0521_regmap_config = {
914 .name = RPR0521_REGMAP_NAME,
915
916 .reg_bits = 8,
917 .val_bits = 8,
918
919 .max_register = RPR0521_REG_ID,
920 .cache_type = REGCACHE_RBTREE,
921 .volatile_reg = rpr0521_is_volatile_reg,
922};
923
924static int rpr0521_probe(struct i2c_client *client,
925 const struct i2c_device_id *id)
926{
927 struct rpr0521_data *data;
928 struct iio_dev *indio_dev;
929 struct regmap *regmap;
930 int ret;
931
932 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
933 if (!indio_dev)
934 return -ENOMEM;
935
936 regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config);
937 if (IS_ERR(regmap)) {
938 dev_err(&client->dev, "regmap_init failed!\n");
939 return PTR_ERR(regmap);
940 }
941
942 data = iio_priv(indio_dev);
943 i2c_set_clientdata(client, indio_dev);
944 data->client = client;
945 data->regmap = regmap;
946
947 mutex_init(&data->lock);
948
949 indio_dev->info = &rpr0521_info;
950 indio_dev->name = RPR0521_DRV_NAME;
951 indio_dev->channels = rpr0521_channels;
952 indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels);
953 indio_dev->modes = INDIO_DIRECT_MODE;
954
955 ret = rpr0521_init(data);
956 if (ret < 0) {
957 dev_err(&client->dev, "rpr0521 chip init failed\n");
958 return ret;
959 }
960
961 ret = pm_runtime_set_active(&client->dev);
962 if (ret < 0)
963 goto err_poweroff;
964
965 pm_runtime_enable(&client->dev);
966 pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS);
967 pm_runtime_use_autosuspend(&client->dev);
968
969
970
971
972
973
974
975 if (client->irq) {
976
977 data->drdy_trigger0 = devm_iio_trigger_alloc(
978 indio_dev->dev.parent,
979 "%s-dev%d", indio_dev->name, indio_dev->id);
980 if (!data->drdy_trigger0) {
981 ret = -ENOMEM;
982 goto err_pm_disable;
983 }
984 data->drdy_trigger0->dev.parent = indio_dev->dev.parent;
985 data->drdy_trigger0->ops = &rpr0521_trigger_ops;
986 indio_dev->available_scan_masks = rpr0521_available_scan_masks;
987 iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev);
988
989
990 ret = devm_request_threaded_irq(&client->dev, client->irq,
991 rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread,
992 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
993 RPR0521_IRQ_NAME, indio_dev);
994 if (ret < 0) {
995 dev_err(&client->dev, "request irq %d for trigger0 failed\n",
996 client->irq);
997 goto err_pm_disable;
998 }
999
1000 ret = devm_iio_trigger_register(indio_dev->dev.parent,
1001 data->drdy_trigger0);
1002 if (ret) {
1003 dev_err(&client->dev, "iio trigger register failed\n");
1004 goto err_pm_disable;
1005 }
1006
1007
1008
1009
1010
1011
1012
1013 ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent,
1014 indio_dev,
1015 rpr0521_trigger_consumer_store_time,
1016 rpr0521_trigger_consumer_handler,
1017 &rpr0521_buffer_setup_ops);
1018 if (ret < 0) {
1019 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1020 goto err_pm_disable;
1021 }
1022 }
1023
1024 ret = iio_device_register(indio_dev);
1025 if (ret)
1026 goto err_pm_disable;
1027
1028 return 0;
1029
1030err_pm_disable:
1031 pm_runtime_disable(&client->dev);
1032 pm_runtime_set_suspended(&client->dev);
1033 pm_runtime_put_noidle(&client->dev);
1034err_poweroff:
1035 rpr0521_poweroff(data);
1036
1037 return ret;
1038}
1039
1040static int rpr0521_remove(struct i2c_client *client)
1041{
1042 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1043
1044 iio_device_unregister(indio_dev);
1045
1046 pm_runtime_disable(&client->dev);
1047 pm_runtime_set_suspended(&client->dev);
1048 pm_runtime_put_noidle(&client->dev);
1049
1050 rpr0521_poweroff(iio_priv(indio_dev));
1051
1052 return 0;
1053}
1054
1055#ifdef CONFIG_PM
1056static int rpr0521_runtime_suspend(struct device *dev)
1057{
1058 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1059 struct rpr0521_data *data = iio_priv(indio_dev);
1060 int ret;
1061
1062 mutex_lock(&data->lock);
1063
1064 if (!data->als_need_dis)
1065 data->als_ps_need_en = data->als_dev_en;
1066 if (!data->pxs_need_dis)
1067 data->pxs_ps_need_en = data->pxs_dev_en;
1068
1069
1070 ret = rpr0521_poweroff(data);
1071 regcache_mark_dirty(data->regmap);
1072 mutex_unlock(&data->lock);
1073
1074 return ret;
1075}
1076
1077static int rpr0521_runtime_resume(struct device *dev)
1078{
1079 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1080 struct rpr0521_data *data = iio_priv(indio_dev);
1081 int ret;
1082
1083 regcache_sync(data->regmap);
1084 if (data->als_ps_need_en) {
1085 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
1086 if (ret < 0)
1087 return ret;
1088 data->als_ps_need_en = false;
1089 }
1090
1091 if (data->pxs_ps_need_en) {
1092 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
1093 if (ret < 0)
1094 return ret;
1095 data->pxs_ps_need_en = false;
1096 }
1097 msleep(100);
1098
1099 return 0;
1100}
1101#endif
1102
1103static const struct dev_pm_ops rpr0521_pm_ops = {
1104 SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend,
1105 rpr0521_runtime_resume, NULL)
1106};
1107
1108static const struct acpi_device_id rpr0521_acpi_match[] = {
1109 {"RPR0521", 0},
1110 { }
1111};
1112MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match);
1113
1114static const struct i2c_device_id rpr0521_id[] = {
1115 {"rpr0521", 0},
1116 { }
1117};
1118
1119MODULE_DEVICE_TABLE(i2c, rpr0521_id);
1120
1121static struct i2c_driver rpr0521_driver = {
1122 .driver = {
1123 .name = RPR0521_DRV_NAME,
1124 .pm = &rpr0521_pm_ops,
1125 .acpi_match_table = ACPI_PTR(rpr0521_acpi_match),
1126 },
1127 .probe = rpr0521_probe,
1128 .remove = rpr0521_remove,
1129 .id_table = rpr0521_id,
1130};
1131
1132module_i2c_driver(rpr0521_driver);
1133
1134MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1135MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver");
1136MODULE_LICENSE("GPL v2");
1137