1
2
3
4#ifndef __HCLGE_TM_H
5#define __HCLGE_TM_H
6
7#include <linux/types.h>
8
9
10#define HCLGE_TX_MAC_PAUSE_EN_MSK BIT(0)
11#define HCLGE_RX_MAC_PAUSE_EN_MSK BIT(1)
12
13#define HCLGE_TM_PORT_BASE_MODE_MSK BIT(0)
14
15#define HCLGE_DEFAULT_PAUSE_TRANS_GAP 0x7F
16#define HCLGE_DEFAULT_PAUSE_TRANS_TIME 0xFFFF
17
18
19#define HCLGE_TM_TX_SCHD_DWRR_MSK BIT(0)
20#define HCLGE_TM_TX_SCHD_SP_MSK (0xFE)
21
22#define HCLGE_ETHER_MAX_RATE 100000
23
24struct hclge_pg_to_pri_link_cmd {
25 u8 pg_id;
26 u8 rsvd1[3];
27 u8 pri_bit_map;
28};
29
30struct hclge_qs_to_pri_link_cmd {
31 __le16 qs_id;
32 __le16 rsvd;
33 u8 priority;
34#define HCLGE_TM_QS_PRI_LINK_VLD_MSK BIT(0)
35 u8 link_vld;
36};
37
38struct hclge_nq_to_qs_link_cmd {
39 __le16 nq_id;
40 __le16 rsvd;
41#define HCLGE_TM_Q_QS_LINK_VLD_MSK BIT(10)
42 __le16 qset_id;
43};
44
45struct hclge_tqp_tx_queue_tc_cmd {
46 __le16 queue_id;
47 __le16 rsvd;
48 u8 tc_id;
49 u8 rev[3];
50};
51
52struct hclge_pg_weight_cmd {
53 u8 pg_id;
54 u8 dwrr;
55};
56
57struct hclge_priority_weight_cmd {
58 u8 pri_id;
59 u8 dwrr;
60};
61
62struct hclge_qs_weight_cmd {
63 __le16 qs_id;
64 u8 dwrr;
65};
66
67struct hclge_ets_tc_weight_cmd {
68 u8 tc_weight[HNAE3_MAX_TC];
69 u8 weight_offset;
70 u8 rsvd[15];
71};
72
73#define HCLGE_TM_SHAP_IR_B_MSK GENMASK(7, 0)
74#define HCLGE_TM_SHAP_IR_B_LSH 0
75#define HCLGE_TM_SHAP_IR_U_MSK GENMASK(11, 8)
76#define HCLGE_TM_SHAP_IR_U_LSH 8
77#define HCLGE_TM_SHAP_IR_S_MSK GENMASK(15, 12)
78#define HCLGE_TM_SHAP_IR_S_LSH 12
79#define HCLGE_TM_SHAP_BS_B_MSK GENMASK(20, 16)
80#define HCLGE_TM_SHAP_BS_B_LSH 16
81#define HCLGE_TM_SHAP_BS_S_MSK GENMASK(25, 21)
82#define HCLGE_TM_SHAP_BS_S_LSH 21
83
84enum hclge_shap_bucket {
85 HCLGE_TM_SHAP_C_BUCKET = 0,
86 HCLGE_TM_SHAP_P_BUCKET,
87};
88
89struct hclge_pri_shapping_cmd {
90 u8 pri_id;
91 u8 rsvd[3];
92 __le32 pri_shapping_para;
93};
94
95struct hclge_pg_shapping_cmd {
96 u8 pg_id;
97 u8 rsvd[3];
98 __le32 pg_shapping_para;
99};
100
101struct hclge_qs_shapping_cmd {
102 __le16 qs_id;
103 u8 rsvd[2];
104 __le32 qs_shapping_para;
105};
106
107#define HCLGE_BP_GRP_NUM 32
108#define HCLGE_BP_SUB_GRP_ID_S 0
109#define HCLGE_BP_SUB_GRP_ID_M GENMASK(4, 0)
110#define HCLGE_BP_GRP_ID_S 5
111#define HCLGE_BP_GRP_ID_M GENMASK(9, 5)
112struct hclge_bp_to_qs_map_cmd {
113 u8 tc_id;
114 u8 rsvd[2];
115 u8 qs_group_id;
116 __le32 qs_bit_map;
117 u32 rsvd1;
118};
119
120struct hclge_pfc_en_cmd {
121 u8 tx_rx_en_bitmap;
122 u8 pri_en_bitmap;
123};
124
125struct hclge_cfg_pause_param_cmd {
126 u8 mac_addr[ETH_ALEN];
127 u8 pause_trans_gap;
128 u8 rsvd;
129 __le16 pause_trans_time;
130 u8 rsvd1[6];
131
132 u8 mac_addr_extra[ETH_ALEN];
133 u16 rsvd2;
134};
135
136struct hclge_pfc_stats_cmd {
137 __le64 pkt_num[3];
138};
139
140struct hclge_port_shapping_cmd {
141 __le32 port_shapping_para;
142};
143
144struct hclge_shaper_ir_para {
145 u8 ir_b;
146 u8 ir_u;
147 u8 ir_s;
148};
149
150#define hclge_tm_set_field(dest, string, val) \
151 hnae3_set_field((dest), \
152 (HCLGE_TM_SHAP_##string##_MSK), \
153 (HCLGE_TM_SHAP_##string##_LSH), val)
154#define hclge_tm_get_field(src, string) \
155 hnae3_get_field((src), (HCLGE_TM_SHAP_##string##_MSK), \
156 (HCLGE_TM_SHAP_##string##_LSH))
157
158int hclge_tm_schd_init(struct hclge_dev *hdev);
159int hclge_tm_vport_map_update(struct hclge_dev *hdev);
160int hclge_pause_setup_hw(struct hclge_dev *hdev, bool init);
161int hclge_tm_schd_setup_hw(struct hclge_dev *hdev);
162void hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc);
163void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc);
164void hclge_tm_pfc_info_update(struct hclge_dev *hdev);
165int hclge_tm_dwrr_cfg(struct hclge_dev *hdev);
166int hclge_tm_init_hw(struct hclge_dev *hdev, bool init);
167int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx);
168int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr);
169int hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats);
170int hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats);
171int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate);
172
173#endif
174
