1
2
3
4
5
6
7#include <linux/if_ether.h>
8#include <linux/if_vlan.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_net.h>
14#include <linux/of_device.h>
15#include <linux/phy.h>
16#include <linux/platform_device.h>
17#include <linux/acpi.h>
18#include "emac.h"
19#include "emac-mac.h"
20#include "emac-phy.h"
21#include "emac-sgmii.h"
22
23#define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
24 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
25
26#define EMAC_RRD_SIZE 4
27
28#define EMAC_TS_RRD_SIZE 6
29#define EMAC_TPD_SIZE 4
30#define EMAC_RFD_SIZE 2
31
32#define REG_MAC_RX_STATUS_BIN EMAC_RXMAC_STATC_REG0
33#define REG_MAC_RX_STATUS_END EMAC_RXMAC_STATC_REG22
34#define REG_MAC_TX_STATUS_BIN EMAC_TXMAC_STATC_REG0
35#define REG_MAC_TX_STATUS_END EMAC_TXMAC_STATC_REG24
36
37#define RXQ0_NUM_RFD_PREF_DEF 8
38#define TXQ0_NUM_TPD_PREF_DEF 5
39
40#define EMAC_PREAMBLE_DEF 7
41
42#define DMAR_DLY_CNT_DEF 15
43#define DMAW_DLY_CNT_DEF 4
44
45#define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT)
46
47#define ISR_TX_PKT (\
48 TX_PKT_INT |\
49 TX_PKT_INT1 |\
50 TX_PKT_INT2 |\
51 TX_PKT_INT3)
52
53#define ISR_OVER (\
54 RFD0_UR_INT |\
55 RFD1_UR_INT |\
56 RFD2_UR_INT |\
57 RFD3_UR_INT |\
58 RFD4_UR_INT |\
59 RXF_OF_INT |\
60 TXF_UR_INT)
61
62#define ISR_ERROR (\
63 DMAR_TO_INT |\
64 DMAW_TO_INT |\
65 TXQ_TO_INT)
66
67
68static const char * const emac_clk_name[] = {
69 "axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk",
70 "rx_clk", "sys_clk"
71};
72
73void emac_reg_update32(void __iomem *addr, u32 mask, u32 val)
74{
75 u32 data = readl(addr);
76
77 writel(((data & ~mask) | val), addr);
78}
79
80
81int emac_reinit_locked(struct emac_adapter *adpt)
82{
83 int ret;
84
85 mutex_lock(&adpt->reset_lock);
86
87 emac_mac_down(adpt);
88 emac_sgmii_reset(adpt);
89 ret = emac_mac_up(adpt);
90
91 mutex_unlock(&adpt->reset_lock);
92
93 return ret;
94}
95
96
97static int emac_napi_rtx(struct napi_struct *napi, int budget)
98{
99 struct emac_rx_queue *rx_q =
100 container_of(napi, struct emac_rx_queue, napi);
101 struct emac_adapter *adpt = netdev_priv(rx_q->netdev);
102 struct emac_irq *irq = rx_q->irq;
103 int work_done = 0;
104
105 emac_mac_rx_process(adpt, rx_q, &work_done, budget);
106
107 if (work_done < budget) {
108 napi_complete_done(napi, work_done);
109
110 irq->mask |= rx_q->intr;
111 writel(irq->mask, adpt->base + EMAC_INT_MASK);
112 }
113
114 return work_done;
115}
116
117
118static netdev_tx_t emac_start_xmit(struct sk_buff *skb,
119 struct net_device *netdev)
120{
121 struct emac_adapter *adpt = netdev_priv(netdev);
122
123 return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb);
124}
125
126static irqreturn_t emac_isr(int _irq, void *data)
127{
128 struct emac_irq *irq = data;
129 struct emac_adapter *adpt =
130 container_of(irq, struct emac_adapter, irq);
131 struct emac_rx_queue *rx_q = &adpt->rx_q;
132 u32 isr, status;
133
134
135 writel(0, adpt->base + EMAC_INT_MASK);
136
137 isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
138
139 status = isr & irq->mask;
140 if (status == 0)
141 goto exit;
142
143 if (status & ISR_ERROR) {
144 net_err_ratelimited("%s: error interrupt 0x%lx\n",
145 adpt->netdev->name, status & ISR_ERROR);
146
147 schedule_work(&adpt->work_thread);
148 }
149
150
151
152
153 if (status & rx_q->intr) {
154 if (napi_schedule_prep(&rx_q->napi)) {
155 irq->mask &= ~rx_q->intr;
156 __napi_schedule(&rx_q->napi);
157 }
158 }
159
160 if (status & TX_PKT_INT)
161 emac_mac_tx_process(adpt, &adpt->tx_q);
162
163 if (status & ISR_OVER)
164 net_warn_ratelimited("%s: TX/RX overflow interrupt\n",
165 adpt->netdev->name);
166
167exit:
168
169 writel(irq->mask, adpt->base + EMAC_INT_MASK);
170
171 return IRQ_HANDLED;
172}
173
174
175static int emac_set_features(struct net_device *netdev,
176 netdev_features_t features)
177{
178 netdev_features_t changed = features ^ netdev->features;
179 struct emac_adapter *adpt = netdev_priv(netdev);
180
181
182
183
184 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX)))
185 return 0;
186
187 if (!netif_running(netdev))
188 return 0;
189
190
191
192
193 netdev->features = features;
194
195 return emac_reinit_locked(adpt);
196}
197
198
199static void emac_rx_mode_set(struct net_device *netdev)
200{
201 struct emac_adapter *adpt = netdev_priv(netdev);
202 struct netdev_hw_addr *ha;
203
204 emac_mac_mode_config(adpt);
205
206
207 emac_mac_multicast_addr_clear(adpt);
208 netdev_for_each_mc_addr(ha, netdev)
209 emac_mac_multicast_addr_set(adpt, ha->addr);
210}
211
212
213static int emac_change_mtu(struct net_device *netdev, int new_mtu)
214{
215 struct emac_adapter *adpt = netdev_priv(netdev);
216
217 netif_dbg(adpt, hw, adpt->netdev,
218 "changing MTU from %d to %d\n", netdev->mtu,
219 new_mtu);
220 netdev->mtu = new_mtu;
221
222 if (netif_running(netdev))
223 return emac_reinit_locked(adpt);
224
225 return 0;
226}
227
228
229static int emac_open(struct net_device *netdev)
230{
231 struct emac_adapter *adpt = netdev_priv(netdev);
232 struct emac_irq *irq = &adpt->irq;
233 int ret;
234
235 ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq);
236 if (ret) {
237 netdev_err(adpt->netdev, "could not request emac-core0 irq\n");
238 return ret;
239 }
240
241
242 ret = emac_mac_rx_tx_rings_alloc_all(adpt);
243 if (ret) {
244 netdev_err(adpt->netdev, "error allocating rx/tx rings\n");
245 free_irq(irq->irq, irq);
246 return ret;
247 }
248
249 ret = emac_sgmii_open(adpt);
250 if (ret) {
251 emac_mac_rx_tx_rings_free_all(adpt);
252 free_irq(irq->irq, irq);
253 return ret;
254 }
255
256 ret = emac_mac_up(adpt);
257 if (ret) {
258 emac_mac_rx_tx_rings_free_all(adpt);
259 free_irq(irq->irq, irq);
260 emac_sgmii_close(adpt);
261 return ret;
262 }
263
264 return 0;
265}
266
267
268static int emac_close(struct net_device *netdev)
269{
270 struct emac_adapter *adpt = netdev_priv(netdev);
271
272 mutex_lock(&adpt->reset_lock);
273
274 emac_sgmii_close(adpt);
275 emac_mac_down(adpt);
276 emac_mac_rx_tx_rings_free_all(adpt);
277
278 free_irq(adpt->irq.irq, &adpt->irq);
279
280 mutex_unlock(&adpt->reset_lock);
281
282 return 0;
283}
284
285
286static void emac_tx_timeout(struct net_device *netdev, unsigned int txqueue)
287{
288 struct emac_adapter *adpt = netdev_priv(netdev);
289
290 schedule_work(&adpt->work_thread);
291}
292
293
294
295
296
297
298
299
300
301
302void emac_update_hw_stats(struct emac_adapter *adpt)
303{
304 struct emac_stats *stats = &adpt->stats;
305 u64 *stats_itr = &adpt->stats.rx_ok;
306 void __iomem *base = adpt->base;
307 unsigned int addr;
308
309 addr = REG_MAC_RX_STATUS_BIN;
310 while (addr <= REG_MAC_RX_STATUS_END) {
311 *stats_itr += readl_relaxed(base + addr);
312 stats_itr++;
313 addr += sizeof(u32);
314 }
315
316
317 stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
318 stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
319
320
321 addr = REG_MAC_TX_STATUS_BIN;
322 stats_itr = &stats->tx_ok;
323
324 while (addr <= REG_MAC_TX_STATUS_END) {
325 *stats_itr += readl_relaxed(base + addr);
326 stats_itr++;
327 addr += sizeof(u32);
328 }
329
330
331 stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
332}
333
334
335static void emac_get_stats64(struct net_device *netdev,
336 struct rtnl_link_stats64 *net_stats)
337{
338 struct emac_adapter *adpt = netdev_priv(netdev);
339 struct emac_stats *stats = &adpt->stats;
340
341 spin_lock(&stats->lock);
342
343 emac_update_hw_stats(adpt);
344
345
346 net_stats->rx_packets = stats->rx_ok;
347 net_stats->tx_packets = stats->tx_ok;
348 net_stats->rx_bytes = stats->rx_byte_cnt;
349 net_stats->tx_bytes = stats->tx_byte_cnt;
350 net_stats->multicast = stats->rx_mcast;
351 net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 +
352 stats->tx_late_col + stats->tx_abort_col;
353
354 net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err +
355 stats->rx_len_err + stats->rx_sz_ov +
356 stats->rx_align_err;
357 net_stats->rx_fifo_errors = stats->rx_rxf_ov;
358 net_stats->rx_length_errors = stats->rx_len_err;
359 net_stats->rx_crc_errors = stats->rx_fcs_err;
360 net_stats->rx_frame_errors = stats->rx_align_err;
361 net_stats->rx_over_errors = stats->rx_rxf_ov;
362 net_stats->rx_missed_errors = stats->rx_rxf_ov;
363
364 net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col +
365 stats->tx_underrun + stats->tx_trunc;
366 net_stats->tx_fifo_errors = stats->tx_underrun;
367 net_stats->tx_aborted_errors = stats->tx_abort_col;
368 net_stats->tx_window_errors = stats->tx_late_col;
369
370 spin_unlock(&stats->lock);
371}
372
373static const struct net_device_ops emac_netdev_ops = {
374 .ndo_open = emac_open,
375 .ndo_stop = emac_close,
376 .ndo_validate_addr = eth_validate_addr,
377 .ndo_start_xmit = emac_start_xmit,
378 .ndo_set_mac_address = eth_mac_addr,
379 .ndo_change_mtu = emac_change_mtu,
380 .ndo_do_ioctl = phy_do_ioctl_running,
381 .ndo_tx_timeout = emac_tx_timeout,
382 .ndo_get_stats64 = emac_get_stats64,
383 .ndo_set_features = emac_set_features,
384 .ndo_set_rx_mode = emac_rx_mode_set,
385};
386
387
388static void emac_work_thread(struct work_struct *work)
389{
390 struct emac_adapter *adpt =
391 container_of(work, struct emac_adapter, work_thread);
392
393 emac_reinit_locked(adpt);
394}
395
396
397static void emac_init_adapter(struct emac_adapter *adpt)
398{
399 u32 reg;
400
401 adpt->rrd_size = EMAC_RRD_SIZE;
402 adpt->tpd_size = EMAC_TPD_SIZE;
403 adpt->rfd_size = EMAC_RFD_SIZE;
404
405
406 adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS;
407 adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS;
408
409
410 adpt->dma_order = emac_dma_ord_out;
411 adpt->dmar_block = emac_dma_req_4096;
412 adpt->dmaw_block = emac_dma_req_128;
413 adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF;
414 adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF;
415 adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF;
416 adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF;
417
418
419 reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) |
420 ((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT);
421 adpt->irq_mod = reg;
422
423
424 adpt->preamble = EMAC_PREAMBLE_DEF;
425
426
427 adpt->automatic = true;
428
429
430 adpt->single_pause_mode = false;
431}
432
433
434static int emac_clks_get(struct platform_device *pdev,
435 struct emac_adapter *adpt)
436{
437 unsigned int i;
438
439 for (i = 0; i < EMAC_CLK_CNT; i++) {
440 struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);
441
442 if (IS_ERR(clk)) {
443 dev_err(&pdev->dev,
444 "could not claim clock %s (error=%li)\n",
445 emac_clk_name[i], PTR_ERR(clk));
446
447 return PTR_ERR(clk);
448 }
449
450 adpt->clk[i] = clk;
451 }
452
453 return 0;
454}
455
456
457static int emac_clks_phase1_init(struct platform_device *pdev,
458 struct emac_adapter *adpt)
459{
460 int ret;
461
462
463
464
465 if (has_acpi_companion(&pdev->dev))
466 return 0;
467
468 ret = emac_clks_get(pdev, adpt);
469 if (ret)
470 return ret;
471
472 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);
473 if (ret)
474 return ret;
475
476 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);
477 if (ret)
478 goto disable_clk_axi;
479
480 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);
481 if (ret)
482 goto disable_clk_cfg_ahb;
483
484 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);
485 if (ret)
486 goto disable_clk_cfg_ahb;
487
488 return 0;
489
490disable_clk_cfg_ahb:
491 clk_disable_unprepare(adpt->clk[EMAC_CLK_CFG_AHB]);
492disable_clk_axi:
493 clk_disable_unprepare(adpt->clk[EMAC_CLK_AXI]);
494
495 return ret;
496}
497
498
499static int emac_clks_phase2_init(struct platform_device *pdev,
500 struct emac_adapter *adpt)
501{
502 int ret;
503
504 if (has_acpi_companion(&pdev->dev))
505 return 0;
506
507 ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);
508 if (ret)
509 return ret;
510
511 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);
512 if (ret)
513 return ret;
514
515 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);
516 if (ret)
517 return ret;
518
519 ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);
520 if (ret)
521 return ret;
522
523 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);
524 if (ret)
525 return ret;
526
527 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);
528 if (ret)
529 return ret;
530
531 return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);
532}
533
534static void emac_clks_teardown(struct emac_adapter *adpt)
535{
536
537 unsigned int i;
538
539 for (i = 0; i < EMAC_CLK_CNT; i++)
540 clk_disable_unprepare(adpt->clk[i]);
541}
542
543
544static int emac_probe_resources(struct platform_device *pdev,
545 struct emac_adapter *adpt)
546{
547 struct net_device *netdev = adpt->netdev;
548 char maddr[ETH_ALEN];
549 int ret = 0;
550
551
552 if (device_get_mac_address(&pdev->dev, maddr, ETH_ALEN))
553 ether_addr_copy(netdev->dev_addr, maddr);
554 else
555 eth_hw_addr_random(netdev);
556
557
558 ret = platform_get_irq(pdev, 0);
559 if (ret < 0)
560 return ret;
561 adpt->irq.irq = ret;
562
563
564 adpt->base = devm_platform_ioremap_resource(pdev, 0);
565 if (IS_ERR(adpt->base))
566 return PTR_ERR(adpt->base);
567
568
569 adpt->csr = devm_platform_ioremap_resource(pdev, 1);
570 if (IS_ERR(adpt->csr))
571 return PTR_ERR(adpt->csr);
572
573 netdev->base_addr = (unsigned long)adpt->base;
574
575 return 0;
576}
577
578static const struct of_device_id emac_dt_match[] = {
579 {
580 .compatible = "qcom,fsm9900-emac",
581 },
582 {}
583};
584MODULE_DEVICE_TABLE(of, emac_dt_match);
585
586#if IS_ENABLED(CONFIG_ACPI)
587static const struct acpi_device_id emac_acpi_match[] = {
588 {
589 .id = "QCOM8070",
590 },
591 {}
592};
593MODULE_DEVICE_TABLE(acpi, emac_acpi_match);
594#endif
595
596static int emac_probe(struct platform_device *pdev)
597{
598 struct net_device *netdev;
599 struct emac_adapter *adpt;
600 struct emac_sgmii *phy;
601 u16 devid, revid;
602 u32 reg;
603 int ret;
604
605
606
607
608
609 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(46));
610 if (ret) {
611 dev_err(&pdev->dev, "could not set DMA mask\n");
612 return ret;
613 }
614
615 netdev = alloc_etherdev(sizeof(struct emac_adapter));
616 if (!netdev)
617 return -ENOMEM;
618
619 dev_set_drvdata(&pdev->dev, netdev);
620 SET_NETDEV_DEV(netdev, &pdev->dev);
621 emac_set_ethtool_ops(netdev);
622
623 adpt = netdev_priv(netdev);
624 adpt->netdev = netdev;
625 adpt->msg_enable = EMAC_MSG_DEFAULT;
626
627 phy = &adpt->phy;
628 atomic_set(&phy->decode_error_count, 0);
629
630 mutex_init(&adpt->reset_lock);
631 spin_lock_init(&adpt->stats.lock);
632
633 adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK;
634
635 ret = emac_probe_resources(pdev, adpt);
636 if (ret)
637 goto err_undo_netdev;
638
639
640 ret = emac_clks_phase1_init(pdev, adpt);
641 if (ret) {
642 dev_err(&pdev->dev, "could not initialize clocks\n");
643 goto err_undo_netdev;
644 }
645
646 netdev->watchdog_timeo = EMAC_WATCHDOG_TIME;
647 netdev->irq = adpt->irq.irq;
648
649 netdev->netdev_ops = &emac_netdev_ops;
650
651 emac_init_adapter(adpt);
652
653
654 ret = emac_phy_config(pdev, adpt);
655 if (ret)
656 goto err_undo_clocks;
657
658
659 ret = emac_sgmii_config(pdev, adpt);
660 if (ret)
661 goto err_undo_mdiobus;
662
663
664 ret = emac_clks_phase2_init(pdev, adpt);
665 if (ret) {
666 dev_err(&pdev->dev, "could not initialize clocks\n");
667 goto err_undo_mdiobus;
668 }
669
670
671 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
672 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
673 NETIF_F_HW_VLAN_CTAG_TX;
674 netdev->hw_features = netdev->features;
675
676 netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM |
677 NETIF_F_TSO | NETIF_F_TSO6;
678
679
680 netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE -
681 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
682 netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE -
683 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
684
685 INIT_WORK(&adpt->work_thread, emac_work_thread);
686
687
688 emac_mac_rx_tx_ring_init_all(pdev, adpt);
689
690 netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx,
691 NAPI_POLL_WEIGHT);
692
693 ret = register_netdev(netdev);
694 if (ret) {
695 dev_err(&pdev->dev, "could not register net device\n");
696 goto err_undo_napi;
697 }
698
699 reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
700 devid = (reg & DEV_ID_NUM_BMSK) >> DEV_ID_NUM_SHFT;
701 revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT;
702 reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
703
704 netif_info(adpt, probe, netdev,
705 "hardware id %d.%d, hardware version %d.%d.%d\n",
706 devid, revid,
707 (reg & MAJOR_BMSK) >> MAJOR_SHFT,
708 (reg & MINOR_BMSK) >> MINOR_SHFT,
709 (reg & STEP_BMSK) >> STEP_SHFT);
710
711 return 0;
712
713err_undo_napi:
714 netif_napi_del(&adpt->rx_q.napi);
715err_undo_mdiobus:
716 put_device(&adpt->phydev->mdio.dev);
717 mdiobus_unregister(adpt->mii_bus);
718err_undo_clocks:
719 emac_clks_teardown(adpt);
720err_undo_netdev:
721 free_netdev(netdev);
722
723 return ret;
724}
725
726static int emac_remove(struct platform_device *pdev)
727{
728 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
729 struct emac_adapter *adpt = netdev_priv(netdev);
730
731 unregister_netdev(netdev);
732 netif_napi_del(&adpt->rx_q.napi);
733
734 emac_clks_teardown(adpt);
735
736 put_device(&adpt->phydev->mdio.dev);
737 mdiobus_unregister(adpt->mii_bus);
738 free_netdev(netdev);
739
740 if (adpt->phy.digital)
741 iounmap(adpt->phy.digital);
742 iounmap(adpt->phy.base);
743
744 return 0;
745}
746
747static void emac_shutdown(struct platform_device *pdev)
748{
749 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
750 struct emac_adapter *adpt = netdev_priv(netdev);
751
752 if (netdev->flags & IFF_UP) {
753
754 emac_sgmii_close(adpt);
755
756
757 emac_mac_reset(adpt);
758 }
759}
760
761static struct platform_driver emac_platform_driver = {
762 .probe = emac_probe,
763 .remove = emac_remove,
764 .driver = {
765 .name = "qcom-emac",
766 .of_match_table = emac_dt_match,
767 .acpi_match_table = ACPI_PTR(emac_acpi_match),
768 },
769 .shutdown = emac_shutdown,
770};
771
772module_platform_driver(emac_platform_driver);
773
774MODULE_LICENSE("GPL v2");
775MODULE_ALIAS("platform:qcom-emac");
776