linux/drivers/net/wireless/ath/ath11k/dp_rx.c
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   1// SPDX-License-Identifier: BSD-3-Clause-Clear
   2/*
   3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
   4 */
   5
   6#include <linux/ieee80211.h>
   7#include <linux/kernel.h>
   8#include <linux/skbuff.h>
   9#include <crypto/hash.h>
  10#include "core.h"
  11#include "debug.h"
  12#include "debugfs_htt_stats.h"
  13#include "debugfs_sta.h"
  14#include "hal_desc.h"
  15#include "hw.h"
  16#include "dp_rx.h"
  17#include "hal_rx.h"
  18#include "dp_tx.h"
  19#include "peer.h"
  20
  21#define ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS (2 * HZ)
  22
  23static u8 *ath11k_dp_rx_h_80211_hdr(struct hal_rx_desc *desc)
  24{
  25        return desc->hdr_status;
  26}
  27
  28static enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct hal_rx_desc *desc)
  29{
  30        if (!(__le32_to_cpu(desc->mpdu_start.info1) &
  31            RX_MPDU_START_INFO1_ENCRYPT_INFO_VALID))
  32                return HAL_ENCRYPT_TYPE_OPEN;
  33
  34        return FIELD_GET(RX_MPDU_START_INFO2_ENC_TYPE,
  35                         __le32_to_cpu(desc->mpdu_start.info2));
  36}
  37
  38static u8 ath11k_dp_rx_h_msdu_start_decap_type(struct hal_rx_desc *desc)
  39{
  40        return FIELD_GET(RX_MSDU_START_INFO2_DECAP_FORMAT,
  41                         __le32_to_cpu(desc->msdu_start.info2));
  42}
  43
  44static u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct hal_rx_desc *desc)
  45{
  46        return FIELD_GET(RX_MSDU_START_INFO2_MESH_CTRL_PRESENT,
  47                         __le32_to_cpu(desc->msdu_start.info2));
  48}
  49
  50static bool ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(struct hal_rx_desc *desc)
  51{
  52        return !!FIELD_GET(RX_MPDU_START_INFO1_MPDU_SEQ_CTRL_VALID,
  53                           __le32_to_cpu(desc->mpdu_start.info1));
  54}
  55
  56static bool ath11k_dp_rx_h_mpdu_start_fc_valid(struct hal_rx_desc *desc)
  57{
  58        return !!FIELD_GET(RX_MPDU_START_INFO1_MPDU_FCTRL_VALID,
  59                           __le32_to_cpu(desc->mpdu_start.info1));
  60}
  61
  62static bool ath11k_dp_rx_h_mpdu_start_more_frags(struct sk_buff *skb)
  63{
  64        struct ieee80211_hdr *hdr;
  65
  66        hdr = (struct ieee80211_hdr *)(skb->data + HAL_RX_DESC_SIZE);
  67        return ieee80211_has_morefrags(hdr->frame_control);
  68}
  69
  70static u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct sk_buff *skb)
  71{
  72        struct ieee80211_hdr *hdr;
  73
  74        hdr = (struct ieee80211_hdr *)(skb->data + HAL_RX_DESC_SIZE);
  75        return le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
  76}
  77
  78static u16 ath11k_dp_rx_h_mpdu_start_seq_no(struct hal_rx_desc *desc)
  79{
  80        return FIELD_GET(RX_MPDU_START_INFO1_MPDU_SEQ_NUM,
  81                         __le32_to_cpu(desc->mpdu_start.info1));
  82}
  83
  84static bool ath11k_dp_rx_h_attn_msdu_done(struct hal_rx_desc *desc)
  85{
  86        return !!FIELD_GET(RX_ATTENTION_INFO2_MSDU_DONE,
  87                           __le32_to_cpu(desc->attention.info2));
  88}
  89
  90static bool ath11k_dp_rx_h_attn_l4_cksum_fail(struct hal_rx_desc *desc)
  91{
  92        return !!FIELD_GET(RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL,
  93                           __le32_to_cpu(desc->attention.info1));
  94}
  95
  96static bool ath11k_dp_rx_h_attn_ip_cksum_fail(struct hal_rx_desc *desc)
  97{
  98        return !!FIELD_GET(RX_ATTENTION_INFO1_IP_CKSUM_FAIL,
  99                           __le32_to_cpu(desc->attention.info1));
 100}
 101
 102static bool ath11k_dp_rx_h_attn_is_decrypted(struct hal_rx_desc *desc)
 103{
 104        return (FIELD_GET(RX_ATTENTION_INFO2_DCRYPT_STATUS_CODE,
 105                          __le32_to_cpu(desc->attention.info2)) ==
 106                RX_DESC_DECRYPT_STATUS_CODE_OK);
 107}
 108
 109static u32 ath11k_dp_rx_h_attn_mpdu_err(struct hal_rx_desc *desc)
 110{
 111        u32 info = __le32_to_cpu(desc->attention.info1);
 112        u32 errmap = 0;
 113
 114        if (info & RX_ATTENTION_INFO1_FCS_ERR)
 115                errmap |= DP_RX_MPDU_ERR_FCS;
 116
 117        if (info & RX_ATTENTION_INFO1_DECRYPT_ERR)
 118                errmap |= DP_RX_MPDU_ERR_DECRYPT;
 119
 120        if (info & RX_ATTENTION_INFO1_TKIP_MIC_ERR)
 121                errmap |= DP_RX_MPDU_ERR_TKIP_MIC;
 122
 123        if (info & RX_ATTENTION_INFO1_A_MSDU_ERROR)
 124                errmap |= DP_RX_MPDU_ERR_AMSDU_ERR;
 125
 126        if (info & RX_ATTENTION_INFO1_OVERFLOW_ERR)
 127                errmap |= DP_RX_MPDU_ERR_OVERFLOW;
 128
 129        if (info & RX_ATTENTION_INFO1_MSDU_LEN_ERR)
 130                errmap |= DP_RX_MPDU_ERR_MSDU_LEN;
 131
 132        if (info & RX_ATTENTION_INFO1_MPDU_LEN_ERR)
 133                errmap |= DP_RX_MPDU_ERR_MPDU_LEN;
 134
 135        return errmap;
 136}
 137
 138static u16 ath11k_dp_rx_h_msdu_start_msdu_len(struct hal_rx_desc *desc)
 139{
 140        return FIELD_GET(RX_MSDU_START_INFO1_MSDU_LENGTH,
 141                         __le32_to_cpu(desc->msdu_start.info1));
 142}
 143
 144static u8 ath11k_dp_rx_h_msdu_start_sgi(struct hal_rx_desc *desc)
 145{
 146        return FIELD_GET(RX_MSDU_START_INFO3_SGI,
 147                         __le32_to_cpu(desc->msdu_start.info3));
 148}
 149
 150static u8 ath11k_dp_rx_h_msdu_start_rate_mcs(struct hal_rx_desc *desc)
 151{
 152        return FIELD_GET(RX_MSDU_START_INFO3_RATE_MCS,
 153                         __le32_to_cpu(desc->msdu_start.info3));
 154}
 155
 156static u8 ath11k_dp_rx_h_msdu_start_rx_bw(struct hal_rx_desc *desc)
 157{
 158        return FIELD_GET(RX_MSDU_START_INFO3_RECV_BW,
 159                         __le32_to_cpu(desc->msdu_start.info3));
 160}
 161
 162static u32 ath11k_dp_rx_h_msdu_start_freq(struct hal_rx_desc *desc)
 163{
 164        return __le32_to_cpu(desc->msdu_start.phy_meta_data);
 165}
 166
 167static u8 ath11k_dp_rx_h_msdu_start_pkt_type(struct hal_rx_desc *desc)
 168{
 169        return FIELD_GET(RX_MSDU_START_INFO3_PKT_TYPE,
 170                         __le32_to_cpu(desc->msdu_start.info3));
 171}
 172
 173static u8 ath11k_dp_rx_h_msdu_start_nss(struct hal_rx_desc *desc)
 174{
 175        u8 mimo_ss_bitmap = FIELD_GET(RX_MSDU_START_INFO3_MIMO_SS_BITMAP,
 176                                      __le32_to_cpu(desc->msdu_start.info3));
 177
 178        return hweight8(mimo_ss_bitmap);
 179}
 180
 181static u8 ath11k_dp_rx_h_mpdu_start_tid(struct hal_rx_desc *desc)
 182{
 183        return FIELD_GET(RX_MPDU_START_INFO2_TID,
 184                         __le32_to_cpu(desc->mpdu_start.info2));
 185}
 186
 187static u16 ath11k_dp_rx_h_mpdu_start_peer_id(struct hal_rx_desc *desc)
 188{
 189        return __le16_to_cpu(desc->mpdu_start.sw_peer_id);
 190}
 191
 192static u8 ath11k_dp_rx_h_msdu_end_l3pad(struct hal_rx_desc *desc)
 193{
 194        return FIELD_GET(RX_MSDU_END_INFO2_L3_HDR_PADDING,
 195                         __le32_to_cpu(desc->msdu_end.info2));
 196}
 197
 198static bool ath11k_dp_rx_h_msdu_end_first_msdu(struct hal_rx_desc *desc)
 199{
 200        return !!FIELD_GET(RX_MSDU_END_INFO2_FIRST_MSDU,
 201                           __le32_to_cpu(desc->msdu_end.info2));
 202}
 203
 204static bool ath11k_dp_rx_h_msdu_end_last_msdu(struct hal_rx_desc *desc)
 205{
 206        return !!FIELD_GET(RX_MSDU_END_INFO2_LAST_MSDU,
 207                           __le32_to_cpu(desc->msdu_end.info2));
 208}
 209
 210static void ath11k_dp_rx_desc_end_tlv_copy(struct hal_rx_desc *fdesc,
 211                                           struct hal_rx_desc *ldesc)
 212{
 213        memcpy((u8 *)&fdesc->msdu_end, (u8 *)&ldesc->msdu_end,
 214               sizeof(struct rx_msdu_end));
 215        memcpy((u8 *)&fdesc->attention, (u8 *)&ldesc->attention,
 216               sizeof(struct rx_attention));
 217        memcpy((u8 *)&fdesc->mpdu_end, (u8 *)&ldesc->mpdu_end,
 218               sizeof(struct rx_mpdu_end));
 219}
 220
 221static u32 ath11k_dp_rxdesc_get_mpdulen_err(struct hal_rx_desc *rx_desc)
 222{
 223        struct rx_attention *rx_attn;
 224
 225        rx_attn = &rx_desc->attention;
 226
 227        return FIELD_GET(RX_ATTENTION_INFO1_MPDU_LEN_ERR,
 228                         __le32_to_cpu(rx_attn->info1));
 229}
 230
 231static u32 ath11k_dp_rxdesc_get_decap_format(struct hal_rx_desc *rx_desc)
 232{
 233        struct rx_msdu_start *rx_msdu_start;
 234
 235        rx_msdu_start = &rx_desc->msdu_start;
 236
 237        return FIELD_GET(RX_MSDU_START_INFO2_DECAP_FORMAT,
 238                         __le32_to_cpu(rx_msdu_start->info2));
 239}
 240
 241static u8 *ath11k_dp_rxdesc_get_80211hdr(struct hal_rx_desc *rx_desc)
 242{
 243        u8 *rx_pkt_hdr;
 244
 245        rx_pkt_hdr = &rx_desc->msdu_payload[0];
 246
 247        return rx_pkt_hdr;
 248}
 249
 250static bool ath11k_dp_rxdesc_mpdu_valid(struct hal_rx_desc *rx_desc)
 251{
 252        u32 tlv_tag;
 253
 254        tlv_tag = FIELD_GET(HAL_TLV_HDR_TAG,
 255                            __le32_to_cpu(rx_desc->mpdu_start_tag));
 256
 257        return tlv_tag == HAL_RX_MPDU_START;
 258}
 259
 260static u32 ath11k_dp_rxdesc_get_ppduid(struct hal_rx_desc *rx_desc)
 261{
 262        return __le16_to_cpu(rx_desc->mpdu_start.phy_ppdu_id);
 263}
 264
 265static void ath11k_dp_service_mon_ring(struct timer_list *t)
 266{
 267        struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);
 268        int i;
 269
 270        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)
 271                ath11k_dp_rx_process_mon_rings(ab, i, NULL, DP_MON_SERVICE_BUDGET);
 272
 273        mod_timer(&ab->mon_reap_timer, jiffies +
 274                  msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
 275}
 276
 277/* Returns number of Rx buffers replenished */
 278int ath11k_dp_rxbufs_replenish(struct ath11k_base *ab, int mac_id,
 279                               struct dp_rxdma_ring *rx_ring,
 280                               int req_entries,
 281                               enum hal_rx_buf_return_buf_manager mgr)
 282{
 283        struct hal_srng *srng;
 284        u32 *desc;
 285        struct sk_buff *skb;
 286        int num_free;
 287        int num_remain;
 288        int buf_id;
 289        u32 cookie;
 290        dma_addr_t paddr;
 291
 292        req_entries = min(req_entries, rx_ring->bufs_max);
 293
 294        srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
 295
 296        spin_lock_bh(&srng->lock);
 297
 298        ath11k_hal_srng_access_begin(ab, srng);
 299
 300        num_free = ath11k_hal_srng_src_num_free(ab, srng, true);
 301        if (!req_entries && (num_free > (rx_ring->bufs_max * 3) / 4))
 302                req_entries = num_free;
 303
 304        req_entries = min(num_free, req_entries);
 305        num_remain = req_entries;
 306
 307        while (num_remain > 0) {
 308                skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +
 309                                    DP_RX_BUFFER_ALIGN_SIZE);
 310                if (!skb)
 311                        break;
 312
 313                if (!IS_ALIGNED((unsigned long)skb->data,
 314                                DP_RX_BUFFER_ALIGN_SIZE)) {
 315                        skb_pull(skb,
 316                                 PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -
 317                                 skb->data);
 318                }
 319
 320                paddr = dma_map_single(ab->dev, skb->data,
 321                                       skb->len + skb_tailroom(skb),
 322                                       DMA_FROM_DEVICE);
 323                if (dma_mapping_error(ab->dev, paddr))
 324                        goto fail_free_skb;
 325
 326                spin_lock_bh(&rx_ring->idr_lock);
 327                buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
 328                                   rx_ring->bufs_max * 3, GFP_ATOMIC);
 329                spin_unlock_bh(&rx_ring->idr_lock);
 330                if (buf_id < 0)
 331                        goto fail_dma_unmap;
 332
 333                desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
 334                if (!desc)
 335                        goto fail_idr_remove;
 336
 337                ATH11K_SKB_RXCB(skb)->paddr = paddr;
 338
 339                cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
 340                         FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
 341
 342                num_remain--;
 343
 344                ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);
 345        }
 346
 347        ath11k_hal_srng_access_end(ab, srng);
 348
 349        spin_unlock_bh(&srng->lock);
 350
 351        return req_entries - num_remain;
 352
 353fail_idr_remove:
 354        spin_lock_bh(&rx_ring->idr_lock);
 355        idr_remove(&rx_ring->bufs_idr, buf_id);
 356        spin_unlock_bh(&rx_ring->idr_lock);
 357fail_dma_unmap:
 358        dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
 359                         DMA_FROM_DEVICE);
 360fail_free_skb:
 361        dev_kfree_skb_any(skb);
 362
 363        ath11k_hal_srng_access_end(ab, srng);
 364
 365        spin_unlock_bh(&srng->lock);
 366
 367        return req_entries - num_remain;
 368}
 369
 370static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,
 371                                         struct dp_rxdma_ring *rx_ring)
 372{
 373        struct ath11k_pdev_dp *dp = &ar->dp;
 374        struct sk_buff *skb;
 375        int buf_id;
 376
 377        spin_lock_bh(&rx_ring->idr_lock);
 378        idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
 379                idr_remove(&rx_ring->bufs_idr, buf_id);
 380                /* TODO: Understand where internal driver does this dma_unmap of
 381                 * of rxdma_buffer.
 382                 */
 383                dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
 384                                 skb->len + skb_tailroom(skb), DMA_FROM_DEVICE);
 385                dev_kfree_skb_any(skb);
 386        }
 387
 388        idr_destroy(&rx_ring->bufs_idr);
 389        spin_unlock_bh(&rx_ring->idr_lock);
 390
 391        /* if rxdma1_enable is false, mon_status_refill_ring
 392         * isn't setup, so don't clean.
 393         */
 394        if (!ar->ab->hw_params.rxdma1_enable)
 395                return 0;
 396
 397        rx_ring = &dp->rx_mon_status_refill_ring[0];
 398
 399        spin_lock_bh(&rx_ring->idr_lock);
 400        idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
 401                idr_remove(&rx_ring->bufs_idr, buf_id);
 402                /* XXX: Understand where internal driver does this dma_unmap of
 403                 * of rxdma_buffer.
 404                 */
 405                dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
 406                                 skb->len + skb_tailroom(skb), DMA_BIDIRECTIONAL);
 407                dev_kfree_skb_any(skb);
 408        }
 409
 410        idr_destroy(&rx_ring->bufs_idr);
 411        spin_unlock_bh(&rx_ring->idr_lock);
 412
 413        return 0;
 414}
 415
 416static int ath11k_dp_rxdma_pdev_buf_free(struct ath11k *ar)
 417{
 418        struct ath11k_pdev_dp *dp = &ar->dp;
 419        struct ath11k_base *ab = ar->ab;
 420        struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
 421        int i;
 422
 423        ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
 424
 425        rx_ring = &dp->rxdma_mon_buf_ring;
 426        ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
 427
 428        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 429                rx_ring = &dp->rx_mon_status_refill_ring[i];
 430                ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
 431        }
 432
 433        return 0;
 434}
 435
 436static int ath11k_dp_rxdma_ring_buf_setup(struct ath11k *ar,
 437                                          struct dp_rxdma_ring *rx_ring,
 438                                          u32 ringtype)
 439{
 440        struct ath11k_pdev_dp *dp = &ar->dp;
 441        int num_entries;
 442
 443        num_entries = rx_ring->refill_buf_ring.size /
 444                ath11k_hal_srng_get_entrysize(ar->ab, ringtype);
 445
 446        rx_ring->bufs_max = num_entries;
 447        ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id, rx_ring, num_entries,
 448                                   HAL_RX_BUF_RBM_SW3_BM);
 449        return 0;
 450}
 451
 452static int ath11k_dp_rxdma_pdev_buf_setup(struct ath11k *ar)
 453{
 454        struct ath11k_pdev_dp *dp = &ar->dp;
 455        struct ath11k_base *ab = ar->ab;
 456        struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
 457        int i;
 458
 459        ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_BUF);
 460
 461        if (ar->ab->hw_params.rxdma1_enable) {
 462                rx_ring = &dp->rxdma_mon_buf_ring;
 463                ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_BUF);
 464        }
 465
 466        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 467                rx_ring = &dp->rx_mon_status_refill_ring[i];
 468                ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_STATUS);
 469        }
 470
 471        return 0;
 472}
 473
 474static void ath11k_dp_rx_pdev_srng_free(struct ath11k *ar)
 475{
 476        struct ath11k_pdev_dp *dp = &ar->dp;
 477        struct ath11k_base *ab = ar->ab;
 478        int i;
 479
 480        ath11k_dp_srng_cleanup(ab, &dp->rx_refill_buf_ring.refill_buf_ring);
 481
 482        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 483                if (ab->hw_params.rx_mac_buf_ring)
 484                        ath11k_dp_srng_cleanup(ab, &dp->rx_mac_buf_ring[i]);
 485
 486                ath11k_dp_srng_cleanup(ab, &dp->rxdma_err_dst_ring[i]);
 487                ath11k_dp_srng_cleanup(ab,
 488                                       &dp->rx_mon_status_refill_ring[i].refill_buf_ring);
 489        }
 490
 491        ath11k_dp_srng_cleanup(ab, &dp->rxdma_mon_buf_ring.refill_buf_ring);
 492}
 493
 494void ath11k_dp_pdev_reo_cleanup(struct ath11k_base *ab)
 495{
 496        struct ath11k_dp *dp = &ab->dp;
 497        int i;
 498
 499        for (i = 0; i < DP_REO_DST_RING_MAX; i++)
 500                ath11k_dp_srng_cleanup(ab, &dp->reo_dst_ring[i]);
 501}
 502
 503int ath11k_dp_pdev_reo_setup(struct ath11k_base *ab)
 504{
 505        struct ath11k_dp *dp = &ab->dp;
 506        int ret;
 507        int i;
 508
 509        for (i = 0; i < DP_REO_DST_RING_MAX; i++) {
 510                ret = ath11k_dp_srng_setup(ab, &dp->reo_dst_ring[i],
 511                                           HAL_REO_DST, i, 0,
 512                                           DP_REO_DST_RING_SIZE);
 513                if (ret) {
 514                        ath11k_warn(ab, "failed to setup reo_dst_ring\n");
 515                        goto err_reo_cleanup;
 516                }
 517        }
 518
 519        return 0;
 520
 521err_reo_cleanup:
 522        ath11k_dp_pdev_reo_cleanup(ab);
 523
 524        return ret;
 525}
 526
 527static int ath11k_dp_rx_pdev_srng_alloc(struct ath11k *ar)
 528{
 529        struct ath11k_pdev_dp *dp = &ar->dp;
 530        struct ath11k_base *ab = ar->ab;
 531        struct dp_srng *srng = NULL;
 532        int i;
 533        int ret;
 534
 535        ret = ath11k_dp_srng_setup(ar->ab,
 536                                   &dp->rx_refill_buf_ring.refill_buf_ring,
 537                                   HAL_RXDMA_BUF, 0,
 538                                   dp->mac_id, DP_RXDMA_BUF_RING_SIZE);
 539        if (ret) {
 540                ath11k_warn(ar->ab, "failed to setup rx_refill_buf_ring\n");
 541                return ret;
 542        }
 543
 544        if (ar->ab->hw_params.rx_mac_buf_ring) {
 545                for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 546                        ret = ath11k_dp_srng_setup(ar->ab,
 547                                                   &dp->rx_mac_buf_ring[i],
 548                                                   HAL_RXDMA_BUF, 1,
 549                                                   dp->mac_id + i, 1024);
 550                        if (ret) {
 551                                ath11k_warn(ar->ab, "failed to setup rx_mac_buf_ring %d\n",
 552                                            i);
 553                                return ret;
 554                        }
 555                }
 556        }
 557
 558        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 559                ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_err_dst_ring[i],
 560                                           HAL_RXDMA_DST, 0, dp->mac_id + i,
 561                                           DP_RXDMA_ERR_DST_RING_SIZE);
 562                if (ret) {
 563                        ath11k_warn(ar->ab, "failed to setup rxdma_err_dst_ring %d\n", i);
 564                        return ret;
 565                }
 566        }
 567
 568        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
 569                srng = &dp->rx_mon_status_refill_ring[i].refill_buf_ring;
 570                ret = ath11k_dp_srng_setup(ar->ab,
 571                                           srng,
 572                                           HAL_RXDMA_MONITOR_STATUS, 0, dp->mac_id + i,
 573                                           DP_RXDMA_MON_STATUS_RING_SIZE);
 574                if (ret) {
 575                        ath11k_warn(ar->ab,
 576                                    "failed to setup rx_mon_status_refill_ring %d\n", i);
 577                        return ret;
 578                }
 579        }
 580
 581        /* if rxdma1_enable is false, then it doesn't need
 582         * to setup rxdam_mon_buf_ring, rxdma_mon_dst_ring
 583         * and rxdma_mon_desc_ring.
 584         * init reap timer for QCA6390.
 585         */
 586        if (!ar->ab->hw_params.rxdma1_enable) {
 587                //init mon status buffer reap timer
 588                timer_setup(&ar->ab->mon_reap_timer,
 589                            ath11k_dp_service_mon_ring, 0);
 590                return 0;
 591        }
 592
 593        ret = ath11k_dp_srng_setup(ar->ab,
 594                                   &dp->rxdma_mon_buf_ring.refill_buf_ring,
 595                                   HAL_RXDMA_MONITOR_BUF, 0, dp->mac_id,
 596                                   DP_RXDMA_MONITOR_BUF_RING_SIZE);
 597        if (ret) {
 598                ath11k_warn(ar->ab,
 599                            "failed to setup HAL_RXDMA_MONITOR_BUF\n");
 600                return ret;
 601        }
 602
 603        ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_dst_ring,
 604                                   HAL_RXDMA_MONITOR_DST, 0, dp->mac_id,
 605                                   DP_RXDMA_MONITOR_DST_RING_SIZE);
 606        if (ret) {
 607                ath11k_warn(ar->ab,
 608                            "failed to setup HAL_RXDMA_MONITOR_DST\n");
 609                return ret;
 610        }
 611
 612        ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_desc_ring,
 613                                   HAL_RXDMA_MONITOR_DESC, 0, dp->mac_id,
 614                                   DP_RXDMA_MONITOR_DESC_RING_SIZE);
 615        if (ret) {
 616                ath11k_warn(ar->ab,
 617                            "failed to setup HAL_RXDMA_MONITOR_DESC\n");
 618                return ret;
 619        }
 620
 621        return 0;
 622}
 623
 624void ath11k_dp_reo_cmd_list_cleanup(struct ath11k_base *ab)
 625{
 626        struct ath11k_dp *dp = &ab->dp;
 627        struct dp_reo_cmd *cmd, *tmp;
 628        struct dp_reo_cache_flush_elem *cmd_cache, *tmp_cache;
 629
 630        spin_lock_bh(&dp->reo_cmd_lock);
 631        list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
 632                list_del(&cmd->list);
 633                dma_unmap_single(ab->dev, cmd->data.paddr,
 634                                 cmd->data.size, DMA_BIDIRECTIONAL);
 635                kfree(cmd->data.vaddr);
 636                kfree(cmd);
 637        }
 638
 639        list_for_each_entry_safe(cmd_cache, tmp_cache,
 640                                 &dp->reo_cmd_cache_flush_list, list) {
 641                list_del(&cmd_cache->list);
 642                dp->reo_cmd_cache_flush_count--;
 643                dma_unmap_single(ab->dev, cmd_cache->data.paddr,
 644                                 cmd_cache->data.size, DMA_BIDIRECTIONAL);
 645                kfree(cmd_cache->data.vaddr);
 646                kfree(cmd_cache);
 647        }
 648        spin_unlock_bh(&dp->reo_cmd_lock);
 649}
 650
 651static void ath11k_dp_reo_cmd_free(struct ath11k_dp *dp, void *ctx,
 652                                   enum hal_reo_cmd_status status)
 653{
 654        struct dp_rx_tid *rx_tid = ctx;
 655
 656        if (status != HAL_REO_CMD_SUCCESS)
 657                ath11k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n",
 658                            rx_tid->tid, status);
 659
 660        dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
 661                         DMA_BIDIRECTIONAL);
 662        kfree(rx_tid->vaddr);
 663}
 664
 665static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,
 666                                      struct dp_rx_tid *rx_tid)
 667{
 668        struct ath11k_hal_reo_cmd cmd = {0};
 669        unsigned long tot_desc_sz, desc_sz;
 670        int ret;
 671
 672        tot_desc_sz = rx_tid->size;
 673        desc_sz = ath11k_hal_reo_qdesc_size(0, HAL_DESC_REO_NON_QOS_TID);
 674
 675        while (tot_desc_sz > desc_sz) {
 676                tot_desc_sz -= desc_sz;
 677                cmd.addr_lo = lower_32_bits(rx_tid->paddr + tot_desc_sz);
 678                cmd.addr_hi = upper_32_bits(rx_tid->paddr);
 679                ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
 680                                                HAL_REO_CMD_FLUSH_CACHE, &cmd,
 681                                                NULL);
 682                if (ret)
 683                        ath11k_warn(ab,
 684                                    "failed to send HAL_REO_CMD_FLUSH_CACHE, tid %d (%d)\n",
 685                                    rx_tid->tid, ret);
 686        }
 687
 688        memset(&cmd, 0, sizeof(cmd));
 689        cmd.addr_lo = lower_32_bits(rx_tid->paddr);
 690        cmd.addr_hi = upper_32_bits(rx_tid->paddr);
 691        cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;
 692        ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
 693                                        HAL_REO_CMD_FLUSH_CACHE,
 694                                        &cmd, ath11k_dp_reo_cmd_free);
 695        if (ret) {
 696                ath11k_err(ab, "failed to send HAL_REO_CMD_FLUSH_CACHE cmd, tid %d (%d)\n",
 697                           rx_tid->tid, ret);
 698                dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
 699                                 DMA_BIDIRECTIONAL);
 700                kfree(rx_tid->vaddr);
 701        }
 702}
 703
 704static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx,
 705                                      enum hal_reo_cmd_status status)
 706{
 707        struct ath11k_base *ab = dp->ab;
 708        struct dp_rx_tid *rx_tid = ctx;
 709        struct dp_reo_cache_flush_elem *elem, *tmp;
 710
 711        if (status == HAL_REO_CMD_DRAIN) {
 712                goto free_desc;
 713        } else if (status != HAL_REO_CMD_SUCCESS) {
 714                /* Shouldn't happen! Cleanup in case of other failure? */
 715                ath11k_warn(ab, "failed to delete rx tid %d hw descriptor %d\n",
 716                            rx_tid->tid, status);
 717                return;
 718        }
 719
 720        elem = kzalloc(sizeof(*elem), GFP_ATOMIC);
 721        if (!elem)
 722                goto free_desc;
 723
 724        elem->ts = jiffies;
 725        memcpy(&elem->data, rx_tid, sizeof(*rx_tid));
 726
 727        spin_lock_bh(&dp->reo_cmd_lock);
 728        list_add_tail(&elem->list, &dp->reo_cmd_cache_flush_list);
 729        dp->reo_cmd_cache_flush_count++;
 730
 731        /* Flush and invalidate aged REO desc from HW cache */
 732        list_for_each_entry_safe(elem, tmp, &dp->reo_cmd_cache_flush_list,
 733                                 list) {
 734                if (dp->reo_cmd_cache_flush_count > DP_REO_DESC_FREE_THRESHOLD ||
 735                    time_after(jiffies, elem->ts +
 736                               msecs_to_jiffies(DP_REO_DESC_FREE_TIMEOUT_MS))) {
 737                        list_del(&elem->list);
 738                        dp->reo_cmd_cache_flush_count--;
 739                        spin_unlock_bh(&dp->reo_cmd_lock);
 740
 741                        ath11k_dp_reo_cache_flush(ab, &elem->data);
 742                        kfree(elem);
 743                        spin_lock_bh(&dp->reo_cmd_lock);
 744                }
 745        }
 746        spin_unlock_bh(&dp->reo_cmd_lock);
 747
 748        return;
 749free_desc:
 750        dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
 751                         DMA_BIDIRECTIONAL);
 752        kfree(rx_tid->vaddr);
 753}
 754
 755void ath11k_peer_rx_tid_delete(struct ath11k *ar,
 756                               struct ath11k_peer *peer, u8 tid)
 757{
 758        struct ath11k_hal_reo_cmd cmd = {0};
 759        struct dp_rx_tid *rx_tid = &peer->rx_tid[tid];
 760        int ret;
 761
 762        if (!rx_tid->active)
 763                return;
 764
 765        cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
 766        cmd.addr_lo = lower_32_bits(rx_tid->paddr);
 767        cmd.addr_hi = upper_32_bits(rx_tid->paddr);
 768        cmd.upd0 |= HAL_REO_CMD_UPD0_VLD;
 769        ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,
 770                                        HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,
 771                                        ath11k_dp_rx_tid_del_func);
 772        if (ret) {
 773                ath11k_err(ar->ab, "failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid %d (%d)\n",
 774                           tid, ret);
 775                dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size,
 776                                 DMA_BIDIRECTIONAL);
 777                kfree(rx_tid->vaddr);
 778        }
 779
 780        rx_tid->active = false;
 781}
 782
 783static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,
 784                                         u32 *link_desc,
 785                                         enum hal_wbm_rel_bm_act action)
 786{
 787        struct ath11k_dp *dp = &ab->dp;
 788        struct hal_srng *srng;
 789        u32 *desc;
 790        int ret = 0;
 791
 792        srng = &ab->hal.srng_list[dp->wbm_desc_rel_ring.ring_id];
 793
 794        spin_lock_bh(&srng->lock);
 795
 796        ath11k_hal_srng_access_begin(ab, srng);
 797
 798        desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
 799        if (!desc) {
 800                ret = -ENOBUFS;
 801                goto exit;
 802        }
 803
 804        ath11k_hal_rx_msdu_link_desc_set(ab, (void *)desc, (void *)link_desc,
 805                                         action);
 806
 807exit:
 808        ath11k_hal_srng_access_end(ab, srng);
 809
 810        spin_unlock_bh(&srng->lock);
 811
 812        return ret;
 813}
 814
 815static void ath11k_dp_rx_frags_cleanup(struct dp_rx_tid *rx_tid, bool rel_link_desc)
 816{
 817        struct ath11k_base *ab = rx_tid->ab;
 818
 819        lockdep_assert_held(&ab->base_lock);
 820
 821        if (rx_tid->dst_ring_desc) {
 822                if (rel_link_desc)
 823                        ath11k_dp_rx_link_desc_return(ab, (u32 *)rx_tid->dst_ring_desc,
 824                                                      HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
 825                kfree(rx_tid->dst_ring_desc);
 826                rx_tid->dst_ring_desc = NULL;
 827        }
 828
 829        rx_tid->cur_sn = 0;
 830        rx_tid->last_frag_no = 0;
 831        rx_tid->rx_frag_bitmap = 0;
 832        __skb_queue_purge(&rx_tid->rx_frags);
 833}
 834
 835void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer)
 836{
 837        struct dp_rx_tid *rx_tid;
 838        int i;
 839
 840        lockdep_assert_held(&ar->ab->base_lock);
 841
 842        for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {
 843                rx_tid = &peer->rx_tid[i];
 844
 845                ath11k_peer_rx_tid_delete(ar, peer, i);
 846                ath11k_dp_rx_frags_cleanup(rx_tid, true);
 847
 848                spin_unlock_bh(&ar->ab->base_lock);
 849                del_timer_sync(&rx_tid->frag_timer);
 850                spin_lock_bh(&ar->ab->base_lock);
 851        }
 852}
 853
 854static int ath11k_peer_rx_tid_reo_update(struct ath11k *ar,
 855                                         struct ath11k_peer *peer,
 856                                         struct dp_rx_tid *rx_tid,
 857                                         u32 ba_win_sz, u16 ssn,
 858                                         bool update_ssn)
 859{
 860        struct ath11k_hal_reo_cmd cmd = {0};
 861        int ret;
 862
 863        cmd.addr_lo = lower_32_bits(rx_tid->paddr);
 864        cmd.addr_hi = upper_32_bits(rx_tid->paddr);
 865        cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
 866        cmd.upd0 = HAL_REO_CMD_UPD0_BA_WINDOW_SIZE;
 867        cmd.ba_window_size = ba_win_sz;
 868
 869        if (update_ssn) {
 870                cmd.upd0 |= HAL_REO_CMD_UPD0_SSN;
 871                cmd.upd2 = FIELD_PREP(HAL_REO_CMD_UPD2_SSN, ssn);
 872        }
 873
 874        ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,
 875                                        HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,
 876                                        NULL);
 877        if (ret) {
 878                ath11k_warn(ar->ab, "failed to update rx tid queue, tid %d (%d)\n",
 879                            rx_tid->tid, ret);
 880                return ret;
 881        }
 882
 883        rx_tid->ba_win_sz = ba_win_sz;
 884
 885        return 0;
 886}
 887
 888static void ath11k_dp_rx_tid_mem_free(struct ath11k_base *ab,
 889                                      const u8 *peer_mac, int vdev_id, u8 tid)
 890{
 891        struct ath11k_peer *peer;
 892        struct dp_rx_tid *rx_tid;
 893
 894        spin_lock_bh(&ab->base_lock);
 895
 896        peer = ath11k_peer_find(ab, vdev_id, peer_mac);
 897        if (!peer) {
 898                ath11k_warn(ab, "failed to find the peer to free up rx tid mem\n");
 899                goto unlock_exit;
 900        }
 901
 902        rx_tid = &peer->rx_tid[tid];
 903        if (!rx_tid->active)
 904                goto unlock_exit;
 905
 906        dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
 907                         DMA_BIDIRECTIONAL);
 908        kfree(rx_tid->vaddr);
 909
 910        rx_tid->active = false;
 911
 912unlock_exit:
 913        spin_unlock_bh(&ab->base_lock);
 914}
 915
 916int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,
 917                             u8 tid, u32 ba_win_sz, u16 ssn,
 918                             enum hal_pn_type pn_type)
 919{
 920        struct ath11k_base *ab = ar->ab;
 921        struct ath11k_peer *peer;
 922        struct dp_rx_tid *rx_tid;
 923        u32 hw_desc_sz;
 924        u32 *addr_aligned;
 925        void *vaddr;
 926        dma_addr_t paddr;
 927        int ret;
 928
 929        spin_lock_bh(&ab->base_lock);
 930
 931        peer = ath11k_peer_find(ab, vdev_id, peer_mac);
 932        if (!peer) {
 933                ath11k_warn(ab, "failed to find the peer to set up rx tid\n");
 934                spin_unlock_bh(&ab->base_lock);
 935                return -ENOENT;
 936        }
 937
 938        rx_tid = &peer->rx_tid[tid];
 939        /* Update the tid queue if it is already setup */
 940        if (rx_tid->active) {
 941                paddr = rx_tid->paddr;
 942                ret = ath11k_peer_rx_tid_reo_update(ar, peer, rx_tid,
 943                                                    ba_win_sz, ssn, true);
 944                spin_unlock_bh(&ab->base_lock);
 945                if (ret) {
 946                        ath11k_warn(ab, "failed to update reo for rx tid %d\n", tid);
 947                        return ret;
 948                }
 949
 950                ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,
 951                                                             peer_mac, paddr,
 952                                                             tid, 1, ba_win_sz);
 953                if (ret)
 954                        ath11k_warn(ab, "failed to send wmi command to update rx reorder queue, tid :%d (%d)\n",
 955                                    tid, ret);
 956                return ret;
 957        }
 958
 959        rx_tid->tid = tid;
 960
 961        rx_tid->ba_win_sz = ba_win_sz;
 962
 963        /* TODO: Optimize the memory allocation for qos tid based on the
 964         * the actual BA window size in REO tid update path.
 965         */
 966        if (tid == HAL_DESC_REO_NON_QOS_TID)
 967                hw_desc_sz = ath11k_hal_reo_qdesc_size(ba_win_sz, tid);
 968        else
 969                hw_desc_sz = ath11k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid);
 970
 971        vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC);
 972        if (!vaddr) {
 973                spin_unlock_bh(&ab->base_lock);
 974                return -ENOMEM;
 975        }
 976
 977        addr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN);
 978
 979        ath11k_hal_reo_qdesc_setup(addr_aligned, tid, ba_win_sz,
 980                                   ssn, pn_type);
 981
 982        paddr = dma_map_single(ab->dev, addr_aligned, hw_desc_sz,
 983                               DMA_BIDIRECTIONAL);
 984
 985        ret = dma_mapping_error(ab->dev, paddr);
 986        if (ret) {
 987                spin_unlock_bh(&ab->base_lock);
 988                goto err_mem_free;
 989        }
 990
 991        rx_tid->vaddr = vaddr;
 992        rx_tid->paddr = paddr;
 993        rx_tid->size = hw_desc_sz;
 994        rx_tid->active = true;
 995
 996        spin_unlock_bh(&ab->base_lock);
 997
 998        ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,
 999                                                     paddr, tid, 1, ba_win_sz);
1000        if (ret) {
1001                ath11k_warn(ar->ab, "failed to setup rx reorder queue, tid :%d (%d)\n",
1002                            tid, ret);
1003                ath11k_dp_rx_tid_mem_free(ab, peer_mac, vdev_id, tid);
1004        }
1005
1006        return ret;
1007
1008err_mem_free:
1009        kfree(vaddr);
1010
1011        return ret;
1012}
1013
1014int ath11k_dp_rx_ampdu_start(struct ath11k *ar,
1015                             struct ieee80211_ampdu_params *params)
1016{
1017        struct ath11k_base *ab = ar->ab;
1018        struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
1019        int vdev_id = arsta->arvif->vdev_id;
1020        int ret;
1021
1022        ret = ath11k_peer_rx_tid_setup(ar, params->sta->addr, vdev_id,
1023                                       params->tid, params->buf_size,
1024                                       params->ssn, arsta->pn_type);
1025        if (ret)
1026                ath11k_warn(ab, "failed to setup rx tid %d\n", ret);
1027
1028        return ret;
1029}
1030
1031int ath11k_dp_rx_ampdu_stop(struct ath11k *ar,
1032                            struct ieee80211_ampdu_params *params)
1033{
1034        struct ath11k_base *ab = ar->ab;
1035        struct ath11k_peer *peer;
1036        struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
1037        int vdev_id = arsta->arvif->vdev_id;
1038        dma_addr_t paddr;
1039        bool active;
1040        int ret;
1041
1042        spin_lock_bh(&ab->base_lock);
1043
1044        peer = ath11k_peer_find(ab, vdev_id, params->sta->addr);
1045        if (!peer) {
1046                ath11k_warn(ab, "failed to find the peer to stop rx aggregation\n");
1047                spin_unlock_bh(&ab->base_lock);
1048                return -ENOENT;
1049        }
1050
1051        paddr = peer->rx_tid[params->tid].paddr;
1052        active = peer->rx_tid[params->tid].active;
1053
1054        if (!active) {
1055                spin_unlock_bh(&ab->base_lock);
1056                return 0;
1057        }
1058
1059        ret = ath11k_peer_rx_tid_reo_update(ar, peer, peer->rx_tid, 1, 0, false);
1060        spin_unlock_bh(&ab->base_lock);
1061        if (ret) {
1062                ath11k_warn(ab, "failed to update reo for rx tid %d: %d\n",
1063                            params->tid, ret);
1064                return ret;
1065        }
1066
1067        ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,
1068                                                     params->sta->addr, paddr,
1069                                                     params->tid, 1, 1);
1070        if (ret)
1071                ath11k_warn(ab, "failed to send wmi to delete rx tid %d\n",
1072                            ret);
1073
1074        return ret;
1075}
1076
1077int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,
1078                                       const u8 *peer_addr,
1079                                       enum set_key_cmd key_cmd,
1080                                       struct ieee80211_key_conf *key)
1081{
1082        struct ath11k *ar = arvif->ar;
1083        struct ath11k_base *ab = ar->ab;
1084        struct ath11k_hal_reo_cmd cmd = {0};
1085        struct ath11k_peer *peer;
1086        struct dp_rx_tid *rx_tid;
1087        u8 tid;
1088        int ret = 0;
1089
1090        /* NOTE: Enable PN/TSC replay check offload only for unicast frames.
1091         * We use mac80211 PN/TSC replay check functionality for bcast/mcast
1092         * for now.
1093         */
1094        if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
1095                return 0;
1096
1097        cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;
1098        cmd.upd0 |= HAL_REO_CMD_UPD0_PN |
1099                    HAL_REO_CMD_UPD0_PN_SIZE |
1100                    HAL_REO_CMD_UPD0_PN_VALID |
1101                    HAL_REO_CMD_UPD0_PN_CHECK |
1102                    HAL_REO_CMD_UPD0_SVLD;
1103
1104        switch (key->cipher) {
1105        case WLAN_CIPHER_SUITE_TKIP:
1106        case WLAN_CIPHER_SUITE_CCMP:
1107        case WLAN_CIPHER_SUITE_CCMP_256:
1108        case WLAN_CIPHER_SUITE_GCMP:
1109        case WLAN_CIPHER_SUITE_GCMP_256:
1110                if (key_cmd == SET_KEY) {
1111                        cmd.upd1 |= HAL_REO_CMD_UPD1_PN_CHECK;
1112                        cmd.pn_size = 48;
1113                }
1114                break;
1115        default:
1116                break;
1117        }
1118
1119        spin_lock_bh(&ab->base_lock);
1120
1121        peer = ath11k_peer_find(ab, arvif->vdev_id, peer_addr);
1122        if (!peer) {
1123                ath11k_warn(ab, "failed to find the peer to configure pn replay detection\n");
1124                spin_unlock_bh(&ab->base_lock);
1125                return -ENOENT;
1126        }
1127
1128        for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) {
1129                rx_tid = &peer->rx_tid[tid];
1130                if (!rx_tid->active)
1131                        continue;
1132                cmd.addr_lo = lower_32_bits(rx_tid->paddr);
1133                cmd.addr_hi = upper_32_bits(rx_tid->paddr);
1134                ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
1135                                                HAL_REO_CMD_UPDATE_RX_QUEUE,
1136                                                &cmd, NULL);
1137                if (ret) {
1138                        ath11k_warn(ab, "failed to configure rx tid %d queue for pn replay detection %d\n",
1139                                    tid, ret);
1140                        break;
1141                }
1142        }
1143
1144        spin_unlock_bh(&ar->ab->base_lock);
1145
1146        return ret;
1147}
1148
1149static inline int ath11k_get_ppdu_user_index(struct htt_ppdu_stats *ppdu_stats,
1150                                             u16 peer_id)
1151{
1152        int i;
1153
1154        for (i = 0; i < HTT_PPDU_STATS_MAX_USERS - 1; i++) {
1155                if (ppdu_stats->user_stats[i].is_valid_peer_id) {
1156                        if (peer_id == ppdu_stats->user_stats[i].peer_id)
1157                                return i;
1158                } else {
1159                        return i;
1160                }
1161        }
1162
1163        return -EINVAL;
1164}
1165
1166static int ath11k_htt_tlv_ppdu_stats_parse(struct ath11k_base *ab,
1167                                           u16 tag, u16 len, const void *ptr,
1168                                           void *data)
1169{
1170        struct htt_ppdu_stats_info *ppdu_info;
1171        struct htt_ppdu_user_stats *user_stats;
1172        int cur_user;
1173        u16 peer_id;
1174
1175        ppdu_info = (struct htt_ppdu_stats_info *)data;
1176
1177        switch (tag) {
1178        case HTT_PPDU_STATS_TAG_COMMON:
1179                if (len < sizeof(struct htt_ppdu_stats_common)) {
1180                        ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1181                                    len, tag);
1182                        return -EINVAL;
1183                }
1184                memcpy((void *)&ppdu_info->ppdu_stats.common, ptr,
1185                       sizeof(struct htt_ppdu_stats_common));
1186                break;
1187        case HTT_PPDU_STATS_TAG_USR_RATE:
1188                if (len < sizeof(struct htt_ppdu_stats_user_rate)) {
1189                        ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1190                                    len, tag);
1191                        return -EINVAL;
1192                }
1193
1194                peer_id = ((struct htt_ppdu_stats_user_rate *)ptr)->sw_peer_id;
1195                cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1196                                                      peer_id);
1197                if (cur_user < 0)
1198                        return -EINVAL;
1199                user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1200                user_stats->peer_id = peer_id;
1201                user_stats->is_valid_peer_id = true;
1202                memcpy((void *)&user_stats->rate, ptr,
1203                       sizeof(struct htt_ppdu_stats_user_rate));
1204                user_stats->tlv_flags |= BIT(tag);
1205                break;
1206        case HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON:
1207                if (len < sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn)) {
1208                        ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1209                                    len, tag);
1210                        return -EINVAL;
1211                }
1212
1213                peer_id = ((struct htt_ppdu_stats_usr_cmpltn_cmn *)ptr)->sw_peer_id;
1214                cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1215                                                      peer_id);
1216                if (cur_user < 0)
1217                        return -EINVAL;
1218                user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1219                user_stats->peer_id = peer_id;
1220                user_stats->is_valid_peer_id = true;
1221                memcpy((void *)&user_stats->cmpltn_cmn, ptr,
1222                       sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn));
1223                user_stats->tlv_flags |= BIT(tag);
1224                break;
1225        case HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS:
1226                if (len <
1227                    sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status)) {
1228                        ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1229                                    len, tag);
1230                        return -EINVAL;
1231                }
1232
1233                peer_id =
1234                ((struct htt_ppdu_stats_usr_cmpltn_ack_ba_status *)ptr)->sw_peer_id;
1235                cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1236                                                      peer_id);
1237                if (cur_user < 0)
1238                        return -EINVAL;
1239                user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1240                user_stats->peer_id = peer_id;
1241                user_stats->is_valid_peer_id = true;
1242                memcpy((void *)&user_stats->ack_ba, ptr,
1243                       sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status));
1244                user_stats->tlv_flags |= BIT(tag);
1245                break;
1246        }
1247        return 0;
1248}
1249
1250int ath11k_dp_htt_tlv_iter(struct ath11k_base *ab, const void *ptr, size_t len,
1251                           int (*iter)(struct ath11k_base *ar, u16 tag, u16 len,
1252                                       const void *ptr, void *data),
1253                           void *data)
1254{
1255        const struct htt_tlv *tlv;
1256        const void *begin = ptr;
1257        u16 tlv_tag, tlv_len;
1258        int ret = -EINVAL;
1259
1260        while (len > 0) {
1261                if (len < sizeof(*tlv)) {
1262                        ath11k_err(ab, "htt tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
1263                                   ptr - begin, len, sizeof(*tlv));
1264                        return -EINVAL;
1265                }
1266                tlv = (struct htt_tlv *)ptr;
1267                tlv_tag = FIELD_GET(HTT_TLV_TAG, tlv->header);
1268                tlv_len = FIELD_GET(HTT_TLV_LEN, tlv->header);
1269                ptr += sizeof(*tlv);
1270                len -= sizeof(*tlv);
1271
1272                if (tlv_len > len) {
1273                        ath11k_err(ab, "htt tlv parse failure of tag %hhu at byte %zd (%zu bytes left, %hhu expected)\n",
1274                                   tlv_tag, ptr - begin, len, tlv_len);
1275                        return -EINVAL;
1276                }
1277                ret = iter(ab, tlv_tag, tlv_len, ptr, data);
1278                if (ret == -ENOMEM)
1279                        return ret;
1280
1281                ptr += tlv_len;
1282                len -= tlv_len;
1283        }
1284        return 0;
1285}
1286
1287static inline u32 ath11k_he_gi_to_nl80211_he_gi(u8 sgi)
1288{
1289        u32 ret = 0;
1290
1291        switch (sgi) {
1292        case RX_MSDU_START_SGI_0_8_US:
1293                ret = NL80211_RATE_INFO_HE_GI_0_8;
1294                break;
1295        case RX_MSDU_START_SGI_1_6_US:
1296                ret = NL80211_RATE_INFO_HE_GI_1_6;
1297                break;
1298        case RX_MSDU_START_SGI_3_2_US:
1299                ret = NL80211_RATE_INFO_HE_GI_3_2;
1300                break;
1301        }
1302
1303        return ret;
1304}
1305
1306static void
1307ath11k_update_per_peer_tx_stats(struct ath11k *ar,
1308                                struct htt_ppdu_stats *ppdu_stats, u8 user)
1309{
1310        struct ath11k_base *ab = ar->ab;
1311        struct ath11k_peer *peer;
1312        struct ieee80211_sta *sta;
1313        struct ath11k_sta *arsta;
1314        struct htt_ppdu_stats_user_rate *user_rate;
1315        struct ath11k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats;
1316        struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user];
1317        struct htt_ppdu_stats_common *common = &ppdu_stats->common;
1318        int ret;
1319        u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0;
1320        u32 succ_bytes = 0;
1321        u16 rate = 0, succ_pkts = 0;
1322        u32 tx_duration = 0;
1323        u8 tid = HTT_PPDU_STATS_NON_QOS_TID;
1324        bool is_ampdu = false;
1325
1326        if (!usr_stats)
1327                return;
1328
1329        if (!(usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_RATE)))
1330                return;
1331
1332        if (usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON))
1333                is_ampdu =
1334                        HTT_USR_CMPLTN_IS_AMPDU(usr_stats->cmpltn_cmn.flags);
1335
1336        if (usr_stats->tlv_flags &
1337            BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS)) {
1338                succ_bytes = usr_stats->ack_ba.success_bytes;
1339                succ_pkts = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_NUM_MSDU_M,
1340                                      usr_stats->ack_ba.info);
1341                tid = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_TID_NUM,
1342                                usr_stats->ack_ba.info);
1343        }
1344
1345        if (common->fes_duration_us)
1346                tx_duration = common->fes_duration_us;
1347
1348        user_rate = &usr_stats->rate;
1349        flags = HTT_USR_RATE_PREAMBLE(user_rate->rate_flags);
1350        bw = HTT_USR_RATE_BW(user_rate->rate_flags) - 2;
1351        nss = HTT_USR_RATE_NSS(user_rate->rate_flags) + 1;
1352        mcs = HTT_USR_RATE_MCS(user_rate->rate_flags);
1353        sgi = HTT_USR_RATE_GI(user_rate->rate_flags);
1354        dcm = HTT_USR_RATE_DCM(user_rate->rate_flags);
1355
1356        /* Note: If host configured fixed rates and in some other special
1357         * cases, the broadcast/management frames are sent in different rates.
1358         * Firmware rate's control to be skipped for this?
1359         */
1360
1361        if (flags == WMI_RATE_PREAMBLE_HE && mcs > 11) {
1362                ath11k_warn(ab, "Invalid HE mcs %hhd peer stats",  mcs);
1363                return;
1364        }
1365
1366        if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) {
1367                ath11k_warn(ab, "Invalid HE mcs %hhd peer stats",  mcs);
1368                return;
1369        }
1370
1371        if (flags == WMI_RATE_PREAMBLE_VHT && mcs > ATH11K_VHT_MCS_MAX) {
1372                ath11k_warn(ab, "Invalid VHT mcs %hhd peer stats",  mcs);
1373                return;
1374        }
1375
1376        if (flags == WMI_RATE_PREAMBLE_HT && (mcs > ATH11K_HT_MCS_MAX || nss < 1)) {
1377                ath11k_warn(ab, "Invalid HT mcs %hhd nss %hhd peer stats",
1378                            mcs, nss);
1379                return;
1380        }
1381
1382        if (flags == WMI_RATE_PREAMBLE_CCK || flags == WMI_RATE_PREAMBLE_OFDM) {
1383                ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,
1384                                                            flags,
1385                                                            &rate_idx,
1386                                                            &rate);
1387                if (ret < 0)
1388                        return;
1389        }
1390
1391        rcu_read_lock();
1392        spin_lock_bh(&ab->base_lock);
1393        peer = ath11k_peer_find_by_id(ab, usr_stats->peer_id);
1394
1395        if (!peer || !peer->sta) {
1396                spin_unlock_bh(&ab->base_lock);
1397                rcu_read_unlock();
1398                return;
1399        }
1400
1401        sta = peer->sta;
1402        arsta = (struct ath11k_sta *)sta->drv_priv;
1403
1404        memset(&arsta->txrate, 0, sizeof(arsta->txrate));
1405
1406        switch (flags) {
1407        case WMI_RATE_PREAMBLE_OFDM:
1408                arsta->txrate.legacy = rate;
1409                break;
1410        case WMI_RATE_PREAMBLE_CCK:
1411                arsta->txrate.legacy = rate;
1412                break;
1413        case WMI_RATE_PREAMBLE_HT:
1414                arsta->txrate.mcs = mcs + 8 * (nss - 1);
1415                arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
1416                if (sgi)
1417                        arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
1418                break;
1419        case WMI_RATE_PREAMBLE_VHT:
1420                arsta->txrate.mcs = mcs;
1421                arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
1422                if (sgi)
1423                        arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
1424                break;
1425        case WMI_RATE_PREAMBLE_HE:
1426                arsta->txrate.mcs = mcs;
1427                arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
1428                arsta->txrate.he_dcm = dcm;
1429                arsta->txrate.he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi);
1430                arsta->txrate.he_ru_alloc = ath11k_he_ru_tones_to_nl80211_he_ru_alloc(
1431                                                (user_rate->ru_end -
1432                                                 user_rate->ru_start) + 1);
1433                break;
1434        }
1435
1436        arsta->txrate.nss = nss;
1437        arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
1438        arsta->tx_duration += tx_duration;
1439        memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info));
1440
1441        /* PPDU stats reported for mgmt packet doesn't have valid tx bytes.
1442         * So skip peer stats update for mgmt packets.
1443         */
1444        if (tid < HTT_PPDU_STATS_NON_QOS_TID) {
1445                memset(peer_stats, 0, sizeof(*peer_stats));
1446                peer_stats->succ_pkts = succ_pkts;
1447                peer_stats->succ_bytes = succ_bytes;
1448                peer_stats->is_ampdu = is_ampdu;
1449                peer_stats->duration = tx_duration;
1450                peer_stats->ba_fails =
1451                        HTT_USR_CMPLTN_LONG_RETRY(usr_stats->cmpltn_cmn.flags) +
1452                        HTT_USR_CMPLTN_SHORT_RETRY(usr_stats->cmpltn_cmn.flags);
1453
1454                if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))
1455                        ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);
1456        }
1457
1458        spin_unlock_bh(&ab->base_lock);
1459        rcu_read_unlock();
1460}
1461
1462static void ath11k_htt_update_ppdu_stats(struct ath11k *ar,
1463                                         struct htt_ppdu_stats *ppdu_stats)
1464{
1465        u8 user;
1466
1467        for (user = 0; user < HTT_PPDU_STATS_MAX_USERS - 1; user++)
1468                ath11k_update_per_peer_tx_stats(ar, ppdu_stats, user);
1469}
1470
1471static
1472struct htt_ppdu_stats_info *ath11k_dp_htt_get_ppdu_desc(struct ath11k *ar,
1473                                                        u32 ppdu_id)
1474{
1475        struct htt_ppdu_stats_info *ppdu_info;
1476
1477        spin_lock_bh(&ar->data_lock);
1478        if (!list_empty(&ar->ppdu_stats_info)) {
1479                list_for_each_entry(ppdu_info, &ar->ppdu_stats_info, list) {
1480                        if (ppdu_info->ppdu_id == ppdu_id) {
1481                                spin_unlock_bh(&ar->data_lock);
1482                                return ppdu_info;
1483                        }
1484                }
1485
1486                if (ar->ppdu_stat_list_depth > HTT_PPDU_DESC_MAX_DEPTH) {
1487                        ppdu_info = list_first_entry(&ar->ppdu_stats_info,
1488                                                     typeof(*ppdu_info), list);
1489                        list_del(&ppdu_info->list);
1490                        ar->ppdu_stat_list_depth--;
1491                        ath11k_htt_update_ppdu_stats(ar, &ppdu_info->ppdu_stats);
1492                        kfree(ppdu_info);
1493                }
1494        }
1495        spin_unlock_bh(&ar->data_lock);
1496
1497        ppdu_info = kzalloc(sizeof(*ppdu_info), GFP_ATOMIC);
1498        if (!ppdu_info)
1499                return NULL;
1500
1501        spin_lock_bh(&ar->data_lock);
1502        list_add_tail(&ppdu_info->list, &ar->ppdu_stats_info);
1503        ar->ppdu_stat_list_depth++;
1504        spin_unlock_bh(&ar->data_lock);
1505
1506        return ppdu_info;
1507}
1508
1509static int ath11k_htt_pull_ppdu_stats(struct ath11k_base *ab,
1510                                      struct sk_buff *skb)
1511{
1512        struct ath11k_htt_ppdu_stats_msg *msg;
1513        struct htt_ppdu_stats_info *ppdu_info;
1514        struct ath11k *ar;
1515        int ret;
1516        u8 pdev_id;
1517        u32 ppdu_id, len;
1518
1519        msg = (struct ath11k_htt_ppdu_stats_msg *)skb->data;
1520        len = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE, msg->info);
1521        pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, msg->info);
1522        ppdu_id = msg->ppdu_id;
1523
1524        rcu_read_lock();
1525        ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
1526        if (!ar) {
1527                ret = -EINVAL;
1528                goto exit;
1529        }
1530
1531        if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar))
1532                trace_ath11k_htt_ppdu_stats(ar, skb->data, len);
1533
1534        ppdu_info = ath11k_dp_htt_get_ppdu_desc(ar, ppdu_id);
1535        if (!ppdu_info) {
1536                ret = -EINVAL;
1537                goto exit;
1538        }
1539
1540        ppdu_info->ppdu_id = ppdu_id;
1541        ret = ath11k_dp_htt_tlv_iter(ab, msg->data, len,
1542                                     ath11k_htt_tlv_ppdu_stats_parse,
1543                                     (void *)ppdu_info);
1544        if (ret) {
1545                ath11k_warn(ab, "Failed to parse tlv %d\n", ret);
1546                goto exit;
1547        }
1548
1549exit:
1550        rcu_read_unlock();
1551
1552        return ret;
1553}
1554
1555static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb)
1556{
1557        struct htt_pktlog_msg *data = (struct htt_pktlog_msg *)skb->data;
1558        struct ath_pktlog_hdr *hdr = (struct ath_pktlog_hdr *)data;
1559        struct ath11k *ar;
1560        u8 pdev_id;
1561
1562        pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, data->hdr);
1563        ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
1564        if (!ar) {
1565                ath11k_warn(ab, "invalid pdev id %d on htt pktlog\n", pdev_id);
1566                return;
1567        }
1568
1569        trace_ath11k_htt_pktlog(ar, data->payload, hdr->size,
1570                                ar->ab->pktlog_defs_checksum);
1571}
1572
1573static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab,
1574                                                  struct sk_buff *skb)
1575{
1576        u32 *data = (u32 *)skb->data;
1577        u8 pdev_id, ring_type, ring_id, pdev_idx;
1578        u16 hp, tp;
1579        u32 backpressure_time;
1580        struct ath11k_bp_stats *bp_stats;
1581
1582        pdev_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_PDEV_ID_M, *data);
1583        ring_type = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_TYPE_M, *data);
1584        ring_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_ID_M, *data);
1585        ++data;
1586
1587        hp = FIELD_GET(HTT_BACKPRESSURE_EVENT_HP_M, *data);
1588        tp = FIELD_GET(HTT_BACKPRESSURE_EVENT_TP_M, *data);
1589        ++data;
1590
1591        backpressure_time = *data;
1592
1593        ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "htt backpressure event, pdev %d, ring type %d,ring id %d, hp %d tp %d, backpressure time %d\n",
1594                   pdev_id, ring_type, ring_id, hp, tp, backpressure_time);
1595
1596        if (ring_type == HTT_BACKPRESSURE_UMAC_RING_TYPE) {
1597                if (ring_id >= HTT_SW_UMAC_RING_IDX_MAX)
1598                        return;
1599
1600                bp_stats = &ab->soc_stats.bp_stats.umac_ring_bp_stats[ring_id];
1601        } else if (ring_type == HTT_BACKPRESSURE_LMAC_RING_TYPE) {
1602                pdev_idx = DP_HW2SW_MACID(pdev_id);
1603
1604                if (ring_id >= HTT_SW_LMAC_RING_IDX_MAX || pdev_idx >= MAX_RADIOS)
1605                        return;
1606
1607                bp_stats = &ab->soc_stats.bp_stats.lmac_ring_bp_stats[ring_id][pdev_idx];
1608        } else {
1609                ath11k_warn(ab, "unknown ring type received in htt bp event %d\n",
1610                            ring_type);
1611                return;
1612        }
1613
1614        spin_lock_bh(&ab->base_lock);
1615        bp_stats->hp = hp;
1616        bp_stats->tp = tp;
1617        bp_stats->count++;
1618        bp_stats->jiffies = jiffies;
1619        spin_unlock_bh(&ab->base_lock);
1620}
1621
1622void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
1623                                       struct sk_buff *skb)
1624{
1625        struct ath11k_dp *dp = &ab->dp;
1626        struct htt_resp_msg *resp = (struct htt_resp_msg *)skb->data;
1627        enum htt_t2h_msg_type type = FIELD_GET(HTT_T2H_MSG_TYPE, *(u32 *)resp);
1628        u16 peer_id;
1629        u8 vdev_id;
1630        u8 mac_addr[ETH_ALEN];
1631        u16 peer_mac_h16;
1632        u16 ast_hash;
1633
1634        ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "dp_htt rx msg type :0x%0x\n", type);
1635
1636        switch (type) {
1637        case HTT_T2H_MSG_TYPE_VERSION_CONF:
1638                dp->htt_tgt_ver_major = FIELD_GET(HTT_T2H_VERSION_CONF_MAJOR,
1639                                                  resp->version_msg.version);
1640                dp->htt_tgt_ver_minor = FIELD_GET(HTT_T2H_VERSION_CONF_MINOR,
1641                                                  resp->version_msg.version);
1642                complete(&dp->htt_tgt_version_received);
1643                break;
1644        case HTT_T2H_MSG_TYPE_PEER_MAP:
1645                vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,
1646                                    resp->peer_map_ev.info);
1647                peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,
1648                                    resp->peer_map_ev.info);
1649                peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,
1650                                         resp->peer_map_ev.info1);
1651                ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,
1652                                       peer_mac_h16, mac_addr);
1653                ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, 0);
1654                break;
1655        case HTT_T2H_MSG_TYPE_PEER_MAP2:
1656                vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,
1657                                    resp->peer_map_ev.info);
1658                peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,
1659                                    resp->peer_map_ev.info);
1660                peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,
1661                                         resp->peer_map_ev.info1);
1662                ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,
1663                                       peer_mac_h16, mac_addr);
1664                ast_hash = FIELD_GET(HTT_T2H_PEER_MAP_INFO2_AST_HASH_VAL,
1665                                     resp->peer_map_ev.info2);
1666                ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, ast_hash);
1667                break;
1668        case HTT_T2H_MSG_TYPE_PEER_UNMAP:
1669        case HTT_T2H_MSG_TYPE_PEER_UNMAP2:
1670                peer_id = FIELD_GET(HTT_T2H_PEER_UNMAP_INFO_PEER_ID,
1671                                    resp->peer_unmap_ev.info);
1672                ath11k_peer_unmap_event(ab, peer_id);
1673                break;
1674        case HTT_T2H_MSG_TYPE_PPDU_STATS_IND:
1675                ath11k_htt_pull_ppdu_stats(ab, skb);
1676                break;
1677        case HTT_T2H_MSG_TYPE_EXT_STATS_CONF:
1678                ath11k_debugfs_htt_ext_stats_handler(ab, skb);
1679                break;
1680        case HTT_T2H_MSG_TYPE_PKTLOG:
1681                ath11k_htt_pktlog(ab, skb);
1682                break;
1683        case HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND:
1684                ath11k_htt_backpressure_event_handler(ab, skb);
1685                break;
1686        default:
1687                ath11k_warn(ab, "htt event %d not handled\n", type);
1688                break;
1689        }
1690
1691        dev_kfree_skb_any(skb);
1692}
1693
1694static int ath11k_dp_rx_msdu_coalesce(struct ath11k *ar,
1695                                      struct sk_buff_head *msdu_list,
1696                                      struct sk_buff *first, struct sk_buff *last,
1697                                      u8 l3pad_bytes, int msdu_len)
1698{
1699        struct sk_buff *skb;
1700        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);
1701        int buf_first_hdr_len, buf_first_len;
1702        struct hal_rx_desc *ldesc;
1703        int space_extra;
1704        int rem_len;
1705        int buf_len;
1706
1707        /* As the msdu is spread across multiple rx buffers,
1708         * find the offset to the start of msdu for computing
1709         * the length of the msdu in the first buffer.
1710         */
1711        buf_first_hdr_len = HAL_RX_DESC_SIZE + l3pad_bytes;
1712        buf_first_len = DP_RX_BUFFER_SIZE - buf_first_hdr_len;
1713
1714        if (WARN_ON_ONCE(msdu_len <= buf_first_len)) {
1715                skb_put(first, buf_first_hdr_len + msdu_len);
1716                skb_pull(first, buf_first_hdr_len);
1717                return 0;
1718        }
1719
1720        ldesc = (struct hal_rx_desc *)last->data;
1721        rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ldesc);
1722        rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ldesc);
1723
1724        /* MSDU spans over multiple buffers because the length of the MSDU
1725         * exceeds DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE. So assume the data
1726         * in the first buf is of length DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE.
1727         */
1728        skb_put(first, DP_RX_BUFFER_SIZE);
1729        skb_pull(first, buf_first_hdr_len);
1730
1731        /* When an MSDU spread over multiple buffers attention, MSDU_END and
1732         * MPDU_END tlvs are valid only in the last buffer. Copy those tlvs.
1733         */
1734        ath11k_dp_rx_desc_end_tlv_copy(rxcb->rx_desc, ldesc);
1735
1736        space_extra = msdu_len - (buf_first_len + skb_tailroom(first));
1737        if (space_extra > 0 &&
1738            (pskb_expand_head(first, 0, space_extra, GFP_ATOMIC) < 0)) {
1739                /* Free up all buffers of the MSDU */
1740                while ((skb = __skb_dequeue(msdu_list)) != NULL) {
1741                        rxcb = ATH11K_SKB_RXCB(skb);
1742                        if (!rxcb->is_continuation) {
1743                                dev_kfree_skb_any(skb);
1744                                break;
1745                        }
1746                        dev_kfree_skb_any(skb);
1747                }
1748                return -ENOMEM;
1749        }
1750
1751        rem_len = msdu_len - buf_first_len;
1752        while ((skb = __skb_dequeue(msdu_list)) != NULL && rem_len > 0) {
1753                rxcb = ATH11K_SKB_RXCB(skb);
1754                if (rxcb->is_continuation)
1755                        buf_len = DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE;
1756                else
1757                        buf_len = rem_len;
1758
1759                if (buf_len > (DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE)) {
1760                        WARN_ON_ONCE(1);
1761                        dev_kfree_skb_any(skb);
1762                        return -EINVAL;
1763                }
1764
1765                skb_put(skb, buf_len + HAL_RX_DESC_SIZE);
1766                skb_pull(skb, HAL_RX_DESC_SIZE);
1767                skb_copy_from_linear_data(skb, skb_put(first, buf_len),
1768                                          buf_len);
1769                dev_kfree_skb_any(skb);
1770
1771                rem_len -= buf_len;
1772                if (!rxcb->is_continuation)
1773                        break;
1774        }
1775
1776        return 0;
1777}
1778
1779static struct sk_buff *ath11k_dp_rx_get_msdu_last_buf(struct sk_buff_head *msdu_list,
1780                                                      struct sk_buff *first)
1781{
1782        struct sk_buff *skb;
1783        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);
1784
1785        if (!rxcb->is_continuation)
1786                return first;
1787
1788        skb_queue_walk(msdu_list, skb) {
1789                rxcb = ATH11K_SKB_RXCB(skb);
1790                if (!rxcb->is_continuation)
1791                        return skb;
1792        }
1793
1794        return NULL;
1795}
1796
1797static void ath11k_dp_rx_h_csum_offload(struct sk_buff *msdu)
1798{
1799        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
1800        bool ip_csum_fail, l4_csum_fail;
1801
1802        ip_csum_fail = ath11k_dp_rx_h_attn_ip_cksum_fail(rxcb->rx_desc);
1803        l4_csum_fail = ath11k_dp_rx_h_attn_l4_cksum_fail(rxcb->rx_desc);
1804
1805        msdu->ip_summed = (ip_csum_fail || l4_csum_fail) ?
1806                          CHECKSUM_NONE : CHECKSUM_UNNECESSARY;
1807}
1808
1809static int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar,
1810                                       enum hal_encrypt_type enctype)
1811{
1812        switch (enctype) {
1813        case HAL_ENCRYPT_TYPE_OPEN:
1814        case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1815        case HAL_ENCRYPT_TYPE_TKIP_MIC:
1816                return 0;
1817        case HAL_ENCRYPT_TYPE_CCMP_128:
1818                return IEEE80211_CCMP_MIC_LEN;
1819        case HAL_ENCRYPT_TYPE_CCMP_256:
1820                return IEEE80211_CCMP_256_MIC_LEN;
1821        case HAL_ENCRYPT_TYPE_GCMP_128:
1822        case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1823                return IEEE80211_GCMP_MIC_LEN;
1824        case HAL_ENCRYPT_TYPE_WEP_40:
1825        case HAL_ENCRYPT_TYPE_WEP_104:
1826        case HAL_ENCRYPT_TYPE_WEP_128:
1827        case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1828        case HAL_ENCRYPT_TYPE_WAPI:
1829                break;
1830        }
1831
1832        ath11k_warn(ar->ab, "unsupported encryption type %d for mic len\n", enctype);
1833        return 0;
1834}
1835
1836static int ath11k_dp_rx_crypto_param_len(struct ath11k *ar,
1837                                         enum hal_encrypt_type enctype)
1838{
1839        switch (enctype) {
1840        case HAL_ENCRYPT_TYPE_OPEN:
1841                return 0;
1842        case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1843        case HAL_ENCRYPT_TYPE_TKIP_MIC:
1844                return IEEE80211_TKIP_IV_LEN;
1845        case HAL_ENCRYPT_TYPE_CCMP_128:
1846                return IEEE80211_CCMP_HDR_LEN;
1847        case HAL_ENCRYPT_TYPE_CCMP_256:
1848                return IEEE80211_CCMP_256_HDR_LEN;
1849        case HAL_ENCRYPT_TYPE_GCMP_128:
1850        case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1851                return IEEE80211_GCMP_HDR_LEN;
1852        case HAL_ENCRYPT_TYPE_WEP_40:
1853        case HAL_ENCRYPT_TYPE_WEP_104:
1854        case HAL_ENCRYPT_TYPE_WEP_128:
1855        case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1856        case HAL_ENCRYPT_TYPE_WAPI:
1857                break;
1858        }
1859
1860        ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);
1861        return 0;
1862}
1863
1864static int ath11k_dp_rx_crypto_icv_len(struct ath11k *ar,
1865                                       enum hal_encrypt_type enctype)
1866{
1867        switch (enctype) {
1868        case HAL_ENCRYPT_TYPE_OPEN:
1869        case HAL_ENCRYPT_TYPE_CCMP_128:
1870        case HAL_ENCRYPT_TYPE_CCMP_256:
1871        case HAL_ENCRYPT_TYPE_GCMP_128:
1872        case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1873                return 0;
1874        case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1875        case HAL_ENCRYPT_TYPE_TKIP_MIC:
1876                return IEEE80211_TKIP_ICV_LEN;
1877        case HAL_ENCRYPT_TYPE_WEP_40:
1878        case HAL_ENCRYPT_TYPE_WEP_104:
1879        case HAL_ENCRYPT_TYPE_WEP_128:
1880        case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1881        case HAL_ENCRYPT_TYPE_WAPI:
1882                break;
1883        }
1884
1885        ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);
1886        return 0;
1887}
1888
1889static void ath11k_dp_rx_h_undecap_nwifi(struct ath11k *ar,
1890                                         struct sk_buff *msdu,
1891                                         u8 *first_hdr,
1892                                         enum hal_encrypt_type enctype,
1893                                         struct ieee80211_rx_status *status)
1894{
1895        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
1896        u8 decap_hdr[DP_MAX_NWIFI_HDR_LEN];
1897        struct ieee80211_hdr *hdr;
1898        size_t hdr_len;
1899        u8 da[ETH_ALEN];
1900        u8 sa[ETH_ALEN];
1901        u16 qos_ctl = 0;
1902        u8 *qos;
1903
1904        /* copy SA & DA and pull decapped header */
1905        hdr = (struct ieee80211_hdr *)msdu->data;
1906        hdr_len = ieee80211_hdrlen(hdr->frame_control);
1907        ether_addr_copy(da, ieee80211_get_DA(hdr));
1908        ether_addr_copy(sa, ieee80211_get_SA(hdr));
1909        skb_pull(msdu, ieee80211_hdrlen(hdr->frame_control));
1910
1911        if (rxcb->is_first_msdu) {
1912                /* original 802.11 header is valid for the first msdu
1913                 * hence we can reuse the same header
1914                 */
1915                hdr = (struct ieee80211_hdr *)first_hdr;
1916                hdr_len = ieee80211_hdrlen(hdr->frame_control);
1917
1918                /* Each A-MSDU subframe will be reported as a separate MSDU,
1919                 * so strip the A-MSDU bit from QoS Ctl.
1920                 */
1921                if (ieee80211_is_data_qos(hdr->frame_control)) {
1922                        qos = ieee80211_get_qos_ctl(hdr);
1923                        qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1924                }
1925        } else {
1926                /*  Rebuild qos header if this is a middle/last msdu */
1927                hdr->frame_control |= __cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
1928
1929                /* Reset the order bit as the HT_Control header is stripped */
1930                hdr->frame_control &= ~(__cpu_to_le16(IEEE80211_FCTL_ORDER));
1931
1932                qos_ctl = rxcb->tid;
1933
1934                if (ath11k_dp_rx_h_msdu_start_mesh_ctl_present(rxcb->rx_desc))
1935                        qos_ctl |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT;
1936
1937                /* TODO Add other QoS ctl fields when required */
1938
1939                /* copy decap header before overwriting for reuse below */
1940                memcpy(decap_hdr, (uint8_t *)hdr, hdr_len);
1941        }
1942
1943        if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1944                memcpy(skb_push(msdu,
1945                                ath11k_dp_rx_crypto_param_len(ar, enctype)),
1946                       (void *)hdr + hdr_len,
1947                       ath11k_dp_rx_crypto_param_len(ar, enctype));
1948        }
1949
1950        if (!rxcb->is_first_msdu) {
1951                memcpy(skb_push(msdu,
1952                                IEEE80211_QOS_CTL_LEN), &qos_ctl,
1953                                IEEE80211_QOS_CTL_LEN);
1954                memcpy(skb_push(msdu, hdr_len), decap_hdr, hdr_len);
1955                return;
1956        }
1957
1958        memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1959
1960        /* original 802.11 header has a different DA and in
1961         * case of 4addr it may also have different SA
1962         */
1963        hdr = (struct ieee80211_hdr *)msdu->data;
1964        ether_addr_copy(ieee80211_get_DA(hdr), da);
1965        ether_addr_copy(ieee80211_get_SA(hdr), sa);
1966}
1967
1968static void ath11k_dp_rx_h_undecap_raw(struct ath11k *ar, struct sk_buff *msdu,
1969                                       enum hal_encrypt_type enctype,
1970                                       struct ieee80211_rx_status *status,
1971                                       bool decrypted)
1972{
1973        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
1974        struct ieee80211_hdr *hdr;
1975        size_t hdr_len;
1976        size_t crypto_len;
1977
1978        if (!rxcb->is_first_msdu ||
1979            !(rxcb->is_first_msdu && rxcb->is_last_msdu)) {
1980                WARN_ON_ONCE(1);
1981                return;
1982        }
1983
1984        skb_trim(msdu, msdu->len - FCS_LEN);
1985
1986        if (!decrypted)
1987                return;
1988
1989        hdr = (void *)msdu->data;
1990
1991        /* Tail */
1992        if (status->flag & RX_FLAG_IV_STRIPPED) {
1993                skb_trim(msdu, msdu->len -
1994                         ath11k_dp_rx_crypto_mic_len(ar, enctype));
1995
1996                skb_trim(msdu, msdu->len -
1997                         ath11k_dp_rx_crypto_icv_len(ar, enctype));
1998        } else {
1999                /* MIC */
2000                if (status->flag & RX_FLAG_MIC_STRIPPED)
2001                        skb_trim(msdu, msdu->len -
2002                                 ath11k_dp_rx_crypto_mic_len(ar, enctype));
2003
2004                /* ICV */
2005                if (status->flag & RX_FLAG_ICV_STRIPPED)
2006                        skb_trim(msdu, msdu->len -
2007                                 ath11k_dp_rx_crypto_icv_len(ar, enctype));
2008        }
2009
2010        /* MMIC */
2011        if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
2012            !ieee80211_has_morefrags(hdr->frame_control) &&
2013            enctype == HAL_ENCRYPT_TYPE_TKIP_MIC)
2014                skb_trim(msdu, msdu->len - IEEE80211_CCMP_MIC_LEN);
2015
2016        /* Head */
2017        if (status->flag & RX_FLAG_IV_STRIPPED) {
2018                hdr_len = ieee80211_hdrlen(hdr->frame_control);
2019                crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
2020
2021                memmove((void *)msdu->data + crypto_len,
2022                        (void *)msdu->data, hdr_len);
2023                skb_pull(msdu, crypto_len);
2024        }
2025}
2026
2027static void *ath11k_dp_rx_h_find_rfc1042(struct ath11k *ar,
2028                                         struct sk_buff *msdu,
2029                                         enum hal_encrypt_type enctype)
2030{
2031        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
2032        struct ieee80211_hdr *hdr;
2033        size_t hdr_len, crypto_len;
2034        void *rfc1042;
2035        bool is_amsdu;
2036
2037        is_amsdu = !(rxcb->is_first_msdu && rxcb->is_last_msdu);
2038        hdr = (struct ieee80211_hdr *)ath11k_dp_rx_h_80211_hdr(rxcb->rx_desc);
2039        rfc1042 = hdr;
2040
2041        if (rxcb->is_first_msdu) {
2042                hdr_len = ieee80211_hdrlen(hdr->frame_control);
2043                crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
2044
2045                rfc1042 += hdr_len + crypto_len;
2046        }
2047
2048        if (is_amsdu)
2049                rfc1042 += sizeof(struct ath11k_dp_amsdu_subframe_hdr);
2050
2051        return rfc1042;
2052}
2053
2054static void ath11k_dp_rx_h_undecap_eth(struct ath11k *ar,
2055                                       struct sk_buff *msdu,
2056                                       u8 *first_hdr,
2057                                       enum hal_encrypt_type enctype,
2058                                       struct ieee80211_rx_status *status)
2059{
2060        struct ieee80211_hdr *hdr;
2061        struct ethhdr *eth;
2062        size_t hdr_len;
2063        u8 da[ETH_ALEN];
2064        u8 sa[ETH_ALEN];
2065        void *rfc1042;
2066
2067        rfc1042 = ath11k_dp_rx_h_find_rfc1042(ar, msdu, enctype);
2068        if (WARN_ON_ONCE(!rfc1042))
2069                return;
2070
2071        /* pull decapped header and copy SA & DA */
2072        eth = (struct ethhdr *)msdu->data;
2073        ether_addr_copy(da, eth->h_dest);
2074        ether_addr_copy(sa, eth->h_source);
2075        skb_pull(msdu, sizeof(struct ethhdr));
2076
2077        /* push rfc1042/llc/snap */
2078        memcpy(skb_push(msdu, sizeof(struct ath11k_dp_rfc1042_hdr)), rfc1042,
2079               sizeof(struct ath11k_dp_rfc1042_hdr));
2080
2081        /* push original 802.11 header */
2082        hdr = (struct ieee80211_hdr *)first_hdr;
2083        hdr_len = ieee80211_hdrlen(hdr->frame_control);
2084
2085        if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
2086                memcpy(skb_push(msdu,
2087                                ath11k_dp_rx_crypto_param_len(ar, enctype)),
2088                       (void *)hdr + hdr_len,
2089                       ath11k_dp_rx_crypto_param_len(ar, enctype));
2090        }
2091
2092        memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
2093
2094        /* original 802.11 header has a different DA and in
2095         * case of 4addr it may also have different SA
2096         */
2097        hdr = (struct ieee80211_hdr *)msdu->data;
2098        ether_addr_copy(ieee80211_get_DA(hdr), da);
2099        ether_addr_copy(ieee80211_get_SA(hdr), sa);
2100}
2101
2102static void ath11k_dp_rx_h_undecap(struct ath11k *ar, struct sk_buff *msdu,
2103                                   struct hal_rx_desc *rx_desc,
2104                                   enum hal_encrypt_type enctype,
2105                                   struct ieee80211_rx_status *status,
2106                                   bool decrypted)
2107{
2108        u8 *first_hdr;
2109        u8 decap;
2110
2111        first_hdr = ath11k_dp_rx_h_80211_hdr(rx_desc);
2112        decap = ath11k_dp_rx_h_msdu_start_decap_type(rx_desc);
2113
2114        switch (decap) {
2115        case DP_RX_DECAP_TYPE_NATIVE_WIFI:
2116                ath11k_dp_rx_h_undecap_nwifi(ar, msdu, first_hdr,
2117                                             enctype, status);
2118                break;
2119        case DP_RX_DECAP_TYPE_RAW:
2120                ath11k_dp_rx_h_undecap_raw(ar, msdu, enctype, status,
2121                                           decrypted);
2122                break;
2123        case DP_RX_DECAP_TYPE_ETHERNET2_DIX:
2124                /* TODO undecap support for middle/last msdu's of amsdu */
2125                ath11k_dp_rx_h_undecap_eth(ar, msdu, first_hdr,
2126                                           enctype, status);
2127                break;
2128        case DP_RX_DECAP_TYPE_8023:
2129                /* TODO: Handle undecap for these formats */
2130                break;
2131        }
2132}
2133
2134static void ath11k_dp_rx_h_mpdu(struct ath11k *ar,
2135                                struct sk_buff *msdu,
2136                                struct hal_rx_desc *rx_desc,
2137                                struct ieee80211_rx_status *rx_status)
2138{
2139        bool  fill_crypto_hdr, mcast;
2140        enum hal_encrypt_type enctype;
2141        bool is_decrypted = false;
2142        struct ieee80211_hdr *hdr;
2143        struct ath11k_peer *peer;
2144        u32 err_bitmap;
2145
2146        hdr = (struct ieee80211_hdr *)msdu->data;
2147
2148        /* PN for multicast packets will be checked in mac80211 */
2149
2150        mcast = is_multicast_ether_addr(hdr->addr1);
2151        fill_crypto_hdr = mcast;
2152
2153        spin_lock_bh(&ar->ab->base_lock);
2154        peer = ath11k_peer_find_by_addr(ar->ab, hdr->addr2);
2155        if (peer) {
2156                if (mcast)
2157                        enctype = peer->sec_type_grp;
2158                else
2159                        enctype = peer->sec_type;
2160        } else {
2161                enctype = HAL_ENCRYPT_TYPE_OPEN;
2162        }
2163        spin_unlock_bh(&ar->ab->base_lock);
2164
2165        err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_desc);
2166        if (enctype != HAL_ENCRYPT_TYPE_OPEN && !err_bitmap)
2167                is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_desc);
2168
2169        /* Clear per-MPDU flags while leaving per-PPDU flags intact */
2170        rx_status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
2171                             RX_FLAG_MMIC_ERROR |
2172                             RX_FLAG_DECRYPTED |
2173                             RX_FLAG_IV_STRIPPED |
2174                             RX_FLAG_MMIC_STRIPPED);
2175
2176        if (err_bitmap & DP_RX_MPDU_ERR_FCS)
2177                rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
2178        if (err_bitmap & DP_RX_MPDU_ERR_TKIP_MIC)
2179                rx_status->flag |= RX_FLAG_MMIC_ERROR;
2180
2181        if (is_decrypted) {
2182                rx_status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_MMIC_STRIPPED;
2183
2184                if (fill_crypto_hdr)
2185                        rx_status->flag |= RX_FLAG_MIC_STRIPPED |
2186                                        RX_FLAG_ICV_STRIPPED;
2187                else
2188                        rx_status->flag |= RX_FLAG_IV_STRIPPED |
2189                                           RX_FLAG_PN_VALIDATED;
2190        }
2191
2192        ath11k_dp_rx_h_csum_offload(msdu);
2193        ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,
2194                               enctype, rx_status, is_decrypted);
2195
2196        if (!is_decrypted || fill_crypto_hdr)
2197                return;
2198
2199        hdr = (void *)msdu->data;
2200        hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2201}
2202
2203static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc,
2204                                struct ieee80211_rx_status *rx_status)
2205{
2206        struct ieee80211_supported_band *sband;
2207        enum rx_msdu_start_pkt_type pkt_type;
2208        u8 bw;
2209        u8 rate_mcs, nss;
2210        u8 sgi;
2211        bool is_cck;
2212
2213        pkt_type = ath11k_dp_rx_h_msdu_start_pkt_type(rx_desc);
2214        bw = ath11k_dp_rx_h_msdu_start_rx_bw(rx_desc);
2215        rate_mcs = ath11k_dp_rx_h_msdu_start_rate_mcs(rx_desc);
2216        nss = ath11k_dp_rx_h_msdu_start_nss(rx_desc);
2217        sgi = ath11k_dp_rx_h_msdu_start_sgi(rx_desc);
2218
2219        switch (pkt_type) {
2220        case RX_MSDU_START_PKT_TYPE_11A:
2221        case RX_MSDU_START_PKT_TYPE_11B:
2222                is_cck = (pkt_type == RX_MSDU_START_PKT_TYPE_11B);
2223                sband = &ar->mac.sbands[rx_status->band];
2224                rx_status->rate_idx = ath11k_mac_hw_rate_to_idx(sband, rate_mcs,
2225                                                                is_cck);
2226                break;
2227        case RX_MSDU_START_PKT_TYPE_11N:
2228                rx_status->encoding = RX_ENC_HT;
2229                if (rate_mcs > ATH11K_HT_MCS_MAX) {
2230                        ath11k_warn(ar->ab,
2231                                    "Received with invalid mcs in HT mode %d\n",
2232                                     rate_mcs);
2233                        break;
2234                }
2235                rx_status->rate_idx = rate_mcs + (8 * (nss - 1));
2236                if (sgi)
2237                        rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2238                rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2239                break;
2240        case RX_MSDU_START_PKT_TYPE_11AC:
2241                rx_status->encoding = RX_ENC_VHT;
2242                rx_status->rate_idx = rate_mcs;
2243                if (rate_mcs > ATH11K_VHT_MCS_MAX) {
2244                        ath11k_warn(ar->ab,
2245                                    "Received with invalid mcs in VHT mode %d\n",
2246                                     rate_mcs);
2247                        break;
2248                }
2249                rx_status->nss = nss;
2250                if (sgi)
2251                        rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2252                rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2253                break;
2254        case RX_MSDU_START_PKT_TYPE_11AX:
2255                rx_status->rate_idx = rate_mcs;
2256                if (rate_mcs > ATH11K_HE_MCS_MAX) {
2257                        ath11k_warn(ar->ab,
2258                                    "Received with invalid mcs in HE mode %d\n",
2259                                    rate_mcs);
2260                        break;
2261                }
2262                rx_status->encoding = RX_ENC_HE;
2263                rx_status->nss = nss;
2264                rx_status->he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi);
2265                rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2266                break;
2267        }
2268}
2269
2270static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,
2271                                struct ieee80211_rx_status *rx_status)
2272{
2273        u8 channel_num;
2274        u32 center_freq;
2275
2276        rx_status->freq = 0;
2277        rx_status->rate_idx = 0;
2278        rx_status->nss = 0;
2279        rx_status->encoding = RX_ENC_LEGACY;
2280        rx_status->bw = RATE_INFO_BW_20;
2281
2282        rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2283
2284        channel_num = ath11k_dp_rx_h_msdu_start_freq(rx_desc);
2285        center_freq = ath11k_dp_rx_h_msdu_start_freq(rx_desc) >> 16;
2286
2287        if (center_freq >= 5935 && center_freq <= 7105) {
2288                rx_status->band = NL80211_BAND_6GHZ;
2289        } else if (channel_num >= 1 && channel_num <= 14) {
2290                rx_status->band = NL80211_BAND_2GHZ;
2291        } else if (channel_num >= 36 && channel_num <= 173) {
2292                rx_status->band = NL80211_BAND_5GHZ;
2293        } else {
2294                spin_lock_bh(&ar->data_lock);
2295                rx_status->band = ar->rx_channel->band;
2296                channel_num =
2297                        ieee80211_frequency_to_channel(ar->rx_channel->center_freq);
2298                spin_unlock_bh(&ar->data_lock);
2299                ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "rx_desc: ",
2300                                rx_desc, sizeof(struct hal_rx_desc));
2301        }
2302
2303        rx_status->freq = ieee80211_channel_to_frequency(channel_num,
2304                                                         rx_status->band);
2305
2306        ath11k_dp_rx_h_rate(ar, rx_desc, rx_status);
2307}
2308
2309static char *ath11k_print_get_tid(struct ieee80211_hdr *hdr, char *out,
2310                                  size_t size)
2311{
2312        u8 *qc;
2313        int tid;
2314
2315        if (!ieee80211_is_data_qos(hdr->frame_control))
2316                return "";
2317
2318        qc = ieee80211_get_qos_ctl(hdr);
2319        tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
2320        snprintf(out, size, "tid %d", tid);
2321
2322        return out;
2323}
2324
2325static void ath11k_dp_rx_deliver_msdu(struct ath11k *ar, struct napi_struct *napi,
2326                                      struct sk_buff *msdu)
2327{
2328        static const struct ieee80211_radiotap_he known = {
2329                .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
2330                                     IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
2331                .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
2332        };
2333        struct ieee80211_rx_status *status;
2334        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
2335        struct ieee80211_radiotap_he *he = NULL;
2336        char tid[32];
2337
2338        status = IEEE80211_SKB_RXCB(msdu);
2339        if (status->encoding == RX_ENC_HE) {
2340                he = skb_push(msdu, sizeof(known));
2341                memcpy(he, &known, sizeof(known));
2342                status->flag |= RX_FLAG_RADIOTAP_HE;
2343        }
2344
2345        ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
2346                   "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
2347                   msdu,
2348                   msdu->len,
2349                   ieee80211_get_SA(hdr),
2350                   ath11k_print_get_tid(hdr, tid, sizeof(tid)),
2351                   is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
2352                                                        "mcast" : "ucast",
2353                   (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
2354                   (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
2355                   (status->encoding == RX_ENC_HT) ? "ht" : "",
2356                   (status->encoding == RX_ENC_VHT) ? "vht" : "",
2357                   (status->encoding == RX_ENC_HE) ? "he" : "",
2358                   (status->bw == RATE_INFO_BW_40) ? "40" : "",
2359                   (status->bw == RATE_INFO_BW_80) ? "80" : "",
2360                   (status->bw == RATE_INFO_BW_160) ? "160" : "",
2361                   status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
2362                   status->rate_idx,
2363                   status->nss,
2364                   status->freq,
2365                   status->band, status->flag,
2366                   !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
2367                   !!(status->flag & RX_FLAG_MMIC_ERROR),
2368                   !!(status->flag & RX_FLAG_AMSDU_MORE));
2369
2370        ath11k_dbg_dump(ar->ab, ATH11K_DBG_DP_RX, NULL, "dp rx msdu: ",
2371                        msdu->data, msdu->len);
2372
2373        /* TODO: trace rx packet */
2374
2375        ieee80211_rx_napi(ar->hw, NULL, msdu, napi);
2376}
2377
2378static int ath11k_dp_rx_process_msdu(struct ath11k *ar,
2379                                     struct sk_buff *msdu,
2380                                     struct sk_buff_head *msdu_list)
2381{
2382        struct hal_rx_desc *rx_desc, *lrx_desc;
2383        struct ieee80211_rx_status rx_status = {0};
2384        struct ieee80211_rx_status *status;
2385        struct ath11k_skb_rxcb *rxcb;
2386        struct ieee80211_hdr *hdr;
2387        struct sk_buff *last_buf;
2388        u8 l3_pad_bytes;
2389        u8 *hdr_status;
2390        u16 msdu_len;
2391        int ret;
2392
2393        last_buf = ath11k_dp_rx_get_msdu_last_buf(msdu_list, msdu);
2394        if (!last_buf) {
2395                ath11k_warn(ar->ab,
2396                            "No valid Rx buffer to access Atten/MSDU_END/MPDU_END tlvs\n");
2397                ret = -EIO;
2398                goto free_out;
2399        }
2400
2401        rx_desc = (struct hal_rx_desc *)msdu->data;
2402        lrx_desc = (struct hal_rx_desc *)last_buf->data;
2403        if (!ath11k_dp_rx_h_attn_msdu_done(lrx_desc)) {
2404                ath11k_warn(ar->ab, "msdu_done bit in attention is not set\n");
2405                ret = -EIO;
2406                goto free_out;
2407        }
2408
2409        rxcb = ATH11K_SKB_RXCB(msdu);
2410        rxcb->rx_desc = rx_desc;
2411        msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(rx_desc);
2412        l3_pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(lrx_desc);
2413
2414        if (rxcb->is_frag) {
2415                skb_pull(msdu, HAL_RX_DESC_SIZE);
2416        } else if (!rxcb->is_continuation) {
2417                if ((msdu_len + HAL_RX_DESC_SIZE) > DP_RX_BUFFER_SIZE) {
2418                        hdr_status = ath11k_dp_rx_h_80211_hdr(rx_desc);
2419                        ret = -EINVAL;
2420                        ath11k_warn(ar->ab, "invalid msdu len %u\n", msdu_len);
2421                        ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
2422                                        sizeof(struct ieee80211_hdr));
2423                        ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
2424                                        sizeof(struct hal_rx_desc));
2425                        goto free_out;
2426                }
2427                skb_put(msdu, HAL_RX_DESC_SIZE + l3_pad_bytes + msdu_len);
2428                skb_pull(msdu, HAL_RX_DESC_SIZE + l3_pad_bytes);
2429        } else {
2430                ret = ath11k_dp_rx_msdu_coalesce(ar, msdu_list,
2431                                                 msdu, last_buf,
2432                                                 l3_pad_bytes, msdu_len);
2433                if (ret) {
2434                        ath11k_warn(ar->ab,
2435                                    "failed to coalesce msdu rx buffer%d\n", ret);
2436                        goto free_out;
2437                }
2438        }
2439
2440        hdr = (struct ieee80211_hdr *)msdu->data;
2441
2442        /* Process only data frames */
2443        if (!ieee80211_is_data(hdr->frame_control))
2444                return -EINVAL;
2445
2446        ath11k_dp_rx_h_ppdu(ar, rx_desc, &rx_status);
2447        ath11k_dp_rx_h_mpdu(ar, msdu, rx_desc, &rx_status);
2448
2449        rx_status.flag |= RX_FLAG_SKIP_MONITOR | RX_FLAG_DUP_VALIDATED;
2450
2451        status = IEEE80211_SKB_RXCB(msdu);
2452        *status = rx_status;
2453        return 0;
2454
2455free_out:
2456        return ret;
2457}
2458
2459static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,
2460                                                  struct napi_struct *napi,
2461                                                  struct sk_buff_head *msdu_list,
2462                                                  int *quota, int ring_id)
2463{
2464        struct ath11k_skb_rxcb *rxcb;
2465        struct sk_buff *msdu;
2466        struct ath11k *ar;
2467        u8 mac_id;
2468        int ret;
2469
2470        if (skb_queue_empty(msdu_list))
2471                return;
2472
2473        rcu_read_lock();
2474
2475        while (*quota && (msdu = __skb_dequeue(msdu_list))) {
2476                rxcb = ATH11K_SKB_RXCB(msdu);
2477                mac_id = rxcb->mac_id;
2478                ar = ab->pdevs[mac_id].ar;
2479                if (!rcu_dereference(ab->pdevs_active[mac_id])) {
2480                        dev_kfree_skb_any(msdu);
2481                        continue;
2482                }
2483
2484                if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
2485                        dev_kfree_skb_any(msdu);
2486                        continue;
2487                }
2488
2489                ret = ath11k_dp_rx_process_msdu(ar, msdu, msdu_list);
2490                if (ret) {
2491                        ath11k_dbg(ab, ATH11K_DBG_DATA,
2492                                   "Unable to process msdu %d", ret);
2493                        dev_kfree_skb_any(msdu);
2494                        continue;
2495                }
2496
2497                ath11k_dp_rx_deliver_msdu(ar, napi, msdu);
2498                (*quota)--;
2499        }
2500
2501        rcu_read_unlock();
2502}
2503
2504int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
2505                         struct napi_struct *napi, int budget)
2506{
2507        struct ath11k_dp *dp = &ab->dp;
2508        struct dp_rxdma_ring *rx_ring;
2509        int num_buffs_reaped[MAX_RADIOS] = {0};
2510        struct sk_buff_head msdu_list;
2511        struct ath11k_skb_rxcb *rxcb;
2512        int total_msdu_reaped = 0;
2513        struct hal_srng *srng;
2514        struct sk_buff *msdu;
2515        int quota = budget;
2516        bool done = false;
2517        int buf_id, mac_id;
2518        struct ath11k *ar;
2519        u32 *rx_desc;
2520        int i;
2521
2522        __skb_queue_head_init(&msdu_list);
2523
2524        srng = &ab->hal.srng_list[dp->reo_dst_ring[ring_id].ring_id];
2525
2526        spin_lock_bh(&srng->lock);
2527
2528        ath11k_hal_srng_access_begin(ab, srng);
2529
2530try_again:
2531        while ((rx_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
2532                struct hal_reo_dest_ring desc = *(struct hal_reo_dest_ring *)rx_desc;
2533                enum hal_reo_dest_ring_push_reason push_reason;
2534                u32 cookie;
2535
2536                cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
2537                                   desc.buf_addr_info.info1);
2538                buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
2539                                   cookie);
2540                mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
2541
2542                ar = ab->pdevs[mac_id].ar;
2543                rx_ring = &ar->dp.rx_refill_buf_ring;
2544                spin_lock_bh(&rx_ring->idr_lock);
2545                msdu = idr_find(&rx_ring->bufs_idr, buf_id);
2546                if (!msdu) {
2547                        ath11k_warn(ab, "frame rx with invalid buf_id %d\n",
2548                                    buf_id);
2549                        spin_unlock_bh(&rx_ring->idr_lock);
2550                        continue;
2551                }
2552
2553                idr_remove(&rx_ring->bufs_idr, buf_id);
2554                spin_unlock_bh(&rx_ring->idr_lock);
2555
2556                rxcb = ATH11K_SKB_RXCB(msdu);
2557                dma_unmap_single(ab->dev, rxcb->paddr,
2558                                 msdu->len + skb_tailroom(msdu),
2559                                 DMA_FROM_DEVICE);
2560
2561                num_buffs_reaped[mac_id]++;
2562                total_msdu_reaped++;
2563
2564                push_reason = FIELD_GET(HAL_REO_DEST_RING_INFO0_PUSH_REASON,
2565                                        desc.info0);
2566                if (push_reason !=
2567                    HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION) {
2568                        dev_kfree_skb_any(msdu);
2569                        ab->soc_stats.hal_reo_error[dp->reo_dst_ring[ring_id].ring_id]++;
2570                        continue;
2571                }
2572
2573                rxcb->is_first_msdu = !!(desc.rx_msdu_info.info0 &
2574                                         RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU);
2575                rxcb->is_last_msdu = !!(desc.rx_msdu_info.info0 &
2576                                        RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU);
2577                rxcb->is_continuation = !!(desc.rx_msdu_info.info0 &
2578                                           RX_MSDU_DESC_INFO0_MSDU_CONTINUATION);
2579                rxcb->mac_id = mac_id;
2580                rxcb->tid = FIELD_GET(HAL_REO_DEST_RING_INFO0_RX_QUEUE_NUM,
2581                                      desc.info0);
2582
2583                __skb_queue_tail(&msdu_list, msdu);
2584
2585                if (total_msdu_reaped >= quota && !rxcb->is_continuation) {
2586                        done = true;
2587                        break;
2588                }
2589        }
2590
2591        /* Hw might have updated the head pointer after we cached it.
2592         * In this case, even though there are entries in the ring we'll
2593         * get rx_desc NULL. Give the read another try with updated cached
2594         * head pointer so that we can reap complete MPDU in the current
2595         * rx processing.
2596         */
2597        if (!done && ath11k_hal_srng_dst_num_free(ab, srng, true)) {
2598                ath11k_hal_srng_access_end(ab, srng);
2599                goto try_again;
2600        }
2601
2602        ath11k_hal_srng_access_end(ab, srng);
2603
2604        spin_unlock_bh(&srng->lock);
2605
2606        if (!total_msdu_reaped)
2607                goto exit;
2608
2609        for (i = 0; i < ab->num_radios; i++) {
2610                if (!num_buffs_reaped[i])
2611                        continue;
2612
2613                ar = ab->pdevs[i].ar;
2614                rx_ring = &ar->dp.rx_refill_buf_ring;
2615
2616                ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],
2617                                           HAL_RX_BUF_RBM_SW3_BM);
2618        }
2619
2620        ath11k_dp_rx_process_received_packets(ab, napi, &msdu_list,
2621                                              &quota, ring_id);
2622
2623exit:
2624        return budget - quota;
2625}
2626
2627static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,
2628                                           struct hal_rx_mon_ppdu_info *ppdu_info)
2629{
2630        struct ath11k_rx_peer_stats *rx_stats = arsta->rx_stats;
2631        u32 num_msdu;
2632
2633        if (!rx_stats)
2634                return;
2635
2636        num_msdu = ppdu_info->tcp_msdu_count + ppdu_info->tcp_ack_msdu_count +
2637                   ppdu_info->udp_msdu_count + ppdu_info->other_msdu_count;
2638
2639        rx_stats->num_msdu += num_msdu;
2640        rx_stats->tcp_msdu_count += ppdu_info->tcp_msdu_count +
2641                                    ppdu_info->tcp_ack_msdu_count;
2642        rx_stats->udp_msdu_count += ppdu_info->udp_msdu_count;
2643        rx_stats->other_msdu_count += ppdu_info->other_msdu_count;
2644
2645        if (ppdu_info->preamble_type == HAL_RX_PREAMBLE_11A ||
2646            ppdu_info->preamble_type == HAL_RX_PREAMBLE_11B) {
2647                ppdu_info->nss = 1;
2648                ppdu_info->mcs = HAL_RX_MAX_MCS;
2649                ppdu_info->tid = IEEE80211_NUM_TIDS;
2650        }
2651
2652        if (ppdu_info->nss > 0 && ppdu_info->nss <= HAL_RX_MAX_NSS)
2653                rx_stats->nss_count[ppdu_info->nss - 1] += num_msdu;
2654
2655        if (ppdu_info->mcs <= HAL_RX_MAX_MCS)
2656                rx_stats->mcs_count[ppdu_info->mcs] += num_msdu;
2657
2658        if (ppdu_info->gi < HAL_RX_GI_MAX)
2659                rx_stats->gi_count[ppdu_info->gi] += num_msdu;
2660
2661        if (ppdu_info->bw < HAL_RX_BW_MAX)
2662                rx_stats->bw_count[ppdu_info->bw] += num_msdu;
2663
2664        if (ppdu_info->ldpc < HAL_RX_SU_MU_CODING_MAX)
2665                rx_stats->coding_count[ppdu_info->ldpc] += num_msdu;
2666
2667        if (ppdu_info->tid <= IEEE80211_NUM_TIDS)
2668                rx_stats->tid_count[ppdu_info->tid] += num_msdu;
2669
2670        if (ppdu_info->preamble_type < HAL_RX_PREAMBLE_MAX)
2671                rx_stats->pream_cnt[ppdu_info->preamble_type] += num_msdu;
2672
2673        if (ppdu_info->reception_type < HAL_RX_RECEPTION_TYPE_MAX)
2674                rx_stats->reception_type[ppdu_info->reception_type] += num_msdu;
2675
2676        if (ppdu_info->is_stbc)
2677                rx_stats->stbc_count += num_msdu;
2678
2679        if (ppdu_info->beamformed)
2680                rx_stats->beamformed_count += num_msdu;
2681
2682        if (ppdu_info->num_mpdu_fcs_ok > 1)
2683                rx_stats->ampdu_msdu_count += num_msdu;
2684        else
2685                rx_stats->non_ampdu_msdu_count += num_msdu;
2686
2687        rx_stats->num_mpdu_fcs_ok += ppdu_info->num_mpdu_fcs_ok;
2688        rx_stats->num_mpdu_fcs_err += ppdu_info->num_mpdu_fcs_err;
2689        rx_stats->dcm_count += ppdu_info->dcm;
2690        rx_stats->ru_alloc_cnt[ppdu_info->ru_alloc] += num_msdu;
2691
2692        arsta->rssi_comb = ppdu_info->rssi_comb;
2693        rx_stats->rx_duration += ppdu_info->rx_duration;
2694        arsta->rx_duration = rx_stats->rx_duration;
2695}
2696
2697static struct sk_buff *ath11k_dp_rx_alloc_mon_status_buf(struct ath11k_base *ab,
2698                                                         struct dp_rxdma_ring *rx_ring,
2699                                                         int *buf_id)
2700{
2701        struct sk_buff *skb;
2702        dma_addr_t paddr;
2703
2704        skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +
2705                            DP_RX_BUFFER_ALIGN_SIZE);
2706
2707        if (!skb)
2708                goto fail_alloc_skb;
2709
2710        if (!IS_ALIGNED((unsigned long)skb->data,
2711                        DP_RX_BUFFER_ALIGN_SIZE)) {
2712                skb_pull(skb, PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -
2713                         skb->data);
2714        }
2715
2716        paddr = dma_map_single(ab->dev, skb->data,
2717                               skb->len + skb_tailroom(skb),
2718                               DMA_BIDIRECTIONAL);
2719        if (unlikely(dma_mapping_error(ab->dev, paddr)))
2720                goto fail_free_skb;
2721
2722        spin_lock_bh(&rx_ring->idr_lock);
2723        *buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
2724                            rx_ring->bufs_max, GFP_ATOMIC);
2725        spin_unlock_bh(&rx_ring->idr_lock);
2726        if (*buf_id < 0)
2727                goto fail_dma_unmap;
2728
2729        ATH11K_SKB_RXCB(skb)->paddr = paddr;
2730        return skb;
2731
2732fail_dma_unmap:
2733        dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
2734                         DMA_BIDIRECTIONAL);
2735fail_free_skb:
2736        dev_kfree_skb_any(skb);
2737fail_alloc_skb:
2738        return NULL;
2739}
2740
2741int ath11k_dp_rx_mon_status_bufs_replenish(struct ath11k_base *ab, int mac_id,
2742                                           struct dp_rxdma_ring *rx_ring,
2743                                           int req_entries,
2744                                           enum hal_rx_buf_return_buf_manager mgr)
2745{
2746        struct hal_srng *srng;
2747        u32 *desc;
2748        struct sk_buff *skb;
2749        int num_free;
2750        int num_remain;
2751        int buf_id;
2752        u32 cookie;
2753        dma_addr_t paddr;
2754
2755        req_entries = min(req_entries, rx_ring->bufs_max);
2756
2757        srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
2758
2759        spin_lock_bh(&srng->lock);
2760
2761        ath11k_hal_srng_access_begin(ab, srng);
2762
2763        num_free = ath11k_hal_srng_src_num_free(ab, srng, true);
2764
2765        req_entries = min(num_free, req_entries);
2766        num_remain = req_entries;
2767
2768        while (num_remain > 0) {
2769                skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,
2770                                                        &buf_id);
2771                if (!skb)
2772                        break;
2773                paddr = ATH11K_SKB_RXCB(skb)->paddr;
2774
2775                desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
2776                if (!desc)
2777                        goto fail_desc_get;
2778
2779                cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
2780                         FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
2781
2782                num_remain--;
2783
2784                ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);
2785        }
2786
2787        ath11k_hal_srng_access_end(ab, srng);
2788
2789        spin_unlock_bh(&srng->lock);
2790
2791        return req_entries - num_remain;
2792
2793fail_desc_get:
2794        spin_lock_bh(&rx_ring->idr_lock);
2795        idr_remove(&rx_ring->bufs_idr, buf_id);
2796        spin_unlock_bh(&rx_ring->idr_lock);
2797        dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
2798                         DMA_BIDIRECTIONAL);
2799        dev_kfree_skb_any(skb);
2800        ath11k_hal_srng_access_end(ab, srng);
2801        spin_unlock_bh(&srng->lock);
2802
2803        return req_entries - num_remain;
2804}
2805
2806static int ath11k_dp_rx_reap_mon_status_ring(struct ath11k_base *ab, int mac_id,
2807                                             int *budget, struct sk_buff_head *skb_list)
2808{
2809        struct ath11k *ar;
2810        struct ath11k_pdev_dp *dp;
2811        struct dp_rxdma_ring *rx_ring;
2812        struct hal_srng *srng;
2813        void *rx_mon_status_desc;
2814        struct sk_buff *skb;
2815        struct ath11k_skb_rxcb *rxcb;
2816        struct hal_tlv_hdr *tlv;
2817        u32 cookie;
2818        int buf_id, srng_id;
2819        dma_addr_t paddr;
2820        u8 rbm;
2821        int num_buffs_reaped = 0;
2822
2823        ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
2824        dp = &ar->dp;
2825        srng_id = ath11k_hw_mac_id_to_srng_id(&ab->hw_params, mac_id);
2826        rx_ring = &dp->rx_mon_status_refill_ring[srng_id];
2827
2828        srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
2829
2830        spin_lock_bh(&srng->lock);
2831
2832        ath11k_hal_srng_access_begin(ab, srng);
2833        while (*budget) {
2834                *budget -= 1;
2835                rx_mon_status_desc =
2836                        ath11k_hal_srng_src_peek(ab, srng);
2837                if (!rx_mon_status_desc)
2838                        break;
2839
2840                ath11k_hal_rx_buf_addr_info_get(rx_mon_status_desc, &paddr,
2841                                                &cookie, &rbm);
2842                if (paddr) {
2843                        buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, cookie);
2844
2845                        spin_lock_bh(&rx_ring->idr_lock);
2846                        skb = idr_find(&rx_ring->bufs_idr, buf_id);
2847                        if (!skb) {
2848                                ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",
2849                                            buf_id);
2850                                spin_unlock_bh(&rx_ring->idr_lock);
2851                                goto move_next;
2852                        }
2853
2854                        idr_remove(&rx_ring->bufs_idr, buf_id);
2855                        spin_unlock_bh(&rx_ring->idr_lock);
2856
2857                        rxcb = ATH11K_SKB_RXCB(skb);
2858
2859                        dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
2860                                                skb->len + skb_tailroom(skb),
2861                                                DMA_FROM_DEVICE);
2862
2863                        dma_unmap_single(ab->dev, rxcb->paddr,
2864                                         skb->len + skb_tailroom(skb),
2865                                         DMA_BIDIRECTIONAL);
2866
2867                        tlv = (struct hal_tlv_hdr *)skb->data;
2868                        if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=
2869                                        HAL_RX_STATUS_BUFFER_DONE) {
2870                                ath11k_warn(ab, "mon status DONE not set %lx\n",
2871                                            FIELD_GET(HAL_TLV_HDR_TAG,
2872                                                      tlv->tl));
2873                                dev_kfree_skb_any(skb);
2874                                goto move_next;
2875                        }
2876
2877                        __skb_queue_tail(skb_list, skb);
2878                }
2879move_next:
2880                skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,
2881                                                        &buf_id);
2882
2883                if (!skb) {
2884                        ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, 0, 0,
2885                                                        HAL_RX_BUF_RBM_SW3_BM);
2886                        num_buffs_reaped++;
2887                        break;
2888                }
2889                rxcb = ATH11K_SKB_RXCB(skb);
2890
2891                cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
2892                         FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
2893
2894                ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, rxcb->paddr,
2895                                                cookie, HAL_RX_BUF_RBM_SW3_BM);
2896                ath11k_hal_srng_src_get_next_entry(ab, srng);
2897                num_buffs_reaped++;
2898        }
2899        ath11k_hal_srng_access_end(ab, srng);
2900        spin_unlock_bh(&srng->lock);
2901
2902        return num_buffs_reaped;
2903}
2904
2905int ath11k_dp_rx_process_mon_status(struct ath11k_base *ab, int mac_id,
2906                                    struct napi_struct *napi, int budget)
2907{
2908        struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);
2909        enum hal_rx_mon_status hal_status;
2910        struct sk_buff *skb;
2911        struct sk_buff_head skb_list;
2912        struct hal_rx_mon_ppdu_info ppdu_info;
2913        struct ath11k_peer *peer;
2914        struct ath11k_sta *arsta;
2915        int num_buffs_reaped = 0;
2916
2917        __skb_queue_head_init(&skb_list);
2918
2919        num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ab, mac_id, &budget,
2920                                                             &skb_list);
2921        if (!num_buffs_reaped)
2922                goto exit;
2923
2924        while ((skb = __skb_dequeue(&skb_list))) {
2925                memset(&ppdu_info, 0, sizeof(ppdu_info));
2926                ppdu_info.peer_id = HAL_INVALID_PEERID;
2927
2928                if (ath11k_debugfs_is_pktlog_rx_stats_enabled(ar))
2929                        trace_ath11k_htt_rxdesc(ar, skb->data, DP_RX_BUFFER_SIZE);
2930
2931                hal_status = ath11k_hal_rx_parse_mon_status(ab, &ppdu_info, skb);
2932
2933                if (ppdu_info.peer_id == HAL_INVALID_PEERID ||
2934                    hal_status != HAL_RX_MON_STATUS_PPDU_DONE) {
2935                        dev_kfree_skb_any(skb);
2936                        continue;
2937                }
2938
2939                rcu_read_lock();
2940                spin_lock_bh(&ab->base_lock);
2941                peer = ath11k_peer_find_by_id(ab, ppdu_info.peer_id);
2942
2943                if (!peer || !peer->sta) {
2944                        ath11k_dbg(ab, ATH11K_DBG_DATA,
2945                                   "failed to find the peer with peer_id %d\n",
2946                                   ppdu_info.peer_id);
2947                        spin_unlock_bh(&ab->base_lock);
2948                        rcu_read_unlock();
2949                        dev_kfree_skb_any(skb);
2950                        continue;
2951                }
2952
2953                arsta = (struct ath11k_sta *)peer->sta->drv_priv;
2954                ath11k_dp_rx_update_peer_stats(arsta, &ppdu_info);
2955
2956                if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr))
2957                        trace_ath11k_htt_rxdesc(ar, skb->data, DP_RX_BUFFER_SIZE);
2958
2959                spin_unlock_bh(&ab->base_lock);
2960                rcu_read_unlock();
2961
2962                dev_kfree_skb_any(skb);
2963        }
2964exit:
2965        return num_buffs_reaped;
2966}
2967
2968static void ath11k_dp_rx_frag_timer(struct timer_list *timer)
2969{
2970        struct dp_rx_tid *rx_tid = from_timer(rx_tid, timer, frag_timer);
2971
2972        spin_lock_bh(&rx_tid->ab->base_lock);
2973        if (rx_tid->last_frag_no &&
2974            rx_tid->rx_frag_bitmap == GENMASK(rx_tid->last_frag_no, 0)) {
2975                spin_unlock_bh(&rx_tid->ab->base_lock);
2976                return;
2977        }
2978        ath11k_dp_rx_frags_cleanup(rx_tid, true);
2979        spin_unlock_bh(&rx_tid->ab->base_lock);
2980}
2981
2982int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id)
2983{
2984        struct ath11k_base *ab = ar->ab;
2985        struct crypto_shash *tfm;
2986        struct ath11k_peer *peer;
2987        struct dp_rx_tid *rx_tid;
2988        int i;
2989
2990        tfm = crypto_alloc_shash("michael_mic", 0, 0);
2991        if (IS_ERR(tfm))
2992                return PTR_ERR(tfm);
2993
2994        spin_lock_bh(&ab->base_lock);
2995
2996        peer = ath11k_peer_find(ab, vdev_id, peer_mac);
2997        if (!peer) {
2998                ath11k_warn(ab, "failed to find the peer to set up fragment info\n");
2999                spin_unlock_bh(&ab->base_lock);
3000                return -ENOENT;
3001        }
3002
3003        for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {
3004                rx_tid = &peer->rx_tid[i];
3005                rx_tid->ab = ab;
3006                timer_setup(&rx_tid->frag_timer, ath11k_dp_rx_frag_timer, 0);
3007                skb_queue_head_init(&rx_tid->rx_frags);
3008        }
3009
3010        peer->tfm_mmic = tfm;
3011        spin_unlock_bh(&ab->base_lock);
3012
3013        return 0;
3014}
3015
3016static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
3017                                      struct ieee80211_hdr *hdr, u8 *data,
3018                                      size_t data_len, u8 *mic)
3019{
3020        SHASH_DESC_ON_STACK(desc, tfm);
3021        u8 mic_hdr[16] = {0};
3022        u8 tid = 0;
3023        int ret;
3024
3025        if (!tfm)
3026                return -EINVAL;
3027
3028        desc->tfm = tfm;
3029
3030        ret = crypto_shash_setkey(tfm, key, 8);
3031        if (ret)
3032                goto out;
3033
3034        ret = crypto_shash_init(desc);
3035        if (ret)
3036                goto out;
3037
3038        /* TKIP MIC header */
3039        memcpy(mic_hdr, ieee80211_get_DA(hdr), ETH_ALEN);
3040        memcpy(mic_hdr + ETH_ALEN, ieee80211_get_SA(hdr), ETH_ALEN);
3041        if (ieee80211_is_data_qos(hdr->frame_control))
3042                tid = ieee80211_get_tid(hdr);
3043        mic_hdr[12] = tid;
3044
3045        ret = crypto_shash_update(desc, mic_hdr, 16);
3046        if (ret)
3047                goto out;
3048        ret = crypto_shash_update(desc, data, data_len);
3049        if (ret)
3050                goto out;
3051        ret = crypto_shash_final(desc, mic);
3052out:
3053        shash_desc_zero(desc);
3054        return ret;
3055}
3056
3057static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer *peer,
3058                                          struct sk_buff *msdu)
3059{
3060        struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)msdu->data;
3061        struct ieee80211_rx_status *rxs = IEEE80211_SKB_RXCB(msdu);
3062        struct ieee80211_key_conf *key_conf;
3063        struct ieee80211_hdr *hdr;
3064        u8 mic[IEEE80211_CCMP_MIC_LEN];
3065        int head_len, tail_len, ret;
3066        size_t data_len;
3067        u32 hdr_len;
3068        u8 *key, *data;
3069        u8 key_idx;
3070
3071        if (ath11k_dp_rx_h_mpdu_start_enctype(rx_desc) != HAL_ENCRYPT_TYPE_TKIP_MIC)
3072                return 0;
3073
3074        hdr = (struct ieee80211_hdr *)(msdu->data + HAL_RX_DESC_SIZE);
3075        hdr_len = ieee80211_hdrlen(hdr->frame_control);
3076        head_len = hdr_len + HAL_RX_DESC_SIZE + IEEE80211_TKIP_IV_LEN;
3077        tail_len = IEEE80211_CCMP_MIC_LEN + IEEE80211_TKIP_ICV_LEN + FCS_LEN;
3078
3079        if (!is_multicast_ether_addr(hdr->addr1))
3080                key_idx = peer->ucast_keyidx;
3081        else
3082                key_idx = peer->mcast_keyidx;
3083
3084        key_conf = peer->keys[key_idx];
3085
3086        data = msdu->data + head_len;
3087        data_len = msdu->len - head_len - tail_len;
3088        key = &key_conf->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
3089
3090        ret = ath11k_dp_rx_h_michael_mic(peer->tfm_mmic, key, hdr, data, data_len, mic);
3091        if (ret || memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
3092                goto mic_fail;
3093
3094        return 0;
3095
3096mic_fail:
3097        (ATH11K_SKB_RXCB(msdu))->is_first_msdu = true;
3098        (ATH11K_SKB_RXCB(msdu))->is_last_msdu = true;
3099
3100        rxs->flag |= RX_FLAG_MMIC_ERROR | RX_FLAG_MMIC_STRIPPED |
3101                    RX_FLAG_IV_STRIPPED | RX_FLAG_DECRYPTED;
3102        skb_pull(msdu, HAL_RX_DESC_SIZE);
3103
3104        ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);
3105        ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,
3106                               HAL_ENCRYPT_TYPE_TKIP_MIC, rxs, true);
3107        ieee80211_rx(ar->hw, msdu);
3108        return -EINVAL;
3109}
3110
3111static void ath11k_dp_rx_h_undecap_frag(struct ath11k *ar, struct sk_buff *msdu,
3112                                        enum hal_encrypt_type enctype, u32 flags)
3113{
3114        struct ieee80211_hdr *hdr;
3115        size_t hdr_len;
3116        size_t crypto_len;
3117
3118        if (!flags)
3119                return;
3120
3121        hdr = (struct ieee80211_hdr *)(msdu->data + HAL_RX_DESC_SIZE);
3122
3123        if (flags & RX_FLAG_MIC_STRIPPED)
3124                skb_trim(msdu, msdu->len -
3125                         ath11k_dp_rx_crypto_mic_len(ar, enctype));
3126
3127        if (flags & RX_FLAG_ICV_STRIPPED)
3128                skb_trim(msdu, msdu->len -
3129                         ath11k_dp_rx_crypto_icv_len(ar, enctype));
3130
3131        if (flags & RX_FLAG_IV_STRIPPED) {
3132                hdr_len = ieee80211_hdrlen(hdr->frame_control);
3133                crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
3134
3135                memmove((void *)msdu->data + HAL_RX_DESC_SIZE + crypto_len,
3136                        (void *)msdu->data + HAL_RX_DESC_SIZE, hdr_len);
3137                skb_pull(msdu, crypto_len);
3138        }
3139}
3140
3141static int ath11k_dp_rx_h_defrag(struct ath11k *ar,
3142                                 struct ath11k_peer *peer,
3143                                 struct dp_rx_tid *rx_tid,
3144                                 struct sk_buff **defrag_skb)
3145{
3146        struct hal_rx_desc *rx_desc;
3147        struct sk_buff *skb, *first_frag, *last_frag;
3148        struct ieee80211_hdr *hdr;
3149        enum hal_encrypt_type enctype;
3150        bool is_decrypted = false;
3151        int msdu_len = 0;
3152        int extra_space;
3153        u32 flags;
3154
3155        first_frag = skb_peek(&rx_tid->rx_frags);
3156        last_frag = skb_peek_tail(&rx_tid->rx_frags);
3157
3158        skb_queue_walk(&rx_tid->rx_frags, skb) {
3159                flags = 0;
3160                rx_desc = (struct hal_rx_desc *)skb->data;
3161                hdr = (struct ieee80211_hdr *)(skb->data + HAL_RX_DESC_SIZE);
3162
3163                enctype = ath11k_dp_rx_h_mpdu_start_enctype(rx_desc);
3164                if (enctype != HAL_ENCRYPT_TYPE_OPEN)
3165                        is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_desc);
3166
3167                if (is_decrypted) {
3168                        if (skb != first_frag)
3169                                flags |=  RX_FLAG_IV_STRIPPED;
3170                        if (skb != last_frag)
3171                                flags |= RX_FLAG_ICV_STRIPPED |
3172                                         RX_FLAG_MIC_STRIPPED;
3173                }
3174
3175                /* RX fragments are always raw packets */
3176                if (skb != last_frag)
3177                        skb_trim(skb, skb->len - FCS_LEN);
3178                ath11k_dp_rx_h_undecap_frag(ar, skb, enctype, flags);
3179
3180                if (skb != first_frag)
3181                        skb_pull(skb, HAL_RX_DESC_SIZE +
3182                                      ieee80211_hdrlen(hdr->frame_control));
3183                msdu_len += skb->len;
3184        }
3185
3186        extra_space = msdu_len - (DP_RX_BUFFER_SIZE + skb_tailroom(first_frag));
3187        if (extra_space > 0 &&
3188            (pskb_expand_head(first_frag, 0, extra_space, GFP_ATOMIC) < 0))
3189                return -ENOMEM;
3190
3191        __skb_unlink(first_frag, &rx_tid->rx_frags);
3192        while ((skb = __skb_dequeue(&rx_tid->rx_frags))) {
3193                skb_put_data(first_frag, skb->data, skb->len);
3194                dev_kfree_skb_any(skb);
3195        }
3196
3197        hdr = (struct ieee80211_hdr *)(first_frag->data + HAL_RX_DESC_SIZE);
3198        hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_MOREFRAGS);
3199        ATH11K_SKB_RXCB(first_frag)->is_frag = 1;
3200
3201        if (ath11k_dp_rx_h_verify_tkip_mic(ar, peer, first_frag))
3202                first_frag = NULL;
3203
3204        *defrag_skb = first_frag;
3205        return 0;
3206}
3207
3208static int ath11k_dp_rx_h_defrag_reo_reinject(struct ath11k *ar, struct dp_rx_tid *rx_tid,
3209                                              struct sk_buff *defrag_skb)
3210{
3211        struct ath11k_base *ab = ar->ab;
3212        struct ath11k_pdev_dp *dp = &ar->dp;
3213        struct dp_rxdma_ring *rx_refill_ring = &dp->rx_refill_buf_ring;
3214        struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)defrag_skb->data;
3215        struct hal_reo_entrance_ring *reo_ent_ring;
3216        struct hal_reo_dest_ring *reo_dest_ring;
3217        struct dp_link_desc_bank *link_desc_banks;
3218        struct hal_rx_msdu_link *msdu_link;
3219        struct hal_rx_msdu_details *msdu0;
3220        struct hal_srng *srng;
3221        dma_addr_t paddr;
3222        u32 desc_bank, msdu_info, mpdu_info;
3223        u32 dst_idx, cookie;
3224        u32 *msdu_len_offset;
3225        int ret, buf_id;
3226
3227        link_desc_banks = ab->dp.link_desc_banks;
3228        reo_dest_ring = rx_tid->dst_ring_desc;
3229
3230        ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);
3231        msdu_link = (struct hal_rx_msdu_link *)(link_desc_banks[desc_bank].vaddr +
3232                        (paddr - link_desc_banks[desc_bank].paddr));
3233        msdu0 = &msdu_link->msdu_link[0];
3234        dst_idx = FIELD_GET(RX_MSDU_DESC_INFO0_REO_DEST_IND, msdu0->rx_msdu_info.info0);
3235        memset(msdu0, 0, sizeof(*msdu0));
3236
3237        msdu_info = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1) |
3238                    FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1) |
3239                    FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_CONTINUATION, 0) |
3240                    FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_LENGTH,
3241                               defrag_skb->len - HAL_RX_DESC_SIZE) |
3242                    FIELD_PREP(RX_MSDU_DESC_INFO0_REO_DEST_IND, dst_idx) |
3243                    FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_SA, 1) |
3244                    FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_DA, 1);
3245        msdu0->rx_msdu_info.info0 = msdu_info;
3246
3247        /* change msdu len in hal rx desc */
3248        msdu_len_offset = (u32 *)&rx_desc->msdu_start;
3249        *msdu_len_offset &= ~(RX_MSDU_START_INFO1_MSDU_LENGTH);
3250        *msdu_len_offset |= defrag_skb->len - HAL_RX_DESC_SIZE;
3251
3252        paddr = dma_map_single(ab->dev, defrag_skb->data,
3253                               defrag_skb->len + skb_tailroom(defrag_skb),
3254                               DMA_FROM_DEVICE);
3255        if (dma_mapping_error(ab->dev, paddr))
3256                return -ENOMEM;
3257
3258        spin_lock_bh(&rx_refill_ring->idr_lock);
3259        buf_id = idr_alloc(&rx_refill_ring->bufs_idr, defrag_skb, 0,
3260                           rx_refill_ring->bufs_max * 3, GFP_ATOMIC);
3261        spin_unlock_bh(&rx_refill_ring->idr_lock);
3262        if (buf_id < 0) {
3263                ret = -ENOMEM;
3264                goto err_unmap_dma;
3265        }
3266
3267        ATH11K_SKB_RXCB(defrag_skb)->paddr = paddr;
3268        cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, dp->mac_id) |
3269                 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
3270
3271        ath11k_hal_rx_buf_addr_info_set(msdu0, paddr, cookie, HAL_RX_BUF_RBM_SW3_BM);
3272
3273        /* Fill mpdu details into reo entrace ring */
3274        srng = &ab->hal.srng_list[ab->dp.reo_reinject_ring.ring_id];
3275
3276        spin_lock_bh(&srng->lock);
3277        ath11k_hal_srng_access_begin(ab, srng);
3278
3279        reo_ent_ring = (struct hal_reo_entrance_ring *)
3280                        ath11k_hal_srng_src_get_next_entry(ab, srng);
3281        if (!reo_ent_ring) {
3282                ath11k_hal_srng_access_end(ab, srng);
3283                spin_unlock_bh(&srng->lock);
3284                ret = -ENOSPC;
3285                goto err_free_idr;
3286        }
3287        memset(reo_ent_ring, 0, sizeof(*reo_ent_ring));
3288
3289        ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);
3290        ath11k_hal_rx_buf_addr_info_set(reo_ent_ring, paddr, desc_bank,
3291                                        HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST);
3292
3293        mpdu_info = FIELD_PREP(RX_MPDU_DESC_INFO0_MSDU_COUNT, 1) |
3294                    FIELD_PREP(RX_MPDU_DESC_INFO0_SEQ_NUM, rx_tid->cur_sn) |
3295                    FIELD_PREP(RX_MPDU_DESC_INFO0_FRAG_FLAG, 0) |
3296                    FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_SA, 1) |
3297                    FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_DA, 1) |
3298                    FIELD_PREP(RX_MPDU_DESC_INFO0_RAW_MPDU, 1) |
3299                    FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_PN, 1);
3300
3301        reo_ent_ring->rx_mpdu_info.info0 = mpdu_info;
3302        reo_ent_ring->rx_mpdu_info.meta_data = reo_dest_ring->rx_mpdu_info.meta_data;
3303        reo_ent_ring->queue_addr_lo = reo_dest_ring->queue_addr_lo;
3304        reo_ent_ring->info0 = FIELD_PREP(HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI,
3305                                         FIELD_GET(HAL_REO_DEST_RING_INFO0_QUEUE_ADDR_HI,
3306                                                   reo_dest_ring->info0)) |
3307                              FIELD_PREP(HAL_REO_ENTR_RING_INFO0_DEST_IND, dst_idx);
3308        ath11k_hal_srng_access_end(ab, srng);
3309        spin_unlock_bh(&srng->lock);
3310
3311        return 0;
3312
3313err_free_idr:
3314        spin_lock_bh(&rx_refill_ring->idr_lock);
3315        idr_remove(&rx_refill_ring->bufs_idr, buf_id);
3316        spin_unlock_bh(&rx_refill_ring->idr_lock);
3317err_unmap_dma:
3318        dma_unmap_single(ab->dev, paddr, defrag_skb->len + skb_tailroom(defrag_skb),
3319                         DMA_FROM_DEVICE);
3320        return ret;
3321}
3322
3323static int ath11k_dp_rx_h_cmp_frags(struct sk_buff *a, struct sk_buff *b)
3324{
3325        int frag1, frag2;
3326
3327        frag1 = ath11k_dp_rx_h_mpdu_start_frag_no(a);
3328        frag2 = ath11k_dp_rx_h_mpdu_start_frag_no(b);
3329
3330        return frag1 - frag2;
3331}
3332
3333static void ath11k_dp_rx_h_sort_frags(struct sk_buff_head *frag_list,
3334                                      struct sk_buff *cur_frag)
3335{
3336        struct sk_buff *skb;
3337        int cmp;
3338
3339        skb_queue_walk(frag_list, skb) {
3340                cmp = ath11k_dp_rx_h_cmp_frags(skb, cur_frag);
3341                if (cmp < 0)
3342                        continue;
3343                __skb_queue_before(frag_list, skb, cur_frag);
3344                return;
3345        }
3346        __skb_queue_tail(frag_list, cur_frag);
3347}
3348
3349static u64 ath11k_dp_rx_h_get_pn(struct sk_buff *skb)
3350{
3351        struct ieee80211_hdr *hdr;
3352        u64 pn = 0;
3353        u8 *ehdr;
3354
3355        hdr = (struct ieee80211_hdr *)(skb->data + HAL_RX_DESC_SIZE);
3356        ehdr = skb->data + HAL_RX_DESC_SIZE + ieee80211_hdrlen(hdr->frame_control);
3357
3358        pn = ehdr[0];
3359        pn |= (u64)ehdr[1] << 8;
3360        pn |= (u64)ehdr[4] << 16;
3361        pn |= (u64)ehdr[5] << 24;
3362        pn |= (u64)ehdr[6] << 32;
3363        pn |= (u64)ehdr[7] << 40;
3364
3365        return pn;
3366}
3367
3368static bool
3369ath11k_dp_rx_h_defrag_validate_incr_pn(struct ath11k *ar, struct dp_rx_tid *rx_tid)
3370{
3371        enum hal_encrypt_type encrypt_type;
3372        struct sk_buff *first_frag, *skb;
3373        struct hal_rx_desc *desc;
3374        u64 last_pn;
3375        u64 cur_pn;
3376
3377        first_frag = skb_peek(&rx_tid->rx_frags);
3378        desc = (struct hal_rx_desc *)first_frag->data;
3379
3380        encrypt_type = ath11k_dp_rx_h_mpdu_start_enctype(desc);
3381        if (encrypt_type != HAL_ENCRYPT_TYPE_CCMP_128 &&
3382            encrypt_type != HAL_ENCRYPT_TYPE_CCMP_256 &&
3383            encrypt_type != HAL_ENCRYPT_TYPE_GCMP_128 &&
3384            encrypt_type != HAL_ENCRYPT_TYPE_AES_GCMP_256)
3385                return true;
3386
3387        last_pn = ath11k_dp_rx_h_get_pn(first_frag);
3388        skb_queue_walk(&rx_tid->rx_frags, skb) {
3389                if (skb == first_frag)
3390                        continue;
3391
3392                cur_pn = ath11k_dp_rx_h_get_pn(skb);
3393                if (cur_pn != last_pn + 1)
3394                        return false;
3395                last_pn = cur_pn;
3396        }
3397        return true;
3398}
3399
3400static int ath11k_dp_rx_frag_h_mpdu(struct ath11k *ar,
3401                                    struct sk_buff *msdu,
3402                                    u32 *ring_desc)
3403{
3404        struct ath11k_base *ab = ar->ab;
3405        struct hal_rx_desc *rx_desc;
3406        struct ath11k_peer *peer;
3407        struct dp_rx_tid *rx_tid;
3408        struct sk_buff *defrag_skb = NULL;
3409        u32 peer_id;
3410        u16 seqno, frag_no;
3411        u8 tid;
3412        int ret = 0;
3413        bool more_frags;
3414
3415        rx_desc = (struct hal_rx_desc *)msdu->data;
3416        peer_id = ath11k_dp_rx_h_mpdu_start_peer_id(rx_desc);
3417        tid = ath11k_dp_rx_h_mpdu_start_tid(rx_desc);
3418        seqno = ath11k_dp_rx_h_mpdu_start_seq_no(rx_desc);
3419        frag_no = ath11k_dp_rx_h_mpdu_start_frag_no(msdu);
3420        more_frags = ath11k_dp_rx_h_mpdu_start_more_frags(msdu);
3421
3422        if (!ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(rx_desc) ||
3423            !ath11k_dp_rx_h_mpdu_start_fc_valid(rx_desc) ||
3424            tid > IEEE80211_NUM_TIDS)
3425                return -EINVAL;
3426
3427        /* received unfragmented packet in reo
3428         * exception ring, this shouldn't happen
3429         * as these packets typically come from
3430         * reo2sw srngs.
3431         */
3432        if (WARN_ON_ONCE(!frag_no && !more_frags))
3433                return -EINVAL;
3434
3435        spin_lock_bh(&ab->base_lock);
3436        peer = ath11k_peer_find_by_id(ab, peer_id);
3437        if (!peer) {
3438                ath11k_warn(ab, "failed to find the peer to de-fragment received fragment peer_id %d\n",
3439                            peer_id);
3440                ret = -ENOENT;
3441                goto out_unlock;
3442        }
3443        rx_tid = &peer->rx_tid[tid];
3444
3445        if ((!skb_queue_empty(&rx_tid->rx_frags) && seqno != rx_tid->cur_sn) ||
3446            skb_queue_empty(&rx_tid->rx_frags)) {
3447                /* Flush stored fragments and start a new sequence */
3448                ath11k_dp_rx_frags_cleanup(rx_tid, true);
3449                rx_tid->cur_sn = seqno;
3450        }
3451
3452        if (rx_tid->rx_frag_bitmap & BIT(frag_no)) {
3453                /* Fragment already present */
3454                ret = -EINVAL;
3455                goto out_unlock;
3456        }
3457
3458        if (frag_no > __fls(rx_tid->rx_frag_bitmap))
3459                __skb_queue_tail(&rx_tid->rx_frags, msdu);
3460        else
3461                ath11k_dp_rx_h_sort_frags(&rx_tid->rx_frags, msdu);
3462
3463        rx_tid->rx_frag_bitmap |= BIT(frag_no);
3464        if (!more_frags)
3465                rx_tid->last_frag_no = frag_no;
3466
3467        if (frag_no == 0) {
3468                rx_tid->dst_ring_desc = kmemdup(ring_desc,
3469                                                sizeof(*rx_tid->dst_ring_desc),
3470                                                GFP_ATOMIC);
3471                if (!rx_tid->dst_ring_desc) {
3472                        ret = -ENOMEM;
3473                        goto out_unlock;
3474                }
3475        } else {
3476                ath11k_dp_rx_link_desc_return(ab, ring_desc,
3477                                              HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3478        }
3479
3480        if (!rx_tid->last_frag_no ||
3481            rx_tid->rx_frag_bitmap != GENMASK(rx_tid->last_frag_no, 0)) {
3482                mod_timer(&rx_tid->frag_timer, jiffies +
3483                                               ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS);
3484                goto out_unlock;
3485        }
3486
3487        spin_unlock_bh(&ab->base_lock);
3488        del_timer_sync(&rx_tid->frag_timer);
3489        spin_lock_bh(&ab->base_lock);
3490
3491        peer = ath11k_peer_find_by_id(ab, peer_id);
3492        if (!peer)
3493                goto err_frags_cleanup;
3494
3495        if (!ath11k_dp_rx_h_defrag_validate_incr_pn(ar, rx_tid))
3496                goto err_frags_cleanup;
3497
3498        if (ath11k_dp_rx_h_defrag(ar, peer, rx_tid, &defrag_skb))
3499                goto err_frags_cleanup;
3500
3501        if (!defrag_skb)
3502                goto err_frags_cleanup;
3503
3504        if (ath11k_dp_rx_h_defrag_reo_reinject(ar, rx_tid, defrag_skb))
3505                goto err_frags_cleanup;
3506
3507        ath11k_dp_rx_frags_cleanup(rx_tid, false);
3508        goto out_unlock;
3509
3510err_frags_cleanup:
3511        dev_kfree_skb_any(defrag_skb);
3512        ath11k_dp_rx_frags_cleanup(rx_tid, true);
3513out_unlock:
3514        spin_unlock_bh(&ab->base_lock);
3515        return ret;
3516}
3517
3518static int
3519ath11k_dp_process_rx_err_buf(struct ath11k *ar, u32 *ring_desc, int buf_id, bool drop)
3520{
3521        struct ath11k_pdev_dp *dp = &ar->dp;
3522        struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
3523        struct sk_buff *msdu;
3524        struct ath11k_skb_rxcb *rxcb;
3525        struct hal_rx_desc *rx_desc;
3526        u8 *hdr_status;
3527        u16 msdu_len;
3528
3529        spin_lock_bh(&rx_ring->idr_lock);
3530        msdu = idr_find(&rx_ring->bufs_idr, buf_id);
3531        if (!msdu) {
3532                ath11k_warn(ar->ab, "rx err buf with invalid buf_id %d\n",
3533                            buf_id);
3534                spin_unlock_bh(&rx_ring->idr_lock);
3535                return -EINVAL;
3536        }
3537
3538        idr_remove(&rx_ring->bufs_idr, buf_id);
3539        spin_unlock_bh(&rx_ring->idr_lock);
3540
3541        rxcb = ATH11K_SKB_RXCB(msdu);
3542        dma_unmap_single(ar->ab->dev, rxcb->paddr,
3543                         msdu->len + skb_tailroom(msdu),
3544                         DMA_FROM_DEVICE);
3545
3546        if (drop) {
3547                dev_kfree_skb_any(msdu);
3548                return 0;
3549        }
3550
3551        rcu_read_lock();
3552        if (!rcu_dereference(ar->ab->pdevs_active[ar->pdev_idx])) {
3553                dev_kfree_skb_any(msdu);
3554                goto exit;
3555        }
3556
3557        if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
3558                dev_kfree_skb_any(msdu);
3559                goto exit;
3560        }
3561
3562        rx_desc = (struct hal_rx_desc *)msdu->data;
3563        msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(rx_desc);
3564        if ((msdu_len + HAL_RX_DESC_SIZE) > DP_RX_BUFFER_SIZE) {
3565                hdr_status = ath11k_dp_rx_h_80211_hdr(rx_desc);
3566                ath11k_warn(ar->ab, "invalid msdu leng %u", msdu_len);
3567                ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
3568                                sizeof(struct ieee80211_hdr));
3569                ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
3570                                sizeof(struct hal_rx_desc));
3571                dev_kfree_skb_any(msdu);
3572                goto exit;
3573        }
3574
3575        skb_put(msdu, HAL_RX_DESC_SIZE + msdu_len);
3576
3577        if (ath11k_dp_rx_frag_h_mpdu(ar, msdu, ring_desc)) {
3578                dev_kfree_skb_any(msdu);
3579                ath11k_dp_rx_link_desc_return(ar->ab, ring_desc,
3580                                              HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3581        }
3582exit:
3583        rcu_read_unlock();
3584        return 0;
3585}
3586
3587int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,
3588                             int budget)
3589{
3590        u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];
3591        struct dp_link_desc_bank *link_desc_banks;
3592        enum hal_rx_buf_return_buf_manager rbm;
3593        int tot_n_bufs_reaped, quota, ret, i;
3594        int n_bufs_reaped[MAX_RADIOS] = {0};
3595        struct dp_rxdma_ring *rx_ring;
3596        struct dp_srng *reo_except;
3597        u32 desc_bank, num_msdus;
3598        struct hal_srng *srng;
3599        struct ath11k_dp *dp;
3600        void *link_desc_va;
3601        int buf_id, mac_id;
3602        struct ath11k *ar;
3603        dma_addr_t paddr;
3604        u32 *desc;
3605        bool is_frag;
3606        u8 drop = 0;
3607
3608        tot_n_bufs_reaped = 0;
3609        quota = budget;
3610
3611        dp = &ab->dp;
3612        reo_except = &dp->reo_except_ring;
3613        link_desc_banks = dp->link_desc_banks;
3614
3615        srng = &ab->hal.srng_list[reo_except->ring_id];
3616
3617        spin_lock_bh(&srng->lock);
3618
3619        ath11k_hal_srng_access_begin(ab, srng);
3620
3621        while (budget &&
3622               (desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
3623                struct hal_reo_dest_ring *reo_desc = (struct hal_reo_dest_ring *)desc;
3624
3625                ab->soc_stats.err_ring_pkts++;
3626                ret = ath11k_hal_desc_reo_parse_err(ab, desc, &paddr,
3627                                                    &desc_bank);
3628                if (ret) {
3629                        ath11k_warn(ab, "failed to parse error reo desc %d\n",
3630                                    ret);
3631                        continue;
3632                }
3633                link_desc_va = link_desc_banks[desc_bank].vaddr +
3634                               (paddr - link_desc_banks[desc_bank].paddr);
3635                ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus, msdu_cookies,
3636                                                 &rbm);
3637                if (rbm != HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST &&
3638                    rbm != HAL_RX_BUF_RBM_SW3_BM) {
3639                        ab->soc_stats.invalid_rbm++;
3640                        ath11k_warn(ab, "invalid return buffer manager %d\n", rbm);
3641                        ath11k_dp_rx_link_desc_return(ab, desc,
3642                                                      HAL_WBM_REL_BM_ACT_REL_MSDU);
3643                        continue;
3644                }
3645
3646                is_frag = !!(reo_desc->rx_mpdu_info.info0 & RX_MPDU_DESC_INFO0_FRAG_FLAG);
3647
3648                /* Process only rx fragments with one msdu per link desc below, and drop
3649                 * msdu's indicated due to error reasons.
3650                 */
3651                if (!is_frag || num_msdus > 1) {
3652                        drop = 1;
3653                        /* Return the link desc back to wbm idle list */
3654                        ath11k_dp_rx_link_desc_return(ab, desc,
3655                                                      HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3656                }
3657
3658                for (i = 0; i < num_msdus; i++) {
3659                        buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
3660                                           msdu_cookies[i]);
3661
3662                        mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID,
3663                                           msdu_cookies[i]);
3664
3665                        ar = ab->pdevs[mac_id].ar;
3666
3667                        if (!ath11k_dp_process_rx_err_buf(ar, desc, buf_id, drop)) {
3668                                n_bufs_reaped[mac_id]++;
3669                                tot_n_bufs_reaped++;
3670                        }
3671                }
3672
3673                if (tot_n_bufs_reaped >= quota) {
3674                        tot_n_bufs_reaped = quota;
3675                        goto exit;
3676                }
3677
3678                budget = quota - tot_n_bufs_reaped;
3679        }
3680
3681exit:
3682        ath11k_hal_srng_access_end(ab, srng);
3683
3684        spin_unlock_bh(&srng->lock);
3685
3686        for (i = 0; i <  ab->num_radios; i++) {
3687                if (!n_bufs_reaped[i])
3688                        continue;
3689
3690                ar = ab->pdevs[i].ar;
3691                rx_ring = &ar->dp.rx_refill_buf_ring;
3692
3693                ath11k_dp_rxbufs_replenish(ab, i, rx_ring, n_bufs_reaped[i],
3694                                           HAL_RX_BUF_RBM_SW3_BM);
3695        }
3696
3697        return tot_n_bufs_reaped;
3698}
3699
3700static void ath11k_dp_rx_null_q_desc_sg_drop(struct ath11k *ar,
3701                                             int msdu_len,
3702                                             struct sk_buff_head *msdu_list)
3703{
3704        struct sk_buff *skb, *tmp;
3705        struct ath11k_skb_rxcb *rxcb;
3706        int n_buffs;
3707
3708        n_buffs = DIV_ROUND_UP(msdu_len,
3709                               (DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE));
3710
3711        skb_queue_walk_safe(msdu_list, skb, tmp) {
3712                rxcb = ATH11K_SKB_RXCB(skb);
3713                if (rxcb->err_rel_src == HAL_WBM_REL_SRC_MODULE_REO &&
3714                    rxcb->err_code == HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO) {
3715                        if (!n_buffs)
3716                                break;
3717                        __skb_unlink(skb, msdu_list);
3718                        dev_kfree_skb_any(skb);
3719                        n_buffs--;
3720                }
3721        }
3722}
3723
3724static int ath11k_dp_rx_h_null_q_desc(struct ath11k *ar, struct sk_buff *msdu,
3725                                      struct ieee80211_rx_status *status,
3726                                      struct sk_buff_head *msdu_list)
3727{
3728        u16 msdu_len;
3729        struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;
3730        u8 l3pad_bytes;
3731        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3732
3733        msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(desc);
3734
3735        if (!rxcb->is_frag && ((msdu_len + HAL_RX_DESC_SIZE) > DP_RX_BUFFER_SIZE)) {
3736                /* First buffer will be freed by the caller, so deduct it's length */
3737                msdu_len = msdu_len - (DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE);
3738                ath11k_dp_rx_null_q_desc_sg_drop(ar, msdu_len, msdu_list);
3739                return -EINVAL;
3740        }
3741
3742        if (!ath11k_dp_rx_h_attn_msdu_done(desc)) {
3743                ath11k_warn(ar->ab,
3744                            "msdu_done bit not set in null_q_des processing\n");
3745                __skb_queue_purge(msdu_list);
3746                return -EIO;
3747        }
3748
3749        /* Handle NULL queue descriptor violations arising out a missing
3750         * REO queue for a given peer or a given TID. This typically
3751         * may happen if a packet is received on a QOS enabled TID before the
3752         * ADDBA negotiation for that TID, when the TID queue is setup. Or
3753         * it may also happen for MC/BC frames if they are not routed to the
3754         * non-QOS TID queue, in the absence of any other default TID queue.
3755         * This error can show up both in a REO destination or WBM release ring.
3756         */
3757
3758        rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(desc);
3759        rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(desc);
3760
3761        if (rxcb->is_frag) {
3762                skb_pull(msdu, HAL_RX_DESC_SIZE);
3763        } else {
3764                l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(desc);
3765
3766                if ((HAL_RX_DESC_SIZE + l3pad_bytes + msdu_len) > DP_RX_BUFFER_SIZE)
3767                        return -EINVAL;
3768
3769                skb_put(msdu, HAL_RX_DESC_SIZE + l3pad_bytes + msdu_len);
3770                skb_pull(msdu, HAL_RX_DESC_SIZE + l3pad_bytes);
3771        }
3772        ath11k_dp_rx_h_ppdu(ar, desc, status);
3773
3774        ath11k_dp_rx_h_mpdu(ar, msdu, desc, status);
3775
3776        rxcb->tid = ath11k_dp_rx_h_mpdu_start_tid(desc);
3777
3778        /* Please note that caller will having the access to msdu and completing
3779         * rx with mac80211. Need not worry about cleaning up amsdu_list.
3780         */
3781
3782        return 0;
3783}
3784
3785static bool ath11k_dp_rx_h_reo_err(struct ath11k *ar, struct sk_buff *msdu,
3786                                   struct ieee80211_rx_status *status,
3787                                   struct sk_buff_head *msdu_list)
3788{
3789        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3790        bool drop = false;
3791
3792        ar->ab->soc_stats.reo_error[rxcb->err_code]++;
3793
3794        switch (rxcb->err_code) {
3795        case HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO:
3796                if (ath11k_dp_rx_h_null_q_desc(ar, msdu, status, msdu_list))
3797                        drop = true;
3798                break;
3799        case HAL_REO_DEST_RING_ERROR_CODE_PN_CHECK_FAILED:
3800                /* TODO: Do not drop PN failed packets in the driver;
3801                 * instead, it is good to drop such packets in mac80211
3802                 * after incrementing the replay counters.
3803                 */
3804                fallthrough;
3805        default:
3806                /* TODO: Review other errors and process them to mac80211
3807                 * as appropriate.
3808                 */
3809                drop = true;
3810                break;
3811        }
3812
3813        return drop;
3814}
3815
3816static void ath11k_dp_rx_h_tkip_mic_err(struct ath11k *ar, struct sk_buff *msdu,
3817                                        struct ieee80211_rx_status *status)
3818{
3819        u16 msdu_len;
3820        struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;
3821        u8 l3pad_bytes;
3822        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3823
3824        rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(desc);
3825        rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(desc);
3826
3827        l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(desc);
3828        msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(desc);
3829        skb_put(msdu, HAL_RX_DESC_SIZE + l3pad_bytes + msdu_len);
3830        skb_pull(msdu, HAL_RX_DESC_SIZE + l3pad_bytes);
3831
3832        ath11k_dp_rx_h_ppdu(ar, desc, status);
3833
3834        status->flag |= (RX_FLAG_MMIC_STRIPPED | RX_FLAG_MMIC_ERROR |
3835                         RX_FLAG_DECRYPTED);
3836
3837        ath11k_dp_rx_h_undecap(ar, msdu, desc,
3838                               HAL_ENCRYPT_TYPE_TKIP_MIC, status, false);
3839}
3840
3841static bool ath11k_dp_rx_h_rxdma_err(struct ath11k *ar,  struct sk_buff *msdu,
3842                                     struct ieee80211_rx_status *status)
3843{
3844        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3845        bool drop = false;
3846
3847        ar->ab->soc_stats.rxdma_error[rxcb->err_code]++;
3848
3849        switch (rxcb->err_code) {
3850        case HAL_REO_ENTR_RING_RXDMA_ECODE_TKIP_MIC_ERR:
3851                ath11k_dp_rx_h_tkip_mic_err(ar, msdu, status);
3852                break;
3853        default:
3854                /* TODO: Review other rxdma error code to check if anything is
3855                 * worth reporting to mac80211
3856                 */
3857                drop = true;
3858                break;
3859        }
3860
3861        return drop;
3862}
3863
3864static void ath11k_dp_rx_wbm_err(struct ath11k *ar,
3865                                 struct napi_struct *napi,
3866                                 struct sk_buff *msdu,
3867                                 struct sk_buff_head *msdu_list)
3868{
3869        struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3870        struct ieee80211_rx_status rxs = {0};
3871        struct ieee80211_rx_status *status;
3872        bool drop = true;
3873
3874        switch (rxcb->err_rel_src) {
3875        case HAL_WBM_REL_SRC_MODULE_REO:
3876                drop = ath11k_dp_rx_h_reo_err(ar, msdu, &rxs, msdu_list);
3877                break;
3878        case HAL_WBM_REL_SRC_MODULE_RXDMA:
3879                drop = ath11k_dp_rx_h_rxdma_err(ar, msdu, &rxs);
3880                break;
3881        default:
3882                /* msdu will get freed */
3883                break;
3884        }
3885
3886        if (drop) {
3887                dev_kfree_skb_any(msdu);
3888                return;
3889        }
3890
3891        status = IEEE80211_SKB_RXCB(msdu);
3892        *status = rxs;
3893
3894        ath11k_dp_rx_deliver_msdu(ar, napi, msdu);
3895}
3896
3897int ath11k_dp_rx_process_wbm_err(struct ath11k_base *ab,
3898                                 struct napi_struct *napi, int budget)
3899{
3900        struct ath11k *ar;
3901        struct ath11k_dp *dp = &ab->dp;
3902        struct dp_rxdma_ring *rx_ring;
3903        struct hal_rx_wbm_rel_info err_info;
3904        struct hal_srng *srng;
3905        struct sk_buff *msdu;
3906        struct sk_buff_head msdu_list[MAX_RADIOS];
3907        struct ath11k_skb_rxcb *rxcb;
3908        u32 *rx_desc;
3909        int buf_id, mac_id;
3910        int num_buffs_reaped[MAX_RADIOS] = {0};
3911        int total_num_buffs_reaped = 0;
3912        int ret, i;
3913
3914        for (i = 0; i < ab->num_radios; i++)
3915                __skb_queue_head_init(&msdu_list[i]);
3916
3917        srng = &ab->hal.srng_list[dp->rx_rel_ring.ring_id];
3918
3919        spin_lock_bh(&srng->lock);
3920
3921        ath11k_hal_srng_access_begin(ab, srng);
3922
3923        while (budget) {
3924                rx_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng);
3925                if (!rx_desc)
3926                        break;
3927
3928                ret = ath11k_hal_wbm_desc_parse_err(ab, rx_desc, &err_info);
3929                if (ret) {
3930                        ath11k_warn(ab,
3931                                    "failed to parse rx error in wbm_rel ring desc %d\n",
3932                                    ret);
3933                        continue;
3934                }
3935
3936                buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, err_info.cookie);
3937                mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, err_info.cookie);
3938
3939                ar = ab->pdevs[mac_id].ar;
3940                rx_ring = &ar->dp.rx_refill_buf_ring;
3941
3942                spin_lock_bh(&rx_ring->idr_lock);
3943                msdu = idr_find(&rx_ring->bufs_idr, buf_id);
3944                if (!msdu) {
3945                        ath11k_warn(ab, "frame rx with invalid buf_id %d pdev %d\n",
3946                                    buf_id, mac_id);
3947                        spin_unlock_bh(&rx_ring->idr_lock);
3948                        continue;
3949                }
3950
3951                idr_remove(&rx_ring->bufs_idr, buf_id);
3952                spin_unlock_bh(&rx_ring->idr_lock);
3953
3954                rxcb = ATH11K_SKB_RXCB(msdu);
3955                dma_unmap_single(ab->dev, rxcb->paddr,
3956                                 msdu->len + skb_tailroom(msdu),
3957                                 DMA_FROM_DEVICE);
3958
3959                num_buffs_reaped[mac_id]++;
3960                total_num_buffs_reaped++;
3961                budget--;
3962
3963                if (err_info.push_reason !=
3964                    HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
3965                        dev_kfree_skb_any(msdu);
3966                        continue;
3967                }
3968
3969                rxcb->err_rel_src = err_info.err_rel_src;
3970                rxcb->err_code = err_info.err_code;
3971                rxcb->rx_desc = (struct hal_rx_desc *)msdu->data;
3972                __skb_queue_tail(&msdu_list[mac_id], msdu);
3973        }
3974
3975        ath11k_hal_srng_access_end(ab, srng);
3976
3977        spin_unlock_bh(&srng->lock);
3978
3979        if (!total_num_buffs_reaped)
3980                goto done;
3981
3982        for (i = 0; i <  ab->num_radios; i++) {
3983                if (!num_buffs_reaped[i])
3984                        continue;
3985
3986                ar = ab->pdevs[i].ar;
3987                rx_ring = &ar->dp.rx_refill_buf_ring;
3988
3989                ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],
3990                                           HAL_RX_BUF_RBM_SW3_BM);
3991        }
3992
3993        rcu_read_lock();
3994        for (i = 0; i <  ab->num_radios; i++) {
3995                if (!rcu_dereference(ab->pdevs_active[i])) {
3996                        __skb_queue_purge(&msdu_list[i]);
3997                        continue;
3998                }
3999
4000                ar = ab->pdevs[i].ar;
4001
4002                if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
4003                        __skb_queue_purge(&msdu_list[i]);
4004                        continue;
4005                }
4006
4007                while ((msdu = __skb_dequeue(&msdu_list[i])) != NULL)
4008                        ath11k_dp_rx_wbm_err(ar, napi, msdu, &msdu_list[i]);
4009        }
4010        rcu_read_unlock();
4011done:
4012        return total_num_buffs_reaped;
4013}
4014
4015int ath11k_dp_process_rxdma_err(struct ath11k_base *ab, int mac_id, int budget)
4016{
4017        struct ath11k *ar;
4018        struct dp_srng *err_ring;
4019        struct dp_rxdma_ring *rx_ring;
4020        struct dp_link_desc_bank *link_desc_banks = ab->dp.link_desc_banks;
4021        struct hal_srng *srng;
4022        u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];
4023        enum hal_rx_buf_return_buf_manager rbm;
4024        enum hal_reo_entr_rxdma_ecode rxdma_err_code;
4025        struct ath11k_skb_rxcb *rxcb;
4026        struct sk_buff *skb;
4027        struct hal_reo_entrance_ring *entr_ring;
4028        void *desc;
4029        int num_buf_freed = 0;
4030        int quota = budget;
4031        dma_addr_t paddr;
4032        u32 desc_bank;
4033        void *link_desc_va;
4034        int num_msdus;
4035        int i;
4036        int buf_id;
4037
4038        ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
4039        err_ring = &ar->dp.rxdma_err_dst_ring[ath11k_hw_mac_id_to_srng_id(&ab->hw_params,
4040                                                                          mac_id)];
4041        rx_ring = &ar->dp.rx_refill_buf_ring;
4042
4043        srng = &ab->hal.srng_list[err_ring->ring_id];
4044
4045        spin_lock_bh(&srng->lock);
4046
4047        ath11k_hal_srng_access_begin(ab, srng);
4048
4049        while (quota-- &&
4050               (desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
4051                ath11k_hal_rx_reo_ent_paddr_get(ab, desc, &paddr, &desc_bank);
4052
4053                entr_ring = (struct hal_reo_entrance_ring *)desc;
4054                rxdma_err_code =
4055                        FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,
4056                                  entr_ring->info1);
4057                ab->soc_stats.rxdma_error[rxdma_err_code]++;
4058
4059                link_desc_va = link_desc_banks[desc_bank].vaddr +
4060                               (paddr - link_desc_banks[desc_bank].paddr);
4061                ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus,
4062                                                 msdu_cookies, &rbm);
4063
4064                for (i = 0; i < num_msdus; i++) {
4065                        buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
4066                                           msdu_cookies[i]);
4067
4068                        spin_lock_bh(&rx_ring->idr_lock);
4069                        skb = idr_find(&rx_ring->bufs_idr, buf_id);
4070                        if (!skb) {
4071                                ath11k_warn(ab, "rxdma error with invalid buf_id %d\n",
4072                                            buf_id);
4073                                spin_unlock_bh(&rx_ring->idr_lock);
4074                                continue;
4075                        }
4076
4077                        idr_remove(&rx_ring->bufs_idr, buf_id);
4078                        spin_unlock_bh(&rx_ring->idr_lock);
4079
4080                        rxcb = ATH11K_SKB_RXCB(skb);
4081                        dma_unmap_single(ab->dev, rxcb->paddr,
4082                                         skb->len + skb_tailroom(skb),
4083                                         DMA_FROM_DEVICE);
4084                        dev_kfree_skb_any(skb);
4085
4086                        num_buf_freed++;
4087                }
4088
4089                ath11k_dp_rx_link_desc_return(ab, desc,
4090                                              HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
4091        }
4092
4093        ath11k_hal_srng_access_end(ab, srng);
4094
4095        spin_unlock_bh(&srng->lock);
4096
4097        if (num_buf_freed)
4098                ath11k_dp_rxbufs_replenish(ab, mac_id, rx_ring, num_buf_freed,
4099                                           HAL_RX_BUF_RBM_SW3_BM);
4100
4101        return budget - quota;
4102}
4103
4104void ath11k_dp_process_reo_status(struct ath11k_base *ab)
4105{
4106        struct ath11k_dp *dp = &ab->dp;
4107        struct hal_srng *srng;
4108        struct dp_reo_cmd *cmd, *tmp;
4109        bool found = false;
4110        u32 *reo_desc;
4111        u16 tag;
4112        struct hal_reo_status reo_status;
4113
4114        srng = &ab->hal.srng_list[dp->reo_status_ring.ring_id];
4115
4116        memset(&reo_status, 0, sizeof(reo_status));
4117
4118        spin_lock_bh(&srng->lock);
4119
4120        ath11k_hal_srng_access_begin(ab, srng);
4121
4122        while ((reo_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
4123                tag = FIELD_GET(HAL_SRNG_TLV_HDR_TAG, *reo_desc);
4124
4125                switch (tag) {
4126                case HAL_REO_GET_QUEUE_STATS_STATUS:
4127                        ath11k_hal_reo_status_queue_stats(ab, reo_desc,
4128                                                          &reo_status);
4129                        break;
4130                case HAL_REO_FLUSH_QUEUE_STATUS:
4131                        ath11k_hal_reo_flush_queue_status(ab, reo_desc,
4132                                                          &reo_status);
4133                        break;
4134                case HAL_REO_FLUSH_CACHE_STATUS:
4135                        ath11k_hal_reo_flush_cache_status(ab, reo_desc,
4136                                                          &reo_status);
4137                        break;
4138                case HAL_REO_UNBLOCK_CACHE_STATUS:
4139                        ath11k_hal_reo_unblk_cache_status(ab, reo_desc,
4140                                                          &reo_status);
4141                        break;
4142                case HAL_REO_FLUSH_TIMEOUT_LIST_STATUS:
4143                        ath11k_hal_reo_flush_timeout_list_status(ab, reo_desc,
4144                                                                 &reo_status);
4145                        break;
4146                case HAL_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS:
4147                        ath11k_hal_reo_desc_thresh_reached_status(ab, reo_desc,
4148                                                                  &reo_status);
4149                        break;
4150                case HAL_REO_UPDATE_RX_REO_QUEUE_STATUS:
4151                        ath11k_hal_reo_update_rx_reo_queue_status(ab, reo_desc,
4152                                                                  &reo_status);
4153                        break;
4154                default:
4155                        ath11k_warn(ab, "Unknown reo status type %d\n", tag);
4156                        continue;
4157                }
4158
4159                spin_lock_bh(&dp->reo_cmd_lock);
4160                list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
4161                        if (reo_status.uniform_hdr.cmd_num == cmd->cmd_num) {
4162                                found = true;
4163                                list_del(&cmd->list);
4164                                break;
4165                        }
4166                }
4167                spin_unlock_bh(&dp->reo_cmd_lock);
4168
4169                if (found) {
4170                        cmd->handler(dp, (void *)&cmd->data,
4171                                     reo_status.uniform_hdr.cmd_status);
4172                        kfree(cmd);
4173                }
4174
4175                found = false;
4176        }
4177
4178        ath11k_hal_srng_access_end(ab, srng);
4179
4180        spin_unlock_bh(&srng->lock);
4181}
4182
4183void ath11k_dp_rx_pdev_free(struct ath11k_base *ab, int mac_id)
4184{
4185        struct ath11k *ar = ab->pdevs[mac_id].ar;
4186
4187        ath11k_dp_rx_pdev_srng_free(ar);
4188        ath11k_dp_rxdma_pdev_buf_free(ar);
4189}
4190
4191int ath11k_dp_rx_pdev_alloc(struct ath11k_base *ab, int mac_id)
4192{
4193        struct ath11k *ar = ab->pdevs[mac_id].ar;
4194        struct ath11k_pdev_dp *dp = &ar->dp;
4195        u32 ring_id;
4196        int i;
4197        int ret;
4198
4199        ret = ath11k_dp_rx_pdev_srng_alloc(ar);
4200        if (ret) {
4201                ath11k_warn(ab, "failed to setup rx srngs\n");
4202                return ret;
4203        }
4204
4205        ret = ath11k_dp_rxdma_pdev_buf_setup(ar);
4206        if (ret) {
4207                ath11k_warn(ab, "failed to setup rxdma ring\n");
4208                return ret;
4209        }
4210
4211        ring_id = dp->rx_refill_buf_ring.refill_buf_ring.ring_id;
4212        ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id, HAL_RXDMA_BUF);
4213        if (ret) {
4214                ath11k_warn(ab, "failed to configure rx_refill_buf_ring %d\n",
4215                            ret);
4216                return ret;
4217        }
4218
4219        if (ab->hw_params.rx_mac_buf_ring) {
4220                for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4221                        ring_id = dp->rx_mac_buf_ring[i].ring_id;
4222                        ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4223                                                          mac_id + i, HAL_RXDMA_BUF);
4224                        if (ret) {
4225                                ath11k_warn(ab, "failed to configure rx_mac_buf_ring%d %d\n",
4226                                            i, ret);
4227                                return ret;
4228                        }
4229                }
4230        }
4231
4232        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4233                ring_id = dp->rxdma_err_dst_ring[i].ring_id;
4234                ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4235                                                  mac_id + i, HAL_RXDMA_DST);
4236                if (ret) {
4237                        ath11k_warn(ab, "failed to configure rxdma_err_dest_ring%d %d\n",
4238                                    i, ret);
4239                        return ret;
4240                }
4241        }
4242
4243        if (!ab->hw_params.rxdma1_enable)
4244                goto config_refill_ring;
4245
4246        ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
4247        ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4248                                          mac_id, HAL_RXDMA_MONITOR_BUF);
4249        if (ret) {
4250                ath11k_warn(ab, "failed to configure rxdma_mon_buf_ring %d\n",
4251                            ret);
4252                return ret;
4253        }
4254        ret = ath11k_dp_tx_htt_srng_setup(ab,
4255                                          dp->rxdma_mon_dst_ring.ring_id,
4256                                          mac_id, HAL_RXDMA_MONITOR_DST);
4257        if (ret) {
4258                ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",
4259                            ret);
4260                return ret;
4261        }
4262        ret = ath11k_dp_tx_htt_srng_setup(ab,
4263                                          dp->rxdma_mon_desc_ring.ring_id,
4264                                          mac_id, HAL_RXDMA_MONITOR_DESC);
4265        if (ret) {
4266                ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",
4267                            ret);
4268                return ret;
4269        }
4270
4271config_refill_ring:
4272        for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4273                ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
4274                ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id + i,
4275                                                  HAL_RXDMA_MONITOR_STATUS);
4276                if (ret) {
4277                        ath11k_warn(ab,
4278                                    "failed to configure mon_status_refill_ring%d %d\n",
4279                                    i, ret);
4280                        return ret;
4281                }
4282        }
4283
4284        return 0;
4285}
4286
4287static void ath11k_dp_mon_set_frag_len(u32 *total_len, u32 *frag_len)
4288{
4289        if (*total_len >= (DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc))) {
4290                *frag_len = DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc);
4291                *total_len -= *frag_len;
4292        } else {
4293                *frag_len = *total_len;
4294                *total_len = 0;
4295        }
4296}
4297
4298static
4299int ath11k_dp_rx_monitor_link_desc_return(struct ath11k *ar,
4300                                          void *p_last_buf_addr_info,
4301                                          u8 mac_id)
4302{
4303        struct ath11k_pdev_dp *dp = &ar->dp;
4304        struct dp_srng *dp_srng;
4305        void *hal_srng;
4306        void *src_srng_desc;
4307        int ret = 0;
4308
4309        if (ar->ab->hw_params.rxdma1_enable) {
4310                dp_srng = &dp->rxdma_mon_desc_ring;
4311                hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];
4312        } else {
4313                dp_srng = &ar->ab->dp.wbm_desc_rel_ring;
4314                hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];
4315        }
4316
4317        ath11k_hal_srng_access_begin(ar->ab, hal_srng);
4318
4319        src_srng_desc = ath11k_hal_srng_src_get_next_entry(ar->ab, hal_srng);
4320
4321        if (src_srng_desc) {
4322                struct ath11k_buffer_addr *src_desc =
4323                                (struct ath11k_buffer_addr *)src_srng_desc;
4324
4325                *src_desc = *((struct ath11k_buffer_addr *)p_last_buf_addr_info);
4326        } else {
4327                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4328                           "Monitor Link Desc Ring %d Full", mac_id);
4329                ret = -ENOMEM;
4330        }
4331
4332        ath11k_hal_srng_access_end(ar->ab, hal_srng);
4333        return ret;
4334}
4335
4336static
4337void ath11k_dp_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,
4338                                         dma_addr_t *paddr, u32 *sw_cookie,
4339                                         u8 *rbm,
4340                                         void **pp_buf_addr_info)
4341{
4342        struct hal_rx_msdu_link *msdu_link =
4343                        (struct hal_rx_msdu_link *)rx_msdu_link_desc;
4344        struct ath11k_buffer_addr *buf_addr_info;
4345
4346        buf_addr_info = (struct ath11k_buffer_addr *)&msdu_link->buf_addr_info;
4347
4348        ath11k_hal_rx_buf_addr_info_get(buf_addr_info, paddr, sw_cookie, rbm);
4349
4350        *pp_buf_addr_info = (void *)buf_addr_info;
4351}
4352
4353static int ath11k_dp_pkt_set_pktlen(struct sk_buff *skb, u32 len)
4354{
4355        if (skb->len > len) {
4356                skb_trim(skb, len);
4357        } else {
4358                if (skb_tailroom(skb) < len - skb->len) {
4359                        if ((pskb_expand_head(skb, 0,
4360                                              len - skb->len - skb_tailroom(skb),
4361                                              GFP_ATOMIC))) {
4362                                dev_kfree_skb_any(skb);
4363                                return -ENOMEM;
4364                        }
4365                }
4366                skb_put(skb, (len - skb->len));
4367        }
4368        return 0;
4369}
4370
4371static void ath11k_hal_rx_msdu_list_get(struct ath11k *ar,
4372                                        void *msdu_link_desc,
4373                                        struct hal_rx_msdu_list *msdu_list,
4374                                        u16 *num_msdus)
4375{
4376        struct hal_rx_msdu_details *msdu_details = NULL;
4377        struct rx_msdu_desc *msdu_desc_info = NULL;
4378        struct hal_rx_msdu_link *msdu_link = NULL;
4379        int i;
4380        u32 last = FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1);
4381        u32 first = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1);
4382        u8  tmp  = 0;
4383
4384        msdu_link = (struct hal_rx_msdu_link *)msdu_link_desc;
4385        msdu_details = &msdu_link->msdu_link[0];
4386
4387        for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {
4388                if (FIELD_GET(BUFFER_ADDR_INFO0_ADDR,
4389                              msdu_details[i].buf_addr_info.info0) == 0) {
4390                        msdu_desc_info = &msdu_details[i - 1].rx_msdu_info;
4391                        msdu_desc_info->info0 |= last;
4392                        ;
4393                        break;
4394                }
4395                msdu_desc_info = &msdu_details[i].rx_msdu_info;
4396
4397                if (!i)
4398                        msdu_desc_info->info0 |= first;
4399                else if (i == (HAL_RX_NUM_MSDU_DESC - 1))
4400                        msdu_desc_info->info0 |= last;
4401                msdu_list->msdu_info[i].msdu_flags = msdu_desc_info->info0;
4402                msdu_list->msdu_info[i].msdu_len =
4403                         HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info->info0);
4404                msdu_list->sw_cookie[i] =
4405                        FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
4406                                  msdu_details[i].buf_addr_info.info1);
4407                tmp = FIELD_GET(BUFFER_ADDR_INFO1_RET_BUF_MGR,
4408                                msdu_details[i].buf_addr_info.info1);
4409                msdu_list->rbm[i] = tmp;
4410        }
4411        *num_msdus = i;
4412}
4413
4414static u32 ath11k_dp_rx_mon_comp_ppduid(u32 msdu_ppdu_id, u32 *ppdu_id,
4415                                        u32 *rx_bufs_used)
4416{
4417        u32 ret = 0;
4418
4419        if ((*ppdu_id < msdu_ppdu_id) &&
4420            ((msdu_ppdu_id - *ppdu_id) < DP_NOT_PPDU_ID_WRAP_AROUND)) {
4421                *ppdu_id = msdu_ppdu_id;
4422                ret = msdu_ppdu_id;
4423        } else if ((*ppdu_id > msdu_ppdu_id) &&
4424                ((*ppdu_id - msdu_ppdu_id) > DP_NOT_PPDU_ID_WRAP_AROUND)) {
4425                /* mon_dst is behind than mon_status
4426                 * skip dst_ring and free it
4427                 */
4428                *rx_bufs_used += 1;
4429                *ppdu_id = msdu_ppdu_id;
4430                ret = msdu_ppdu_id;
4431        }
4432        return ret;
4433}
4434
4435static void ath11k_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info *info,
4436                                      bool *is_frag, u32 *total_len,
4437                                      u32 *frag_len, u32 *msdu_cnt)
4438{
4439        if (info->msdu_flags & RX_MSDU_DESC_INFO0_MSDU_CONTINUATION) {
4440                if (!*is_frag) {
4441                        *total_len = info->msdu_len;
4442                        *is_frag = true;
4443                }
4444                ath11k_dp_mon_set_frag_len(total_len,
4445                                           frag_len);
4446        } else {
4447                if (*is_frag) {
4448                        ath11k_dp_mon_set_frag_len(total_len,
4449                                                   frag_len);
4450                } else {
4451                        *frag_len = info->msdu_len;
4452                }
4453                *is_frag = false;
4454                *msdu_cnt -= 1;
4455        }
4456}
4457
4458static u32
4459ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,
4460                          void *ring_entry, struct sk_buff **head_msdu,
4461                          struct sk_buff **tail_msdu, u32 *npackets,
4462                          u32 *ppdu_id)
4463{
4464        struct ath11k_pdev_dp *dp = &ar->dp;
4465        struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4466        struct dp_rxdma_ring *rx_ring = &dp->rxdma_mon_buf_ring;
4467        struct sk_buff *msdu = NULL, *last = NULL;
4468        struct hal_rx_msdu_list msdu_list;
4469        void *p_buf_addr_info, *p_last_buf_addr_info;
4470        struct hal_rx_desc *rx_desc;
4471        void *rx_msdu_link_desc;
4472        dma_addr_t paddr;
4473        u16 num_msdus = 0;
4474        u32 rx_buf_size, rx_pkt_offset, sw_cookie;
4475        u32 rx_bufs_used = 0, i = 0;
4476        u32 msdu_ppdu_id = 0, msdu_cnt = 0;
4477        u32 total_len = 0, frag_len = 0;
4478        bool is_frag, is_first_msdu;
4479        bool drop_mpdu = false;
4480        struct ath11k_skb_rxcb *rxcb;
4481        struct hal_reo_entrance_ring *ent_desc =
4482                        (struct hal_reo_entrance_ring *)ring_entry;
4483        int buf_id;
4484        u32 rx_link_buf_info[2];
4485        u8 rbm;
4486
4487        if (!ar->ab->hw_params.rxdma1_enable)
4488                rx_ring = &dp->rx_refill_buf_ring;
4489
4490        ath11k_hal_rx_reo_ent_buf_paddr_get(ring_entry, &paddr,
4491                                            &sw_cookie,
4492                                            &p_last_buf_addr_info, &rbm,
4493                                            &msdu_cnt);
4494
4495        if (FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_PUSH_REASON,
4496                      ent_desc->info1) ==
4497                      HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
4498                u8 rxdma_err =
4499                        FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,
4500                                  ent_desc->info1);
4501                if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||
4502                    rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||
4503                    rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {
4504                        drop_mpdu = true;
4505                        pmon->rx_mon_stats.dest_mpdu_drop++;
4506                }
4507        }
4508
4509        is_frag = false;
4510        is_first_msdu = true;
4511
4512        do {
4513                if (pmon->mon_last_linkdesc_paddr == paddr) {
4514                        pmon->rx_mon_stats.dup_mon_linkdesc_cnt++;
4515                        return rx_bufs_used;
4516                }
4517
4518                if (ar->ab->hw_params.rxdma1_enable)
4519                        rx_msdu_link_desc =
4520                                (void *)pmon->link_desc_banks[sw_cookie].vaddr +
4521                                (paddr - pmon->link_desc_banks[sw_cookie].paddr);
4522                else
4523                        rx_msdu_link_desc =
4524                                (void *)ar->ab->dp.link_desc_banks[sw_cookie].vaddr +
4525                                (paddr - ar->ab->dp.link_desc_banks[sw_cookie].paddr);
4526
4527                ath11k_hal_rx_msdu_list_get(ar, rx_msdu_link_desc, &msdu_list,
4528                                            &num_msdus);
4529
4530                for (i = 0; i < num_msdus; i++) {
4531                        u32 l2_hdr_offset;
4532
4533                        if (pmon->mon_last_buf_cookie == msdu_list.sw_cookie[i]) {
4534                                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4535                                           "i %d last_cookie %d is same\n",
4536                                           i, pmon->mon_last_buf_cookie);
4537                                drop_mpdu = true;
4538                                pmon->rx_mon_stats.dup_mon_buf_cnt++;
4539                                continue;
4540                        }
4541                        buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
4542                                           msdu_list.sw_cookie[i]);
4543
4544                        spin_lock_bh(&rx_ring->idr_lock);
4545                        msdu = idr_find(&rx_ring->bufs_idr, buf_id);
4546                        spin_unlock_bh(&rx_ring->idr_lock);
4547                        if (!msdu) {
4548                                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4549                                           "msdu_pop: invalid buf_id %d\n", buf_id);
4550                                break;
4551                        }
4552                        rxcb = ATH11K_SKB_RXCB(msdu);
4553                        if (!rxcb->unmapped) {
4554                                dma_unmap_single(ar->ab->dev, rxcb->paddr,
4555                                                 msdu->len +
4556                                                 skb_tailroom(msdu),
4557                                                 DMA_FROM_DEVICE);
4558                                rxcb->unmapped = 1;
4559                        }
4560                        if (drop_mpdu) {
4561                                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4562                                           "i %d drop msdu %p *ppdu_id %x\n",
4563                                           i, msdu, *ppdu_id);
4564                                dev_kfree_skb_any(msdu);
4565                                msdu = NULL;
4566                                goto next_msdu;
4567                        }
4568
4569                        rx_desc = (struct hal_rx_desc *)msdu->data;
4570
4571                        rx_pkt_offset = sizeof(struct hal_rx_desc);
4572                        l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(rx_desc);
4573
4574                        if (is_first_msdu) {
4575                                if (!ath11k_dp_rxdesc_mpdu_valid(rx_desc)) {
4576                                        drop_mpdu = true;
4577                                        dev_kfree_skb_any(msdu);
4578                                        msdu = NULL;
4579                                        pmon->mon_last_linkdesc_paddr = paddr;
4580                                        goto next_msdu;
4581                                }
4582
4583                                msdu_ppdu_id =
4584                                        ath11k_dp_rxdesc_get_ppduid(rx_desc);
4585
4586                                if (ath11k_dp_rx_mon_comp_ppduid(msdu_ppdu_id,
4587                                                                 ppdu_id,
4588                                                                 &rx_bufs_used)) {
4589                                        if (rx_bufs_used) {
4590                                                drop_mpdu = true;
4591                                                dev_kfree_skb_any(msdu);
4592                                                msdu = NULL;
4593                                                goto next_msdu;
4594                                        }
4595                                        return rx_bufs_used;
4596                                }
4597                                pmon->mon_last_linkdesc_paddr = paddr;
4598                                is_first_msdu = false;
4599                        }
4600                        ath11k_dp_mon_get_buf_len(&msdu_list.msdu_info[i],
4601                                                  &is_frag, &total_len,
4602                                                  &frag_len, &msdu_cnt);
4603                        rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;
4604
4605                        ath11k_dp_pkt_set_pktlen(msdu, rx_buf_size);
4606
4607                        if (!(*head_msdu))
4608                                *head_msdu = msdu;
4609                        else if (last)
4610                                last->next = msdu;
4611
4612                        last = msdu;
4613next_msdu:
4614                        pmon->mon_last_buf_cookie = msdu_list.sw_cookie[i];
4615                        rx_bufs_used++;
4616                        spin_lock_bh(&rx_ring->idr_lock);
4617                        idr_remove(&rx_ring->bufs_idr, buf_id);
4618                        spin_unlock_bh(&rx_ring->idr_lock);
4619                }
4620
4621                ath11k_hal_rx_buf_addr_info_set(rx_link_buf_info, paddr, sw_cookie, rbm);
4622
4623                ath11k_dp_rx_mon_next_link_desc_get(rx_msdu_link_desc, &paddr,
4624                                                    &sw_cookie, &rbm,
4625                                                    &p_buf_addr_info);
4626
4627                if (ar->ab->hw_params.rxdma1_enable) {
4628                        if (ath11k_dp_rx_monitor_link_desc_return(ar,
4629                                                                  p_last_buf_addr_info,
4630                                                                  dp->mac_id))
4631                                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4632                                           "dp_rx_monitor_link_desc_return failed");
4633                } else {
4634                        ath11k_dp_rx_link_desc_return(ar->ab, rx_link_buf_info,
4635                                                      HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
4636                }
4637
4638                p_last_buf_addr_info = p_buf_addr_info;
4639
4640        } while (paddr && msdu_cnt);
4641
4642        if (last)
4643                last->next = NULL;
4644
4645        *tail_msdu = msdu;
4646
4647        if (msdu_cnt == 0)
4648                *npackets = 1;
4649
4650        return rx_bufs_used;
4651}
4652
4653static void ath11k_dp_rx_msdus_set_payload(struct sk_buff *msdu)
4654{
4655        u32 rx_pkt_offset, l2_hdr_offset;
4656
4657        rx_pkt_offset = sizeof(struct hal_rx_desc);
4658        l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad((struct hal_rx_desc *)msdu->data);
4659        skb_pull(msdu, rx_pkt_offset + l2_hdr_offset);
4660}
4661
4662static struct sk_buff *
4663ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar,
4664                            u32 mac_id, struct sk_buff *head_msdu,
4665                            struct sk_buff *last_msdu,
4666                            struct ieee80211_rx_status *rxs)
4667{
4668        struct sk_buff *msdu, *mpdu_buf, *prev_buf;
4669        u32 decap_format, wifi_hdr_len;
4670        struct hal_rx_desc *rx_desc;
4671        char *hdr_desc;
4672        u8 *dest;
4673        struct ieee80211_hdr_3addr *wh;
4674
4675        mpdu_buf = NULL;
4676
4677        if (!head_msdu)
4678                goto err_merge_fail;
4679
4680        rx_desc = (struct hal_rx_desc *)head_msdu->data;
4681
4682        if (ath11k_dp_rxdesc_get_mpdulen_err(rx_desc))
4683                return NULL;
4684
4685        decap_format = ath11k_dp_rxdesc_get_decap_format(rx_desc);
4686
4687        ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);
4688
4689        if (decap_format == DP_RX_DECAP_TYPE_RAW) {
4690                ath11k_dp_rx_msdus_set_payload(head_msdu);
4691
4692                prev_buf = head_msdu;
4693                msdu = head_msdu->next;
4694
4695                while (msdu) {
4696                        ath11k_dp_rx_msdus_set_payload(msdu);
4697
4698                        prev_buf = msdu;
4699                        msdu = msdu->next;
4700                }
4701
4702                prev_buf->next = NULL;
4703
4704                skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN);
4705        } else if (decap_format == DP_RX_DECAP_TYPE_NATIVE_WIFI) {
4706                __le16 qos_field;
4707                u8 qos_pkt = 0;
4708
4709                rx_desc = (struct hal_rx_desc *)head_msdu->data;
4710                hdr_desc = ath11k_dp_rxdesc_get_80211hdr(rx_desc);
4711
4712                /* Base size */
4713                wifi_hdr_len = sizeof(struct ieee80211_hdr_3addr);
4714                wh = (struct ieee80211_hdr_3addr *)hdr_desc;
4715
4716                if (ieee80211_is_data_qos(wh->frame_control)) {
4717                        struct ieee80211_qos_hdr *qwh =
4718                                        (struct ieee80211_qos_hdr *)hdr_desc;
4719
4720                        qos_field = qwh->qos_ctrl;
4721                        qos_pkt = 1;
4722                }
4723                msdu = head_msdu;
4724
4725                while (msdu) {
4726                        rx_desc = (struct hal_rx_desc *)msdu->data;
4727                        hdr_desc = ath11k_dp_rxdesc_get_80211hdr(rx_desc);
4728
4729                        if (qos_pkt) {
4730                                dest = skb_push(msdu, sizeof(__le16));
4731                                if (!dest)
4732                                        goto err_merge_fail;
4733                                memcpy(dest, hdr_desc, wifi_hdr_len);
4734                                memcpy(dest + wifi_hdr_len,
4735                                       (u8 *)&qos_field, sizeof(__le16));
4736                        }
4737                        ath11k_dp_rx_msdus_set_payload(msdu);
4738                        prev_buf = msdu;
4739                        msdu = msdu->next;
4740                }
4741                dest = skb_put(prev_buf, HAL_RX_FCS_LEN);
4742                if (!dest)
4743                        goto err_merge_fail;
4744
4745                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4746                           "mpdu_buf %pK mpdu_buf->len %u",
4747                           prev_buf, prev_buf->len);
4748        } else {
4749                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4750                           "decap format %d is not supported!\n",
4751                           decap_format);
4752                goto err_merge_fail;
4753        }
4754
4755        return head_msdu;
4756
4757err_merge_fail:
4758        if (mpdu_buf && decap_format != DP_RX_DECAP_TYPE_RAW) {
4759                ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4760                           "err_merge_fail mpdu_buf %pK", mpdu_buf);
4761                /* Free the head buffer */
4762                dev_kfree_skb_any(mpdu_buf);
4763        }
4764        return NULL;
4765}
4766
4767static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,
4768                                    struct sk_buff *head_msdu,
4769                                    struct sk_buff *tail_msdu,
4770                                    struct napi_struct *napi)
4771{
4772        struct ath11k_pdev_dp *dp = &ar->dp;
4773        struct sk_buff *mon_skb, *skb_next, *header;
4774        struct ieee80211_rx_status *rxs = &dp->rx_status, *status;
4775
4776        mon_skb = ath11k_dp_rx_mon_merg_msdus(ar, mac_id, head_msdu,
4777                                              tail_msdu, rxs);
4778
4779        if (!mon_skb)
4780                goto mon_deliver_fail;
4781
4782        header = mon_skb;
4783
4784        rxs->flag = 0;
4785        do {
4786                skb_next = mon_skb->next;
4787                if (!skb_next)
4788                        rxs->flag &= ~RX_FLAG_AMSDU_MORE;
4789                else
4790                        rxs->flag |= RX_FLAG_AMSDU_MORE;
4791
4792                if (mon_skb == header) {
4793                        header = NULL;
4794                        rxs->flag &= ~RX_FLAG_ALLOW_SAME_PN;
4795                } else {
4796                        rxs->flag |= RX_FLAG_ALLOW_SAME_PN;
4797                }
4798                rxs->flag |= RX_FLAG_ONLY_MONITOR;
4799
4800                status = IEEE80211_SKB_RXCB(mon_skb);
4801                *status = *rxs;
4802
4803                ath11k_dp_rx_deliver_msdu(ar, napi, mon_skb);
4804                mon_skb = skb_next;
4805        } while (mon_skb);
4806        rxs->flag = 0;
4807
4808        return 0;
4809
4810mon_deliver_fail:
4811        mon_skb = head_msdu;
4812        while (mon_skb) {
4813                skb_next = mon_skb->next;
4814                dev_kfree_skb_any(mon_skb);
4815                mon_skb = skb_next;
4816        }
4817        return -EINVAL;
4818}
4819
4820static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,
4821                                          u32 quota, struct napi_struct *napi)
4822{
4823        struct ath11k_pdev_dp *dp = &ar->dp;
4824        struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4825        void *ring_entry;
4826        void *mon_dst_srng;
4827        u32 ppdu_id;
4828        u32 rx_bufs_used;
4829        u32 ring_id;
4830        struct ath11k_pdev_mon_stats *rx_mon_stats;
4831        u32      npackets = 0;
4832
4833        if (ar->ab->hw_params.rxdma1_enable)
4834                ring_id = dp->rxdma_mon_dst_ring.ring_id;
4835        else
4836                ring_id = dp->rxdma_err_dst_ring[mac_id].ring_id;
4837
4838        mon_dst_srng = &ar->ab->hal.srng_list[ring_id];
4839
4840        if (!mon_dst_srng) {
4841                ath11k_warn(ar->ab,
4842                            "HAL Monitor Destination Ring Init Failed -- %pK",
4843                            mon_dst_srng);
4844                return;
4845        }
4846
4847        spin_lock_bh(&pmon->mon_lock);
4848
4849        ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);
4850
4851        ppdu_id = pmon->mon_ppdu_info.ppdu_id;
4852        rx_bufs_used = 0;
4853        rx_mon_stats = &pmon->rx_mon_stats;
4854
4855        while ((ring_entry = ath11k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {
4856                struct sk_buff *head_msdu, *tail_msdu;
4857
4858                head_msdu = NULL;
4859                tail_msdu = NULL;
4860
4861                rx_bufs_used += ath11k_dp_rx_mon_mpdu_pop(ar, mac_id, ring_entry,
4862                                                          &head_msdu,
4863                                                          &tail_msdu,
4864                                                          &npackets, &ppdu_id);
4865
4866                if (ppdu_id != pmon->mon_ppdu_info.ppdu_id) {
4867                        pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
4868                        ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4869                                   "dest_rx: new ppdu_id %x != status ppdu_id %x",
4870                                   ppdu_id, pmon->mon_ppdu_info.ppdu_id);
4871                        break;
4872                }
4873                if (head_msdu && tail_msdu) {
4874                        ath11k_dp_rx_mon_deliver(ar, dp->mac_id, head_msdu,
4875                                                 tail_msdu, napi);
4876                        rx_mon_stats->dest_mpdu_done++;
4877                }
4878
4879                ring_entry = ath11k_hal_srng_dst_get_next_entry(ar->ab,
4880                                                                mon_dst_srng);
4881        }
4882        ath11k_hal_srng_access_end(ar->ab, mon_dst_srng);
4883
4884        spin_unlock_bh(&pmon->mon_lock);
4885
4886        if (rx_bufs_used) {
4887                rx_mon_stats->dest_ppdu_done++;
4888                if (ar->ab->hw_params.rxdma1_enable)
4889                        ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,
4890                                                   &dp->rxdma_mon_buf_ring,
4891                                                   rx_bufs_used,
4892                                                   HAL_RX_BUF_RBM_SW3_BM);
4893                else
4894                        ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,
4895                                                   &dp->rx_refill_buf_ring,
4896                                                   rx_bufs_used,
4897                                                   HAL_RX_BUF_RBM_SW3_BM);
4898        }
4899}
4900
4901static void ath11k_dp_rx_mon_status_process_tlv(struct ath11k *ar,
4902                                                int mac_id, u32 quota,
4903                                                struct napi_struct *napi)
4904{
4905        struct ath11k_pdev_dp *dp = &ar->dp;
4906        struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4907        struct hal_rx_mon_ppdu_info *ppdu_info;
4908        struct sk_buff *status_skb;
4909        u32 tlv_status = HAL_TLV_STATUS_BUF_DONE;
4910        struct ath11k_pdev_mon_stats *rx_mon_stats;
4911
4912        ppdu_info = &pmon->mon_ppdu_info;
4913        rx_mon_stats = &pmon->rx_mon_stats;
4914
4915        if (pmon->mon_ppdu_status != DP_PPDU_STATUS_START)
4916                return;
4917
4918        while (!skb_queue_empty(&pmon->rx_status_q)) {
4919                status_skb = skb_dequeue(&pmon->rx_status_q);
4920
4921                tlv_status = ath11k_hal_rx_parse_mon_status(ar->ab, ppdu_info,
4922                                                            status_skb);
4923                if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
4924                        rx_mon_stats->status_ppdu_done++;
4925                        pmon->mon_ppdu_status = DP_PPDU_STATUS_DONE;
4926                        ath11k_dp_rx_mon_dest_process(ar, mac_id, quota, napi);
4927                        pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
4928                }
4929                dev_kfree_skb_any(status_skb);
4930        }
4931}
4932
4933static int ath11k_dp_mon_process_rx(struct ath11k_base *ab, int mac_id,
4934                                    struct napi_struct *napi, int budget)
4935{
4936        struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);
4937        struct ath11k_pdev_dp *dp = &ar->dp;
4938        struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4939        int num_buffs_reaped = 0;
4940
4941        num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ar->ab, mac_id, &budget,
4942                                                             &pmon->rx_status_q);
4943        if (num_buffs_reaped)
4944                ath11k_dp_rx_mon_status_process_tlv(ar, mac_id, budget, napi);
4945
4946        return num_buffs_reaped;
4947}
4948
4949int ath11k_dp_rx_process_mon_rings(struct ath11k_base *ab, int mac_id,
4950                                   struct napi_struct *napi, int budget)
4951{
4952        struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);
4953        int ret = 0;
4954
4955        if (test_bit(ATH11K_FLAG_MONITOR_ENABLED, &ar->monitor_flags))
4956                ret = ath11k_dp_mon_process_rx(ab, mac_id, napi, budget);
4957        else
4958                ret = ath11k_dp_rx_process_mon_status(ab, mac_id, napi, budget);
4959        return ret;
4960}
4961
4962static int ath11k_dp_rx_pdev_mon_status_attach(struct ath11k *ar)
4963{
4964        struct ath11k_pdev_dp *dp = &ar->dp;
4965        struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4966
4967        skb_queue_head_init(&pmon->rx_status_q);
4968
4969        pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
4970
4971        memset(&pmon->rx_mon_stats, 0,
4972               sizeof(pmon->rx_mon_stats));
4973        return 0;
4974}
4975
4976int ath11k_dp_rx_pdev_mon_attach(struct ath11k *ar)
4977{
4978        struct ath11k_pdev_dp *dp = &ar->dp;
4979        struct ath11k_mon_data *pmon = &dp->mon_data;
4980        struct hal_srng *mon_desc_srng = NULL;
4981        struct dp_srng *dp_srng;
4982        int ret = 0;
4983        u32 n_link_desc = 0;
4984
4985        ret = ath11k_dp_rx_pdev_mon_status_attach(ar);
4986        if (ret) {
4987                ath11k_warn(ar->ab, "pdev_mon_status_attach() failed");
4988                return ret;
4989        }
4990
4991        /* if rxdma1_enable is false, no need to setup
4992         * rxdma_mon_desc_ring.
4993         */
4994        if (!ar->ab->hw_params.rxdma1_enable)
4995                return 0;
4996
4997        dp_srng = &dp->rxdma_mon_desc_ring;
4998        n_link_desc = dp_srng->size /
4999                ath11k_hal_srng_get_entrysize(ar->ab, HAL_RXDMA_MONITOR_DESC);
5000        mon_desc_srng =
5001                &ar->ab->hal.srng_list[dp->rxdma_mon_desc_ring.ring_id];
5002
5003        ret = ath11k_dp_link_desc_setup(ar->ab, pmon->link_desc_banks,
5004                                        HAL_RXDMA_MONITOR_DESC, mon_desc_srng,
5005                                        n_link_desc);
5006        if (ret) {
5007                ath11k_warn(ar->ab, "mon_link_desc_pool_setup() failed");
5008                return ret;
5009        }
5010        pmon->mon_last_linkdesc_paddr = 0;
5011        pmon->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
5012        spin_lock_init(&pmon->mon_lock);
5013
5014        return 0;
5015}
5016
5017static int ath11k_dp_mon_link_free(struct ath11k *ar)
5018{
5019        struct ath11k_pdev_dp *dp = &ar->dp;
5020        struct ath11k_mon_data *pmon = &dp->mon_data;
5021
5022        ath11k_dp_link_desc_cleanup(ar->ab, pmon->link_desc_banks,
5023                                    HAL_RXDMA_MONITOR_DESC,
5024                                    &dp->rxdma_mon_desc_ring);
5025        return 0;
5026}
5027
5028int ath11k_dp_rx_pdev_mon_detach(struct ath11k *ar)
5029{
5030        ath11k_dp_mon_link_free(ar);
5031        return 0;
5032}
5033